yosys.git
5 years agoMerge pull request #998 from mdaiter/get_bool_attribute_opts
Clifford Wolf [Wed, 8 May 2019 06:34:35 +0000 (08:34 +0200)]
Merge pull request #998 from mdaiter/get_bool_attribute_opts

Minor optimization to get_attribute_bool

5 years agoMinor optimization to get_attribute_bool
Matthew Daiter [Wed, 8 May 2019 03:04:28 +0000 (22:04 -0500)]
Minor optimization to get_attribute_bool

5 years agoAdd test case from #997
Clifford Wolf [Tue, 7 May 2019 17:58:04 +0000 (19:58 +0200)]
Add test case from #997

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix handling of partial init attributes in write_verilog, fixes #997
Clifford Wolf [Tue, 7 May 2019 17:55:36 +0000 (19:55 +0200)]
Fix handling of partial init attributes in write_verilog, fixes #997

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #996 from mdaiter/ceil_log2_opts
Clifford Wolf [Tue, 7 May 2019 17:46:27 +0000 (19:46 +0200)]
Merge pull request #996 from mdaiter/ceil_log2_opts

Optimize ceil_log2 function

5 years agoOptimize ceil_log2 function
Matthew Daiter [Mon, 6 May 2019 23:33:56 +0000 (18:33 -0500)]
Optimize ceil_log2 function

5 years agoAdd "synth_xilinx -arch"
Clifford Wolf [Tue, 7 May 2019 13:04:36 +0000 (15:04 +0200)]
Add "synth_xilinx -arch"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMore opt_clean cleanups
Clifford Wolf [Tue, 7 May 2019 12:41:58 +0000 (14:41 +0200)]
More opt_clean cleanups

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #946 from YosysHQ/clifford/specify
Clifford Wolf [Mon, 6 May 2019 18:57:15 +0000 (20:57 +0200)]
Merge pull request #946 from YosysHQ/clifford/specify

Add specify parser

5 years agoMerge pull request #975 from YosysHQ/clifford/fix968
Clifford Wolf [Mon, 6 May 2019 18:53:38 +0000 (20:53 +0200)]
Merge pull request #975 from YosysHQ/clifford/fix968

Re-enable "final loop assignment" feature and fix opt_clean warnings

5 years agoMerge pull request #871 from YosysHQ/verific_import
Clifford Wolf [Mon, 6 May 2019 18:51:59 +0000 (20:51 +0200)]
Merge pull request #871 from YosysHQ/verific_import

Improve verific -chparam and add hierarchy -chparam

5 years agoAdd tests/various/chparam.sh
Clifford Wolf [Mon, 6 May 2019 14:03:15 +0000 (16:03 +0200)]
Add tests/various/chparam.sh

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge branch 'master' of github.com:YosysHQ/yosys into clifford/fix968
Clifford Wolf [Mon, 6 May 2019 13:41:13 +0000 (15:41 +0200)]
Merge branch 'master' of github.com:YosysHQ/yosys into clifford/fix968

5 years agoFix the other bison warning in ilang_parser.y
Clifford Wolf [Mon, 6 May 2019 13:38:43 +0000 (15:38 +0200)]
Fix the other bison warning in ilang_parser.y

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoBugfix in peepopt_shiftmul.pmg
Clifford Wolf [Mon, 6 May 2019 13:34:19 +0000 (15:34 +0200)]
Bugfix in peepopt_shiftmul.pmg

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #992 from bwidawsk/bison-fix
Clifford Wolf [Mon, 6 May 2019 12:00:49 +0000 (14:00 +0200)]
Merge pull request #992 from bwidawsk/bison-fix

verilog_parser: Fix Bison warning

5 years agoMerge pull request #989 from YosysHQ/dave/abc_name_improve
Clifford Wolf [Mon, 6 May 2019 11:57:35 +0000 (13:57 +0200)]
Merge pull request #989 from YosysHQ/dave/abc_name_improve

ABC name recovery fixes

5 years agoFix bug in "expose -input"
Clifford Wolf [Mon, 6 May 2019 11:30:43 +0000 (13:30 +0200)]
Fix bug in "expose -input"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoCleanups in opt_clean
Clifford Wolf [Mon, 6 May 2019 10:45:22 +0000 (12:45 +0200)]
Cleanups in opt_clean

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoImprove tests/various/specify.ys
Clifford Wolf [Mon, 6 May 2019 10:26:15 +0000 (12:26 +0200)]
Improve tests/various/specify.ys

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd "real" keyword to ilang format
Clifford Wolf [Mon, 6 May 2019 10:00:40 +0000 (12:00 +0200)]
Add "real" keyword to ilang format

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge branch 'master' of github.com:YosysHQ/yosys into clifford/specify
Clifford Wolf [Mon, 6 May 2019 09:46:10 +0000 (11:46 +0200)]
Merge branch 'master' of github.com:YosysHQ/yosys into clifford/specify

5 years agoverilog_parser: Fix Bison warning
Ben Widawsky [Mon, 6 May 2019 02:29:11 +0000 (19:29 -0700)]
verilog_parser: Fix Bison warning

As of Bison 2.6, name-prefix is deprecated. This fixes
frontends/verilog/verilog_parser.y:99.1-34: warning: deprecated directive, use ‘%define api.prefix {frontend_verilog_yy}’ [-Wdeprecated]
 %name-prefix "frontend_verilog_yy"

For details: https://www.gnu.org/software/bison/manual/html_node/Multiple-Parsers.html

Compile tested only.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoMerge pull request #988 from YosysHQ/clifford/fix987
Clifford Wolf [Sat, 4 May 2019 19:58:25 +0000 (21:58 +0200)]
Merge pull request #988 from YosysHQ/clifford/fix987

Add approximate support for SV "var" keyword

5 years agoabc: Fix handling of postfixed names (e.g. for retiming)
David Shah [Sat, 4 May 2019 16:17:30 +0000 (17:17 +0100)]
abc: Fix handling of postfixed names (e.g. for retiming)

Signed-off-by: David Shah <dave@ds0.me>
5 years agoabc: Improve name recovery
David Shah [Sat, 4 May 2019 15:53:25 +0000 (16:53 +0100)]
abc: Improve name recovery

Signed-off-by: David Shah <dave@ds0.me>
5 years agoImprove opt_clean handling of unused wires
Clifford Wolf [Sat, 4 May 2019 07:47:16 +0000 (09:47 +0200)]
Improve opt_clean handling of unused wires

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd support for SVA "final" keyword
Clifford Wolf [Sat, 4 May 2019 07:25:32 +0000 (09:25 +0200)]
Add support for SVA "final" keyword

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoImprove write_verilog specify support
Clifford Wolf [Sat, 4 May 2019 06:46:24 +0000 (08:46 +0200)]
Improve write_verilog specify support

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoUpdate README
Clifford Wolf [Sat, 4 May 2019 06:01:39 +0000 (08:01 +0200)]
Update README

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd approximate support for SV "var" keyword, fixes #987
Clifford Wolf [Sat, 4 May 2019 05:52:51 +0000 (07:52 +0200)]
Add approximate support for SV "var" keyword, fixes #987

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMore testing
Eddie Hung [Fri, 3 May 2019 22:54:25 +0000 (15:54 -0700)]
More testing

5 years agoFix spacing
Eddie Hung [Fri, 3 May 2019 22:42:02 +0000 (15:42 -0700)]
Fix spacing

5 years agoAdd quick-and-dirty specify tests
Eddie Hung [Fri, 3 May 2019 22:35:26 +0000 (15:35 -0700)]
Add quick-and-dirty specify tests

5 years agoMerge remote-tracking branch 'origin/master' into clifford/specify
Eddie Hung [Fri, 3 May 2019 22:05:57 +0000 (15:05 -0700)]
Merge remote-tracking branch 'origin/master' into clifford/specify

5 years agoRename cells_map.v to prevent clash with ff_map.v
Eddie Hung [Fri, 3 May 2019 21:40:32 +0000 (14:40 -0700)]
Rename cells_map.v to prevent clash with ff_map.v

5 years agoiverilog with simcells.v as well
Eddie Hung [Fri, 3 May 2019 21:03:51 +0000 (14:03 -0700)]
iverilog with simcells.v as well

5 years agoAdd "hierarchy -chparam" support for non-verific top modules
Clifford Wolf [Fri, 3 May 2019 20:03:43 +0000 (22:03 +0200)]
Add "hierarchy -chparam" support for non-verific top modules

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agolog_warning_noprefix -> log_warning as per review
Eddie Hung [Thu, 14 Mar 2019 15:29:43 +0000 (15:29 +0000)]
log_warning_noprefix -> log_warning as per review

5 years agoFor hier_tree::Elaborate() also include SV root modules (bind)
Eddie Hung [Wed, 13 Mar 2019 22:40:00 +0000 (22:40 +0000)]
For hier_tree::Elaborate() also include SV root modules (bind)

5 years agoFix verific_parameters construction, use attribute to mark top netlists
Eddie Hung [Wed, 13 Mar 2019 22:05:55 +0000 (22:05 +0000)]
Fix verific_parameters construction, use attribute to mark top netlists

5 years agoWIP -chparam support for hierarchy when verific
Eddie Hung [Wed, 13 Mar 2019 19:42:18 +0000 (19:42 +0000)]
WIP -chparam support for hierarchy when verific

5 years agoverific_import() changes to avoid ElaborateAll()
Eddie Hung [Wed, 13 Mar 2019 00:02:04 +0000 (00:02 +0000)]
verific_import() changes to avoid ElaborateAll()

5 years agoMerge pull request #969 from YosysHQ/clifford/pmgenstuff
Clifford Wolf [Fri, 3 May 2019 18:39:50 +0000 (20:39 +0200)]
Merge pull request #969 from YosysHQ/clifford/pmgenstuff

Improve pmgen, Add "peepopt" pass with shift-mul pattern

5 years agoMerge pull request #984 from YosysHQ/eddie/fix_982
Clifford Wolf [Fri, 3 May 2019 18:34:32 +0000 (20:34 +0200)]
Merge pull request #984 from YosysHQ/eddie/fix_982

dffinit to do nothing when (* init *) value is 1'bx

5 years agoRevert "synth_xilinx to call dffinit with -noreinit"
Eddie Hung [Fri, 3 May 2019 16:55:02 +0000 (09:55 -0700)]
Revert "synth_xilinx to call dffinit with -noreinit"

This reverts commit 1f62dc9081feb4852b1848d01951f631853edb38.

5 years agoIf init is 1'bx, do not add to dict as per @cliffordwolf
Eddie Hung [Fri, 3 May 2019 15:06:16 +0000 (08:06 -0700)]
If init is 1'bx, do not add to dict as per @cliffordwolf

5 years agoRevert "dffinit -noreinit to silently continue when init value is 1'bx"
Eddie Hung [Fri, 3 May 2019 15:05:37 +0000 (08:05 -0700)]
Revert "dffinit -noreinit to silently continue when init value is 1'bx"

This reverts commit aa081f83c791b1d666214776aaf744a80ce6a690.

5 years agoMerge pull request #976 from YosysHQ/clifford/fix974
Clifford Wolf [Fri, 3 May 2019 13:29:44 +0000 (15:29 +0200)]
Merge pull request #976 from YosysHQ/clifford/fix974

Fix width detection of memory access with bit slice

5 years agoMerge pull request #985 from YosysHQ/clifford/fix981
Clifford Wolf [Fri, 3 May 2019 13:25:46 +0000 (15:25 +0200)]
Merge pull request #985 from YosysHQ/clifford/fix981

Improve opt_expr and opt_clean handling of (partially) undriven and/or unused wires

5 years agoFix typo in tests/svinterfaces/runone.sh
Clifford Wolf [Fri, 3 May 2019 12:40:51 +0000 (14:40 +0200)]
Fix typo in tests/svinterfaces/runone.sh

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #979 from jakobwenzel/svinterfacesTestcase
Clifford Wolf [Fri, 3 May 2019 12:37:46 +0000 (14:37 +0200)]
Merge pull request #979 from jakobwenzel/svinterfacesTestcase

fail svinterfaces testcases on yosys error exit

5 years agoImprove opt_expr and opt_clean handling of (partially) undriven and/or unused wires...
Clifford Wolf [Fri, 3 May 2019 12:24:53 +0000 (14:24 +0200)]
Improve opt_expr and opt_clean handling of (partially) undriven and/or unused wires, fixes #981

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFurther improve unused-detection for opt_clean driver-driver conflict warning
Clifford Wolf [Fri, 3 May 2019 07:22:26 +0000 (09:22 +0200)]
Further improve unused-detection for opt_clean driver-driver conflict warning

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoImprove unused-detection for opt_clean driver-driver conflict warning
Clifford Wolf [Fri, 3 May 2019 07:12:10 +0000 (09:12 +0200)]
Improve unused-detection for opt_clean driver-driver conflict warning

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoUpdate pmgen documentation
Clifford Wolf [Fri, 3 May 2019 06:35:45 +0000 (08:35 +0200)]
Update pmgen documentation

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix typo
Clifford Wolf [Fri, 3 May 2019 06:25:30 +0000 (08:25 +0200)]
Fix typo

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agosynth_xilinx to call dffinit with -noreinit
Eddie Hung [Fri, 3 May 2019 00:41:20 +0000 (17:41 -0700)]
synth_xilinx to call dffinit with -noreinit

5 years agodffinit -noreinit to silently continue when init value is 1'bx
Eddie Hung [Fri, 3 May 2019 00:40:39 +0000 (17:40 -0700)]
dffinit -noreinit to silently continue when init value is 1'bx

5 years agofail svinterfaces testcases on yosys error exit
Jakob Wenzel [Thu, 25 Apr 2019 13:12:24 +0000 (15:12 +0200)]
fail svinterfaces testcases on yosys error exit

5 years agoMerge pull request #963 from YosysHQ/eddie/synth_xilinx_fine
Clifford Wolf [Thu, 2 May 2019 07:11:07 +0000 (09:11 +0200)]
Merge pull request #963 from YosysHQ/eddie/synth_xilinx_fine

Revert synth_xilinx 'fine' label more to how it used to be...

5 years agoMerge pull request #978 from ucb-bar/fmtfirrtl
Eddie Hung [Thu, 2 May 2019 01:24:21 +0000 (18:24 -0700)]
Merge pull request #978 from ucb-bar/fmtfirrtl

Re-indent firrtl.cc:struct memory - no functional change.

5 years agoBack to passing all xc7srl tests!
Eddie Hung [Thu, 2 May 2019 01:23:21 +0000 (18:23 -0700)]
Back to passing all xc7srl tests!

5 years agoMerge remote-tracking branch 'origin/master' into eddie/synth_xilinx_fine
Eddie Hung [Thu, 2 May 2019 01:09:38 +0000 (18:09 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx_fine

5 years agoMerge branch 'master' of github.com:YosysHQ/yosys
Eddie Hung [Wed, 1 May 2019 23:26:43 +0000 (16:26 -0700)]
Merge branch 'master' of github.com:YosysHQ/yosys

5 years agoRe-indent firrtl.cc:struct memory - no functional change.
Jim Lawson [Wed, 1 May 2019 23:21:13 +0000 (16:21 -0700)]
Re-indent firrtl.cc:struct memory - no functional change.

5 years agoMerge branch 'clifford/fix883'
Clifford Wolf [Wed, 1 May 2019 22:04:12 +0000 (00:04 +0200)]
Merge branch 'clifford/fix883'

5 years agoAdd missing enable_undef to "sat -tempinduct-def", fixes #883
Clifford Wolf [Wed, 1 May 2019 22:03:31 +0000 (00:03 +0200)]
Add missing enable_undef to "sat -tempinduct-def", fixes #883

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #977 from ucb-bar/fixfirrtlmem
Clifford Wolf [Wed, 1 May 2019 21:47:16 +0000 (23:47 +0200)]
Merge pull request #977 from ucb-bar/fixfirrtlmem

Fix #938 - Crash occurs in case when use write_firrtl command

5 years agoFix #938 - Crash occurs in case when use write_firrtl command
Jim Lawson [Wed, 1 May 2019 20:16:01 +0000 (13:16 -0700)]
Fix #938 - Crash occurs in case when use write_firrtl command
Add missing memory initialization.
Sanity-check memory parameters.
Add Cell pointer to memory object (for error reporting).

5 years agoFix floating point exception in qwp, fixes #923
Clifford Wolf [Wed, 1 May 2019 13:06:46 +0000 (15:06 +0200)]
Fix floating point exception in qwp, fixes #923

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd splitcmplxassign test case and silence splitcmplxassign warning
Clifford Wolf [Wed, 1 May 2019 08:01:54 +0000 (10:01 +0200)]
Add splitcmplxassign test case and silence splitcmplxassign warning

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix width detection of memory access with bit slice, fixes #974
Clifford Wolf [Wed, 1 May 2019 07:57:26 +0000 (09:57 +0200)]
Fix width detection of memory access with bit slice, fixes #974

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd additional test cases for for-loops
Clifford Wolf [Wed, 1 May 2019 07:32:07 +0000 (09:32 +0200)]
Add additional test cases for for-loops

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoSilently resolve completely unused cell-vs-const driver-driver conflicts
Clifford Wolf [Wed, 1 May 2019 07:29:34 +0000 (09:29 +0200)]
Silently resolve completely unused cell-vs-const driver-driver conflicts

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoRe-enable "final loop assignment" feature
Clifford Wolf [Wed, 1 May 2019 07:01:47 +0000 (09:01 +0200)]
Re-enable "final loop assignment" feature

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix segfault in wreduce
Clifford Wolf [Tue, 30 Apr 2019 20:20:45 +0000 (22:20 +0200)]
Fix segfault in wreduce

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoDisabled "final loop assignment" feature
Clifford Wolf [Tue, 30 Apr 2019 18:22:50 +0000 (20:22 +0200)]
Disabled "final loop assignment" feature

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #972 from YosysHQ/clifford/fix968
Clifford Wolf [Tue, 30 Apr 2019 16:09:44 +0000 (18:09 +0200)]
Merge pull request #972 from YosysHQ/clifford/fix968

Add final loop variable assignment when unrolling for-loops

5 years agoMerge pull request #966 from YosysHQ/clifford/fix956
Clifford Wolf [Tue, 30 Apr 2019 16:08:41 +0000 (18:08 +0200)]
Merge pull request #966 from YosysHQ/clifford/fix956

Drive dangling wires with init attr with their init value

5 years agoMerge pull request #962 from YosysHQ/eddie/refactor_synth_xilinx
Clifford Wolf [Tue, 30 Apr 2019 16:07:19 +0000 (18:07 +0200)]
Merge pull request #962 from YosysHQ/eddie/refactor_synth_xilinx

Refactor synth_xilinx to auto-generate doc

5 years agoMerge branch 'master' into eddie/refactor_synth_xilinx
Clifford Wolf [Tue, 30 Apr 2019 15:00:34 +0000 (17:00 +0200)]
Merge branch 'master' into eddie/refactor_synth_xilinx

5 years agoMerge pull request #973 from christian-krieg/feature/python_bindings
Clifford Wolf [Tue, 30 Apr 2019 13:48:42 +0000 (15:48 +0200)]
Merge pull request #973 from christian-krieg/feature/python_bindings

Feature/python bindings cleanup

5 years agoInclude filename in "Executing Verilog-2005 frontend" message, fixes #959
Clifford Wolf [Tue, 30 Apr 2019 13:35:36 +0000 (15:35 +0200)]
Include filename in "Executing Verilog-2005 frontend" message, fixes #959

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix performance bug in RTLIL::SigSpec::operator==(), fixes #970
Clifford Wolf [Tue, 30 Apr 2019 13:19:04 +0000 (15:19 +0200)]
Fix performance bug in RTLIL::SigSpec::operator==(), fixes #970

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd final loop variable assignment when unrolling for-loops, fixes #968
Clifford Wolf [Tue, 30 Apr 2019 13:03:32 +0000 (15:03 +0200)]
Add final loop variable assignment when unrolling for-loops, fixes #968

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd handling of init attributes in "opt_expr -undriven"
Clifford Wolf [Tue, 30 Apr 2019 12:46:12 +0000 (14:46 +0200)]
Add handling of init attributes in "opt_expr -undriven"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge branch 'master' of https://github.com/YosysHQ/yosys into feature/python_bindings
Benedikt Tutzer [Tue, 30 Apr 2019 11:22:33 +0000 (13:22 +0200)]
Merge branch 'master' of https://github.com/YosysHQ/yosys into feature/python_bindings

5 years agoCleaned up root directory
Benedikt Tutzer [Tue, 30 Apr 2019 11:19:04 +0000 (13:19 +0200)]
Cleaned up root directory

5 years agoAdd peepopt_muldiv, fixes #930
Clifford Wolf [Tue, 30 Apr 2019 09:25:15 +0000 (11:25 +0200)]
Add peepopt_muldiv, fixes #930

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agopmgen progress
Clifford Wolf [Tue, 30 Apr 2019 08:51:51 +0000 (10:51 +0200)]
pmgen progress

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoRun "peepopt" in generic "synth" pass and "synth_ice40"
Clifford Wolf [Tue, 30 Apr 2019 06:10:37 +0000 (08:10 +0200)]
Run "peepopt" in generic "synth" pass and "synth_ice40"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoSome pmgen reorg, rename peepopt.pmg to peepopt_shiftmul.pmg
Clifford Wolf [Tue, 30 Apr 2019 06:04:22 +0000 (08:04 +0200)]
Some pmgen reorg, rename peepopt.pmg to peepopt_shiftmul.pmg

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoProgress in shiftmul peepopt pattern
Clifford Wolf [Tue, 30 Apr 2019 05:59:39 +0000 (07:59 +0200)]
Progress in shiftmul peepopt pattern

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #960 from YosysHQ/eddie/equiv_opt_undef
Clifford Wolf [Mon, 29 Apr 2019 11:54:26 +0000 (13:54 +0200)]
Merge pull request #960 from YosysHQ/eddie/equiv_opt_undef

Add -undef option to equiv_opt, passed to equiv_induct

5 years agoMerge pull request #967 from olegendo/depfile_esc_spaces
Clifford Wolf [Mon, 29 Apr 2019 11:48:52 +0000 (13:48 +0200)]
Merge pull request #967 from olegendo/depfile_esc_spaces

escape spaces with backslash when writing dep file

5 years agoAdd "peepopt" skeleton
Clifford Wolf [Mon, 29 Apr 2019 11:38:56 +0000 (13:38 +0200)]
Add "peepopt" skeleton

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd pmgen support for multiple patterns in one matcher
Clifford Wolf [Mon, 29 Apr 2019 11:02:05 +0000 (13:02 +0200)]
Add pmgen support for multiple patterns in one matcher

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agofix codestyle formatting
Oleg Endo [Mon, 29 Apr 2019 10:20:33 +0000 (19:20 +0900)]
fix codestyle formatting

5 years agoSupport multiple pmg files (right now just concatenated together)
Clifford Wolf [Fri, 26 Apr 2019 14:38:36 +0000 (16:38 +0200)]
Support multiple pmg files (right now just concatenated together)

Signed-off-by: Clifford Wolf <clifford@clifford.at>