[ARC]Fast interrupts support.

When a processor enters a fast interrupts handler, and duplicate
register banks are configured, the processor saves the user context by
saving the registers in the main register bank to these additional
registers in the duplicate register bank.  In this fast interrupt
context, when you specify the rgf_banked_regs option,the compiler does
not save the registers duplicated in the additional register bank are
not saved.

gcc/
2017-05-09  Claudiu Zissulescu  <claziss@synopsys.com>
    Andrew Burgess  <andrew.burgess@embecosm.com>

* config/arc/arc.c (ARC_AUTOBLINK_IRQ_P): Consider fast interrupts
case also.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(rgf_banked_register_count): New variable.
(parse_mrgf_banked_regs_option): New function.
(arc_override_options): Handle rgf_banked_regs option.
(arc_handle_interrupt_attribute): Add firq option.
(arc_compute_function_type): Return fast irq type when required.
(arc_must_save_register): Handle fast interrupts.
(arc_expand_prologue): Do not emit dwarf info for fast interrupts.
(arc_return_address_regs): Update.
* config/arc/arc.h (arc_return_address_regs): Update.
(arc_function_type): Add fast interrupt type.
(ARC_INTERRUPT_P): Update.
(RC_FAST_INTERRUPT_P): Define.
* config/arc/arc.md (simple_return): Update for fast interrupts.
(p_return_i): Likewise.
* config/arc/arc.opt (mrgf-banked-regs): New option.
* doc/invoke.texi (mrgf-banked-regs): Document.

testsuite/
2017-05-09  Claudiu Zissulescu  <claziss@synopsys.com>
    Andrew Burgess  <andrew.burgess@embecosm.com>

* gcc.target/arc/firq-1.c: New file.
* gcc.target/arc/firq-2.c: Likewise.
* gcc.target/arc/firq-3.c: Likewise.
* gcc.target/arc/firq-4.c: Likewise.
* gcc.target/arc/firq-5.c: Likewise.
* gcc.target/arc/firq-6.c: Likewise.

Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r247796

[ARC] Automatic context save/restore for regular interrupts.

The AUX_IRQ_CTRL register controls the behavior of automated register
save and restore or prologue and epilogue sequences during a non-fast
interrupt entry and exit, and context save and restore instructions.

A user passes to the compiler the configuration of the AUX_IRQ_CTRL
register via mirq-ctrl-saved option.  This option, specifies
gneral-purposes registers that the processor saves/restores on
interrupt entry and exit, and it is only valid for ARC EM and ARC HS
cores.

gcc/
2017-05-09  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (irq_ctrl_saved): New variable.
(ARC_AUTOBLINK_IRQ_P): Define.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(irq_range): New function.
(arc_must_save_register): Likewise.
(arc_must_save_return_addr): Likewise.
(arc_dwarf_emit_irq_save_regs): Likewise.
(arc_override_options): Handle deferred options.
(MUST_SAVE_REGISTER): Deleted, replaced by arc_must_save_register.
(MUST_SAVE_RETURN_ADDR): Deleted, replaced by
arc_must_save_return_addr.
(arc_compute_frame_size): Handle automated save and restore of
registers.
(arc_expand_prologue): Likewise.
(arc_expand_epilogue): Likewise.
* config/arc/arc.md (stack_irq_dwarf): New unspec instruction.
* config/arc/arc.opt (mirq-ctrl-saved): New option.
* doc/invoke.texi (mirq-ctrl-saved): Document option.

testsuite/
2017-05-09  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/interrupt-5.c: Newfile.
* gcc.target/arc/interrupt-6.c: Likewise.
* gcc.target/arc/interrupt-7.c: Likewise.
* gcc.target/arc/interrupt-8.c: Likewise.
* gcc.target/arc/interrupt-9.c: Likewise.

From-SVN: r247795

vect-44.c: Add --param vect-max-peeling-for-alignment=0 and adjust.

2017-05-09  Richard Biener  <rguenther@suse.de>

* gcc.dg/vect/vect-44.c: Add --param vect-max-peeling-for-alignment=0
and adjust.
* gcc.dg/vect/vect-50.c: Likewise.

From-SVN: r247794

PR c++/70167 - array prvalue treated as lvalue

* cp-tree.h (CONSTRUCTOR_C99_COMPOUND_LITERAL): New.
(enum fcl_t): New.
* semantics.c (finish_compound_literal): Add fcl_context parameter.
Only make a static variable for C99 syntax.
* parser.c (cp_parser_postfix_expression): Pass it.
* pt.c (tsubst_copy_and_build): Likewise.
* call.c (extend_ref_init_temps): Set
DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P.

From-SVN: r247793

ipa-devirt.c (default_hash_traits<type_pair>): Skip struct-scope typedefs.

* ipa-devirt.c (default_hash_traits<type_pair>): Skip struct-scope
typedefs.

From-SVN: r247791

re PR c/80525 (-Wlogical-op confused by undefined integer overflow)

PR c/80525
* c-warn.c (unwrap_c_maybe_const): New.
(warn_logical_operator): Call it.

* c-c++-common/Wlogical-op-1.c: Don't use -fwrapv anymore.
* c-c++-common/Wlogical-op-2.c: New test.

From-SVN: r247786

c-tree.h (pushdecl): Declare.

gcc/c/
* c-tree.h (pushdecl): Declare.
gcc/cp/
* cp-lang.c (get_global_decls, cxx_pushdecl): New.
(LANG_HOOKS_GETDECLS, LANG_HOOKS_PUSHDECL): Override.
* name-lookup.h (pushdecl_top_level): Declare.
gcc/c-family/
* c-common.c (c_register_builtin_type): Use pushdecl lang_hook.
* c-common.h (pushdecl_top_level, pushdecl): Don't declare here.
gcc/objc/
* objc-gnu-runtime-abi-01.c (objc_add_static_instance): Use
pushdecl lang_hook.

From-SVN: r247785

* doc/invoke.texi: Fix typo.

From-SVN: r247784

tree-vrp.c (vrp_val_is_max): Adjust comment.

2017-05-09  Richard Biener  <rguenther@suse.de>

* tree-vrp.c (vrp_val_is_max): Adjust comment.
(vrp_val_is_min): Likewise.
(set_value_range_to_value): Likewise.
(set_value_range_to_nonnegative): Likewise.
(gimple_assign_nonzero_p): Likewise.
(gimple_stmt_nonzero_p): Likewise.
(vrp_int_const_binop): Likewise.  Remove unreachable case.
(adjust_range_with_scev): Adjust comments.
(compare_range_with_value): Likewise.
(extract_range_from_phi_node): Likewise.
(test_for_singularity): Likewise.

From-SVN: r247783

Fix broken cunroll-13.c for avr target

The test reports bogus failures because the loop variable i is declared
as int, and the constant expected in the dump doesn't fit in an int for avr.
Fixed by explicitly using __INT32_TYPE__ for targets with __SIZEOF_INT__ < 4.

gcc/testsuite/

2017-05-09  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

* gcc.dg/tree-ssa/cunroll-13.c: Use __INT32_TYPE__ for
for targets with __SIZEOF_INT__ < 4.

From-SVN: r247782

tree-vrp.c (get_single_symbol): Add assert that we don't get overflowed constants as invariant part.

2017-05-09  Richard Biener  <rguenther@suse.de>

* tree-vrp.c (get_single_symbol): Add assert that we don't
get overflowed constants as invariant part.
(compare_values_warnv): Add comment before the TREE_NO_WARNING
checks.  Use wi::cmp instead of recursing for integer constants.
(compare_values): Just ignore whether we assumed undefined
overflow instead of failing the compare.
(extract_range_for_var_from_comparison_expr): Add comment before the
TREE_NO_WARNING sets.
(test_for_singularity): Likewise.
(extract_range_from_comparison): Do not disable optimization
when we assumed undefined overflow.
(extract_range_basic): Remove init of unused var.

From-SVN: r247781

vect-50.c: Revert last change.

2017-05-09  Richard Biener  <rguenther@suse.de>

* gcc.dg/vect/vect-50.c: Revert last change.
* gcc.dg/vect/vect-44.c: Likewise.

From-SVN: r247780

tree-vrp.c (vrp_int_const_binop): Use wide-ints and simplify.

2017-05-09  Richard Biener  <rguenther@suse.de>

* tree-vrp.c (vrp_int_const_binop): Use wide-ints and simplify.
(extract_range_from_multiplicative_op_1): Adjust.
(extract_range_from_binary_expr_1): Use int_const_binop.

From-SVN: r247779

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/c-family/ChangeLog:

PR translation/80280
* c-format.h (struct format_flag_spec): Add new member.
(T89_T): New macro.
* c-format.c (local_tree_type_node): New global.
(printf_flag_specs, asm_fprintf_flag_spec): Initialize new data.
(gcc_diag_flag_specs, scanf_flag_specs, strftime_flag_specs): Ditto.
(strfmon_flag_specs): Likewise.
(gcc_diag_char_table, gcc_cdiag_char_table): Split up specifiers
with distinct quoting properties.
(gcc_tdiag_char_table, gcc_cxxdiag_char_table): Same.
(flag_chars_t::validate): Add argument and handle bad quoting.
(check_format_info_main): Handle quoting problems.
(init_dynamic_diag_info): Simplify.

gcc/testsuite/ChangeLog:

PR translation/80280
* gcc.dg/format/gcc_diag-10.c: New test.

From-SVN: r247778

re PR target/80101 (ICE in store_data_bypass_p, at recog.c:3737)

gcc/testsuite/ChangeLog:

2017-05-08  Kelvin Nilsen  <kelvin@gcc.gnu.org>

PR target/80101
* gcc.target/powerpc/pr80101-1.c: New test.

gcc/ChangeLog:

2017-05-08  Kelvin Nilsen  <kelvin@gcc.gnu.org>

PR target/80101
* config/rs6000/power6.md: Replace store_data_bypass_p calls with
rs6000_store_data_bypass_p in seven define_bypass directives and
in several comments.
* config/rs6000/rs6000-protos.h: Add prototype for
rs6000_store_data_bypass_p function.
* config/rs6000/rs6000.c (rs6000_store_data_bypass_p): New
function implements slightly different (rs6000-specific) semantics
than store_data_bypass_p, returning false rather than aborting
with assertion error when arguments do not satisfy the
requirements of store data bypass.
(rs6000_adjust_cost): Replace six calls of store_data_bypass_p with
rs6000_store_data_bypass_p.

From-SVN: r247777

Daily bump.

From-SVN: r247776

xtensa: add support for SSP

gcc/
2017-05-08  Max Filippov  <jcmvbkbc@gmail.com>

* config/xtensa/xtensa-protos.h
        (xtensa_initial_elimination_offset): New declaration.
* config/xtensa/xtensa.c (xtensa_initial_elimination_offset):
New function. Move its body from the INITIAL_ELIMINATION_OFFSET
macro definition, add case for FRAME_POINTER_REGNUM when
FRAME_GROWS_DOWNWARD.
* config/xtensa/xtensa.h (FRAME_GROWS_DOWNWARD): New macro
definition.
(INITIAL_ELIMINATION_OFFSET): Replace body with call to
xtensa_initial_elimination_offset.

From-SVN: r247771

* doc/invoke.texi: Alphabetize -fdump options.

From-SVN: r247760

re PR translation/80280 (Missing closing quote (%>) c/semantics.c and c/c-typeck.c)

gcc/ChangeLog:

PR translation/80280
* config/sol2-c.c (solaris_pragma_align): Correct quoting.

From-SVN: r247758

PR c++/80178 - parameter passing for uncopyable classes

* tree.c (type_has_nontrivial_copy_init): True for classes with only
deleted copy/move ctors.
(remember_deleted_copy, maybe_warn_parm_abi): New.
* decl.c (require_complete_types_for_parms, check_function_type):
Call maybe_warn_parm_abi.
* call.c (convert_for_arg_passing, build_cxx_call): Likewise.

From-SVN: r247757

Bump C++ ABI version.

* c-opts.c (c_common_post_options): Update defaults for
flag_abi_version and flag_abi_compat_version.

From-SVN: r247756

re PR fortran/79930 (Potentially Missed Optimisation for MATMUL / DOT_PRODUCT)

2017-05-08  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/79930
* frontend-passes.c (matmul_to_var_expr): New function,
add prototype.
(matmul_to_var_code):  Likewise.
(optimize_namespace):  Use them from gfc_code_walker.

2017-05-08  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/79930
* gfortran.dg/inline_transpose_1.f90:  Add
-finline-matmul-limit=0 to options.
* gfortran.dg/matmul_5.f90:  Likewise.
* gfortran.dg/vect/vect-8.f90: Likewise.
* gfortran.dg/inline_matmul_14.f90:  New test.
* gfortran.dg/inline_matmul_15.f90:  New test.

From-SVN: r247755

decl.c (builtin_function_1): Set DCL_ANTICIPATED before pushing.

* decl.c (builtin_function_1): Set DCL_ANTICIPATED before pushing.
(start_preparsed_function): Do decl pushing before setting
current_funciton_decl and announcing it.

From-SVN: r247754

re PR libfortran/80602 (Reduce stack usage for blocked matmul)

2017-05-08  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/80602
* m4/matmul_internal.m4:  'matmul_name`:  Change
t1 to a VLA of the required size.
        * generated/matmul_c10.c: Regenerated.
        * generated/matmul_c16.c: Regenerated.
        * generated/matmul_c4.c: Regenerated.
        * generated/matmul_c8.c: Regenerated.
        * generated/matmul_i1.c: Regenerated.
        * generated/matmul_i16.c: Regenerated.
        * generated/matmul_i2.c: Regenerated.
        * generated/matmul_i4.c: Regenerated.
        * generated/matmul_i8.c: Regenerated.
        * generated/matmul_r10.c: Regenerated.
        * generated/matmul_r16.c: Regenerated.
        * generated/matmul_r4.c: Regenerated.
        * generated/matmul_r8.c: Regenerated.

2017-05-08  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/80602
* gfortran.dg/matmul_15.f90:  New test case.

From-SVN: r247753

name-lookup.h (pushdecl_with_scope): Replace with ...

* name-lookup.h (pushdecl_with_scope): Replace with ...
(pushdecl_outermost_localscope): ... this.
* name-lookup.c (pushdecl_with_scope): Replace with ...
(pushdecl_outermost_localscope): ... this.
(pushdecl_namespace_level): Adjust.
* decl.c (cp_make_fname_decl): Use pushdecl_outermost_localscope.
* lambda.c (insert_capture_proxy): Likewise.

From-SVN: r247752

target.def (compute_frame_layout): New optional target hook.

2017-05-08  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * target.def (compute_frame_layout): New optional target hook.
        * doc/tm.texi.in (TARGET_COMPUTE_FRAME_LAYOUT): Add hook.
        * doc/tm.texi (TARGET_COMPUTE_FRAME_LAYOUT): Add documentation.
        * lra-eliminations.c (update_reg_eliminate): Call compute_frame_layout
        target hook.
        * reload1.c (verify_initial_elim_offsets): Likewise.
        * config/arm/arm.c (TARGET_COMPUTE_FRAME_LAYOUT): Define.
        (use_simple_return_p): Call arm_compute_frame_layout if needed.
        (arm_get_frame_offsets): Split up into this ...
        (arm_compute_frame_layout): ... and this function.

From-SVN: r247750

Tweak static assertions in std::optional

* include/std/optional: Use a separate static_assert per condition.
* testsuite/20_util/optional/cons/value_neg.cc: Update dg-error line
numbers.

From-SVN: r247748

class.c (build_vtbl_initializer): Don't shadow outer variable with static var.

* class.c (build_vtbl_initializer): Don't shadow outer variable
with static var.

From-SVN: r247747

[AArch64] Tighten move constraints for symbolic operands

The movsi and movdi constraints allowed the source to be any
absolute symbolic expression ("S").  That's OK for operands that
have already been vetted by the aarch64_mov_operand predicate but
causes problems if the register allocator substitutes an equivalence
(the usual "the constraints can't accept more than the predicates"
restriction).

Although all other uses of "S" in the backend are redundant and could
in principle be removed, "S" itself is a publicly-documented constraint
and so we'd have to keep its definition.  This patch therefore adds a
new "Usa" constraint for legitimate absolute address operands.

2017-05-08  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/constraints.md (Usa): New constraint.
* config/aarch64/aarch64.md (*movsi_aarch64, *movdi_aarch64): Use it.

From-SVN: r247746

Revert _binding -> _value change.

* name-lookup.h (get_namespace_value, set_global_value): Rename to
...
(get_namespace_binding, set_global_binding): ... these.
* name-lookup.c (get_namespace_value, set_global_value): Rename to
...
(get_namespace_binding, set_global_binding): ... these.
(arg_assoc_namespace, pushdecl_maybe_friend_1)
check_for_out_of_scope_variable, push_overloaded_decl_1,
lookup_name_innermost_nonclass_level, push_namespace): Adjust.
* cp-tree.h (IDENTIFIER_GLOBAL_VALUE)
SET_IDENTIFIER_GLOBAL_VALUE): Adjust.
* decl.c (poplevel): Adjust.
* pt.c (make_constrained_auto): Likewise.
((--This line, and those below, will be ignored--

M    cp/cp-tree.h
M    cp/name-lookup.c
M    cp/name-lookup.h
M    cp/decl.c
M    cp/ChangeLog
M    cp/pt.c

From-SVN: r247745

* es.po, sv.po: Update.

From-SVN: r247743

Clarify mt_allocator documentation w.r.t deallocation

* doc/xml/manual/mt_allocator.xml: Clarify deallocation behaviour.
* doc/html/*: Regenerate.

From-SVN: r247742

Define TM_MULTILIB_CONFIG for ARM multilib

TM_MULTILIB_CONFIG is not set in config.gcc when building with multilib
for arm targets, leading to config/arm/t-multilib not including any of
the files (t-aprofile and t-rmprofile) definining the architecture and
FPU to build multilib for. This patch fixes that by setting
TM_MULTILIB_CONFIG to with_multilib_list's value after it has been
checked. It also fix a trailing whitespace issue.

2017-05-08  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config.gcc (arm*-*-*): Set TM_MULTILIB_CONFIG from
    with_multilib_list after it has been checked.

From-SVN: r247741

tree-ssa-pre.c (bitmap_set_and): Avoid bitmap copy.

2017-05-08  Richard Biener  <rguenther@suse.de>

* tree-ssa-pre.c (bitmap_set_and): Avoid bitmap copy.
(bitmap_set_subtract_values): Likewise.

From-SVN: r247739

tree-vrp.c (gimple_assign_nonzero_warnv_p): Rename to ...

2017-05-08  Richard Biener  <rguenther@suse.de>

* tree-vrp.c (gimple_assign_nonzero_warnv_p): Rename to ...
(gimple_assign_nonzero): ... this and remove strict_overflow_p
argument.
(gimple_stmt_nonzero_warnv_p): Rename to ...
(gimple_stmt_nonzero_p): ... this and remove strict_overflow_p
argument.
(vrp_stmt_computes_nonzero): Remove strict_overflow_p argument.
(extract_range_basic): Adjust, do not disable propagation on
strict overflow sensitive simplification.
(vrp_visit_cond_stmt): Likewise.

From-SVN: r247738

This fixes a few failures on ARM and AArch64 due to a recent change in...

This fixes a few failures on ARM and AArch64 due to a recent change in
alignment peeling by switching the vector cost model off.

Tested on AArch64, ARM and x64 - committed as obvious.

    testsuite/
* gcc.dg/vect/vect-44.c: Add -fno-vect-cost-model.
* gcc.dg/vect/vect-50.c: Likewise.

From-SVN: r247737

Daily bump.

From-SVN: r247733

ipa-inline-analysis.c (estimate_function_body_sizes): Recompute body size unconditionally.

* ipa-inline-analysis.c (estimate_function_body_sizes): Recompute
body size unconditionally.

From-SVN: r247729

re PR translation/80280 (Missing closing quote (%>) c/semantics.c and c/c-typeck.c)

        PR translation/80280
        * call.c (print_z_candidate): Fix quoting.

From-SVN: r247728

revert: re PR tree-optimization/78496 (Missed opportunities for jump threading)

2017-05-07  Jeff Law  <law@redhat.com>

Revert:
2017-05-06  Jeff Law  <law@redhat.com>
PR tree-optimization/78496
* tree-vrp.c (simplify_assert_expr_using_ranges): Remove debugging
code.

PR tree-optimization/78496
* tree-vrp.c (simplify_assert_expr_using_ranges): New function.
(simplify_stmt_using_ranges): Call it.
(vrp_dom_walker::before_dom_children): Extract equivalences
from an ASSERT_EXPR with an equality comparison against a
constant.

Revert:
2017-05-06  Jeff Law  <law@redhat.com>
PR tree-optimization/78496
* gcc.dg/tree-ssa/ssa-thread-16.c: New test.
* gcc.dg/tree-ssa/ssa-thread-17.c: New test.

From-SVN: r247727

Daily bump.

From-SVN: r247726

re PR tree-optimization/78496 (Missed opportunities for jump threading)

PR tree-optimization/78496
* tree-vrp.c (simplify_assert_expr_using_ranges): Remove debugging
code.

From-SVN: r247722

re PR tree-optimization/78496 (Missed opportunities for jump threading)

PR tree-optimization/78496
* tree-vrp.c (simplify_assert_expr_using_ranges): New function.
(simplify_stmt_using_ranges): Call it.
(vrp_dom_walker::before_dom_children): Extract equivalences
from an ASSERT_EXPR with an equality comparison against a
constant.

PR tree-optimization/78496
* gcc.dg/tree-ssa/ssa-thread-16.c: New test.
* gcc.dg/tree-ssa/ssa-thread-17.c: New test.

From-SVN: r247721

Record equivalences for spill registers

If we decide to allocate a call-clobbered register R to a value that
is live across a call, LRA will create a new spill register TMPR,
insert:

   TMPR <- R

before the call and

   R <- TMPR

after it.  But if we then failed to allocate a register to TMPR, we would
always spill it to the stack, even if R was known to be equivalent to
a constant or to some existing memory location.  And on AArch64, we'd
always fail to allocate such a register for 128-bit Advanced SIMD modes,
since no registers of those modes are call-preserved.

This patch avoids the problem by copying the equivalence information
from the original pseudo to the spill register.  It means that the
code for the testcase is as good with -O2 as it is with -O,
whereas previously the -O code was better.

[Based on the code ARM contributed in branches/ARM/sve-branch@247248]

2017-05-06  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* lra-constraints.c (lra_copy_reg_equiv): New function.
(split_reg): Use it to copy equivalence information from the
original register to the spill register.

gcc/testsuite/
* gcc.target/aarch64/spill_1.c: New test.

From-SVN: r247720

PR 75964: Invalid integer ABS handling in simplify-rtx.c

RTL has no distinction between signed and unsigned values, so it
doesn't make sense to test for signed overflow.

2017-05-06  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
PR rtl-optimization/75964
* simplify-rtx.c (simplify_const_relational_operation): Remove
invalid handling of comparisons of integer ABS.

gcc/testsuite/
PR rtl-optimization/75964
* gcc.dg/torture/pr75964.c: New test.

From-SVN: r247719

Remove default_packed lines from i386/avx-vtestp{d,s}*

2017-05-06  Tom de Vries  <tom@codesourcery.com>

PR testsuite/80606
* gcc.target/i386/avx-vtestpd-1.c: Remove default_packed lines.
* gcc.target/i386/avx-vtestpd-2.c: Same.
* gcc.target/i386/avx-vtestpd-256-1.c: Same.
* gcc.target/i386/avx-vtestpd-256-2.c: Same.
* gcc.target/i386/avx-vtestpd-256-3.c: Same.
* gcc.target/i386/avx-vtestpd-3.c: Same.
* gcc.target/i386/avx-vtestps-1.c: Same.
* gcc.target/i386/avx-vtestps-2.c: Same.
* gcc.target/i386/avx-vtestps-256-1.c: Same.
* gcc.target/i386/avx-vtestps-256-2.c: Same.
* gcc.target/i386/avx-vtestps-256-3.c: Same.
* gcc.target/i386/avx-vtestps-3.c: Same.

From-SVN: r247718

Add absolute line number comment in gcc.target/avr/progmem-error-1.cpp

2017-05-06  Tom de Vries  <tom@codesourcery.com>

* gcc.target/avr/progmem-error-1.cpp: Add abolute line number comment.

From-SVN: r247717

Replace absolute line numbers in gcc.target/powerpc

2017-05-06  Tom de Vries  <tom@codesourcery.com>

PR testsuite/80557
* gcc.target/powerpc/altivec-macros.c: Replace absolute line numbers.
* gcc.target/powerpc/altivec-types-1.c: Same.

From-SVN: r247716

Replace absolute line numbers in gcc.target/spu

2017-05-06  Tom de Vries  <tom@codesourcery.com>

PR testsuite/80557
* gcc.target/spu/Wmain.c: Replace absolute line numbers.
* gcc.target/spu/intrinsics-1.c: Same.

From-SVN: r247715

Replace absolute line numbers in gcc.target/arm

2017-05-06  Tom de Vries  <tom@codesourcery.com>

PR testsuite/80557
* gcc.target/arm/pr69180.c: Replace absolute line numbers.

From-SVN: r247714

Replace absolute line numbers in gcc.target/aarch64

2017-05-06  Tom de Vries  <tom@codesourcery.com>

PR testsuite/80557
* gcc.target/aarch64/spellcheck_1.c: Replace absolute line numbers.
* gcc.target/aarch64/spellcheck_2.c: Same.
* gcc.target/aarch64/spellcheck_3.c: Same.

From-SVN: r247713

Replace absolute line numbers in g++.dg/{debug,goacc}

2017-05-06  Tom de Vries  <tom@codesourcery.com>

PR testsuite/80557
* g++.dg/debug/dwarf2/dwarf2-1.C: Replace absolute line numbers.
* g++.dg/debug/dwarf2/dwarf2-2.C: Same.
* g++.dg/debug/dwarf2/pr46123-2.C: Same.
* g++.dg/debug/dwarf2/typedef5.C: Same.
* g++.dg/goacc/data-1.C: Same.

From-SVN: r247712

i386.c (ext_80387_constant_init): Do not explicitly initialize to zero.

* config/i386/i386.c (ext_80387_constant_init): Do not explicitly
initialize to zero.
(init_regs): Remove declaration.
(function_arg_advance_32): Initialize error_p as boolean variable.

From-SVN: r247711

Add fuchsia support to libgcc

* config/arm/unwind-arm.h (_Unwind_decode_typeinfo_ptr): Use
pc-relative indirect handling for fuchsia.
* config/t-slibgcc-fuchsia: New file.
* config.host (*-*-fuchsia*, aarch64*-*-fuchsia*, arm*-*-fuchsia*,
x86_64-*-fuchsia*): Add definitions.

From-SVN: r247710

Daily bump.

From-SVN: r247709

store-motion.c (remove_reachable_equiv_notes): Reformat long lines.

* store-motion.c (remove_reachable_equiv_notes): Reformat long
lines.  Use for (;;).

From-SVN: r247705

rs6000.c (rs6000_vect_nonmem): New static var.

[gcc]

2017-05-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_vect_nonmem): New static var.
(rs6000_init_cost): Initialize rs6000_vect_nonmem.
(rs6000_add_stmt_cost): Update rs6000_vect_nonmem.
(rs6000_finish_cost): Avoid vectorizing simple copy loops with
VF=2 that require versioning.

[gcc/testsuite]

2017-05-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

* gcc.target/powerpc/versioned-copy-loop.c: New file.

From-SVN: r247671

Convert CARET_LINE_MARGIN to const int

gcc/ChangeLog:
* diagnostic.h (CARET_LINE_MARGIN): Convert from macro to const
int.

From-SVN: r247666

Convert diagnostic_override_option_index from macro to inline function

gcc/ChangeLog:
* diagnostic.h (diagnostic_override_option_index): Convert from
macro to inline function.

From-SVN: r247665

Get rid of macros for diagnostic_report_current_module

diagnostic.h has a couple of macros (diagnostic_last_module_changed
and diagnostic_set_last_module) which are only used within
diagnostic_report_current_module.

This patch eliminates the macros in favor of static functions within
diagnostic.c.

No functional change intended.

gcc/ChangeLog:
* diagnostic.c (last_module_changed_p): New function.
(set_last_module): New function.
(diagnostic_report_current_module): Convert macro usage to
the above functions.
* diagnostic.h (diagnostic_context::last_module): Strengthen
from const line_map * to const line_map_ordinary *.
(diagnostic_last_module_changed): Delete macro.
(diagnostic_set_last_module): Delete macro.

From-SVN: r247664

Eliminate report_diagnostic macro

This patch eliminates the report_diagnostic macro, manually
expanding it in all sites in the code.

No functional change intended.

gcc/c-family/ChangeLog:
* c-common.c (c_cpp_error): Replace report_diagnostic
with diagnostic_report_diagnostic.

gcc/c/ChangeLog:
* c-decl.c (warn_defaults_to): Replace report_diagnostic
with diagnostic_report_diagnostic.
* c-errors.c (pedwarn_c99): Likewise.
(pedwarn_c90): Likewise.

gcc/cp/ChangeLog:
* error.c (pedwarn_cxx98): Replace report_diagnostic
with diagnostic_report_diagnostic.

gcc/ChangeLog:
* diagnostic.c (diagnostic_impl): Replace report_diagnostic
with diagnostic_report_diagnostic.
(diagnostic_n_impl_richloc): Likewise.
* diagnostic.h (report_diagnostic): Delete macro.
* rtl-error.c (diagnostic_for_asm): Replace report_diagnostic
with diagnostic_report_diagnostic.
* substring-locations.c (format_warning_va): Likewise.

gcc/fortran/ChangeLog:
* cpp.c (cb_cpp_error): Replace report_diagnostic
with diagnostic_report_diagnostic.
* error.c (gfc_warning): Likewise.
(gfc_warning_now_at): Likewise.
(gfc_warning_now): Likewise.
(gfc_warning_internal): Likewise.
(gfc_error_now): Likewise.
(gfc_fatal_error): Likewise.
(gfc_error_opt): Likewise.
(gfc_internal_error): Likewise.

From-SVN: r247663

diagnostic.c: add print_option_information

This patch simplifies diagnostic_report_diagnostic by moving
option-printing to a new subroutine.

Doing so required a slight rewrite.  In both the old and new
code, context->option_name returns a malloc-ed string.
The old behavior was to then use ACONCAT to manipulate the
format_spec, appending the option metadata.
ACONCAT calcs the buffer size, then uses alloca, and then copies the
data to the on-stack buffer.

Given the alloca, this needs rewriting when moving the printing to
a subroutine.  In the new version, the metadata is simply printed
using pp_* calls (so it's hitting the obstack within the
pretty_printer).

This means we can get rid of the save/restore of format_spec: I don't
believe anything else in the code modifies it.

It also seems inherently simpler; it seems odd to me to be
appending metadata to the formatting string, rather than simply
printing the metadata after the formatted string is printed
(the old code also assumed that no option name contained a '%').

No functional change intended.

gcc/ChangeLog:
* diagnostic.c (diagnostic_report_diagnostic): Eliminate
save/restor of format_spec.  Move option-printing code to...
(print_option_information): ...this new function, and
reimplement by simply printing to the pretty_printer,
rather than appending to the format string.

From-SVN: r247661

diagnostic_report_diagnostic: refactor pragma-handling

This patch simplifies diagnostic_report_diagnostic by moving the
pragma-handling logic into a subroutine.

No functional change intended.

gcc/ChangeLog:
* diagnostic.c (diagnostic_report_diagnostic): Split out pragma
handling logic into...
(update_effective_level_from_pragmas): ...this new function.

From-SVN: r247660

RISC-V: Add -mstrict-align option

The RISC-V user ISA permits misaligned accesses, but they may trap
and be emulated.  That emulation software needs to be compiled assuming
strict alignment.

Even when strict alignment is not required, set SLOW_UNALIGNED_ACCESS
based upon -mtune to avoid a performance pitfall.

gcc/ChangeLog:

2017-05-04  Andrew Waterman  <andrew@sifive.com>

* config/riscv/riscv.opt (mstrict-align): New option.
* config/riscv/riscv.h (STRICT_ALIGNMENT): Use it.  Update comment.
(SLOW_UNALIGNED_ACCESS): Define.
(riscv_slow_unaligned_access): Declare.
* config/riscv/riscv.c (riscv_tune_info): Add slow_unaligned_access
field.
(riscv_slow_unaligned_access): New variable.
(rocket_tune_info): Set slow_unaligned_access to true.
(optimize_size_tune_info): Set slow_unaligned_access to false.
(riscv_cpu_info_table): Add entry for optimize_size_tune_info.
(riscv_valid_lo_sum_p): Use TARGET_STRICT_ALIGN.
(riscv_option_override): Set riscv_slow_unaligned_access.
        * doc/invoke.texi: Add -mstrict-align to RISC-V.

From-SVN: r247659

RISC-V: Unify indention in riscv.md

This contains only whitespace changes.

gcc/ChangeLog

2017-05-04  Kito Cheng  <kito.cheng@gmail.com>

* config/riscv/riscv.md: Unify indentation.

From-SVN: r247658

re PR target/79038 (Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128)

[gcc]
2017-05-05  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/79038
PR target/79202
PR target/79203
* config/rs6000/rs6000.md (u code attribute): Add FIX and
UNSIGNED_FIX.
(extendsi<mode>2): Add support for doing sign extension via
VUPKHSW and XXPERMDI if the value is in Altivec registers and we
don't have ISA 3.0 instructions.
(extendsi<mode>2 splitter): Likewise.
(fix_trunc<mode>si2): If we are at ISA 2.07 (VSX small integer),
generate the normal insns since SImode can now go in vector
registers.  Disallow the special UNSPECs needed for previous
machines to hide SImode being used.  Add new insns
fctiw{,w}_<mode>_smallint if SImode can go in vector registers.
(fix_trunc<mode>si2_stfiwx): Likewise.
(fix_trunc<mode>si2_internal): Likewise.
(fixuns_trunc<mode>si2): Likewise.
(fixuns_trunc<mode>si2_stfiwx): Likewise.
(fctiw<u>z_<mode>_smallint): Likewise.
(fctiw<u>z_<mode>_mem): New combiner pattern to prevent conversion
of floating point to 32-bit integer from doing a direct move to
the GPR registers to do a store.
(fctiwz_<mode>): Break long line.

[gcc/testsuite]
2017-05-05  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/79038
PR target/79202
PR target/79203
* gcc.target/powerpc/ppc-round3.c: New test.
* gcc.target/powerpc/ppc-round2.c: Update expected code.

From-SVN: r247657

cp-tree.h (IDENTIFIER_GLOBAL_VALUE): Use get_namespace_value.

* cp-tree.h (IDENTIFIER_GLOBAL_VALUE): Use get_namespace_value.
(SET_IDENTIFIER_GLOBAL_VALUE): Use set_global_value.
(IDENTIFIER_NAMESPACE_VALUE): Delete.
* name-lookup.h (namespace_binding, set_namespace_binding):
Replace
with ...
(get_namespace_value, set_global_value): ... these.
(get_global_value_if_present, is_typename_at_global_scope):
Delete.
* decl.c (poplevel): Use get_namespace_value.
(grokdeclarator): Use IDENTIFIER_GLOBAL_VALUE.
* class.c (build_vtbl_initializer): Stash library decl in
static var. Use IDENTIFIER_GLOBAL_VALUE.
* except.c (do_get_exception_ptr, do_begin_catch, do_end_catch)
do_allocate_exception, do_free_exception, build_throw): Likewise.
* init.c (throw_bad_array_new_length): Likewise.
* rtti.c (throw_bad_cast, throw_bad_typeid): Likewise.
* name-lookup.c (arg_assoc_namespace, pushdecl_maybe_friend_1)
check_for_our_of_scope_variable, push_overloaded_decl_1): Use
get_namespace_value.
(set_namespace_binding_1): Rename to
(set_namespace_binding): ... here.
(set_global_value): New.
(lookup_name_innermost_nonclass_level_1, push_namespace): Use
get_namespace_value.
* pt.c (listify): Use get_namespace_value.
((--This line, and those below, will be ignored--

M    cp/name-lookup.c
M    cp/name-lookup.h
M    cp/ChangeLog
M    cp/except.c
M    cp/class.c
M    cp/pt.c
M    cp/init.c
M    cp/cp-tree.h
M    cp/decl.c
M    cp/rtti.c

From-SVN: r247654

Makefile.in (GTFILES): Add tree-ssa-loop-ivopts.c.

* Makefile.in (GTFILES): Add tree-ssa-loop-ivopts.c.
* tree-ssa-loop-ivopts.c (compute_max_addr_offset): Delete.
(addr_list, addr_offset_valid_p): New.
(split_address_groups): Check offset validity with above function.
(gt-tree-ssa-loop-ivopts.h): Include header file.

From-SVN: r247653

builtins.c (check_sizes, [...]): Fix typos introduced during merge conflict resolution.

gcc/ChangeLog:
* builtins.c (check_sizes, check_strncat_sizes): Fix typos
introduced during merge conflict resolution.
(expand_builtin_strncat): Same.

gcc/testsuite/ChangeLog:
* gcc.dg/pr78138.c: Adjust text of expected diagnostics.
* gcc.dg/pr79214.c: Same.
* gcc.dg/pr79222.c: Same.
* gcc.dg/pr79223.c: Same.
* gcc.dg/tree-ssa/builtins-folding-gimple-ub.c: Expect warnings.

From-SVN: r247652

* config.gcc (arm*-*-*): Add missing 'fi'.

From-SVN: r247650

invoke.texi (-fopt-info): Explicitly say order of options included in -fopt-info does not matter.

2017-05-05  Steve Ellcey  <sellcey@cavium.com>

* doc/invoke.texi (-fopt-info): Explicitly say order of options
included in -fopt-info does not matter.
* doc/optinfo.texi (-fopt-info): Fix description of default
behavour. Explicitly say order of options included in -fopt-info
does not matter.

From-SVN: r247648

[ARM] Allow combination of aprofile and rmprofile multilibs

2017-05-05  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config.gcc: Allow combinations of aprofile and rmprofile values for
    --with-multilib-list.
    * config/arm/t-multilib: New file.
    * config/arm/t-aprofile: Remove initialization of MULTILIB_*
    variables.  Remove setting of ISA and floating-point ABI in
    MULTILIB_OPTIONS and MULTILIB_DIRNAMES.  Set architecture and FPU in
    MULTI_ARCH_OPTS_A and MULTI_ARCH_DIRS_A rather than MULTILIB_OPTIONS
    and MULTILIB_DIRNAMES respectively.  Add comment to introduce all
    matches.  Add architecture matches for marvel-pj4 and generic-armv7-a
    CPU options.
    * config/arm/t-rmprofile: Likewise except for the matches changes.
    * doc/install.texi (--with-multilib-list): Document the combination of
    aprofile and rmprofile values and warn about pitfalls in doing that.

From-SVN: r247646

call.c (make_temporary_var_for_ref_to_temp): Push decl into current scope.

* call.c (make_temporary_var_for_ref_to_temp): Push decl into
current scope.
* lex.c (unqualified_name_lookup_error): Likewise.

From-SVN: r247645

class.c (alter_class): Use retrofit_lang_decl directly.

* class.c (alter_class): Use retrofit_lang_decl directly.
* decl.c (push_local_name, dupliate_decls): Likewise.
* semantics.c (omp_privatize_field): Likewise.

From-SVN: r247644

Float to int moves currently generate inefficient code due to hacks used in the movsi and movdi patterns.

Float to int moves currently generate inefficient code due to
hacks used in the movsi and movdi patterns.  The 'r = w' variant
uses '*' which tells the register allocator to ignore it.
As a result the float to int moves typically spill to the stack,
which is extremely inefficient.

    gcc/
* config/aarch64/aarch64.md (movsi_aarch64): Remove '*' from r=w.
(movdi_aarch64): Likewise.

From-SVN: r247643

re PR tree-optimization/80632 (error: invalid PHI argument with -O2)

PR tree-optimization/80632
* tree-switch-conversion.c (struct switch_conv_info): Add target_vop
field.
(build_arrays): Initialize it for virtual phis.
(fix_phi_nodes): Use it for virtual phis.

* gcc.dg/pr80632.c: New test.

From-SVN: r247642

re PR tree-optimization/80558 (VRP not handling x & -2 well)

PR tree-optimization/80558
* tree-vrp.c (extract_range_from_binary_expr_1): Optimize
[x, y] op z into [x op, y op z] for op & or | if conditions
are met.

* gcc.dg/tree-ssa/vrp115.c: New test.

From-SVN: r247641

[ARM] PR71607: Fix ICE when loading constant

2017-05-05  Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Prakhar Bahuguna  <prakhar.bahuguna@arm.com>

    gcc/
    PR target/71607
    * config/arm/arm.md (use_literal_pool): Remove.
    (64-bit immediate split): No longer takes cost into consideration
    if arm_disable_literal_pool is enabled.
    * config/arm/arm.c (arm_tls_referenced_p): Add diagnostic if TLS is
    used when arm_disable_literal_pool is enabled.
    (arm_max_const_double_inline_cost): Remove use of
    arm_disable_literal_pool.
    (push_minipool_fix): Add assert.
    (arm_reorg): Add return if arm_disable_literal_pool is enabled.
    * config/arm/vfp.md (no_literal_pool_df_immediate): New.
    (no_literal_pool_sf_immediate): New.

2017-05-05  Andre Vieira  <andre.simoesdiasvieira@arm.com>
        Thomas Preud'homme  <thomas.preudhomme@arm.com>
        Prakhar Bahuguna  <prakhar.bahuguna@arm.com>

    gcc/testsuite/
    PR target/71607
    * gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ...
    * gcc.target/arm/thumb2-slow-flash-data-1.c: ... this.
    * gcc.target/arm/thumb2-slow-flash-data-2.c: New.
    * gcc.target/arm/thumb2-slow-flash-data-3.c: New.
    * gcc.target/arm/thumb2-slow-flash-data-4.c: New.
    * gcc.target/arm/thumb2-slow-flash-data-5.c: New.
    * gcc.target/arm/tls-disable-literal-pool.c: New.

Co-Authored-By: Prakhar Bahuguna <prakhar.bahuguna@arm.com>
Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com>
From-SVN: r247640

Kill walk_namespaces.

* cp-tree.h (walk_namespaces_fn, walk_namespaces): Delete.
* decl.c (walk_namespaces_r, walk_namespaces): Delete.

From-SVN: r247638

re PR tree-optimization/80613 (ICE in is_gimple_reg_type with -O2)

2017-05-05  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

PR tree-optimization/80613
* tree-ssa-dce.c (propagate_necessity): Remove cases for
BUILT_IN_STRDUP and BUILT_IN_STRNDUP.

testsuite/
* gcc.dg/tree-ssa/pr79697.c (k): Remove.

From-SVN: r247635

tree-ssa-pre.c (get_or_alloc_expr_for): Simplify.

2017-05-05  Richard Biener  <rguenther@suse.de>

* tree-ssa-pre.c (get_or_alloc_expr_for): Simplify.

From-SVN: r247634

Kill per-namespace static_decls.

* cp-tree.h (static_decls): Declare.
(wrapup_globals_for_namespace)
diagnose_inline_vars_for_namespace): Replace with ...
(wrapup_namespace_globals): ... this.
* decl.c (static_decls): Define.
(wrapup_globals_for_namespace)
diagnose_inline_vars_for_namespace): Replace with ...
(wrapup_namespace_globals): ... this.
(cxx_init_decl_processing): Initialize static_decls.
* decl2.c (c_parse_final_cleanups): Adjust.
* name-lookup.h (cp_binding_level): Remove static_decls member.
* name-lookup.c (add_decl_to_level): Adjust.
(begin_scope): Adjust.
((--This line, and those below, will be ignored--

M    cp/cp-tree.h
M    cp/name-lookup.c
M    cp/name-lookup.h
M    cp/ChangeLog
M    cp/decl2.c
M    cp/decl.c

From-SVN: r247633

avr.md [...]: Remove any occurence of this flag from insn conditions due to removal from r247495.

* config/avr/avr.md [flag_strict_overflow]: Remove any occurence
of this flag from insn conditions due to removal from r247495.

From-SVN: r247632

Code scheduling for Cortex-A53 isn't as good as it could be.

Code scheduling for Cortex-A53 isn't as good as it could be.  It turns out
code runs faster overall if we place loads and stores with a dependency
closer together.  To achieve this effect, this patch adds a bypass between
cortex_a53_load1 and cortex_a53_load*/cortex_a53_store* if the result of an
earlier load is used in an address calculation.  This significantly improved
benchmark scores in a proprietary benchmark suite.

    gcc/
* config/arm/aarch-common.c (arm_early_load_addr_dep_ptr):
New function.
(arm_early_store_addr_dep_ptr): Likewise.
* config/arm/aarch-common-protos.h
(arm_early_load_addr_dep_ptr): Add prototype.
(arm_early_store_addr_dep_ptr): Likewise.
* config/arm/cortex-a53.md: Add new bypasses.

From-SVN: r247631

re PR c++/71577 (ICE on invalid C++11 code (with extra struct initializer): in digest_init_r, at cp/typeck2.c:1117)

/cp
2017-05-05  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/71577
* decl.c (reshape_init): Unconditionally return error_mark_node
upon error about too many initializers.

/testsuite
2017-05-05  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/71577
* g++.dg/cpp0x/pr71577.C: New.

From-SVN: r247630

tree.c (next_type_uid): Change type to unsigned.

* tree.c (next_type_uid): Change type to unsigned.
(type_hash_canon): Decrement back next_type_uid if
freeing a type node with the highest TYPE_UID.  For INTEGER_TYPEs
also ggc_free TYPE_MIN_VALUE, TYPE_MAX_VALUE and TYPE_CACHED_VALUES
if possible.

From-SVN: r247628

Daily bump.

From-SVN: r247627

builtins.c: Fix a trivial typo in a comment.

gcc/ChangeLog:
* builtins.c: Fix a trivial typo in a comment.

From-SVN: r247623

PR libstdc++/54924 - Warn for std::string constructor with wrong size

PR libstdc++/54924 - Warn for std::string constructor with wrong size
PR middle-end/79234 - warn on past the end reads by library functions

gcc/ChangeLog:

PR middle-end/79234
* builtins.c (check_sizes): Adjust to handle reading past the end.
Avoid printing excessive upper bound of ranges.  Use %E to print
tree nodes instead of converting them to %wu.
(expand_builtin_memchr): New function.
(compute_dest_size): Rename...
(compute_objsize): ...to this.
(expand_builtin_memcpy): Adjust.
(expand_builtin_mempcpy): Adjust.
(expand_builtin_strcat): Adjust.
(expand_builtin_strcpy): Adjust.
(check_strncat_sizes): Adjust.
(expand_builtin_strncat): Adjust.
(expand_builtin_strncpy): Adjust and simplify.
(expand_builtin_memset): Adjust.
(expand_builtin_bzero): Adjust.
(expand_builtin_memcmp): Adjust.
(expand_builtin): Handle memcmp.
(maybe_emit_chk_warning): Check strncat just once.

gcc/testsuite/ChangeLog:

PR middle-end/79234
* gcc.dg/builtin-stringop-chk-8.c: New test.
* gcc.dg/builtin-stringop-chk-1.c: Adjust.
* gcc.dg/builtin-stringop-chk-4.c: Same.
* gcc.dg/builtin-strncat-chk-1.c: Same.
* g++.dg/ext/strncpy-chk1.C: Same.
* g++.dg/torture/Wsizeof-pointer-memaccess1.C: Same.
* gcc.dg/out-of-bounds-1.c: Same.
* gcc.dg/pr78138.c: Same.
* gcc.dg/torture/Wsizeof-pointer-memaccess1.c: Same.
* gfortran.dg/mvbits_7.f90: Same.

From-SVN: r247622

Fix a typo.

From-SVN: r247619

PR preprocessor/79214 - -Wno-system-header defeats strncat buffer overflow warnings

PR preprocessor/79214 -  -Wno-system-header defeats strncat buffer overflow warnings
PR middle-end/79222 - missing -Wstringop-overflow= on a stpcpy overflow
PR middle-end/79223 - missing -Wstringop-overflow on a memmove overflow

gcc/ChangeLog:

PR preprocessor/79214
PR middle-end/79222
PR middle-end/79223
* builtins.c (check_sizes): Add inlinining context and issue
warnings even when -Wno-system-headers is set.
(check_strncat_sizes): Same.
(expand_builtin_strncat): Same.
(expand_builtin_memmove): New function.
(expand_builtin_stpncpy): Same.
(expand_builtin): Handle memmove and stpncpy.

gcc/testsuite/ChangeLog:

PR preprocessor/79214
PR middle-end/79222
PR middle-end/79223
* gcc.dg/pr79214.c: New test.
* gcc.dg/pr79214.h: New test header.
* gcc.dg/pr79222.c: New test.
* gcc.dg/pr79223.c: New test.
* gcc.dg/pr78138.c: Adjust.
* gfortran.dg/unconstrained_commons.f: Same.

From-SVN: r247618

* constraint.cc (diagnose_check_constraint): Fix %E thinko.

From-SVN: r247614

tree-ssa-loop-ivopts.c (struct cost_pair): Remove field inv_expr which is not used any more.

* tree-ssa-loop-ivopts.c (struct cost_pair): Remove field inv_expr
which is not used any more.

From-SVN: r247612

Many supported cores use the AUTOPREFETCHER_WEAK setting which tries to order...

Many supported cores use the AUTOPREFETCHER_WEAK setting which tries
to order loads and stores to improve streaming performance.  Since significant
gains were reported in http://patchwork.ozlabs.org/patch/534469/ it seems
like a good idea to enable this setting too for -mcpu=generic.  Since the
weak model only keeps the order if it doesn't make the schedule worse, it
should not impact performance adversely on cores that don't show a gain.

    gcc/
        * config/aarch64/aarch64.c (generic_tunings): Update prefetch model.

From-SVN: r247610

Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on...

Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on
average with no obvious performance difference.  See original discussion of
the overheads of various alignments:
https://gcc.gnu.org/ml/gcc-patches/2016-06/msg02075.html.

    gcc/
* config/aarch64/aarch64.c (cortexa35_tunings): Set jump alignment to 4.
(cortexa53_tunings): Likewise.
(cortexa57_tunings): Likewise.
(cortexa72_tunings): Likewise.
(cortexa73_tunings): Likewise.

From-SVN: r247609

With -mcpu=generic the loop alignment is currently 4.

With -mcpu=generic the loop alignment is currently 4.  All but one of the
supported cores use 8 or higher.  Since using 8 provides performance gains
on several cores, it is best to use that by default.  As discussed in [1],
the jump alignment has no effect on performance, yet has a relatively high
codesize cost [2], so setting it to 4 is best.  This gives a 0.2% overall
codesize improvement as well as performance gains in several benchmarks.

    gcc/
* config/aarch64/aarch64.c (generic_tunings): Set jump alignment to 4.
Set loop alignment to 8.

[1] https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00574.html
[2] https://gcc.gnu.org/ml/gcc-patches/2016-06/msg02075.html

From-SVN: r247608

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/c-family/ChangeLog:

PR translation/80280
* c-attribs.c (handle_alias_ifunc_attribute): Quote a %D directive.
(handle_weakref_attribute): Same.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/ChangeLog:

PR translation/80280
* config/i386/i386.c (ix86_function_versions): Quote a %D directive.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/cp/ChangeLog:

PR translation/80280
* call.c (print_z_candidate): Add missing quoting to %D and other
like directives.
(build_op_call_1): Same.
* constraint.cc (diagnose_check_constraint): Same.
* mangle.c (mangle_decl): Same.
* name-lookup.c (cp_binding_level_debug): Same.
(set_decl_namespace): Same.
* parser.c (cp_parser_tx_qualifier_opt): Same.
* pt.c (print_candidates_1): Same.
(check_template_variable): Same.
(tsubst_default_argument): Same.
(most_specialized_partial_spec): Same.
* semantics.c (omp_reduction_lookup): Same.
* tree.c (check_abi_tag_redeclaration): Same.
* typeck.c (comptypes): Same.
* typeck2.c (abstract_virtuals_error_sfinae): Same.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/ChangeLog:

PR translation/80280
* builtins.c (expand_builtin_object_size): Add missing quoting to
%D and like directives.
* hsa-gen.c (hsa_type_for_scalar_tree_type): Same.
(hsa_type_for_tree_type): Same.
(verify_function_arguments): Same.
* symtab.c (symbol_table::change_decl_assembler_name): Same.
* varasm.c (get_section): Same.
(mark_weak): Same.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/objc/ChangeLog:

PR translation/80280
* objc-gnu-runtime-abi-01.c (objc_eh_runtime_type): Add missing
quoting to directives.
* objc-next-runtime-abi-01.c (objc_eh_runtime_type): Ditto.
* objc-next-runtime-abi-02.c (next_runtime_02_eh_type): Ditto.

PR translation/80280 - Missing closing quote (%>) c/semantics.c and c/c-typeck.c

gcc/testsuite/ChangeLog:

PR translation/80280
* g++.dg/abi/Wabi-2-3.C: Adjust.
* g++.dg/abi/Wabi-3-2.C: Ditto.
* g++.dg/lookup/using17.C: Ditto.
* gcc.dg/format/gcc_diag-1.c (foo): Ditto.

From-SVN: r247607

All cores which add a cpu_addrcost_table use a non-zero value for HI and TI...

All cores which add a cpu_addrcost_table use a non-zero value for
HI and TI mode shifts (a non-zero value for general indexing also
applies to all shifts).  Given this, it makes no sense to use a
different setting in generic_addrcost_table.  So change it so that
all supported cores, including -mcpu=generic, now generate the same:

int f(short *p, short *q, long x) { return p[x] + q[x]; }

        lsl     x2, x2, 1
        ldrsh   w3, [x0, x2]
        ldrsh   w0, [x1, x2]
        add     w0, w3, w0
        ret

    gcc/
* config/aarch64/aarch64.c (generic_addrcost_table):
Change HI/TI mode setting.

From-SVN: r247606

[PR 80622] Treat const pools as initialized in SRA

2017-05-04  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/80622
* tree-sra.c (comes_initialized_p): New function.
(build_accesses_from_assign): Only set write lazily when
comes_initialized_p is false.
(analyze_access_subtree): Use comes_initialized_p.
(propagate_subaccesses_across_link): Assert !comes_initialized_p
instead of testing for PARM_DECL.

testsuite/
* gcc.dg/tree-ssa/pr80622.c: New test.

From-SVN: r247604

[AArch64] Accept more addressing modes for PRFM

* config/aarch64/aarch64.md (prefetch); Adjust predicate and
constraint on operand 0 to allow more general addressing modes.
Adjust output template.
* config/aarch64/aarch64.c (aarch64_address_valid_for_prefetch_p):
New function.
* config/aarch64/aarch64-protos.h
(aarch64_address_valid_for_prefetch_p): Declare prototype.
* config/aarch64/constraints.md (Dp): New address constraint.
* config/aarch64/predicates.md (aarch64_prefetch_operand): New
predicate.

* gcc.target/aarch64/prfm_imm_offset_1.c: New test.

From-SVN: r247603