re PR fortran/90988 (Wrong error message with variables named "PUBLIC*")

2019-11-01  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/90988
* decl.c (gfc_match_private, gfc_match_public): Fixed-form source code
does not require whitespace between PRIVATE (or PUBLIC) and an entity.

2019-11-01  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/90988
* gfortran.dg/pr90988_4.f: New test.

From-SVN: r277714

builtin-sprintf-warn-3.c: Declare test functions with noipa attribute.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/builtin-sprintf-warn-3.c: Declare test functions
with noipa attribute.

From-SVN: r277711

[rs6000] vector conversion RTL pattern update for diff unit size

2019-11-01  Kewen Lin  <linkw@gcc.gnu.org>

  * config/rs6000/rs6000-modes.def (V2SF, V2SI): New modes.
  * config/rs6000/vsx.md (UNSPEC_VSX_CVSPSXDS, UNSPEC_VSX_CVSPUXDS): Remove.
  (vsx_xvcvspdp): New define_expand, old define_insn split to...
  (vsx_xvcvspdp_be): ... this.  New.  And...
  (vsx_xvcvspdp_le): ... this.  New.
  (vsx_xvcv<su>xwdp): New define_expand, old define_insn split to...
  (vsx_xvcv<su>xwdp_be): ... this.  New.  And...
  (vsx_xvcv<su>xwdp_le): ... this.  New.
  (vsx_xvcvsp<su>xds): New define_expand, old define_insn split to...
  (vsx_xvcvsp<su>xds_be): ... this.  New.  And...
  (vsx_xvcvsp<su>xds_le): ... this.  New.

From-SVN: r277709

[rs6000] vector conversion RTL pattern update for same unit size

2019-11-01  Kewen Lin  <linkw@gcc.gnu.org>

  * config/rs6000/vsx.md (UNSPEC_VSX_CVSXWSP, UNSPEC_VSX_CVUXWSP,
  UNSPEC_VSX_XVCVSXDDP, UNSPEC_VSX_XVCVUXDDP,
  UNSPEC_VSX_XVCVDPSXDS, UNSPEC_VSX_XVCVDPUXDS,
  UNSPEC_VSX_XVCVSPSXWS): Remove.
  (vsx_xvcv<su>xddp, vsx_xvcvdp<su>xds, vsx_xvcvsp<su>xws,
  vsx_xvcv<su>xwsp): Update define_insn RTL patterns.

From-SVN: r277708

[C++ PATCH] cleanup check_field_decls

https://gcc.gnu.org/ml/gcc-patches/2019-11/msg00012.html
cp/
* class.c (check_field_decls): Refactor.

testsuite/
* g++.dg/template/fn.C: New.

From-SVN: r277707

[rs6000] Replace vsx_xvcdpsp by vsx_xvcvdpsp

2019-11-01  Kewen Lin  <linkw@gcc.gnu.org>

    * config/rs6000/vsx.md (vsx_xvcdpsp): Remove define_insn.
    (UNSPEC_VSX_XVCDPSP): Remove.
    * config/rs6000/rs6000.c (rs6000_generate_float2_double_code):
    Replace gen_vsx_xvcdpsp by gen_vsx_xvcvdpsp.

From-SVN: r277706

OpenMP] use_device_addr/use_device_ptr with Fortran allocatable/pointer arrays

        gcc/fortran/
        * f95-lang.c (LANG_HOOKS_OMP_ARRAY_DATA): Set to gfc_omp_array_data.
        * trans-array.c (gfc_conv_descriptor_data_get): Handle also
        REFERENCE_TYPE.
        * trans-openmp.c (gfc_omp_array_data): New.
        * trans.h (gfc_omp_array_data): New prototype.

        gcc/
        * hooks.c (hook_tree_tree_bool_null): New.
        * hooks.h (hook_tree_tree_bool_null): Declare.
        * langhooks-def.h (LANG_HOOKS_OMP_ARRAY_DATA): Define.
        (LANG_HOOKS_DECLS): Add it.
        * langhooks.h (lang_hooks_for_decls): Add omp_array_data.
        * omp-low.c (install_var_field): New mode for Fortran descriptor arrays.
        (lower_omp_target): Handle Fortran array with descriptor in
        OMP_CLAUSE_USE_DEVICE_ADDR/OMP_CLAUSE_USE_DEVICE_PTR.

        libgomp/
        * testsuite/libgomp.fortran/use_device_addr-1.f90 (test_nullptr_1,
        test_dummy_opt_nullptr_callee_1): Add present but unallocated test.
        * testsuite/libgomp.fortran/use_device_addr-2.f90: Likewise.
        * testsuite/libgomp.fortran/use_device_addr-3.f90: New.
        * testsuite/libgomp.fortran/use_device_addr-4.f90: New.
        * testsuite/testsuite/libgomp.fortran/use_device_ptr-1.f90: New.

From-SVN: r277705

PR testsuite/92127: Disable unrolling for some vect code model cases

  2019-11-01  Kewen Lin  <linkw@gcc.gnu.org>

  PR testsuite/92127
  * gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c: Disable unroll.
  * gcc.dg/vect/costmodel/ppc/costmodel-fast-math-vect-pr29925.c: Likewise.

From-SVN: r277704

Daily bump.

From-SVN: r277703

Regenerate libstdc++ HTML docs

* doc/html/*: Regenerate.

From-SVN: r277699

Add remaining changes from P1065R2 "constexpr INVOKE"

* include/bits/refwrap.h (reference_wrapper, ref, cref): Add constexpr
specifiers for C++20.
* include/std/functional (_Mem_fn, mem_fn, _Bind, _Bind_result, bind)
(bind_front, _Not_fn, not_fn): Likewise.
* testsuite/20_util/bind/constexpr.cc: New test.
* testsuite/20_util/function_objects/bind_front/constexpr.cc: New test.
* testsuite/20_util/function_objects/mem_fn/constexpr.cc: New test.
* testsuite/20_util/function_objects/not_fn/constexpr.cc: New test.
* testsuite/20_util/reference_wrapper/constexpr.cc: New test.

From-SVN: r277698

Partial implementation of C++20 of <ranges> header

* doc/doxygen/user.cfg.in: Add new header.
* include/Makefile.am: Add new header.
* include/Makefile.in: Regenerate.
* include/precompiled/stdc++.h: Include new header.
* include/std/ranges: New header.
(ranges::sentinel_t, ranges::range_value_t, ranges::range_reference_t)
(ranges::range_rvalue_reference_t, ranges::sized_range)
(ranges::output_range, ranges::input_ranges, ranges::forward_range)
(ranges::bidirectional_range, ranges::random_access_range)
(ranges::contiguous_range, ranges::common::range): Define.
* testsuite/24_iterators/headers/iterator/synopsis_c++20.cc: Check
that disabled_sized_sentinel can be specialized.
* testsuite/std/ranges/access/begin.cc: Include <ranges> instead of
<iterator>.
* testsuite/std/ranges/access/cbegin.cc: Likewise.
* testsuite/std/ranges/access/cdata.cc: Likewise.
* testsuite/std/ranges/access/cend.cc: Likewise.
* testsuite/std/ranges/access/crbegin.cc: Likewise.
* testsuite/std/ranges/access/crend.cc: Likewise.
* testsuite/std/ranges/access/data.cc: Likewise.
* testsuite/std/ranges/access/empty.cc: Likewise.
* testsuite/std/ranges/access/end.cc: Likewise.
* testsuite/std/ranges/access/end_neg.cc: Likewise.
* testsuite/std/ranges/access/rbegin.cc: Likewise.
* testsuite/std/ranges/access/rend.cc: Likewise.
* testsuite/std/ranges/access/size.cc: Likewise.
* testsuite/std/ranges/access/size_neg.cc: Likewise.
* testsuite/std/ranges/headers/ranges/synopsis.cc: New test.
* testsuite/std/ranges/range.cc: New test.
* testsuite/std/ranges/refinements.cc: New test.
* testsuite/std/ranges/sized.cc: New test.
* testsuite/util/testsuite_iterators.h: Add aliases for range types.
(output_iterator_wrapper::WritableObject::operator=): Add const
qualifier so that output_iterator_wrapper satisfies writable.

From-SVN: r277697

Test --help=common for full sentences

The portion of help.exp that checks that help output contains full
sentences failed to cover common options.

for  gcc/testsuite/ChangeLog

* gcc.misc-tests/help.exp: Test --help=common for full sentences.

From-SVN: r277686

re PR preprocessor/92296 (internal compiler error: Segmentation fault  #pragma push_macro("__LINE__"))

PR preprocessor/92296
* internal.h (struct def_pragma_macro): Add is_builtin bitfield.
(_cpp_restore_special_builtin): Declare.
* init.c (_cpp_restore_special_builtin): New function.
* directives.c (do_pragma_push_macro): For NT_BUILTIN_MACRO
set is_builtin and don't try to grab definition.
(cpp_pop_definition): Use _cpp_restore_special_builtin to restore
builtin macros.

* c-c++-common/cpp/pr92296-1.c: New test.
* c-c++-common/cpp/pr92296-2.c: New test.

From-SVN: r277685

devices-main.c: Move to devices subdirectory.

2019-10-31  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

* gcc.target/msp430/devices-main.c: Move to devices subdirectory.
* gcc.target/msp430/devices/bad-devices-1.c: Update #include path to
devices-main.c.
* gcc.target/msp430/devices/bad-devices-2.c: Likewise.
* gcc.target/msp430/devices/bad-devices-3.c: Likewise.
* gcc.target/msp430/devices/bad-devices-4.c: Likewise.
* gcc.target/msp430/devices/bad-devices-5.c: Likewise.
* gcc.target/msp430/devices/bad-devices-6.c: Likewise.
* gcc.target/msp430/devices/csv-device-order.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_00.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_01.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_02.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_04.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_08.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_10.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_11.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_12.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_14.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_18.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_20.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_21.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_22.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_24.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_28.c: Likewise.
* gcc.target/msp430/devices/csv-msp430fr5969.c: Likewise.
* gcc.target/msp430/devices/hard-cc430f5123.c: Likewise.
* gcc.target/msp430/devices/hard-foo.c: Likewise.
* gcc.target/msp430/devices/hard-msp430afe253.c: Likewise.
* gcc.target/msp430/devices/hard-msp430cg4616.c: Likewise.
* gcc.target/msp430/devices/hard-msp430f4783.c: Likewise.
* gcc.target/msp430/devices/hard-rf430frl154h_rom.c: Likewise.

From-SVN: r277684

[AArch64] Fix g++.target/aarch64/sve/vcond_1_run.C

This had been failing since a mass renaming.  Noticed it a few times
before but somehow never got around to fixing it.

2019-10-31  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* g++.target/aarch64/sve/vcond_1_run.C: Update test name.

From-SVN: r277683

[AArch64] Split gcc.target/aarch64/sve/vcond_4*

vcond_4.c combined too much stuff into one test, so that when we needed
to add XFAILs for one set of routines, we lost testing of others that
used the same instructions.  This patch splits it into four:

vcond_4.c:
  The main test for selects between a vector and a scalar, with all
  elements having the same size.

  After Prathamesh's fix for PR91272, we are now guaranteed to use the
  conditionally-loaded vector as the "then" value and the scalar as the
  "else" value.

vcond_4_zero.c:
  Like vcond_4.c, but comparing with zero.

vcond_4_sel.c:
  Tests for selects between two scalars, with all elements having
  the same size.  The optimisers can legitimately switch the "then"
  and "else" order and adjust the comparison to match.

vcond_4_costly.c:
  Like vcnod_4.c, but with mixed element sizes.  The sequences tested
  here will not be the preferred ones once we support mixtures of vector
  sizes, but it still tests an important code path.

This means that vcond_4_run.c now only tests what's left in vcond_4.c,
but that seems OK, since the main point was to ensure correct exception
behaviour.

Similarly it means that vcond_5.c only tests what's left in vcond_4.c,
but that too is OK, since the point of the test was to compare the
default handling of each comparison in vcond_4.c with the
-fno-trapping-math equivalent.

2019-10-31  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.target/aarch64/sve/vcond_4.c: Split parts out into...
* gcc.target/aarch64/sve/vcond_4_costly.c,
* gcc.target/aarch64/sve/vcond_4_sel.c,
* gcc.target/aarch64/sve/vcond_4_zero.c: ...these new tests.
* gcc.target/aarch64/sve/vcond_4_run.c: Adjust accordingly.
* gcc.target/aarch64/sve/vcond_5.c: Likewise.

From-SVN: r277682

[AArch64] Split gcc.target/aarch64/sve/reduc_strict_3.c

This patch splits gcc.target/aarch64/sve/reduc_strict_3.c into one
test per function, so that it's easier to see what each scan is
matching and also so that we no longer rely on the number of times
that each dump message is printed.

The patch also generalises the tests to work with scalable vectors.
I think the test probably predates support for variable-length
loop-aware SLP.

2019-10-31  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.target/aarch64/sve/reduc_strict_3.c: Split all but the
first function out into...
* gcc.target/aarch64/sve/reduc_strict_4.c,
* gcc.target/aarch64/sve/reduc_strict_5.c,
* gcc.target/aarch64/sve/reduc_strict_6.c,
* gcc.target/aarch64/sve/reduc_strict_7.c,
* gcc.target/aarch64/sve/reduc_strict_8.c,
* gcc.target/aarch64/sve/reduc_strict_9.c: ...these new tests.
Test for scalable vectors instead of 256-bit vectors.

From-SVN: r277681

[AArch64] Fix build for non-default languages

The SVE PCS support broke go, D and Ada because those languages don't
call TARGET_INIT_BUILTINS.  We therefore ended up trying to get the
TYPE_MAIN_VARIANT of a null __SVBool_t.

We shouldn't really need to apply TYPE_MAIN_VARIANT there anyway,
since the ABI-defined types are (and need to be) their own main
variants.  This patch asserts for that instead.

2019-10-31  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types):
Assert that the type we store in abi_vector_types is its own
main variant.
(svbool_type_p): Don't apply TYPE_MAIN_VARIANT here.

From-SVN: r277680

re PR fortran/92284 (Subroutine with bind(c) attribute causing varied problems)

PR fortran/92284
* gfortran.dg/bind_c_array_params_3_aux.c: Include
../../../libgfortran/ISO_Fortran_binding.h rather than
ISO_Fortran_binding.h.

From-SVN: r277679

Ensure that gfortran.dg/achar_2.f90 can fail

        * gfortran.dg/achar_2.f90: Remove bogus line from
        last commit.

From-SVN: r277678

[arm] Avoid using negative offsets for 'immediate' addresses when compiling for Thumb2

Thumb2 code now uses the Arm implementation of legitimize_address.
That code has a case to handle addresses that are absolute CONST_INT
values, which is a common use case in deeply embedded targets (eg:
void *p = (void*)0x12345678).  Since thumb has very limited negative
offsets from a constant, we want to avoid forming a CSE base that will
then be used with a negative value.

This was reported upstream originally in
https://gcc.gnu.org/ml/gcc-help/2019-10/msg00122.html

For example,

void test1(void) {
  volatile uint32_t * const p = (uint32_t *) 0x43fe1800;

  p[3] = 1;
  p[4] = 2;
  p[1] = 3;
  p[7] = 4;
  p[0] = 6;
}

With the new code, instead of

        ldr     r3, .L2
        subw    r2, r3, #2035
        movs    r1, #1
        str     r1, [r2]
        subw    r2, r3, #2031
        movs    r1, #2
        str     r1, [r2]
        subw    r2, r3, #2043
        movs    r1, #3
        str     r1, [r2]
        subw    r2, r3, #2019
        movs    r1, #4
        subw    r3, r3, #2047
        str     r1, [r2]
        movs    r2, #6
        str     r2, [r3]
        bx      lr

We now get

        ldr     r3, .L2
        movs    r2, #1
        str     r2, [r3, #2060]
        movs    r2, #2
        str     r2, [r3, #2064]
        movs    r2, #3
        str     r2, [r3, #2052]
        movs    r2, #4
        str     r2, [r3, #2076]
        movs    r2, #6
        str     r2, [r3, #2048]
        bx      lr

* config/arm/arm.c (arm_legitimize_address): Don't form negative
offsets from a CONST_INT address when TARGET_THUMB2.

From-SVN: r277677

[arm] Pattern match insns for a + ~b + Carry

On ARM, the SBC instruction is defined as

  Ra - Rb - ~C

where C is the carry flag.  But -Rb = ~Rb + 1, so this is equivalent to

  Ra + ~Rb + 1 - ~C

which then simplifies to

  Ra + ~Rb + C

which is essentially an add-with-carry with one operand inverted.  We
can define RTL patterns to match this.  In thumb2 we can only match
when the operands are both registers, but in Arm state we can also use
RSC to match when Rn is either a constant or a shifted operand.

This overall simplifies some cases of 64-bit arithmetic, for example,

int64_t f (int64_t a, int64_t b) { return a + ~b; }

will now compile to

  MVN  R2, R2
  ADDS R0, R0, R2
  SBC  R1, R1, R3

* config/arm/arm.md (add_not_cin): New insn.
(add_not_shift_cin): Likewise.

From-SVN: r277676

Remove dead code in IPA ICF.

2019-10-31  Martin Liska  <mliska@suse.cz>

* ipa-icf-gimple.c (func_checker::compare_tree_ssa_label): Remove.
* ipa-icf-gimple.h: Remove declaration from compare_tree_ssa_label
and compare_memory_operand.

From-SVN: r277675

Ensure that gfortran.dg/achar_2.f90 can fail

        * gfortran.dg/achar_2.f90: Print 'DONE' and add dg-output.

From-SVN: r277674

Improve tests for std::add_pointer

The type trait depends on is_void so the tests should check those cases.

* testsuite/20_util/add_pointer/value.cc: Check void types.

From-SVN: r277672

Remove PR 92268 workaround and fix new test failures

With the compiler bug fixed we can simplify the __sizable concept to use
a return-type-requirement again. I also realised it was redundantly
re-checking a subset of the sized_sentinel_for requirements.

The compiler fix also revealed bugs in two tests which started to fail
and are fixed by this patch.

* include/bits/range_access.h (__sizable): Rename to __sentinel_size.
Remove workaround for PR c++/92268 and remove redundant requirements
that are already checked by sized_sentinel_for.
* testsuite/std/ranges/access/cend.cc: Fix failures.
* testsuite/std/ranges/access/end.cc: Likewise.

From-SVN: r277667

Fix handling of arrays in range access customization points

This combines the overloads for arrays with the non-array overloads,
using if-constexpr to choose between the cases, and also enforces the
following:

- ADL should only be used for class types and enumeration types.
- ranges::begin should be ill-formed for rvalue arrays.
- ranges::end should be ill-formed for rvalue arrays, unbounded
  arrays, and arrays of incomplete type.
- ranges::size should be ill-formed for unbounded arrays.

* include/bits/range_access.h (ranges::begin): Combine array and
non-array overloads into one function template. Only use ADL for
classes and enums
(ranges::end, ranges::size): Likewise. Make unbounded arrays
ill-formed.
(ranges::rbegin, ranges::rend): Only use ADL for classes and enums.
Reformat _S_noexcept() functions to mirror operator() structure.
* testsuite/std/ranges/access/begin.cc: Check incomplete array.
* testsuite/std/ranges/access/end_neg.cc: New test.
* testsuite/std/ranges/access/size.cc: Check array of incomplete type.
* testsuite/std/ranges/access/size_neg.cc: New test.

From-SVN: r277666

[testsuite] Fix wrong order of dg-additional-options

gcc/testsuite/ChangeLog:
2019-10-31  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* gcc.target/aarch64/sve/reduc_strict_3.c: Fix option order.
* gcc.target/i386/avx-vzeroupper-19.c: Likewise.
* gcc.target/i386/avx2-vect-mask-store-move1.c: Likewise.
* gcc.target/i386/avx512f-gather-2.c: Likewise.
* gcc.target/i386/avx512f-gather-5.c: Likewise.
* gcc.target/i386/l_fma_double_1.c: Likewise.
* gcc.target/i386/l_fma_double_2.c: Likewise.
* gcc.target/i386/l_fma_double_3.c: Likewise.
* gcc.target/i386/l_fma_double_4.c: Likewise.
* gcc.target/i386/l_fma_double_5.c: Likewise.
* gcc.target/i386/l_fma_double_6.c: Likewise.
* gcc.target/i386/l_fma_float_1.c: Likewise.
* gcc.target/i386/l_fma_float_2.c: Likewise.
* gcc.target/i386/l_fma_float_3.c: Likewise.
* gcc.target/i386/l_fma_float_4.c: Likewise.
* gcc.target/i386/l_fma_float_5.c: Likewise.
* gcc.target/i386/l_fma_float_6.c: Likewise.
* gcc.target/i386/mask-pack.c: Likewise.
* gcc.target/i386/mask-unpack.c: Likewise.

From-SVN: r277664

Fortran] PR92284 – gfc_desc_to_cfi_desc fixes

        gcc/fortran/
        PR fortran/92284.
        * trans-expr.c (gfc_conv_gfc_desc_to_cfi_desc): Free CFI descriptor
        at the end; partial revised revert of Rev. 277502.

        libgfortran/
        PR fortran/92284.
        * runtime/ISO_Fortran_binding.c (gfc_desc_to_cfi_desc):

        gcc/testsuite/
        PR fortran/92284.
        * gfortran.dg/bind-c-intent-out.f90: Update expected dump;
        extend comment.
        * gfortran.dg/bind_c_array_params_3.f90: New.
        * gfortran.dg/bind_c_array_params_3_aux.c: New.

From-SVN: r277663

configure.ac: Compute and substitute omp_device_properties and omp_device_property_deps.

* configure.ac: Compute and substitute omp_device_properties and
omp_device_property_deps.
* Makefile.in (generated_files): Add omp-device-properties.h.
(omp-general.o): Depend on omp-device-properties.h.
(omp_device_properties): New make variable.
(omp-device-properties.h, s-omp-device-properties-h,
install-omp-device-properties): New goals.
(install): Depend on install-omp-device-properties for accelerators.
* target.def (TARGET_OMP_DEVICE_KIND_ARCH_ISA): New target hook.
* target.h (enum omp_device_kind_arch_isa): New enum.
* doc/tm.texi.in: Add placeholder for TARGET_OMP_DEVICE_KIND_ARCH_ISA
documentation.
* omp-general.c: Include omp-device-properties.h.
(omp_max_simt_vf): Expect OFFLOAD_TARGET_NAMES to be separated by
colon instead of comma.
(omp_offload_device_kind_arch_isa, omp_maybe_offloaded): New
functions.
(omp_context_selector_matches): Implement device set arch/isa
selectors, improve device set kind selector handling.
* config/i386/i386-options.h (ix86_omp_device_kind_arch_isa): Declare.
* config/i386/i386.c (TARGET_SIMD_CLONE_ADJUST,
TARGET_SIMD_CLONE_USABLE): Formatting fix.
(TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to
ix86_omp_device_kind_arch_isa.
* config/i386/i386-options.c (struct ix86_target_opts): Move type
definition from ix86_target_string to file scope.
(isa2_opts, isa_opts): Moved arrays from ix86_target_string function
to file scope.
(ix86_omp_device_kind_arch_isa): New function.
(ix86_target_string): Moved struct ix86_target_opts, isa2_opts and
isa_opts definitions to file scope.
* config/i386/t-intelmic (omp-device-properties): New goal.
* config/nvptx/t-nvptx (omp-device-properties): Likewise.
* config/nvptx/nvptx.c (nvptx_omp_device_kind_arch_isa): New function.
(TARGET_OMP_DEVICE_KIND_ARCH_ISA): Redefine to
nvptx_omp_device_kind_arch_isa.
* configure: Regenerate.
* doc/tm.texi: Regenerate.
testsuite/
* c-c++-common/gomp/declare-variant-9.c: New test.
* c-c++-common/gomp/declare-variant-10.c: New test.

From-SVN: r277662

Fortran] PR92277 - Fix assumed-rank array with bind(C)

        gcc/fortran/
        PR fortran/92277
        * trans-expr.c (gfc_conv_gfc_desc_to_cfi_desc): Fix DECL_ARTIFICIAL
        checking.

        gcc/testsuite/
        PR fortran/92277
        * fortran.dg/pr92277.f90: New.

From-SVN: r277661

re PR middle-end/92231 (ICE in gimple_fold_stmt_to_constant_1)

PR middle-end/92231
* tree.h (fndecl_built_in_p): Use fndecl_built_in_p instead of
DECL_BUILT_IN in comment.  Remove redundant ()s around return
argument.
* tree.c (free_lang_data_in_decl): Check if var is FUNCTION_DECL
before calling fndecl_built_in_p.
* gimple-fold.c (gimple_fold_stmt_to_constant_1): Check if
TREE_OPERAND (fn, 0) is a FUNCTION_DECL before calling
fndecl_built_in_p on it.
lto/
* lto-lang.c (handle_const_attribute): Don't call fndecl_built_in_p
on *node that is not FUNCTION_DECL.
testsuite/
* gcc.c-torture/compile/pr92231.c: New test.

From-SVN: r277660

[vect]Make vect-epilogues-nomask=1 default

This patch turns epilogue vectorization on by default for all targets.  The
following test strategy was chosen for this:

1) Disable epilogue vectorization for all tests that failed due to
scan-tree-dump failures for aarch64, arm and x86_64 inside:
  - gcc.dg/vect
  - gcc.target/i386
  - gcc.target/aarch6
  - gfortran.dg/vect

2) Add the Bugzilla's reported testcase but xfail the scan for
"EPILOGUE VECTORIZED" for arm*-*-* as that target does not vectorize the
epilogue.

gcc/ChangeLog:
2019-10-31  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* params.def (PARAM_VECT_EPILOGUES_NOMASK): Enable by default.

gcc/testsuite/ChangeLog:
2019-10-31  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* gcc.dg/vect/vect-epilogues.c: New test.
* gcc.dg/vect/fast-math-vect-call-1.c: Disable for epilogue
vectorization.
* gcc.dg/vect/no-fast-math-vect16.c: Likewise.
* gcc.dg/vect/no-scevccp-noreassoc-slp-reduc-7.c: Likewise.
* gcc.dg/vect/no-scevccp-vect-iv-3.c: Likewise.
* gcc.dg/vect/no-section-anchors-vect-31.c: Likewise.
* gcc.dg/vect/no-section-anchors-vect-64.c: Likewise.
* gcc.dg/vect/no-section-anchors-vect-66.c: Likewise.
* gcc.dg/vect/no-section-anchors-vect-68.c: Likewise.
* gcc.dg/vect/no-vfa-vect-dv-2.c: Likewise.
* gcc.dg/vect/pr33804.c: Likewise.
* gcc.dg/vect/pr53773.c: Likewise.
* gcc.dg/vect/pr65947-1.c: Likewise.
* gcc.dg/vect/pr65947-13.c: Likewise.
* gcc.dg/vect/pr65947-14.c: Likewise.
* gcc.dg/vect/pr65947-4.c: Likewise.
* gcc.dg/vect/pr80631-1.c: Likewise.
* gcc.dg/vect/pr80631-2.c: Likewise.
* gcc.dg/vect/slp-23.c: Likewise.
* gcc.dg/vect/slp-25.c: Likewise.
* gcc.dg/vect/slp-reduc-2.c: Likewise.
* gcc.dg/vect/slp-reduc-5.c: Likewise.
* gcc.dg/vect/slp-reduc-6.c: Likewise.
* gcc.dg/vect/slp-reduc-sad-2.c: Likewise.
* gcc.dg/vect/slp-widen-mult-half.c: Likewise.
* gcc.dg/vect/trapv-vect-reduc-4.c: Likewise.
* gcc.dg/vect/vect-103.c: Likewise.
* gcc.dg/vect/vect-109.c: Likewise.
* gcc.dg/vect/vect-119.c: Likewise.
* gcc.dg/vect/vect-24.c: Likewise.
* gcc.dg/vect/vect-26.c: Likewise.
* gcc.dg/vect/vect-27.c: Likewise.
* gcc.dg/vect/vect-29.c: Likewise.
* gcc.dg/vect/vect-42.c: Likewise.
* gcc.dg/vect/vect-44.c: Likewise.
* gcc.dg/vect/vect-48.c: Likewise.
* gcc.dg/vect/vect-50.c: Likewise.
* gcc.dg/vect/vect-52.c: Likewise.
* gcc.dg/vect/vect-54.c: Likewise.
* gcc.dg/vect/vect-56.c: Likewise.
* gcc.dg/vect/vect-58.c: Likewise.
* gcc.dg/vect/vect-60.c: Likewise.
* gcc.dg/vect/vect-72.c: Likewise.
* gcc.dg/vect/vect-75-big-array.c: Likewise.
* gcc.dg/vect/vect-75.c: Likewise.
* gcc.dg/vect/vect-77-alignchecks.c: Likewise.
* gcc.dg/vect/vect-77-global.c: Likewise.
* gcc.dg/vect/vect-78-alignchecks.c: Likewise.
* gcc.dg/vect/vect-78-global.c: Likewise.
* gcc.dg/vect/vect-89-big-array.c: Likewise.
* gcc.dg/vect/vect-89.c: Likewise.
* gcc.dg/vect/vect-91.c: Likewise.
* gcc.dg/vect/vect-92.c: Likewise.
* gcc.dg/vect/vect-96.c: Likewise.
* gcc.dg/vect/vect-cond-reduc-3.c: Likewise.
* gcc.dg/vect/vect-cond-reduc-4.c: Likewise.
* gcc.dg/vect/vect-live-1.c: Likewise.
* gcc.dg/vect/vect-live-2.c: Likewise.
* gcc.dg/vect/vect-live-3.c: Likewise.
* gcc.dg/vect/vect-live-4.c: Likewise.
* gcc.dg/vect/vect-live-slp-1.c: Likewise.
* gcc.dg/vect/vect-live-slp-2.c: Likewise.
* gcc.dg/vect/vect-live-slp-3.c: Likewise.
* gcc.dg/vect/vect-multitypes-3.c: Likewise.
* gcc.dg/vect/vect-multitypes-4.c: Likewise.
* gcc.dg/vect/vect-multitypes-6.c: Likewise.
* gcc.dg/vect/vect-peel-1-epilogue.c: Likewise. New test.
* gcc.dg/vect/vect-peel-1-src.c: Likewise. New test.
* gcc.dg/vect/vect-peel-1.c: Likewise.
* gcc.dg/vect/vect-peel-3-epilogue.c: Likewise. New test.
* gcc.dg/vect/vect-peel-3-src.c: Likewise. New test.
* gcc.dg/vect/vect-peel-3.c: Likewise.
* gcc.dg/vect/vect-peel-4-epilogue.c: Likewise. New test.
* gcc.dg/vect/vect-peel-4-src.c: Likewise. New test.
* gcc.dg/vect/vect-peel-4.c: Likewise.
* gcc.dg/vect/vect-reduc-6.c: Likewise.
* gcc.dg/vect/vect-reduc-dot-s16a.c: Likewise.
* gcc.dg/vect/vect-reduc-dot-s8a.c: Likewise.
* gcc.dg/vect/vect-reduc-dot-s8b.c: Likewise.
* gcc.dg/vect/vect-reduc-dot-u16b.c: Likewise.
* gcc.dg/vect/vect-reduc-dot-u8a.c: Likewise.
* gcc.dg/vect/vect-reduc-dot-u8b.c: Likewise.
* gcc.dg/vect/vect-reduc-pattern-1a.c: Likewise.
* gcc.dg/vect/vect-reduc-pattern-1b-big-array.c: Likewise.
* gcc.dg/vect/vect-reduc-pattern-1c-big-array.c: Likewise.
* gcc.dg/vect/vect-reduc-pattern-2a.c: Likewise.
* gcc.dg/vect/vect-reduc-pattern-2b-big-array.c: Likewise.
* gcc.dg/vect/vect-reduc-sad.c: Likewise.
* gcc.dg/vect/vect-widen-mult-const-s16.c: Likewise.
* gcc.dg/vect/vect-widen-mult-const-u16.c: Likewise.
* gcc.dg/vect/vect-widen-mult-half-u8.c: Likewise.
* gcc.dg/vect/vect-widen-mult-half.c: Likewise.
* gcc.dg/vect/vect-widen-mult-u16.c: Likewise.
* gcc.dg/vect/vect-widen-mult-u8-s16-s32.c: Likewise.
* gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c: Likewise.
* gcc.target/aarch64/sve/reduc_strict_3.c: Likewise.
* gcc.target/i386/avx-vzeroupper-19.c: Likewise.
* gcc.target/i386/avx2-vect-mask-store-move1.c: Likewise.
* gcc.target/i386/avx512f-gather-2.c: Likewise.
* gcc.target/i386/avx512f-gather-5.c: Likewise.
* gcc.target/i386/l_fma_double_1.c: Likewise.
* gcc.target/i386/l_fma_double_2.c: Likewise.
* gcc.target/i386/l_fma_double_3.c: Likewise.
* gcc.target/i386/l_fma_double_4.c: Likewise.
* gcc.target/i386/l_fma_double_5.c: Likewise.
* gcc.target/i386/l_fma_double_6.c: Likewise.
* gcc.target/i386/l_fma_float_1.c: Likewise.
* gcc.target/i386/l_fma_float_2.c: Likewise.
* gcc.target/i386/l_fma_float_3.c: Likewise.
* gcc.target/i386/l_fma_float_4.c: Likewise.
* gcc.target/i386/l_fma_float_5.c: Likewise.
* gcc.target/i386/l_fma_float_6.c: Likewise.
* gcc.target/i386/mask-pack.c: Likewise.
* gcc.target/i386/mask-unpack.c: Likewise.
* gfortran.dg/vect/vect-4.f90: Likewise.

From-SVN: r277659

Check precondition for std::ssize(const Container&)

This precondition is the subject of a national body comment on the C++20
CD. This just adds a test to ensure we enforce the precondition.

Also move existing 24_iterator/range_access*.cc tests to a dedicated
directory for the [iterator.range] subclause.

* testsuite/24_iterators/range_access*.cc: Move to ...
* testsuite/24_iterators/range_access/range_access*.cc: ... here.
* testsuite/24_iterators/range_access/range_access_cpp20_neg.cc: New
test.

From-SVN: r277658

Remove missing usage of cgraph_local_info in arm,bfin and c6x.

2019-10-31  Martin Liska  <mliska@suse.cz>

* config/arm/arm.c (arm_get_pcs_model): Remove usage
of cgraph_local_info and use local_info_node instead.
* config/bfin/bfin.c (bfin_load_pic_reg): Likewise.
(bfin_function_ok_for_sibcall): Likewise.
* config/c6x/c6x.c (c6x_function_ok_for_sibcall): Likewise.
(must_reload_pic_reg_p): Likewise.

From-SVN: r277657

re PR c++/90947 (Simple lookup table of array of strings is miscompiled)

PR c++/90947
* tree.h (type_initializer_zero_p): Remove.
* tree.c (type_initializer_zero_p): Remove.
cp/
* cp-tree.h (type_initializer_zero_p): Declare.
* decl.c (reshape_init_array_1): Formatting fix.
* tree.c (type_initializer_zero_p): New function.  Moved from
../tree.c, use next_initializable_field, formatting fix.  Return
false for TYPE_NON_AGGREGATE_CLASS types.

From-SVN: r277656

PR c++/84810 - constraints on lambdas

Attached is a patch that adds parsing of the optional requires-clause in a
lambda-expression and lambda-declarator. Additionally, shorthand constraints
from the template-parameter-list are now actually applied and constrain the
synthesized operator().

Previously we were not parsing the requires clauses at all and not saving
the shorthand constraints in the place expected by grokfndecl.

The trailing requires-clause is now also used to suppress synthesis of the
conversion to function pointer for non-capturing non-generic lambdas as per
expr.prim.lambda.closure/7.

This includes a fix to template_class_depth. Previously it was computing the
wrong depth for lambdas in the initializer of a static member of a class
template, exhibited by the concepts-lambda4 test which currently fails on
trunk. The bug was causing grokfndecl to use the constraints from the
template class for the lambda.

gcc/cp/
2019-10-30  Jeff Chapman II  <jchapman@lock3software.com>

PR c++/84810 - constraints on lambdas
* lambda.c (maybe_add_lambda_conv_op): Do not synthesize
conversion if the call operator does not satisfy its constraints.
* parser.c (cp_parser_lambda_declarator_opt): Parse
requires-clause on generic lambdas; combine with shorthand
constraints. Parse trailing requires-clause and attach to the
synthesized call operator.
* pt.c (template_class_depth): Only inspect
LAMBDA_TYPE_EXTRA_SCOPE if it is present. This fixes an
incorrect depth calculation for lambdas inside the initializer
of a static data member of a template class.

gcc/testsuite/
2019-10-30  Jeff Chapman II  <jchapman@lock3software.com>

PR c++/84810 - constraints on lambdas
* g++.dg/cpp2a/concepts-lambda2.C: New test.
* g++.dg/cpp2a/concepts-lambda3.C: Ditto.
* g++.dg/cpp2a/concepts-lambda4.C: Ditto.
* g++.dg/cpp2a/concepts-pr84810.C: Ditto.

From-SVN: r277655

PR c++/92268 - hard error satisfying return-type-requirement

Previously we would put the template arguments for the concept-check in a
TEMPLATE_ID and then also pass them to constraints_satisfied_p, which meant
that we would try to normalize the concept-check with the fully instantiated
arguments, leading to sadness.  Simply not passing the args to
constraints_satisfied_p fixes the problem.

I also noticed that we weren't detecting substitution failure in the
constraints, but were silently treating it as success.

* constraint.cc (type_deducible_p): Check for substitution failure.
(diagnose_compound_requirement): Adjust diagnostic.
* pt.c (do_auto_deduction): Don't pass cargs to
constraints_satisfied_p.

From-SVN: r277654

Daily bump.

From-SVN: r277653

PR c++/91369 - Implement P0784R7: constexpr new

PR c++/91369 - Implement P0784R7: constexpr new
* constexpr.c (cxx_replaceable_global_alloc_fn): Don't return true
for placement new.
(cxx_placement_new_fn, is_std_construct_at): New functions.
(cxx_eval_call_expression): Allow placement new in std::construct_at.
(potential_constant_expression_1): Likewise.

* g++.dg/cpp2a/constexpr-new5.C: New test.

From-SVN: r277649

typeck.c (decl_in_std_namespace_p): Return true also for decls in inline namespaces inside of std namespace.

* typeck.c (decl_in_std_namespace_p): Return true also for decls
in inline namespaces inside of std namespace.

* g++.dg/cpp0x/Wpessimizing-move6.C: New test.

From-SVN: r277648

re PR c++/92024 (crash in check_local_shadow)

2019-10-30  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * doc/invoke.texi (-Wshadow, -Wshadow=global
        -Wshadow=local, -Wshadow=compatible-local): Update documentation.

cp:
2019-10-30  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR c++/92024
        * name-lookup.c (check_local_shadow): Shadowing TYPE_DECLs
        is always a -Wshadow=compatible-local warning, unless
        -Wshadow is used.

testsuite:
2019-10-30  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR c++/92024
        * g++.dg/parse/crash70.C: New test.
        * c-c++-common/Wshadow-1.c: New test.

From-SVN: r277643

Fortran] PR 92208 don't use function-result dummy variable as actual argument

        PR fortran/92208
        * trans-array.c (gfc_conv_array_parameter): Only copy
        string-length backend_decl if expression is not a function.

        PR fortran/92208
        * gfortran.dg/pr92208.f90: New.

From-SVN: r277639

* cxx-pretty-print.c (get_fold_operator): Use OVL_OP_INFO.

From-SVN: r277637

PR c++/92134 - constinit malfunction in static data member.

I wasn't properly setting LOOKUP_CONSTINIT in grokfield and so we didn't
detect a non-const initializer.

* decl2.c (grokfield): Set LOOKUP_CONSTINIT.

* g++.dg/cpp2a/constinit14.C: New test.

From-SVN: r277636

Use if-constexpr instead of overloading for customization point

This combines two of the std::ranges::swap.operator() overloads into a
single function template. Using if-constexpr to choose between
implementations should give the compiler less work to do than using
overloading.

* include/std/concepts (std::ranges::swap): Use a single overload for
the non-array cases, and switch using if-constexpr.

From-SVN: r277635

Fix another compilation error with Clang

* include/bits/stl_iterator.h (__normal_iterator::iterator_concept):
Guard with __cpp_lib_concepts macro.

From-SVN: r277634

Fix some missing/incorrect feature test macros

* include/std/bit (__cpp_lib_bitops): Define.
* include/std/version (__cpp_lib_constexpr): Remove.
(__cpp_lib_bitops, __cpp_lib_constexpr_dynamic_alloc): Define.
* testsuite/26_numerics/bit/header.cc: New test.
* testsuite/26_numerics/bit/header-2.cc: New test.
* testsuite/20_util/allocator_traits/header.cc: New test.
* testsuite/20_util/allocator_traits/header-2.cc: New test.

From-SVN: r277633

[C++ PATCH] Feature macros are long

https://gcc.gnu.org/ml/gcc-patches/2019-10/msg02157.html
* c-cppbuiltin.c (c_cpp_builtins): Add 'L' suffix to feature
macros.

From-SVN: r277632

Fortran/OpenMP] Don't create "alloc:" for 'target exit data'

        gcc/
        * gimplify.c (gimplify_scan_omp_clauses): Remove FE-generated
        GOMP_MAP_TO_PSET and GOMP_MAP_POINTER mapping for 'target update'
        and 'target exit data'.

        libgomp/
        * testsuite/libgomp.fortran/target9.f90: New.

From-SVN: r277631

Remove some more using-declarations from namespace __gnu_cxx

Similar to some recent patches, this removes using-declarations for
names from namespace std, so that they are not redeclared in __gnu_cxx.

* include/bits/stl_iterator.h (namespace __gnu_cxx): Remove
using-declarations for std::iterator and std::iterator_traits.
(__gnu_cxx::__normal_iterator): Qualify iterator_traits.
* include/ext/algorithm (namespace __gnu_cxx): Remove
using-declarations for std names and qualify those names when used.
Also refer to std::min in parentheses to protect against function-like
macros.
* include/ext/rc_string_base.h: Qualify iterator_traits.
* include/ext/sso_string_base.h: Qualify iterator_traits.

From-SVN: r277630

Apply C++20 changes to various iterator types

This ensures that __normal_iterator<T*, C> satisfies the
contiguous_iterator concept, by defining the iterator_concept member
type.

Also update vector<bool>'s iterators, reverse_iterator,
istreambuf_iterator and ostreambuf_iterator to meet the C++20
requirements.

PR libstdc++/92272
* include/bits/stl_bvector.h (_Bit_iterator::pointer)
(_Bit_const_iterator::pointer): Define as void for C++20.
* include/bits/stl_iterator.h (reverse_iterator::operator->()): Add
constraints for C++20.
(__normal_iterator::iterator_concept): Define for C++20.
* include/bits/streambuf_iterator.h (istreambuf_iterator::pointer):
Define as void for C++20.
(ostreambuf_iterator::difference_type): Define as ptrdiff_t for C++20.
(ostreambuf_iterator::ostreambuf_iterator()): Add default constructor
for C++20.
* testsuite/23_containers/vector/bool/iterator_c++20.cc: New test.
* testsuite/24_iterators/bidirectional/concept.cc: New test.
* testsuite/24_iterators/bidirectional/tag.cc: New test.
* testsuite/24_iterators/contiguous/concept.cc: New test.
* testsuite/24_iterators/contiguous/tag.cc: New test.
* testsuite/24_iterators/forward/concept.cc: New test.
* testsuite/24_iterators/forward/tag.cc: New test.
* testsuite/24_iterators/input/concept.cc: New test.
* testsuite/24_iterators/input/tag.cc: New test.
* testsuite/24_iterators/istreambuf_iterator/requirements/typedefs.cc:
New test.
* testsuite/24_iterators/ostreambuf_iterator/requirements/typedefs.cc:
New test.
* testsuite/24_iterators/output/concept.cc: New test.
* testsuite/24_iterators/output/tag.cc: New test.
* testsuite/24_iterators/random_access/concept.cc: New test.
* testsuite/24_iterators/random_access/tag.cc: New test.
* testsuite/24_iterators/range_operations/advance_debug_neg.cc: New
test.
* testsuite/24_iterators/random_access_iterator/26020.cc: Move to ...
* testsuite/24_iterators/operations/26020.cc: ... here.
* testsuite/24_iterators/random_access_iterator/
string_vector_iterators.cc: Move to ...
* testsuite/24_iterators/random_access/string_vector_iterators.cc: ...
here.

From-SVN: r277629

Fix typo in preprocessor check

* testsuite/util/testsuite_iterators.h: Fix typo in __cplusplus check.

From-SVN: r277628

Edges to interposable calles are possibly_call_in_translation_unit_p

2019-10-30  Martin Jambor  <mjambor@suse.cz>

ipa/92278
* cgraph.c (cgraph_edge::possibly_call_in_translation_unit_p): Fix
availability comparison.

From-SVN: r277627

msp430.c (msp430_expand_helper): Support expansion of calls to __mspabi_mpy* functions.

2019-10-30  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

* config/msp430/msp430.c (msp430_expand_helper): Support expansion of
calls to __mspabi_mpy* functions.
* config/msp430/msp430.md (mulhisi3): New define_expand.
(umulhisi3): New define_expand.
(*mulhisi3_inline): Use old mulhisi3 define_insn.
(*umulhisi3_inline): Use old umulhisi3 define_insn.

From-SVN: r277624

msp430.c (msp430_check_index_not_high_mem): New.

gcc/ChangeLog:

2019-10-30  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

* config/msp430/msp430.c (msp430_check_index_not_high_mem): New.
(msp430_check_plus_not_high_mem): New.
(msp430_op_not_in_high_mem): Use new functions to check if the operand
might be in low memory.
Indicate that a 16-bit absolute address is in lower memory.

gcc/testsuite/ChangeLog:

2019-10-30  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

* gcc.target/msp430/mlarge-use-430-insn.c: New test.

From-SVN: r277623

Fix a call to ultimate_alias_target

2019-10-30  Martin Jambor  <mjambor@suse.cz>

* ipa-prop.c (ipa_compute_jump_functions_for_bb): Fix the call to
ultimate_alias_target.

From-SVN: r277622

re PR tree-optimization/92275 (ICE: error: definition in block 11 does not dominate use in block 15 since r277566)

2019-10-30  Richard Biener  <rguenther@suse.de>

PR tree-optimization/92275
* tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_loops):
Copy all loop-closed PHIs.

* gcc.dg/torture/pr92275.c: New testcase.

From-SVN: r277621

* g++.dg/gomp/declare-variant-6.C: New test.

From-SVN: r277620

Use const_tree more in IPA ICF.

2019-10-30  Martin Liska  <mliska@suse.cz>

* ipa-icf-gimple.c (func_checker::compare_ssa_name): Use
const_tree as function argument.
(func_checker::compare_decl): Likewise.
(func_checker::operand_equal_p): Likewise.
(func_checker::compare_variable_decl): Likewise.
(func_checker::parse_labels): Likewise.
* ipa-icf-gimple.h: Likewise.

From-SVN: r277619

Remove alias set comparison.

2019-10-30  Martin Liska  <mliska@suse.cz>

* ipa-icf-gimple.c (func_checker::compatible_types_p):
Do not compare alias sets.  It's handled by operand_equal_p.
2019-10-30  Martin Liska  <mliska@suse.cz>

* c-c++-common/Wstringop-truncation-4.c: Disable IPA ICF.
* gcc.dg/tree-ssa/pr64910-2.c: Likewise.
* gcc.dg/tree-ssa/pr79352.c: Likewise.

From-SVN: r277618

Remove comparison for polymorphic types.

2019-10-30  Martin Liska  <mliska@suse.cz>

* ipa-icf-gimple.c (func_checker::func_checker): Do not
initialize m_compare_polymorphic.
(func_checker::compare_decl): Do not compare polymorphic types.
* ipa-icf-gimple.h (m_compare_polymorphic): Remove.
* ipa-icf.c (sem_function::equals_private): Do not call
compare_polymorphic_p.

From-SVN: r277617

IPA ICF: remove dead code

2019-10-30  Martin Liska  <mliska@suse.cz>

* ipa-icf-gimple.c (func_checker::compare_ssa_name): Call
compare_operand.
(func_checker::compare_memory_operand): Remove.
(func_checker::compare_cst_or_decl): Remove.
(func_checker::operand_equal_valueize): Do not handle
FIELD_DECL.
(func_checker::compare_gimple_call): Call compare_operand.
(func_checker::compare_gimple_assign): Likewise.
* ipa-icf-gimple.h: Remove compare_cst_or_decl.
* ipa-icf.c (sem_function::icf_handled_component_p): Remove.
* ipa-icf.h (icf_handled_component_p): Remove.

From-SVN: r277616

Integrate that for IPA ICF.

2019-10-30  Martin Liska  <mliska@suse.cz>

* ipa-icf-gimple.c (func_checker::hash_operand): New.
(func_checker::compare_cst_or_decl): Remove handling
of FIELD_DECL.
(func_checker::compare_operand): Transform to ...
(func_checker::operand_equal_p): ... this.
* ipa-icf-gimple.h (class func_checker): Add
operand_equal_p and hash_operand.
* ipa-icf.c (sem_function::equals_private): Fix
pushing and popping of cfun.

From-SVN: r277615

Come up with an abstraction.

2019-10-30  Martin Liska  <mliska@suse.cz>

* fold-const.c (operand_equal_p): Move to ...
(operand_compare::operand_equal_p): ... here.
(operand_compare::verify_hash_value): New.
(add_expr): Move to ...
(operand_compare::hash_operand): ... here.
* fold-const.h (operand_equal_p): Move to the class.
(class operand_compare): New.
* tree.c (add_expr): Remove.

From-SVN: r277614

cp-tree.h (omp_declare_variant_finalize, [...]): Declare.

* cp-tree.h (omp_declare_variant_finalize, build_local_temp): Declare.
* decl.c: Include omp-general.h.
(declare_simd_adjust_this): Add forward declaration.
(omp_declare_variant_finalize_one, omp_declare_variant_finalize): New
function.
(cp_finish_decl, finish_function): Call omp_declare_variant_finalize.
* parser.c (cp_finish_omp_declare_variant): Adjust parsing of the
variant id-expression and propagate enough information to
omp_declare_variant_finalize_one in the attribute so that it can
finalize it.
* class.c (finish_struct): Call omp_declare_variant_finalize.
* tree.c (build_local_temp): No longer static, remove forward
declaration.

* c-c++-common/gomp/declare-variant-2.c: Add a test with , before
match clause.
* c-c++-common/gomp/declare-variant-6.c: Expect diagnostics also from
C++ FE and adjust regexp so that it handles C++ pretty printing of
function names.
* g++.dg/gomp/declare-variant-1.C: New test.
* g++.dg/gomp/declare-variant-2.C: New test.
* g++.dg/gomp/declare-variant-3.C: New test.
* g++.dg/gomp/declare-variant-4.C: New test.
* g++.dg/gomp/declare-variant-5.C: New test.

From-SVN: r277613

operand_equal_p: add support for OBJ_TYPE_REF.

2019-10-30  Martin Liska  <mliska@suse.cz>

* fold-const.c (operand_equal_p): Support OBJ_TYPE_REF.
* tree.c (add_expr): Hash parts of OBJ_TYPE_REF.

From-SVN: r277612

typeck.c (cp_build_modify_expr): Prefer error + inform to error + error in one place.

/cp
2019-10-30  Paolo Carlini  <paolo.carlini@oracle.com>

* typeck.c (cp_build_modify_expr): Prefer error + inform to
error + error in one place.
(get_delta_difference_1): Likewise.
(get_delta_difference): Likewise, in two places.

/testsuite
2019-10-30  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/conversion/ptrmem2.C: Adjust for error + inform.
* g++.dg/gomp/tpl-atomic-2.C: Likewise.

From-SVN: r277610

libgomp/testsuite – use 'stop'

libgomp/
* testsuite/libgomp.fortran/: Replace 'STOP' by 'stop'.

From-SVN: r277609

Use symtab_node::order in LTO sections with body.

2019-10-30  Martin Liska  <mliska@suse.cz>

PR lto/91393
PR lto/88220
* cgraph.c (cgraph_node::get_create): Overwrite node->order
from a first_clone in order to get proper LTO section
in LTO stream.
(cgraph_node::get_untransformed_body):
Use lto_get_section_data where symtab_node::order
must be provided.
* cgraphclones.c (cgraph_node::find_replacement):
Update also symbol order.
* ipa-fnsummary.c (ipa_fn_summary_read):
Use new function lto_get_summary_section_data.
* ipa-hsa.c (ipa_hsa_read_summary): Likewise.
* ipa-icf.c (sem_item_optimizer::read_summary):
Likewise.
* ipa-prop.c (ipa_prop_read_jump_functions):
Likewise.
(ipcp_read_transformation_summaries): Likewise.
* ipa-sra.c (ipa_sra_read_summary): Likewise.
* lto-cgraph.c (input_node): Add also order_base.
(input_varpool_node): Likewise.
(input_cgraph_1): Assign the order_base.
(input_cgraph_opt_summary): Use new lto_get_summary_section_data.
* lto-opts.c (lto_write_options): Pass new argument.
* lto-section-in.c (lto_get_section_data): Add new argumente order.
(lto_get_summary_section_data): New.
(lto_get_raw_section_data): Add order argument.
(lto_create_simple_input_block): Likewise.
* lto-section-out.c (lto_destroy_simple_output_block):
Likewise.
* lto-streamer-in.c (lto_input_toplevel_asms):
Use lto_get_summary_section_data.
(lto_input_mode_table): Likewise.
* lto-streamer-out.c (produce_asm): Pass symtab_node::order.
(lto_output_toplevel_asms): Pass new argument.
(copy_function_or_variable): Likewise.
(produce_lto_section):Likewise.
(produce_symtab): Likewise.
(lto_write_mode_table): Likewise.
(produce_asm_for_decls): Likewise.
* lto-streamer.c (lto_get_section_name): Concat symbol name
and symbol order.
* lto-streamer.h (lto_get_section_data): Add order argument.
(lto_get_summary_section_data): New.
(lto_get_raw_section_data): Add order argument.
(lto_get_section_name): Likewise.
* varpool.c (varpool_node::get_constructor): Pass order argument.
2019-10-30  Martin Liska  <mliska@suse.cz>

PR lto/91393
PR lto/88220
* lto-common.c (lto_file_finalize): Use lto_get_summary_section_data.
(get_section_data): Add order argument.
2019-10-30  Martin Liska  <mliska@suse.cz>

PR lto/91393
PR lto/88220
* gcc.dg/lto/pr91393_0.c: New test.

From-SVN: r277607

libgomp/testsuite – use 'stop' and 'dg-do run'

        libgomp/
        * testsuite/libgomp.fortran/target-simd.f90: Use stop not abort.
        * testsuite/libgomp.fortran/use_device_ptr-optional-1.f90:
        Ditto; add 'dg-do run' for torture testing.
        * testsuite/libgomp.fortran/lastprivate1.f90:  Add 'dg-do run'.
        * testsuite/libgomp.fortran/lastprivate2.f90: Ditto.
        * testsuite/libgomp.fortran/nestedfn4.f90: Ditto.
        * testsuite/libgomp.fortran/pr25219.f90: Ditto.
        * testsuite/libgomp.fortran/pr28390.f: Ditto.
        * testsuite/libgomp.fortran/pr35130.f90: Ditto.
        * testsuite/libgomp.fortran/pr90779.f90: Ditto.
        * testsuite/libgomp.fortran/task2.f90: Ditto.
        * testsuite/libgomp.fortran/taskgroup1.f90: Ditto.
        * testsuite/libgomp.fortran/taskloop1.f90: Ditto.
        * testsuite/libgomp.fortran/use_device_addr-1.f90: Ditto.
        * testsuite/libgomp.fortran/use_device_addr-2.f90: Ditto.
        * testsuite/libgomp.fortran/workshare1.f90: Ditto.
        * testsuite/libgomp.fortran/workshare2.f90: Ditto.

From-SVN: r277606

re PR tree-optimization/92262 (ICE: verify_gimple failed (error: incorrect sharing of tree nodes))

PR tree-optimization/92262
* tree-ssa-loop-ivopts.c (get_debug_computation_at): Don't unshare
ubase or cbase here.
(remove_unused_ivs): Unshare comp before using it.

* g++.dg/opt/pr92262.C: New test.

From-SVN: r277605

ipa-prop.c (update_jump_functions_after_inlining): Watch for missing summaries.

* ipa-prop.c (update_jump_functions_after_inlining):
Watch for missing summaries.

From-SVN: r277604

re PR tree-optimization/65930 (Reduction with sign-change not handled)

2019-10-30  Richard Biener  <rguenther@suse.de>

PR tree-optimization/65930
* tree-vect-loop.c (vect_is_simple_reduction): For reduction
chains also allow a leading and trailing conversion.
* tree-vect-slp.c (vect_get_and_check_slp_defs): Handle
intermediate reduction chains.
(vect_analyze_slp_instance): Likewise.  Build a SLP
node for a trailing conversion manually.

* gcc.dg/vect/pr65930-2.c: New testcase.

From-SVN: r277603

Suppress warning with -Wno-overwrite-recursive.

The use of -fno-automatic with -frecursive results in a warning implying
that recursion will not work. If all relevant local variable have the
automatic attribute explicitly declared recursion does work and the warning
is redundant.

From-SVN: r277602

Remove cgraph_local_info structure.

2019-10-30  Martin Liska  <mliska@suse.cz>

* cgraph.c (cgraph_node::local_info): Transform to ...
(cgraph_node::local_info_node): ... this.
(cgraph_node::dump): Remove cgraph_local_info and
put its fields directly into cgraph_node.
(cgraph_node::get_availability): Likewise.
(cgraph_node::make_local): Likewise.
(cgraph_node::verify_node): Likewise.
* cgraph.h (struct GTY): Likewise.
* cgraphclones.c (set_new_clone_decl_and_node_flags): Likewise.
(duplicate_thunk_for_node): Likewise.
(cgraph_node::create_clone): Likewise.
(cgraph_node::create_virtual_clone): Likewise.
(cgraph_node::create_version_clone): Likewise.
* cgraphunit.c (cgraph_node::reset): Likewise.
(cgraph_node::finalize_function): Likewise.
(cgraph_node::add_new_function): Likewise.
(analyze_functions): Likewise.
* combine.c (setup_incoming_promotions): Likewise.
* config/i386/i386.c (ix86_function_regparm): Likewise.
(ix86_function_sseregparm): Likewise.
(init_cumulative_args): Likewise.
* ipa-cp.c (determine_versionability): Likewise.
(count_callers): Likewise.
(set_single_call_flag): Likewise.
(initialize_node_lattices): Likewise.
(estimate_local_effects): Likewise.
(create_specialized_node): Likewise.
(identify_dead_nodes): Likewise.
* ipa-fnsummary.c (compute_fn_summary): Likewise.
(ipa_fn_summary_generate): Likewise.
* ipa-hsa.c (check_warn_node_versionable): Likewise.
(process_hsa_functions): Likewise.
* ipa-icf.c (set_local): Likewise.
* ipa-inline-analysis.c (initialize_inline_failed): Likewise.
* ipa-inline.c (speculation_useful_p): Likewise.
* ipa-profile.c (ipa_propagate_frequency): Likewise.
(ipa_profile): Likewise.
* ipa-split.c (split_function): Likewise.
(execute_split_functions): Likewise.
* ipa-sra.c (ipa_sra_preliminary_function_checks): Likewise.
(ipa_sra_ipa_function_checks): Likewise.
* ipa-visibility.c (function_and_variable_visibility): Likewise.
* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
* lto-cgraph.c (lto_output_node): Likewise.
(input_overwrite_node): Likewise.
* multiple_target.c (expand_target_clones): Likewise.
* omp-simd-clone.c (simd_clone_create): Likewise.
* trans-mem.c (expand_call_tm): Likewise.
(ipa_tm_mayenterirr_function): Likewise.
(ipa_tm_diagnose_tm_safe): Likewise.
(ipa_tm_diagnose_transaction): Likewise.
(ipa_tm_create_version): Likewise.
(ipa_tm_transform_calls_redirect): Likewise.
(ipa_tm_execute): Likewise.
* tree-inline.c (expand_call_inline): Likewise.

From-SVN: r277601

Remove cgraph_global_info.

From-SVN: r277600

Daily bump.

From-SVN: r277599

typeck.c (build_x_unary_op): Use the location_t argument in three error_at.

/cp
2019-10-29  Paolo Carlini  <paolo.carlini@oracle.com>

* typeck.c (build_x_unary_op): Use the location_t argument in
three error_at.

/testsuite
2019-10-29  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/other/ptrmem8.C: Test locations too.
* g++.dg/template/dtor6.C: Likewise.

From-SVN: r277595

PR c++/90998 - ICE with copy elision in init by ctor and -Wconversion.

After r269667 which introduced joust_maybe_elide_copy, in C++17 we can elide
a constructor if it uses a conversion function that returns a prvalue, and
use the conversion function in its stead.

This eliding means that if we have a candidate that previously didn't have
->second_conv, it can have it after the elision.  This confused the
-Wconversion warning because it was assuming that if cand1->second_conv is
non-null, so is cand2->second_conv.  Here cand1->second_conv was non-null
but cand2->second_conv remained null, so it crashed in compare_ics.

I checked with clang that both compilers call A::operator B() in C++17 and
B::B(A const &) otherwise.

* call.c (joust): Don't attempt to warn if ->second_conv is null.

* g++.dg/cpp0x/overload-conv-4.C: New test.

From-SVN: r277593

re PR c++/92201 (ICE: ‘verify_gimple’ failed with -std=c++2a)

PR c++/92201
* cp-gimplify.c (cp_gimplify_expr): If gimplify_to_rvalue changes the
function pointer type, re-add cast to the original one.

* g++.dg/other/pr92201.C: New test.

From-SVN: r277592

PR c++/91548 - fix detecting modifying const objects for ARRAY_REF.

This fixes a bogus "modifying a const object" error for an array that actually
isn't declared const.  The problem was how I handled ARRAY_REFs here; we
shouldn't look at the ARRAY_REF itself, but at the array its accessing.

* constexpr.c (cxx_eval_store_expression): Don't call
modifying_const_object_p for ARRAY_REF.

* g++.dg/cpp1y/constexpr-tracking-const15.C: New test.
* g++.dg/cpp1y/constexpr-tracking-const16.C: New test.
* g++.dg/cpp1z/constexpr-tracking-const1.C: New test.

From-SVN: r277591

Fix compilation errors with Clang

* include/bits/range_access.h (ranges::disable_sized_range)
(ranges::begin, ranges::end, ranges::cbegin, ranges::cend)
(ranges::rbegin, ranges::rend, ranges::crbegin, ranges::crend)
(ranges::size, ranges::empty, ranges::data, ranges::cdata)
(ranges::range, ranges::sized_range, ranges::advance, ranges::distance)
(ranges::next, ranges::prev): Guard with __cpp_lib_concepts.
* include/bits/stl_iterator.h (disable_sized_sentinel): Likewise.

From-SVN: r277589

Fix compilation errors with Clang

* include/bits/alloc_traits.h (__cpp_lib_constexpr_dynamic_alloc):
Define.
(allocator_traits::_S_construct, allocator_traits::_S_destroy)
(__alloc_on_copy, __alloc_on_move, __alloc_on_swap): Use
_GLIBCXX14_CONSTEXPR instead of constexpr.
* include/bits/stl_construct.h (_Destroy): Likewise.

From-SVN: r277588

Add iterator concepts and range access customization points for C++20

This adds most of the new C++20 features to <iterator>, as well as a few
initial pieces of <ranges> (but no actual <ranges> header just yet).

* include/Makefile.am: Add new header.
* include/Makefile.in: Regenerate.
* include/bits/iterator_concepts.h: New header.
(contiguous_iterator_tag, iter_reference_t, ranges::iter_move)
(iter_rvalue_reference_t, incrementable_traits, iter_difference_t)
(readable_traits, iter_value_t, readable, iter_common_reference_t)
(writable, waekly_incrementable, incrementable)
(input_or_output_iterator, sentinel_for, disable_sized_sentinel)
(sized_sentinel_for, input_iterator, output_iterator)
(forward_iterator, bidirectional_iterator, random_access_iterator)
(contiguous_iterator, indirectly_unary_invocable)
(indirectly_regular_unary_invocable, indirect_unary_predicate)
(indirect_relation, indirect_strict_weak_order, indirect_result_t)
(projected, indirectly_movable, indirectly_movable_storable)
(indirectly_copyable, indirectly_copyable_storable, ranges::iter_swap)
(indirectly_swappable, indirectly_comparable, permutable, mergeable)
(sortable, unreachable_sentinel_t, unreachable_sentinel)
(default_sentinel_t, default_sentinel): Define.
(__detail::__cpp17_iterator, __detail::__cpp17_input_iterator)
(__detail::__cpp17_fwd_iterator, __detail::__cpp17_bidi_iterator)
(__detail::__cpp17_randacc_iterator): Define.
(__iterator_traits): Define constrained specializations.
* include/bits/move.h (move): Only use old concept check for C++98.
* include/bits/range_access.h (ranges::disable_sized_range)
(ranges::begin, ranges::end, ranges::cbegin, ranges::cend)
(ranges::rbegin, ranges::rend, ranges::crbegin, ranges::crend)
(ranges::size, ranges::empty, ranges::data, ranges::cdata): Define
new customization points for C++20.
(ranges::range, ranges::sized_range): Define new concepts for C++20.
(ranges::advance, ranges::distance, ranges::next, ranges::prev):
Define new functions for C++20.
(__adl_end, __adl_cdata, __adl_cbegin, __adl_cend, __adl_rbegin)
(__adl_rend, __adl_crbegin, __adl_crend, __adl_cdata, __adl_size)
(__adl_empty): Remove.
* include/bits/stl_iterator.h (disable_sized_sentinel): Specialize
for reverse_iterator.
* include/bits/stl_iterator_base_types.h (contiguous_iterator_tag):
Define new struct for C++20.
(iterator_traits<_Tp*>): Constrain partial specialization in C++20.
* include/std/concepts (__is_class_or_enum): Move to __detail
namespace.
* testsuite/20_util/forward/c_neg.cc: Adjust dg-error line number.
* testsuite/20_util/forward/f_neg.cc: Likewise.
* testsuite/24_iterators/associated_types/incrementable.traits.cc: New
test.
* testsuite/24_iterators/associated_types/readable.traits.cc: New test.
* testsuite/24_iterators/contiguous/concept.cc: New test.
* testsuite/24_iterators/contiguous/tag.cc: New test.
* testsuite/24_iterators/customization_points/iter_move.cc: New test.
* testsuite/24_iterators/customization_points/iter_swap.cc: New test.
* testsuite/24_iterators/headers/iterator/synopsis_c++20.cc: New test.
* testsuite/24_iterators/range_operations/advance.cc: New test.
* testsuite/24_iterators/range_operations/distance.cc: New test.
* testsuite/24_iterators/range_operations/next.cc: New test.
* testsuite/24_iterators/range_operations/prev.cc: New test.
* testsuite/26_numerics/adjacent_difference/requirements/
explicit_instantiation/2.cc: Rename types that conflict with C++20
concepts.
* testsuite/26_numerics/adjacent_difference/requirements/
explicit_instantiation/pod.cc: Likewise.
* testsuite/26_numerics/partial_sum/requirements/
explicit_instantiation/2.cc: Likewise.
* testsuite/26_numerics/partial_sum/requirements/
explicit_instantiation/pod.cc: Likewise.
* testsuite/experimental/iterator/requirements.cc: Likewise.
* testsuite/std/ranges/access/begin.cc: New test.
* testsuite/std/ranges/access/cbegin.cc: New test.
* testsuite/std/ranges/access/cdata.cc: New test.
* testsuite/std/ranges/access/cend.cc: New test.
* testsuite/std/ranges/access/crbegin.cc: New test.
* testsuite/std/ranges/access/crend.cc: New test.
* testsuite/std/ranges/access/data.cc: New test.
* testsuite/std/ranges/access/empty.cc: New test.
* testsuite/std/ranges/access/end.cc: New test.
* testsuite/std/ranges/access/rbegin.cc: New test.
* testsuite/std/ranges/access/rend.cc: New test.
* testsuite/std/ranges/access/size.cc: New test.
* testsuite/util/testsuite_iterators.h (contiguous_iterator_wrapper)
(test_range, test_sized_range): New test utilities.

From-SVN: r277579

Minor improvements to testsuite iterator utilities

* testsuite/util/testsuite_iterators.h (BoundsContainer::size()): Add
new member function.
(WritableObject::operator=): Constrain with enable_if when available.
(remove_cv): Use std::remove_if when available.
(test_container::it(int)): Use size().
(test_container::size()): Use BoundsContainer::size().

From-SVN: r277578

PR libstdc++/92267 fix ABI change in deque iterators

Defaulting the copy constructor on its first declaration made it change
from user-provided (and non-trivial) to implicitly-defined (and
trivial). This caused an ABI incompatibility between GCC 8 and GCC 9,
where functions taking a deque iterator disagree on the argument passing
convention.

PR libstdc++/92267
* include/bits/stl_deque.h (_Deque_iterator(const _Deque_iterator&)):
Do not define as defaulted.
* testsuite/23_containers/deque/types/92267.cc: New test.

From-SVN: r277577

re PR testsuite/92144 (c-c++-common/Warray-bounds-4.c still fails after r277080)

gcc/testsuite/ChangeLog:

PR testsuite/92144
* c-c++-common/Warray-bounds-4.c: Disable test to avoid failures
due to PR 83543.

From-SVN: r277576

cp-demangle.c (d_number): Avoid signed int overflow.

2019-10-29 Paul Pluzhnikov  <ppluzhnikov@google.com>

* cp-demangle.c (d_number): Avoid signed int overflow.

From-SVN: r277575

Pass memory statistics for {symbol,call}_summary.

2019-10-29  Martin Liska  <mliska@suse.cz>

* symbol-summary.h (function_summary): Pass memory location
to underlaying hash_map (or vec).
(V>::fast_function_summary): Likewise.

From-SVN: r277573

Release function and edge summaries allocated with GGC.

2019-10-29  Martin Liska  <mliska@suse.cz>

* ggc.h (ggc_alloc_no_dtor): New function.
* ipa-fnsummary.c (ipa_free_fn_summary): Call
destructor and ggc_free.
(ipa_free_size_summary): Call delete instead
of release.
* ipa-fnsummary.h: Use new function ggc_alloc_no_dtor.
* ipa-prop.c (ipa_check_create_edge_args): Likewise.
(ipa_free_all_edge_args): Call destructor and ggc_free.
(ipa_free_all_node_params): Likewise.
(ipcp_free_transformation_sum): Likewise.
* ipa-prop.h (ipa_check_create_node_params):
Call new ggc_alloc_no_dtor.
* ipa-sra.c (ipa_sra_generate_summary): Likewise.
(ipa_sra_analysis): Call destructor and ggc_free.
Replace release with delete operator.
* symbol-summary.h (release): Remove ..
(V>::~fast_function_summary): and move logic here.
Likewise for other classes.

From-SVN: r277572

re PR tree-optimization/92260 (ICE in exact_div, at poly-int.h:2162)

2019-10-29  Richard Biener  <rguenther@suse.de>

PR tree-optimization/92260
* tree-vect-slp.c (vect_get_constant_vectors): Special-case
lane-reducing ops.

* gcc.dg/pr92260.c: New testcase.

From-SVN: r277571

[vect]PR 88915: Vectorize epilogues when versioning loops

gcc/ChangeLog:
2019-10-29  Andre Vieira  <andre.simoesdiasvieira@arm.com>

PR 88915
* tree-ssa-loop-niter.h (simplify_replace_tree): Change declaration.
* tree-ssa-loop-niter.c (simplify_replace_tree): Add context parameter
and make the valueize function pointer also take a void pointer.
* gcc/tree-ssa-sccvn.c (vn_valueize_wrapper): New function to wrap
around vn_valueize, to call it without a context.
(process_bb): Use vn_valueize_wrapper instead of vn_valueize.
* tree-vect-loop.c (_loop_vec_info): Initialize epilogue_vinfos.
(~_loop_vec_info): Release epilogue_vinfos.
(vect_analyze_loop_costing): Use knowledge of main VF to estimate
number of iterations of epilogue.
(vect_analyze_loop_2): Adapt to analyse main loop for all supported
vector sizes when vect-epilogues-nomask=1.  Also keep track of lowest
versioning threshold needed for main loop.
(vect_analyze_loop): Likewise.
(find_in_mapping): New helper function.
(update_epilogue_loop_vinfo): New function.
(vect_transform_loop): When vectorizing epilogues re-use analysis done
on main loop and call update_epilogue_loop_vinfo to update it.
* tree-vect-loop-manip.c (vect_update_inits_of_drs): No longer insert
stmts on loop preheader edge.
(vect_do_peeling): Enable skip-vectors when doing loop versioning if
we decided to vectorize epilogues.  Update epilogues NITERS and
construct ADVANCE to update epilogues data references where needed.
* tree-vectorizer.h (_loop_vec_info): Add epilogue_vinfos.
(vect_do_peeling, vect_update_inits_of_drs,
 determine_peel_for_niter, vect_analyze_loop): Add or update
declarations.
* tree-vectorizer.c (try_vectorize_loop_1): Make sure to use already
created loop_vec_info's for epilogues when available.  Otherwise analyse
epilogue separately.

From-SVN: r277569

tree-ssa.texi (Immediate Uses): Fix FOR_EACH_IMM_USE_STMT example.

2019-10-29  Richard Biener  <rguenther@suse.de>

* doc/tree-ssa.texi (Immediate Uses): Fix FOR_EACH_IMM_USE_STMT
example.

From-SVN: r277568

Fix reduc_index calculation in vectorizable_condition

Fixes ICEs in gcc.target/aarch64/sve/clastb*.

2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* tree-vect-stmts.c (vectorizable_condition): Get the reduction
index for the COND_EXPR from stmt_info rather than reduc_info.

From-SVN: r277567

re PR tree-optimization/65930 (Reduction with sign-change not handled)

2019-10-29  Richard Biener  <rguenther@suse.de>

PR tree-optimization/65930
* tree-vect-loop.c (check_reduction_path): Relax single-use
check allowing out-of-loop uses.
(vect_is_simple_reduction): SLP reduction chains cannot have
intermediate stmts used outside of the loop.
(vect_create_epilog_for_reduction): The adjustment might need
to be converted.
(vectorizable_reduction): Annotate live stmts of the reduction
chain with STMT_VINFO_REDUC_DEF.
* tree-vect-stms.c (process_use): Remove no longer true asserts.

* gcc.dg/vect/pr65930-1.c: New testcase.

From-SVN: r277566

[AArch64] Add main SVE ACLE tests

Now that the PCS support is applied, this patch adds the main
SVE ACLE tests.  The idea is to test various combinations of operands
for each ACLE function, with each combination using a specific register
allocation and with each combination being wrapped its own test function.
We then compare the full assembly output of these test functions against
the expected/preferred sequences.  This provides both optimisation and
correctness testing, since ultimately the ACLE functions are defined in
terms of the underlying SVE instructions.

2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

gcc/testsuite/
* g++.target/aarch64/sve/acle/aarch64-sve-acle-asm.exp: New file.
* gcc.target/aarch64/sve/acle/aarch64-sve-acle-asm.exp: New file.
* gcc.target/aarch64/sve/acle/asm: New test directory.

Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
From-SVN: r277565

[AArch64] Add support for the SVE PCS

The AAPCS64 specifies that if a function takes arguments in SVE
registers or returns them in SVE registers, it must preserve all
of Z8-Z23 and all of P4-P11.  (Normal functions only preserve the
low 64 bits of Z8-Z15 and clobber all of the predicate registers.)

This variation is known informally as the "SVE PCS" and functions
that use it are known informally as "SVE functions".  The SVE PCS
is mutually interoperable with functions that follow the standard
AAPCS64 rules and those that use the aarch64_vector_pcs attribute.
(Note that it's an error to use the attribute for SVE functions.)

One complication -- although it's not really that complicated --
is that SVE registers need to be saved at a VL-dependent offset while
other registers need to be saved at a constant offset.  The easiest way
of handling this seemed to be to group the SVE registers together below
the hard frame pointer.  In common cases, the frame pointer is then
usually an easy-to-compute VL multiple above the stack pointer and a
constant amount below the incoming stack pointer.

A bigger complication is that, because the base AAPCS64 specifies that
only the low 64 bits of V8-V15 are preserved by calls, the associated
DWARF frame registers are also treated as 64 bits by the unwinder.
The 64 bits must also have the same layout as they would for a base
AAPCS64 function, otherwise unwinding won't work correctly.  (This is
actually a problem for the existing aarch64_vector_pcs support too,
but I'll fix that separately.)

This falls out naturally for little-endian targets but not for
big-endian targets.  The easiest way of meeting the requirement for them
was to use ST1D and LD1D to save and restore Z8-Z15, which also has the
nice property of storing the 64 bits at the start of the slot.  However,
using ST1D and LD1D requires a spare predicate register, and since all
of P0-P7 are either argument registers or call-preserved, we may need
to spill P4 in order to save the vector registers, even if P4 wouldn't
need to be saved otherwise.

Since Z16-Z23 are fully clobbered by base AAPCS64 functions, we don't
need to emit frame information for them at all.  This avoids having
to decide whether the registers should be treated as having 64 bits
(as for Z8-Z15), 128 bits (for Advanced SIMD) or the full SVE width.

There are two ways of dealing with stack-clash protection when
saving SVE registers:

(1) If the area between the hard frame pointer and the incoming stack
    pointer is allocated via a store with writeback (callee_adjust != 0),
    the SVE save area is allocated separately and becomes the "initial"
    allocation as far as stack-clash protection goes.  In this case
    the store with writeback acts as a probe at the hard frame pointer
    position.

(2) If the area between the hard frame pointer and the incoming stack
    pointer is allocated via aarch64_allocate_and_probe_stack_space,
    the SVE save area is added to this initial allocation, so that the
    SP ends up pointing at the SVE register saves.  It's then necessary
    to use a temporary base register to save the non-SVE registers.
    Setting up this temporary register requires a single instruction
    only and so should be more efficient than doing two allocations
    and probes.

When SVE registers need to be saved, saving them below the frame pointer
makes it harder to rely on the LR save as a stack probe, since the LR
register's offset won't usually be a compile-time constant.  The patch
copes with that by using the lowest SVE register save as a stack probe
too, and thus prevents the save from being shrink-wrapped if stack clash
protection is enabled.

The changelog describes the low-level details.

2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
* calls.c (pass_by_reference): Leave the target to decide whether
POLY_INT_CST-sized arguments should be passed by value or reference,
rather than forcing them to be passed by reference.
(must_pass_in_stack_var_size): Likewise.
* config/aarch64/aarch64.md (LAST_SAVED_REGNUM): Redefine from
V31_REGNUM to P15_REGNUM.
* config/aarch64/aarch64-protos.h (aarch64_init_cumulative_args):
Take an extra "silent_p" parameter, defaulting to false.
(aarch64_sve::svbool_type_p): Declare.
(aarch64_sve::nvectors_if_data_type): Likewise.
* config/aarch64/aarch64.h (NUM_PR_ARG_REGS): New macro.
(aarch64_frame::reg_offset): Turn into poly_int64s.
(aarch64_frame::save_regs_size): Likewise.
(aarch64_frame::below_hard_fp_saved_regs_size): New field.
(aarch64_frame::sve_callee_adjust): Likewise.
(aarch64_frame::spare_reg_reg): Likewise.
(ARM_PCS_SVE): New arm_pcs value.
(CUMULATIVE_ARGS::aapcs_nprn): New field.
(CUMULATIVE_ARGS::aapcs_nextnprn): Likewise.
(CUMULATIVE_ARGS::silent_p): Likewise.
(BITS_PER_SVE_PRED): New macro.
* config/aarch64/aarch64.c (handle_aarch64_vector_pcs_attribute): New
function.  Reject aarch64_vector_pcs attributes on SVE functions.
(aarch64_attribute_table): Use the above handler.
(aarch64_sve_abi): New function.
(aarch64_sve_argument_p): Likewise.
(aarch64_returns_value_in_sve_regs_p): Likewise.
(aarch64_takes_arguments_in_sve_regs_p): Likewise.
(aarch64_fntype_abi): Check for SVE functions and return the SVE PCS
descriptor for them.
(aarch64_simd_decl_p): Delete.
(aarch64_emit_cfi_for_reg_p): New function.
(aarch64_reg_save_mode): Remove the fndecl argument and instead use
crtl->abi to choose the mode for FP registers.  Handle the SVE PCS.
(aarch64_hard_regno_call_part_clobbered): Do not treat FP registers
as partly clobbered for the SVE PCS.
(aarch64_function_ok_for_sibcall): Check whether the two functions
use the same ABI, rather than checking specifically for whether
they're aarch64_vector_pcs functions.
(aarch64_pass_by_reference): Raise an error for attempts to pass
SVE arguments when SVE is disabled.  Pass SVE arguments by reference
if there are not enough free registers left, or if the argument is
variadic.
(aarch64_function_value): Handle SVE predicates, vectors and tuples.
(aarch64_return_in_memory): Do not return SVE predicates, vectors and
tuples in memory.
(aarch64_layout_arg): Take a function_arg_info rather than
individual properties.  Handle SVE predicates, vectors and tuples.
Raise an error if they are passed to unprototyped functions.
(aarch64_function_arg): If the silent_p flag is set, suppress the
usual error about using float registers without TARGET_FLOAT.
(aarch64_init_cumulative_args): Take a silent_p parameter and store
it in the cumulative_args structure.  Initialize aapcs_nprn and
aapcs_nextnprn.  If the silent_p flag is set, suppress the usual
error about using float registers without TARGET_FLOAT.
If the silent_p flag is not set, also raise an error about
using SVE functions when SVE is disabled.
(aarch64_function_arg_advance): Update the call to aarch64_layout_arg,
and call it for SVE functions too.  Update aapcs_nprn similarly
to the other register counts.
(aarch64_layout_frame): If a big-endian function needs to save
and restore Z8-Z15, search for a spare predicate that it can use.
Store SVE predicates at the bottom of the register save area,
followed by SVE vectors, then followed by the normal slots.
Keep pointing the hard frame pointer at the base of the normal slots,
above the SVE vectors.  Update the various frame creation and
tear-down strategies for the new layout, initializing the new
sve_callee_adjust field.  Add an additional layout for frames
whose saved registers are all SVE registers.
(aarch64_register_saved_on_entry): Cope with poly_int64 reg_offsets.
(aarch64_return_address_signing_enabled): Likewise.
(aarch64_push_regs, aarch64_pop_regs): Update calls to
aarch64_reg_save_mode.
(aarch64_adjust_sve_callee_save_base): New function.
(aarch64_add_cfa_expression): Move earlier in file.  Take the
saved register as an rtx rather than a register number and use
its mode for the MEM slot.
(aarch64_save_callee_saves): Remove the mode argument and instead
use aarch64_reg_save_mode to get the mode of each save slot.
Add a hard_fp_valid_p parameter.  Cope with poly_int64 register
offsets.  Allow GP offsets to be saved at a VL-based offset from
the stack, handling this case using the frame pointer if available
or a temporary register otherwise.  Use ST1D to save Z8-Z15 for
big-endian SVE functions; use normal moves for other SVE saves.
Only mark the save as frame-related if aarch64_emit_cfi_for_reg_p
returns true.  Add explicit CFA notes when not storing via the
stack pointer.  Do not try to pair SVE saves.
(aarch64_restore_callee_saves): Cope with poly_int64 register
offsets.  Use LD1D to restore Z8-Z15 for big-endian SVE functions;
use normal moves for other SVE restores.  Only add CFA restore notes
if aarch64_emit_cfi_for_reg_p returns true.  Do not try to pair
SVE restores.
(aarch64_get_separate_components): Always keep the first SVE save
in the prologue if we need to use it as a stack probe.  Don't allow
Z8-Z15 saves and loads to be shrink-wrapped for big-endian targets.
Likewise the spare predicate register that they need.  Update the
offset calculation to account for the SVE save area.  Use the
appropriate range check for SVE LDR and STR instructions.
(aarch64_components_for_bb): Cope with poly_int64 reg_offsets.
(aarch64_process_components): Likewise.  Update the offset
calculation to account for the SVE save area.  Only mark the
save as frame-related if aarch64_emit_cfi_for_reg_p returns true.
Do not try to pair SVE saves.
(aarch64_allocate_and_probe_stack_space): Cope with poly_int64
reg_offsets.  When handling the final allocation, expect the
first SVE register save to be part of the initial allocation
and for it to act as a probe at SP.  Account for the SVE callee
save area in the dump information.
(aarch64_expand_prologue): Update the frame diagram.  Fold the
SVE callee allocation into the initial allocation if stack clash
protection is enabled.  Use new variables to track the offset
of the frame chain (and hard frame pointer) from the current
stack pointer, and likewise the offset of the bottom of the
register save area.  Update calls to aarch64_save_callee_saves
and aarch64_add_cfa_expression.  Apply sve_callee_adjust before
saving the FP&SIMD registers.  Save the predicate registers.
(aarch64_expand_epilogue): Take below_hard_fp_saved_regs_size
into account when setting the stack pointer from the frame pointer,
and when deciding whether we can inherit the initial adjustment
amount from the prologue.  Restore the predicate registers after
the vector registers, then apply sve_callee_adjust, then restore
the general registers.
(aarch64_secondary_reload): Don't use secondary SVE reloads
for VNx16BImode.
(aapcs_vfp_sub_candidate): Assert that the type is not an SVE type.
(aarch64_short_vector_p): Return false for SVE types.
(aarch64_vfp_is_call_or_return_candidate): Initialize *is_ha
at the start of the function.  Return false for SVE types.
(aarch64_asm_output_variant_pcs): Output .variant_pcs for SVE
functions too.
(TARGET_STRICT_ARGUMENT_NAMING): Redefine to request strict naming.
* config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_le): Extend
to big-endian targets for bytewise moves.
(*aarch64_sve_mov<mode>_be): Exclude the bytewise case.

gcc/testsuite/
* gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp: New file.
* gcc.target/aarch64/sve/pcs/annotate_1.c: New test.
* gcc.target/aarch64/sve/pcs/annotate_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/annotate_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/annotate_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/annotate_5.c: Likewise.
* gcc.target/aarch64/sve/pcs/annotate_6.c: Likewise.
* gcc.target/aarch64/sve/pcs/annotate_7.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_10.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_11_nosc.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_11_sc.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_7.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_9.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_5.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_6.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_7.c: Likewise.
* gcc.target/aarch64/sve/pcs/nosve_8.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_7.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_8.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_9.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_1_be_nowrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_1_be_wrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_1_le_nowrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_1_le_wrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_be_nowrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_be_wrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_le_nowrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_le_wrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_4_be.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_4_le.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_5_be.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_5_le.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_1_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_1_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_1_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_1_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/unprototyped_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_3_nosc.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_3_sc.c: Likewise.
* gcc.target/aarch64/sve/pcs/vpcs_1.c: Likewise.
* g++.target/aarch64/sve/catch_7.C: Likewise.

From-SVN: r277564

[AArch64] Add support for arm_sve.h

This patch adds support for arm_sve.h.  I've tried to split all the
groundwork out into separate patches, so this is mostly adding new code
rather than changing existing code.

The C++ frontend seems to handle correct ACLE code without modification,
even in length-agnostic mode.  The C frontend is close; the only correct
construct I know it doesn't handle is initialisation.  E.g.:

  svbool_t pg = svptrue_b8 ();

produces:

  variable-sized object may not be initialized

although:

  svbool_t pg; pg = svptrue_b8 ();

works fine.  This can be fixed by changing:

    {
      /* A complete type is ok if size is fixed.  */

-     if (TREE_CODE (TYPE_SIZE (TREE_TYPE (decl))) != INTEGER_CST
+     if (!poly_int_tree_p (TYPE_SIZE (TREE_TYPE (decl)))
  || C_DECL_VARIABLE_SIZE (decl))
        {
  error ("variable-sized object may not be initialized");

in c/c-decl.c:start_decl.

Invalid code is likely to trigger ICEs, so this isn't ready for general
use yet.  However, it seemed better to apply the patch now and deal with
diagnosing invalid code as a follow-up.  For one thing, it means that
we'll be able to provide testcases for middle-end changes related
to SVE vectors, which has been a problem until now.  (I already have
a series of such patches lined up.)

The patch includes some tests, but the main ones need to wait until the
PCS support has been applied.

2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

gcc/
* config.gcc (aarch64*-*-*): Add arm_sve.h to extra_headers.
Add aarch64-sve-builtins.o, aarch64-sve-builtins-shapes.o and
aarch64-sve-builtins-base.o to extra_objs.  Add
aarch64-sve-builtins.h and aarch64-sve-builtins.cc to target_gtfiles.
* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): New rule.
(aarch64-sve-builtins-shapes.o): Likewise.
(aarch64-sve-builtins-base.o): New rules.
* config/aarch64/aarch64-c.c (aarch64_pragma_aarch64): New function.
(aarch64_resolve_overloaded_builtin): Likewise.
(aarch64_check_builtin_call): Likewise.
(aarch64_register_pragmas): Install aarch64_resolve_overloaded_builtin
and aarch64_check_builtin_call in targetm.  Register the GCC aarch64
pragma.
* config/aarch64/aarch64-protos.h (AARCH64_FOR_SVPRFOP): New macro.
(aarch64_svprfop): New enum.
(AARCH64_BUILTIN_SVE): New aarch64_builtin_class enum value.
(aarch64_sve_int_mode, aarch64_sve_data_mode): Declare.
(aarch64_fold_sve_cnt_pat, aarch64_output_sve_prefetch): Likewise.
(aarch64_output_sve_cnt_pat_immediate): Likewise.
(aarch64_output_sve_ptrues, aarch64_sve_ptrue_svpattern_p): Likewise.
(aarch64_sve_sqadd_sqsub_immediate_p, aarch64_sve_ldff1_operand_p)
(aarch64_sve_ldnf1_operand_p, aarch64_sve_prefetch_operand_p)
(aarch64_ptrue_all_mode, aarch64_convert_sve_data_to_pred): Likewise.
(aarch64_expand_sve_dupq, aarch64_replace_reg_mode): Likewise.
(aarch64_sve::init_builtins, aarch64_sve::handle_arm_sve_h): Likewise.
(aarch64_sve::builtin_decl, aarch64_sve::builtin_type_p): Likewise.
(aarch64_sve::mangle_builtin_type): Likewise.
(aarch64_sve::resolve_overloaded_builtin): Likewise.
(aarch64_sve::check_builtin_call, aarch64_sve::gimple_fold_builtin)
(aarch64_sve::expand_builtin): Likewise.
* config/aarch64/aarch64.c (aarch64_sve_data_mode): Make public.
(aarch64_sve_int_mode): Likewise.
(aarch64_ptrue_all_mode): New function.
(aarch64_convert_sve_data_to_pred): Make public.
(svprfop_token): New function.
(aarch64_output_sve_prefetch): Likewise.
(aarch64_fold_sve_cnt_pat): Likewise.
(aarch64_output_sve_cnt_pat_immediate): Likewise.
(aarch64_sve_move_pred_via_while): Use gen_while with UNSPEC_WHILE_LO
instead of gen_while_ult.
(aarch64_replace_reg_mode): Make public.
(aarch64_init_builtins): Call aarch64_sve::init_builtins.
(aarch64_fold_builtin): Handle AARCH64_BUILTIN_SVE.
(aarch64_gimple_fold_builtin, aarch64_expand_builtin): Likewise.
(aarch64_builtin_decl, aarch64_builtin_reciprocal): Likewise.
(aarch64_mangle_type): Call aarch64_sve::mangle_type.
(aarch64_sve_sqadd_sqsub_immediate_p): New function.
(aarch64_sve_ptrue_svpattern_p): Likewise.
(aarch64_sve_pred_valid_immediate): Check
aarch64_sve_ptrue_svpattern_p.
(aarch64_sve_ldff1_operand_p, aarch64_sve_ldnf1_operand_p)
(aarch64_sve_prefetch_operand_p, aarch64_output_sve_ptrues): New
functions.
* config/aarch64/aarch64.md (UNSPEC_LDNT1_SVE, UNSPEC_STNT1_SVE)
(UNSPEC_LDFF1_GATHER, UNSPEC_PTRUE, UNSPEC_WHILE_LE, UNSPEC_WHILE_LS)
(UNSPEC_WHILE_LT, UNSPEC_CLASTA, UNSPEC_UPDATE_FFR)
(UNSPEC_UPDATE_FFRT, UNSPEC_RDFFR, UNSPEC_WRFFR)
(UNSPEC_SVE_LANE_SELECT, UNSPEC_SVE_CNT_PAT, UNSPEC_SVE_PREFETCH)
(UNSPEC_SVE_PREFETCH_GATHER, UNSPEC_SVE_COMPACT, UNSPEC_SVE_SPLICE):
New unspecs.
* config/aarch64/iterators.md (SI_ONLY, DI_ONLY, VNx8HI_ONLY)
(VNx2DI_ONLY, SVE_PARTIAL, VNx8_NARROW, VNx8_WIDE, VNx4_NARROW)
(VNx4_WIDE, VNx2_NARROW, VNx2_WIDE, PRED_HSD): New mode iterators.
(UNSPEC_ADR, UNSPEC_BRKA, UNSPEC_BRKB, UNSPEC_BRKN, UNSPEC_BRKPA)
(UNSPEC_BRKPB, UNSPEC_PFIRST, UNSPEC_PNEXT, UNSPEC_CNTP, UNSPEC_SADDV)
(UNSPEC_UADDV, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTMAD)
(UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_CMPEQ_WIDE): New unspecs.
(UNSPEC_COND_CMPGE_WIDE, UNSPEC_COND_CMPGT_WIDE): Likewise.
(UNSPEC_COND_CMPHI_WIDE, UNSPEC_COND_CMPHS_WIDE): Likewise.
(UNSPEC_COND_CMPLE_WIDE, UNSPEC_COND_CMPLO_WIDE): Likewise.
(UNSPEC_COND_CMPLS_WIDE, UNSPEC_COND_CMPLT_WIDE): Likewise.
(UNSPEC_COND_CMPNE_WIDE, UNSPEC_COND_FCADD90, UNSPEC_COND_FCADD270)
(UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90, UNSPEC_COND_FCMLA180)
(UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN): Likewise.
(UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX, UNSPEC_COND_FSCALE): Likewise.
(UNSPEC_LASTA, UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE): Likewise.
(UNSPEC_LSHIFTRT_WIDE, UNSPEC_LDFF1, UNSPEC_LDNF1): Likewise.
(Vesize): Handle partial vector modes.
(self_mask, narrower_mask, sve_lane_con, sve_lane_pair_con): New
mode attributes.
(UBINQOPS, ANY_PLUS, SAT_PLUS, ANY_MINUS, SAT_MINUS): New code
iterators.
(s, paired_extend, inc_dec): New code attributes.
(SVE_INT_ADDV, CLAST, LAST): New int iterators.
(SVE_INT_UNARY): Add UNSPEC_RBIT.
(SVE_FP_UNARY, SVE_FP_UNARY_INT): New int iterators.
(SVE_FP_BINARY, SVE_FP_BINARY_INT): Likewise.
(SVE_COND_FP_UNARY): Add UNSPEC_COND_FRECPX.
(SVE_COND_FP_BINARY): Add UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and
UNSPEC_COND_FMULX.
(SVE_COND_FP_BINARY_INT, SVE_COND_FP_ADD): New int iterators.
(SVE_COND_FP_SUB, SVE_COND_FP_MUL): Likewise.
(SVE_COND_FP_BINARY_I1): Add UNSPEC_COND_FMAX and UNSPEC_COND_FMIN.
(SVE_COND_FP_BINARY_REG): Add UNSPEC_COND_FMULX.
(SVE_COND_FCADD, SVE_COND_FP_MAXMIN, SVE_COND_FCMLA)
(SVE_COND_INT_CMP_WIDE, SVE_FP_TERNARY_LANE, SVE_CFP_TERNARY_LANE)
(SVE_WHILE, SVE_SHIFT_WIDE, SVE_LDFF1_LDNF1, SVE_BRK_UNARY)
(SVE_BRK_BINARY, SVE_PITER): New int iterators.
(optab): Handle UNSPEC_SADDV, UNSPEC_UADDV, UNSPEC_FRECPE,
UNSPEC_FRECPS, UNSPEC_RSQRTE, UNSPEC_RSQRTS, UNSPEC_RBIT,
UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART, UNSPEC_FMLA, UNSPEC_FMLS,
UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270,
UNSPEC_FEXPA, UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_FCADD90,
UNSPEC_COND_FCADD270, UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90,
UNSPEC_COND_FCMLA180, UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX,
UNSPEC_COND_FMIN, UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX and
UNSPEC_COND_FSCALE.
(maxmin_uns): Handle UNSPEC_COND_FMAX and UNSPEC_COND_FMIN.
(binqops_op, binqops_op_rev, last_op): New int attributes.
(su): Handle UNSPEC_SADDV and UNSPEC_UADDV.
(fn, ab): New int attributes.
(cmp_op): Handle UNSPEC_COND_CMP*_WIDE and UNSPEC_WHILE_*.
(while_optab_cmp, brk_op, sve_pred_op): New int attributes.
(sve_int_op): Handle UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART,
UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE, UNSPEC_LSHIFTRT_WIDE and
UNSPEC_RBIT.
(sve_fp_op): Handle UNSPEC_FRECPE, UNSPEC_FRECPS, UNSPEC_RSQRTE,
UNSPEC_RSQRTS, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTSMUL,
UNSPEC_FTSSEL, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN, UNSPEC_COND_FMULX,
UNSPEC_COND_FRECPX and UNSPEC_COND_FSCALE.
(sve_fp_op_rev): Handle UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and
UNSPEC_COND_FMULX.
(rot): Handle UNSPEC_COND_FCADD* and UNSPEC_COND_FCMLA*.
(brk_reg_con, brk_reg_opno): New int attributes.
(sve_pred_fp_rhs1_operand, sve_pred_fp_rhs2_operand): Handle
UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and UNSPEC_COND_FMULX.
(sve_pred_fp_rhs2_immediate): Handle UNSPEC_COND_FMAX and
UNSPEC_COND_FMIN.
(max_elem_bits): New int attribute.
(min_elem_bits): Handle UNSPEC_RBIT.
* config/aarch64/predicates.md (subreg_lowpart_operator): Handle
TRUNCATE as well as SUBREG.
(ascending_int_parallel, aarch64_simd_reg_or_minus_one)
(aarch64_sve_ldff1_operand, aarch64_sve_ldnf1_operand)
(aarch64_sve_prefetch_operand, aarch64_sve_ptrue_svpattern_immediate)
(aarch64_sve_qadd_immediate, aarch64_sve_qsub_immediate)
(aarch64_sve_gather_immediate_b, aarch64_sve_gather_immediate_h)
(aarch64_sve_gather_immediate_w, aarch64_sve_gather_immediate_d)
(aarch64_sve_sqadd_operand, aarch64_sve_gather_offset_b)
(aarch64_sve_gather_offset_h, aarch64_sve_gather_offset_w)
(aarch64_sve_gather_offset_d, aarch64_gather_scale_operand_b)
(aarch64_gather_scale_operand_h): New predicates.
* config/aarch64/constraints.md (UPb, UPd, UPh, UPw, Utf, Utn, vgb)
(vgd, vgh, vgw, vsQ, vsS): New constraints.
* config/aarch64/aarch64-sve.md: Add a note on the FFR handling.
(*aarch64_sve_reinterpret<mode>): Allow any source register
instead of requiring an exact match.
(*aarch64_sve_ptruevnx16bi_cc, *aarch64_sve_ptrue<mode>_cc)
(*aarch64_sve_ptruevnx16bi_ptest, *aarch64_sve_ptrue<mode>_ptest)
(aarch64_wrffr, aarch64_update_ffr_for_load, aarch64_copy_ffr_to_ffrt)
(aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest)
(*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc)
(aarch64_update_ffrt): New patterns.
(@aarch64_load_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>)
(@aarch64_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
(@aarch64_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
(@aarch64_ld<fn>f1<mode>): New patterns.
(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>)
(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
(@aarch64_ldnt1<mode>): New patterns.
(gather_load<mode>): Use aarch64_sve_gather_offset_<Vesize> for
the scalar part of the address.
(mask_gather_load<SVE_S:mode>): Use aarch64_sve_gather_offset_w for the
scalar part of the addresse and add an alternative for handling
nonzero offsets.
(mask_gather_load<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d.
(*mask_gather_load<mode>_sxtw, *mask_gather_load<mode>_uxtw)
(@aarch64_gather_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
(@aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw)
(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw)
(@aarch64_ldff1_gather<SVE_S:mode>, @aarch64_ldff1_gather<SVE_D:mode>)
(*aarch64_ldff1_gather<mode>_sxtw, *aarch64_ldff1_gather<mode>_uxtw)
(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw)
(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw)
(@aarch64_sve_prefetch<mode>): New patterns.
(@aarch64_sve_gather_prefetch<SVE_I:mode><VNx4SI_ONLY:mode>)
(@aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>)
(*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_sxtw)
(*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_uxtw)
(@aarch64_store_trunc<VNx8_NARROW:mode><VNx8_WIDE:mode>)
(@aarch64_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
(@aarch64_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
(@aarch64_stnt1<mode>): New patterns.
(scatter_store<mode>): Use aarch64_sve_gather_offset_<Vesize> for
the scalar part of the address.
(mask_scatter_store<SVE_S:mode>): Use aarch64_sve_gather_offset_w for
the scalar part of the addresse and add an alternative for handling
nonzero offsets.
(mask_scatter_store<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d.
(*mask_scatter_store<mode>_sxtw, *mask_scatter_store<mode>_uxtw)
(@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
(@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw):
New patterns.
(vec_duplicate<mode>): Use QI as the mode of the input operand.
(extract_last_<mode>): Generalize to...
(@extract_<LAST:last_op>_<mode>): ...this.
(*<SVE_INT_UNARY:optab><mode>2): Rename to...
(@aarch64_pred_<SVE_INT_UNARY:optab><mode>): ...this.
(@cond_<SVE_INT_UNARY:optab><mode>): New expander.
(@aarch64_pred_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): New pattern.
(@aarch64_cond_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): Likewise.
(@aarch64_pred_cnot<mode>, @cond_cnot<mode>): New expanders.
(@aarch64_sve_<SVE_FP_UNARY_INT:optab><mode>): New pattern.
(@aarch64_sve_<SVE_FP_UNARY:optab><mode>): Likewise.
(*<SVE_COND_FP_UNARY:optab><mode>2): Rename to...
(@aarch64_pred_<SVE_COND_FP_UNARY:optab><mode>): ...this.
(@cond_<SVE_COND_FP_UNARY:optab><mode>): New expander.
(*<SVE_INT_BINARY_IMM:optab><mode>3): Rename to...
(@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>): ...this.
(@aarch64_adr<mode>, *aarch64_adr_sxtw): New patterns.
(*aarch64_adr_uxtw_unspec): Likewise.
(*aarch64_adr_uxtw): Rename to...
(*aarch64_adr_uxtw_and): ...this.
(@aarch64_adr<mode>_shift): New expander.
(*aarch64_adr_shift_sxtw): New pattern.
(aarch64_<su>abd<mode>_3): Rename to...
(@aarch64_pred_<su>abd<mode>): ...this.
(<su>abd<mode>_3): Update accordingly.
(@aarch64_cond_<su>abd<mode>): New expander.
(@aarch64_<SBINQOPS:su_optab><optab><mode>): New pattern.
(@aarch64_<UBINQOPS:su_optab><optab><mode>): Likewise.
(*<su>mul<mode>3_highpart): Rename to...
(@aarch64_pred_<optab><mode>): ...this.
(@cond_<MUL_HIGHPART:optab><mode>): New expander.
(*cond_<MUL_HIGHPART:optab><mode>_2): New pattern.
(*cond_<MUL_HIGHPART:optab><mode>_z): Likewise.
(*<SVE_INT_BINARY_SD:optab><mode>3): Rename to...
(@aarch64_pred_<SVE_INT_BINARY_SD:optab><mode>): ...this.
(cond_<SVE_INT_BINARY_SD:optab><mode>): Add a "@" marker.
(@aarch64_bic<mode>, @cond_bic<mode>): New expanders.
(*v<ASHIFT:optab><mode>3): Rename to...
(@aarch64_pred_<ASHIFT:optab><mode>): ...this.
(@aarch64_sve_<SVE_SHIFT_WIDE:sve_int_op><mode>): New pattern.
(@cond_<SVE_SHIFT_WIDE:sve_int_op><mode>): New expander.
(*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_m): New pattern.
(*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_z): Likewise.
(@cond_asrd<mode>): New expander.
(*cond_asrd<mode>_2, *cond_asrd<mode>_z): New patterns.
(sdiv_pow2<mode>3): Expand to *cond_asrd<mode>_2.
(*sdiv_pow2<mode>3): Delete.
(@cond_<SVE_COND_FP_BINARY_INT:optab><mode>): New expander.
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): New pattern.
(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any): Likewise.
(@aarch64_sve_<SVE_FP_BINARY:optab><mode>): New pattern.
(@aarch64_sve_<SVE_FP_BINARY_INT:optab><mode>): Likewise.
(*<SVE_COND_FP_BINARY_REG:optab><mode>3): Rename to...
(@aarch64_pred_<SVE_COND_FP_BINARY_REG:optab><mode>): ...this.
(@aarch64_pred_<SVE_COND_FP_BINARY_INT:optab><mode>): New pattern.
(cond_<SVE_COND_FP_BINARY:optab><mode>): Add a "@" marker.
(*add<SVE_F:mode>3): Rename to...
(@aarch64_pred_add<SVE_F:mode>): ...this and add alternatives
for SVE_STRICT_GP.
(@aarch64_pred_<SVE_COND_FCADD:optab><mode>): New pattern.
(@cond_<SVE_COND_FCADD:optab><mode>): New expander.
(*cond_<SVE_COND_FCADD:optab><mode>_2): New pattern.
(*cond_<SVE_COND_FCADD:optab><mode>_any): Likewise.
(*sub<SVE_F:mode>3): Rename to...
(@aarch64_pred_sub<SVE_F:mode>): ...this and add alternatives
for SVE_STRICT_GP.
(@aarch64_pred_abd<SVE_F:mode>): New expander.
(*fabd<SVE_F:mode>3): Rename to...
(*aarch64_pred_abd<SVE_F:mode>): ...this.
(@aarch64_cond_abd<SVE_F:mode>): New expander.
(*mul<SVE_F:mode>3): Rename to...
(@aarch64_pred_<SVE_F:optab><mode>): ...this and add alternatives
for SVE_STRICT_GP.
(@aarch64_mul_lane_<SVE_F:mode>): New pattern.
(*<SVE_COND_FP_MAXMIN_PUBLIC:optab><mode>3): Rename and generalize
to...
(@aarch64_pred_<SVE_COND_FP_MAXMIN:optab><mode>): ...this.
(*<LOGICAL:optab><PRED_ALL:mode>3_ptest): New pattern.
(*<nlogical><PRED_ALL:mode>3): Rename to...
(aarch64_pred_<nlogical><PRED_ALL:mode>_z): ...this.
(*<nlogical><PRED_ALL:mode>3_cc): New pattern.
(*<nlogical><PRED_ALL:mode>3_ptest): Likewise.
(*<logical_nn><PRED_ALL:mode>3): Rename to...
(aarch64_pred_<logical_nn><mode>_z): ...this.
(*<logical_nn><PRED_ALL:mode>3_cc): New pattern.
(*<logical_nn><PRED_ALL:mode>3_ptest): Likewise.
(*fma<SVE_I:mode>4): Rename to...
(@aarch64_pred_fma<SVE_I:mode>): ...this.
(*fnma<SVE_I:mode>4): Rename to...
(@aarch64_pred_fnma<SVE_I:mode>): ...this.
(@aarch64_<sur>dot_prod_lane<vsi2qi>): New pattern.
(*<SVE_FP_TERNARY:optab><mode>4): Rename to...
(@aarch64_pred_<SVE_FP_TERNARY:optab><mode>): ...this.
(cond_<SVE_FP_TERNARY:optab><mode>): Add a "@" marker.
(@aarch64_<SVE_FP_TERNARY_LANE:optab>_lane_<mode>): New pattern.
(@aarch64_pred_<SVE_COND_FCMLA:optab><mode>): Likewise.
(@cond_<SVE_COND_FCMLA:optab><mode>): New expander.
(*cond_<SVE_COND_FCMLA:optab><mode>_4): New pattern.
(*cond_<SVE_COND_FCMLA:optab><mode>_any): Likewise.
(@aarch64_<FCMLA:optab>_lane_<mode>): Likewise.
(@aarch64_sve_tmad<mode>): Likewise.
(vcond_mask_<SVE_ALL:mode><vpred>): Add a "@" marker.
(*aarch64_sel_dup<mode>): Rename to...
(@aarch64_sel_dup<mode>): ...this.
(@aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide): New pattern.
(*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_cc): Likewise.
(*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_ptest): Likewise.
(@while_ult<GPI:mode><PRED_ALL:mode>): Generalize to...
(@while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>): ...this.
(*while_ult<GPI:mode><PRED_ALL:mode>_cc): Generalize to.
(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_cc): ...this.
(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): New pattern.
(*fcm<cmp_op><mode>): Rename to...
(@aarch64_pred_fcm<cmp_op><mode>): ...this.  Make operand order
match @aarch64_pred_cmp<cmp_op><SVE_I:mode>.
(*fcmuo<mode>): Rename to...
(@aarch64_pred_fcmuo<mode>): ...this.  Make operand order
match @aarch64_pred_cmp<cmp_op><SVE_I:mode>.
(@aarch64_pred_fac<cmp_op><mode>): New expander.
(@vcond_mask_<PRED_ALL:mode><mode>): New pattern.
(fold_extract_last_<mode>): Generalize to...
(@fold_extract_<last_op>_<mode>): ...this.
(@aarch64_fold_extract_vector_<last_op>_<mode>): New pattern.
(*reduc_plus_scal_<SVE_I:mode>): Replace with...
(@aarch64_pred_reduc_<optab>_<mode>): ...this pattern, making the
DImode result explicit.
(reduc_plus_scal_<mode>): Update accordingly.
(*reduc_<optab>_scal_<SVE_I:mode>): Rename to...
(@aarch64_pred_reduc_<optab>_<SVE_I:mode>): ...this.
(*reduc_<optab>_scal_<SVE_F:mode>): Rename to...
(@aarch64_pred_reduc_<optab>_<SVE_F:mode>): ...this.
(*aarch64_sve_tbl<mode>): Rename to...
(@aarch64_sve_tbl<mode>): ...this.
(@aarch64_sve_compact<mode>): New pattern.
(*aarch64_sve_dup_lane<mode>): Rename to...
(@aarch64_sve_dup_lane<mode>): ...this.
(@aarch64_sve_dupq_lane<mode>): New pattern.
(@aarch64_sve_splice<mode>): Likewise.
(aarch64_sve_<perm_insn><mode>): Rename to...
(@aarch64_sve_<perm_insn><mode>): ...this.
(*aarch64_sve_ext<mode>): Rename to...
(@aarch64_sve_ext<mode>): ...this.
(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): Add a "@" marker.
(*aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): Rename
to...
(@aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): ...this.
(*aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
Rename to...
(@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
...this.
(@cond_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): New expander.
(@cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): Likewise.
(*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): New pattern.
(*aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): Rename
to...
(@aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): ...this.
(aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Add
a "@" marker.
(@cond_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): New expander.
(@cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Likewise.
(*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): New
pattern.
(*aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): Rename to...
(@aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): ...this.
(@cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New expander.
(*cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New pattern.
(aarch64_sve_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): Add a
"@" marker.
(@cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New expander.
(*cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New pattern.
(aarch64_sve_punpk<perm_hilo>_<mode>): Add a "@" marker.
(@aarch64_brk<SVE_BRK_UNARY:brk_op>): New pattern.
(*aarch64_brk<SVE_BRK_UNARY:brk_op>_cc): Likewise.
(*aarch64_brk<SVE_BRK_UNARY:brk_op>_ptest): Likewise.
(@aarch64_brk<SVE_BRK_BINARY:brk_op>): Likewise.
(*aarch64_brk<SVE_BRK_BINARY:brk_op>_cc): Likewise.
(*aarch64_brk<SVE_BRK_BINARY:brk_op>_ptest): Likewise.
(@aarch64_sve_<SVE_PITER:sve_pred_op><mode>): Likewise.
(*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_cc): Likewise.
(*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_ptest): Likewise.
(aarch64_sve_cnt_pat): Likewise.
(@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode>_pat): Likewise.
(*aarch64_sve_incsi_pat): Likewise.
(@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode>_pat): Likewise.
(@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise.
(@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise.
(@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander.
(*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern.
(@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode>_pat): Likewise.
(*aarch64_sve_decsi_pat): Likewise.
(@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode>_pat): Likewise.
(@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise.
(@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise.
(@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander.
(*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern.
(@aarch64_pred_cntp<mode>): Likewise.
(@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp):
New expander.
(*aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp)
(*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns.
(@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
New expander.
(*aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
New pattern.
(@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New expander.
(*aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern.
(@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New expander.
(*aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern.
(@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New expander.
(*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern.
(@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp):
New expander.
(*aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp)
(*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns.
(@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
New expander.
(*aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
New pattern.
(@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New
expander.
(*aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern.
(@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New
expander.
(*aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern.
(@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New
expander.
(*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern.
* config/aarch64/arm_sve.h: New file.
* config/aarch64/aarch64-sve-builtins.h: Likewise.
* config/aarch64/aarch64-sve-builtins.cc: Likewise.
* config/aarch64/aarch64-sve-builtins.def: Likewise.
* config/aarch64/aarch64-sve-builtins-base.h: Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-base.def: Likewise.
* config/aarch64/aarch64-sve-builtins-functions.h: Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.h: Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise.

gcc/testsuite/
* g++.target/aarch64/sve/acle/aarch64-sve-acle.exp: New file.
* g++.target/aarch64/sve/acle/general-c++: New test directory.
* gcc.target/aarch64/sve/acle/aarch64-sve-acle.exp: New file.
* gcc.target/aarch64/sve/acle/general: New test directory.
* gcc.target/aarch64/sve/acle/general-c: Likewise.

Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
From-SVN: r277563