Eddie Hung [Fri, 20 Sep 2019 01:08:46 +0000 (18:08 -0700)]
Fix width of D
Eddie Hung [Fri, 20 Sep 2019 01:08:16 +0000 (18:08 -0700)]
Add mac.sh and macc_tb.v for testing
Eddie Hung [Thu, 19 Sep 2019 23:27:14 +0000 (16:27 -0700)]
Suppress $anyseq warnings
Eddie Hung [Thu, 19 Sep 2019 23:13:22 +0000 (16:13 -0700)]
Use ID() macro
Eddie Hung [Thu, 19 Sep 2019 22:58:01 +0000 (15:58 -0700)]
Use (* techmap_autopurge *) to suppress techmap warnings
Eddie Hung [Thu, 19 Sep 2019 22:55:49 +0000 (15:55 -0700)]
D is 25 bits not 24 bits wide
Eddie Hung [Thu, 19 Sep 2019 22:47:41 +0000 (15:47 -0700)]
Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dsp
Eddie Hung [Thu, 19 Sep 2019 22:40:28 +0000 (15:40 -0700)]
When two boxes connect to each other, need not be a (* keep *)
Eddie Hung [Thu, 19 Sep 2019 22:40:17 +0000 (15:40 -0700)]
Re-enable sign extension for C input
Eddie Hung [Thu, 19 Sep 2019 21:58:06 +0000 (14:58 -0700)]
synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2
Eddie Hung [Thu, 19 Sep 2019 21:57:38 +0000 (14:57 -0700)]
Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2
Eddie Hung [Thu, 19 Sep 2019 21:50:11 +0000 (14:50 -0700)]
Do not perform width-checks for DSP48E1 which is much more complicated
Eddie Hung [Thu, 19 Sep 2019 21:49:47 +0000 (14:49 -0700)]
Remove TODO as check should not be necessary
Eddie Hung [Thu, 19 Sep 2019 21:46:53 +0000 (14:46 -0700)]
Revert index to select
Eddie Hung [Thu, 19 Sep 2019 21:34:06 +0000 (14:34 -0700)]
Cleanup xilinx_dsp too
Eddie Hung [Thu, 19 Sep 2019 21:27:25 +0000 (14:27 -0700)]
Refactor ce{mux,pol} -> hold{mux,pol}
Eddie Hung [Thu, 19 Sep 2019 21:02:55 +0000 (14:02 -0700)]
Add HOLD/RST support for SB_MAC16
Eddie Hung [Thu, 19 Sep 2019 19:14:33 +0000 (12:14 -0700)]
Add support for SB_MAC16 CD and H registers
Eddie Hung [Thu, 19 Sep 2019 19:00:48 +0000 (12:00 -0700)]
Refactor ice40_dsp.pmg
Eddie Hung [Thu, 19 Sep 2019 19:00:39 +0000 (12:00 -0700)]
Add more entries
Eddie Hung [Thu, 19 Sep 2019 18:02:14 +0000 (11:02 -0700)]
Format macc.v
Clifford Wolf [Thu, 19 Sep 2019 17:26:09 +0000 (19:26 +0200)]
Add techmap_autopurge attribute, fixes #1381
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Thu, 19 Sep 2019 17:39:00 +0000 (10:39 -0700)]
Cleanup
Marcin Kościelnicki [Wed, 28 Aug 2019 15:28:01 +0000 (15:28 +0000)]
Use extractinv for synth_xilinx -ise
Marcin Kościelnicki [Wed, 28 Aug 2019 14:58:14 +0000 (14:58 +0000)]
Added extractinv pass
Eddie Hung [Wed, 18 Sep 2019 19:44:34 +0000 (12:44 -0700)]
Remove stat
Eddie Hung [Fri, 6 Sep 2019 20:28:15 +0000 (13:28 -0700)]
Document (* gentb_skip *) attr for test_autotb
Eddie Hung [Wed, 18 Sep 2019 19:40:21 +0000 (12:40 -0700)]
Merge remote-tracking branch 'origin/master' into xc7dsp
Eddie Hung [Wed, 18 Sep 2019 19:40:08 +0000 (12:40 -0700)]
Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext
peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells
Eddie Hung [Wed, 18 Sep 2019 19:35:24 +0000 (12:35 -0700)]
Add doc on pattern detector for overflow
Eddie Hung [Wed, 18 Sep 2019 19:23:22 +0000 (12:23 -0700)]
Merge remote-tracking branch 'origin/master' into xc7dsp
Eddie Hung [Wed, 18 Sep 2019 19:19:16 +0000 (12:19 -0700)]
Fix copy-paste
Eddie Hung [Wed, 18 Sep 2019 19:16:03 +0000 (12:16 -0700)]
Check overflow condition is power of 2 without using int32
Eddie Hung [Wed, 18 Sep 2019 19:11:33 +0000 (12:11 -0700)]
Add .gitignore
Eddie Hung [Wed, 18 Sep 2019 19:07:25 +0000 (12:07 -0700)]
Refine macc testcase
Eddie Hung [Wed, 18 Sep 2019 18:12:46 +0000 (11:12 -0700)]
Mis-spell
Eddie Hung [Wed, 18 Sep 2019 17:45:04 +0000 (10:45 -0700)]
Add pattern detection support for DSP48E1 model, check against vendor
Eddie Hung [Wed, 18 Sep 2019 17:04:27 +0000 (10:04 -0700)]
Merge pull request #1379 from mmicko/sim_models
Added simulation models for Efinix and Anlogic
Eddie Hung [Wed, 18 Sep 2019 16:39:59 +0000 (09:39 -0700)]
Add support for overflow using pattern detector
Eddie Hung [Wed, 18 Sep 2019 16:34:42 +0000 (09:34 -0700)]
Separate dffrstmux from dffcemux, fix typos
Miodrag Milanovic [Wed, 18 Sep 2019 15:48:16 +0000 (17:48 +0200)]
make note that it is for latch mode
Miodrag Milanovic [Wed, 18 Sep 2019 15:45:19 +0000 (17:45 +0200)]
better lut handling
Miodrag Milanovic [Wed, 18 Sep 2019 15:45:07 +0000 (17:45 +0200)]
better handling of lut and begin/end add
Clifford Wolf [Wed, 18 Sep 2019 11:33:02 +0000 (13:33 +0200)]
Add "write_aiger -L"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 18 Sep 2019 09:56:14 +0000 (11:56 +0200)]
Fix stupid bug in btor back-end
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Mon, 16 Sep 2019 11:05:41 +0000 (13:05 +0200)]
Bump version
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Mon, 16 Sep 2019 11:05:02 +0000 (13:05 +0200)]
Merge pull request #1380 from YosysHQ/clifford/fix1372
Fix handling of range selects on loop variables
Clifford Wolf [Mon, 16 Sep 2019 09:25:16 +0000 (11:25 +0200)]
Fix handling of range selects on loop variables, fixes #1372
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Sun, 15 Sep 2019 20:56:07 +0000 (13:56 -0700)]
Merge pull request #1374 from YosysHQ/eddie/fix1371
Fix two non-deterministic behaviours that cause divergence between compilers
Marcin Kościelnicki [Sun, 15 Sep 2019 00:49:53 +0000 (00:49 +0000)]
xilinx: Make blackbox library family-dependent.
Fixes #1246.
Clifford Wolf [Sun, 15 Sep 2019 09:04:31 +0000 (11:04 +0200)]
Merge pull request #1377 from YosysHQ/clifford/fixzdigit
Fix handling of z_digit "?" and fix optimization of cmp with "z"
Miodrag Milanovic [Sun, 15 Sep 2019 07:37:16 +0000 (09:37 +0200)]
Added simulation models for Efinix and Anlogic
Eddie Hung [Sat, 14 Sep 2019 01:19:07 +0000 (18:19 -0700)]
Oops
Eddie Hung [Sat, 14 Sep 2019 00:07:18 +0000 (17:07 -0700)]
Add `undef DSP48E1_INST
Eddie Hung [Fri, 13 Sep 2019 23:41:10 +0000 (16:41 -0700)]
Add counter-example from @cliffordwolf
Eddie Hung [Fri, 13 Sep 2019 23:33:18 +0000 (16:33 -0700)]
Revert "Make one check $shift(x)? only; change testcase to be 8b"
This reverts commit
e2c2d784c8217e4bcf29fb6b156b6a8285036b80.
Eddie Hung [Fri, 13 Sep 2019 23:30:44 +0000 (16:30 -0700)]
Spacing
Eddie Hung [Fri, 13 Sep 2019 23:18:05 +0000 (16:18 -0700)]
Explicitly order function arguments
Eddie Hung [Fri, 13 Sep 2019 20:32:55 +0000 (13:32 -0700)]
Fix D -> P{,COUT} delay
Eddie Hung [Fri, 13 Sep 2019 19:05:14 +0000 (12:05 -0700)]
Add no MULT no DPORT config
Eddie Hung [Fri, 13 Sep 2019 18:45:55 +0000 (11:45 -0700)]
Add support for MULT and DPORT
Eddie Hung [Fri, 13 Sep 2019 18:13:57 +0000 (11:13 -0700)]
Use template specialisation
Eddie Hung [Fri, 13 Sep 2019 16:49:15 +0000 (09:49 -0700)]
Revert "SigSet<Cell*> to use stable compare class"
This reverts commit
4ea34aaacdf6f76e11a83d5eb2a53ba7e75f7c11.
Eddie Hung [Fri, 13 Sep 2019 16:34:40 +0000 (09:34 -0700)]
Refine diagram
Clifford Wolf [Fri, 13 Sep 2019 11:39:39 +0000 (13:39 +0200)]
Fix handling of z_digit "?" and fix optimization of cmp with "z"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 13 Sep 2019 08:22:34 +0000 (10:22 +0200)]
Merge pull request #1373 from YosysHQ/clifford/fix1364
Fix lexing of integer literals
Clifford Wolf [Fri, 13 Sep 2019 08:19:58 +0000 (10:19 +0200)]
Fix lexing of integer literals without radix
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Fri, 13 Sep 2019 01:13:46 +0000 (18:13 -0700)]
Add an ASCII drawing
Eddie Hung [Fri, 13 Sep 2019 01:01:49 +0000 (18:01 -0700)]
Finish explanation
Eddie Hung [Fri, 13 Sep 2019 00:45:02 +0000 (17:45 -0700)]
Rename to techmap_guard
Eddie Hung [Fri, 13 Sep 2019 00:11:01 +0000 (17:11 -0700)]
Initial DSP48E1 box support
Eddie Hung [Fri, 13 Sep 2019 00:10:43 +0000 (17:10 -0700)]
Set more ports explicitly
Eddie Hung [Thu, 12 Sep 2019 19:11:11 +0000 (12:11 -0700)]
Merge remote-tracking branch 'origin/master' into xc7dsp
Eddie Hung [Thu, 12 Sep 2019 19:00:34 +0000 (12:00 -0700)]
Grammar
Eddie Hung [Thu, 12 Sep 2019 18:45:17 +0000 (11:45 -0700)]
static_assert to enforce this going forward
Eddie Hung [Thu, 12 Sep 2019 18:45:02 +0000 (11:45 -0700)]
SigSet<Cell*> to use stable compare class
David Shah [Thu, 12 Sep 2019 11:26:28 +0000 (12:26 +0100)]
Merge pull request #1370 from YosysHQ/dave/equiv_opt_multiclock
Add equiv_opt -multiclock
Clifford Wolf [Thu, 12 Sep 2019 07:43:19 +0000 (09:43 +0200)]
Fix lexing of integer literals, fixes #1364
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Thu, 12 Sep 2019 00:16:46 +0000 (17:16 -0700)]
Add support for A1 and B1 registers
Eddie Hung [Thu, 12 Sep 2019 00:06:37 +0000 (17:06 -0700)]
Raise a RuntimeError instead of AssertionError
Eddie Hung [Thu, 12 Sep 2019 00:05:47 +0000 (17:05 -0700)]
Add AREG=2 BREG=2 test
Eddie Hung [Wed, 11 Sep 2019 23:21:24 +0000 (16:21 -0700)]
Rename {A,B} -> {A2,B2}
Eddie Hung [Wed, 11 Sep 2019 21:20:49 +0000 (14:20 -0700)]
Tidy up
Eddie Hung [Wed, 11 Sep 2019 21:17:45 +0000 (14:17 -0700)]
Fix UB
Eddie Hung [Wed, 11 Sep 2019 21:17:45 +0000 (14:17 -0700)]
Fix UB
Eddie Hung [Wed, 11 Sep 2019 20:48:45 +0000 (13:48 -0700)]
Add PCOUT -> PCIN non-shifted cascading
Eddie Hung [Wed, 11 Sep 2019 20:37:11 +0000 (13:37 -0700)]
Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp
Eddie Hung [Wed, 11 Sep 2019 20:36:37 +0000 (13:36 -0700)]
Cope with presence of reset muxes too
Eddie Hung [Wed, 11 Sep 2019 20:22:52 +0000 (13:22 -0700)]
Cleanup
Eddie Hung [Wed, 11 Sep 2019 20:22:41 +0000 (13:22 -0700)]
Add more tests
Eddie Hung [Wed, 11 Sep 2019 20:06:59 +0000 (13:06 -0700)]
Missing space
Eddie Hung [Wed, 11 Sep 2019 20:06:49 +0000 (13:06 -0700)]
Make unextend a udata
Eddie Hung [Wed, 11 Sep 2019 19:29:26 +0000 (12:29 -0700)]
Only display log message if did_something
Eddie Hung [Wed, 11 Sep 2019 18:46:21 +0000 (11:46 -0700)]
Input registers to add DSP as new siguser to block upstream packing
Eddie Hung [Wed, 11 Sep 2019 17:55:45 +0000 (10:55 -0700)]
More cleanup
Marcin Kościelnicki [Tue, 10 Sep 2019 16:31:50 +0000 (16:31 +0000)]
Add -match-init option to dff2dffs.
Eddie Hung [Wed, 11 Sep 2019 17:15:19 +0000 (10:15 -0700)]
Add support for A/B/C/D/AD reset
Eddie Hung [Wed, 11 Sep 2019 17:13:13 +0000 (10:13 -0700)]
Update test with a/b reset
Eddie Hung [Wed, 11 Sep 2019 16:09:08 +0000 (09:09 -0700)]
Extend test for RSTP and RSTM
Eddie Hung [Wed, 11 Sep 2019 14:34:14 +0000 (07:34 -0700)]
Add support for RSTM