mesa.git
8 years agoglapi: remove the final function offset tags
Emil Velikov [Tue, 24 Nov 2015 22:16:54 +0000 (22:16 +0000)]
glapi: remove the final function offset tags

A commit earlier this year reworked out python scripts to use a separate
file for these. Followed by removing support from the parser, and
removing all of the offset tags.

Seems like we either missed a few, or people added them by mistake.
Either way let's nuke the ones that are still around.

Cc: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
8 years agowinsys/amdgpu/addrlib: do not wrap header inclusion in extern "C"
Emil Velikov [Tue, 24 Nov 2015 16:29:28 +0000 (16:29 +0000)]
winsys/amdgpu/addrlib: do not wrap header inclusion in extern "C"

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agomesa/main: do not wrap header inclusion in extern "C"
Emil Velikov [Tue, 24 Nov 2015 16:29:26 +0000 (16:29 +0000)]
mesa/main: do not wrap header inclusion in extern "C"

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoi915: limit extern "C" hack only for libdrm headers
Emil Velikov [Tue, 24 Nov 2015 16:29:23 +0000 (16:29 +0000)]
i915: limit extern "C" hack only for libdrm headers

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoxmesa: do not wrap header inclusion in extern "C"
Emil Velikov [Tue, 24 Nov 2015 16:29:22 +0000 (16:29 +0000)]
xmesa: do not wrap header inclusion in extern "C"

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoutil/sha: do not wrap header inclusion in extern "C"
Emil Velikov [Tue, 24 Nov 2015 16:29:21 +0000 (16:29 +0000)]
util/sha: do not wrap header inclusion in extern "C"

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoegl/wayland: do not wrap header inclusion in extern "C"
Emil Velikov [Tue, 24 Nov 2015 16:29:19 +0000 (16:29 +0000)]
egl/wayland: do not wrap header inclusion in extern "C"

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agogbm: do not wrap header inclusion in extern "C"
Emil Velikov [Tue, 24 Nov 2015 16:29:18 +0000 (16:29 +0000)]
gbm: do not wrap header inclusion in extern "C"

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agost/mesa: shader image atoms must be before framebuffer update
Nicolai Hähnle [Tue, 16 Feb 2016 03:49:58 +0000 (22:49 -0500)]
st/mesa: shader image atoms must be before framebuffer update

The reason is that the shader image atoms call st_finalize_texture, which
may set ST_NEW_FRAMEBUFFER.

This fixes an assertion triggered by a subtest of piglit's
arb_shader_image_load_store-invalid.

v2: add comment explaining order constraints (suggested by Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agogallivm: special case TGSI_OPCODE_STORE
Nicolai Hähnle [Tue, 9 Feb 2016 18:02:34 +0000 (13:02 -0500)]
gallivm: special case TGSI_OPCODE_STORE

This instruction has the resource (buffer or image) as a destination to
represent the writemask for SSBO writes. However, this is obviously not
a "real" destination for the purpose of emitting LLVM IR.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agotgsi: set correct output mode for RESQ
Nicolai Hähnle [Sun, 7 Feb 2016 01:34:20 +0000 (20:34 -0500)]
tgsi: set correct output mode for RESQ

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agogallium: add CAPs returning PCI device location
Marek Olšák [Mon, 29 Feb 2016 19:22:37 +0000 (20:22 +0100)]
gallium: add CAPs returning PCI device location

Reviewed-by: Brian Paul <brianp@vmware.com>
8 years agowinsys/amdgpu: get PCI info
Marek Olšák [Mon, 22 Feb 2016 21:58:18 +0000 (22:58 +0100)]
winsys/amdgpu: get PCI info

This will be queried by the OpenCL stack using an interop call.

I have tested that the values match lspci.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: set amdgpu metadata before exporting a texture
Marek Olšák [Thu, 25 Feb 2016 21:32:26 +0000 (22:32 +0100)]
radeonsi: set amdgpu metadata before exporting a texture

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: extract the texture descriptor computation into its own function
Nicolai Hähnle [Sat, 6 Feb 2016 22:34:04 +0000 (17:34 -0500)]
radeonsi: extract the texture descriptor computation into its own function

This will allow this code to be re-used for shader images.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: extract the buffer descriptor computation into its own function
Nicolai Hähnle [Sat, 6 Feb 2016 22:08:12 +0000 (17:08 -0500)]
radeonsi: extract the buffer descriptor computation into its own function

This will allow it to be re-used for shader image descriptors.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: remove resource field from si_sampler_view
Nicolai Hähnle [Sat, 6 Feb 2016 21:21:52 +0000 (16:21 -0500)]
radeonsi: remove resource field from si_sampler_view

view->resource is redundant with view->base.texture, so get rid of it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: accept pipe_resource in si_sampler_view_add_buffer
Marek Olšák [Fri, 26 Feb 2016 12:28:31 +0000 (13:28 +0100)]
radeonsi: accept pipe_resource in si_sampler_view_add_buffer

and rename .._buffers -> .._buffer

Based loosely on Nicolai's patch. This will make it easier to cherry-pick
Nicolai's patches from his image support branch.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: disable DCC on handle export if expecting write access
Marek Olšák [Wed, 24 Feb 2016 21:04:47 +0000 (22:04 +0100)]
radeonsi: disable DCC on handle export if expecting write access

This should be okay except that sampler views and images are not re-set.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add DCC decompression (v2)
Bas Nieuwenhuizen [Tue, 20 Oct 2015 22:10:41 +0000 (00:10 +0200)]
radeonsi: add DCC decompression (v2)

This is currently not needed but will be necessary when we have
features that do not work with DCC enabled, such as image stores
and sharing non-scanout surfaces.

v2: Marek: rebase, remove decompression from si_flush_resource (not needed)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: allocate DCC in the same backing buffer as the texture
Marek Olšák [Sun, 21 Feb 2016 21:49:38 +0000 (22:49 +0100)]
radeonsi: allocate DCC in the same backing buffer as the texture

To allow sharing textures with DCC enabled.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: disable CMASK on handle export if sharing doesn't allow it (v2)
Marek Olšák [Wed, 24 Feb 2016 21:04:47 +0000 (22:04 +0100)]
gallium/radeon: disable CMASK on handle export if sharing doesn't allow it (v2)

v2: remove the list of all contexts

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: eliminate fast color clear before sharing
Marek Olšák [Tue, 1 Mar 2016 20:50:25 +0000 (21:50 +0100)]
gallium/radeon: eliminate fast color clear before sharing

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: don't use fast color clear if sharing doesn't allow it
Marek Olšák [Wed, 24 Feb 2016 20:36:19 +0000 (21:36 +0100)]
gallium/radeon: don't use fast color clear if sharing doesn't allow it

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: disallow handle export for MSAA & depth textures
Marek Olšák [Wed, 24 Feb 2016 19:17:50 +0000 (20:17 +0100)]
gallium/radeon: disallow handle export for MSAA & depth textures

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: remember that texture_from_handle was called and its flags
Marek Olšák [Wed, 24 Feb 2016 23:23:21 +0000 (00:23 +0100)]
gallium/radeon: remember that texture_from_handle was called and its flags

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: check that handle usage doesn't change for a resource
Marek Olšák [Wed, 24 Feb 2016 19:04:31 +0000 (20:04 +0100)]
gallium/radeon: check that handle usage doesn't change for a resource

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: disallow reallocation of shared buffers
Marek Olšák [Wed, 24 Feb 2016 22:45:33 +0000 (23:45 +0100)]
gallium/radeon: disallow reallocation of shared buffers

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: if we can't discard a whole resource, discard the range instead
Marek Olšák [Thu, 25 Feb 2016 22:42:59 +0000 (23:42 +0100)]
gallium/radeon: if we can't discard a whole resource, discard the range instead

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: buffer valid range tracking only works with unshared buffers
Marek Olšák [Wed, 24 Feb 2016 16:36:52 +0000 (17:36 +0100)]
gallium/radeon: buffer valid range tracking only works with unshared buffers

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: don't set texture metadata for buffers
Marek Olšák [Wed, 24 Feb 2016 16:33:28 +0000 (17:33 +0100)]
gallium/radeon: don't set texture metadata for buffers

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: set texture metadata only once
Marek Olšák [Wed, 24 Feb 2016 16:32:53 +0000 (17:32 +0100)]
gallium/radeon: set texture metadata only once

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: clean up r600_texture_get_handle
Marek Olšák [Wed, 24 Feb 2016 16:30:09 +0000 (17:30 +0100)]
gallium/radeon: clean up r600_texture_get_handle

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: move code initializing texture metadata to its own function
Marek Olšák [Wed, 24 Feb 2016 16:03:11 +0000 (17:03 +0100)]
gallium/radeon: move code initializing texture metadata to its own function

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agowinsys/amdgpu: allow drivers to set/get opaque metadata
Marek Olšák [Wed, 24 Feb 2016 00:24:06 +0000 (01:24 +0100)]
winsys/amdgpu: allow drivers to set/get opaque metadata

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: rename winsys buffer_get/set_tiling to buffer_get/set_metadata
Marek Olšák [Wed, 24 Feb 2016 00:13:22 +0000 (01:13 +0100)]
gallium/radeon: rename winsys buffer_get/set_tiling to buffer_get/set_metadata

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: remove rcs parameter from radeon_winsys::buffer_set_tiling
Marek Olšák [Tue, 23 Feb 2016 23:58:38 +0000 (00:58 +0100)]
gallium/radeon: remove rcs parameter from radeon_winsys::buffer_set_tiling

This was needed for DRM < 2.12.0 where the kernel was rewriting tiling flags
in IBs.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: use a structure for passing tiling flags from/to winsys
Marek Olšák [Tue, 23 Feb 2016 23:54:11 +0000 (00:54 +0100)]
gallium/radeon: use a structure for passing tiling flags from/to winsys

and call it radeon_bo_metadata

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium: add external usage flags to resource_from(get)_handle (v2)
Marek Olšák [Wed, 24 Feb 2016 17:51:15 +0000 (18:51 +0100)]
gallium: add external usage flags to resource_from(get)_handle (v2)

This will allow drivers to make better decisions about texture sharing
for DRI2, DRI3, Wayland, and OpenCL.

v2: add read/write flags, take advantage of __DRI_IMAGE_USE_BACKBUFFER

Reviewed-by: Axel Davy <axel.davy@ens.fr>
8 years agodri: add backbuffer use flag
Axel Davy [Wed, 21 Oct 2015 10:28:00 +0000 (12:28 +0200)]
dri: add backbuffer use flag

This will be used by the next commit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agoglsl: dont allow undefined array sizes in ES
Timothy Arceri [Tue, 8 Mar 2016 09:35:41 +0000 (20:35 +1100)]
glsl: dont allow undefined array sizes in ES

This applies the rule to empty declarations.

Fixes:
dEQP-GLES3.functional.shaders.arrays.invalid.empty_declaration_without_var_name_vertex
dEQP-GLES3.functional.shaders.arrays.invalid.empty_declaration_without_var_name_fragment

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
8 years agoradeon/uvd: increase max height to 4096 for VI and newer
Tamil velan [Mon, 7 Mar 2016 09:47:29 +0000 (15:17 +0530)]
radeon/uvd: increase max height to 4096 for VI and newer

With this issue 'mpv --hwdec=vdpau --vo=vdpau <stream>' fails
for vdpau decode if the stream height is 4096. Vdpau decode of
height upto 4096 is necessary usecase on amdgpu driver for VI
and newer platforms.

The fix is in driver specific implementation of "Decoder
Query Capabilities" API to return 4096 for VI and newer
platforms. With this fix vdpauinfo reports height support as
4096 and mpv for vdpau decode works fine for 4096 height streams.

Signed-off-by: Tamil velan <Tamil-Velan.Jayakumar@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
8 years agowinsys/amdgpu: enlarge buffer_indices_hashlist
Bas Nieuwenhuizen [Tue, 8 Mar 2016 15:01:47 +0000 (16:01 +0100)]
winsys/amdgpu: enlarge buffer_indices_hashlist

Enlarge the buffer hashlist to prevent large numbers of misses
due to adding more buffers than can be cached in the hashlist.

The game I tested had CS's with up to 1500 buffers and the overhead
of amdgpu_lookup_buffer for various sizes was:

4096 1.97% (new value)
2048 4.37%
1024 6.92%
512  9.47% (old value)

(percentage of CPU usage in render thread as determined by perf)

The time spent in amdgpu_add_buffer self is ~4.2% in all cases and
for 4096 the time needed to clear the hashlist is still < 0.10%,
so I am not expecting significant regressions.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
8 years agonvc0: add a new validation path for compute
Samuel Pitoiset [Tue, 8 Mar 2016 20:36:07 +0000 (21:36 +0100)]
nvc0: add a new validation path for compute

This makes use of the new state validation interface to be consistent
with 3d.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: rework the validation path for 3D
Samuel Pitoiset [Tue, 8 Mar 2016 20:36:06 +0000 (21:36 +0100)]
nvc0: rework the validation path for 3D

This exposes an interface for state validation that will be also used
to rework the compute validation path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoi965/hsw: Initialize SLM index in state register
Jordan Justen [Sat, 20 Feb 2016 09:22:08 +0000 (01:22 -0800)]
i965/hsw: Initialize SLM index in state register

For Haswell, we need to initialize the SLM index in the state
register. This can be copied out of the CS header dword 0.

v2:
 * Use UW move to avoid changing upper 16-bits of sr0.1 (mattst88)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94081
Fixes: piglit arb_compute_shader/execution/shared-atomics.shader_test
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu> (v1)
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agoi965/compute: Skip SIMD8 generation if it can't be used
Jordan Justen [Mon, 22 Feb 2016 18:42:07 +0000 (10:42 -0800)]
i965/compute: Skip SIMD8 generation if it can't be used

If the local workgroup size is sufficiently large, then the SIMD8
program can't be used. In this case we can skip generating the SIMD8
program. For complex programs this can save a significant amount of
time.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agoi965/fs: Allow spilling for SIMD16 compute shaders
Jordan Justen [Mon, 22 Feb 2016 04:55:09 +0000 (20:55 -0800)]
i965/fs: Allow spilling for SIMD16 compute shaders

For fragment shaders, we can always use a SIMD8 program. Therefore, if
we detect spilling with a SIMD16 program, then it is better to skip
generating a SIMD16 program to only rely on a SIMD8 program.

Unfortunately, this doesn't work for compute shaders. For a compute
shader, we may be required to use SIMD16 if the local workgroup size
is bigger than a certain size. For example, on gen7, if the local
workgroup size is larger than 512, then a SIMD16 program is required.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93840
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agoglsl: don't always reject shaders with mismatching ifc blocks
Timothy Arceri [Tue, 8 Mar 2016 11:25:58 +0000 (22:25 +1100)]
glsl: don't always reject shaders with mismatching ifc blocks

Since we store some member qualifiers in the interface type
we need to be more careful about rejecting shaders just because
the pointer doesn't match. Its perfectly valid for some qualifiers
such as precision to not match across shader interfaces.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
8 years agoglsl: make interstage_match() static
Timothy Arceri [Tue, 8 Mar 2016 11:33:44 +0000 (22:33 +1100)]
glsl: make interstage_match() static

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
8 years agoglsl: don't validate ifc blocks using validation meant for variables
Timothy Arceri [Tue, 8 Mar 2016 12:53:37 +0000 (23:53 +1100)]
glsl: don't validate ifc blocks using validation meant for variables

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
8 years agomesa: Fix error code for GetFramebufferAttachmentParameter in ES 3.0+.
Kenneth Graunke [Tue, 8 Mar 2016 00:43:35 +0000 (16:43 -0800)]
mesa: Fix error code for GetFramebufferAttachmentParameter in ES 3.0+.

The ES 3.0+ specifications contain the exact same text as the OpenGL
specification, which says that we should return GL_INVALID_OPERATION.

ES 2.0 contains different text saying we should return GL_INVALID_ENUM.

Previously, Mesa chose the error code based on API (GL vs. ES).
This patch makes ES 3.0+ follow the GL behavior.  ES 2 remains as is.

Fixes dEQP-GLES3.functional.fbo.api.attachment_query_empty_fbo.
However, breaks the dEQP-GLES2 variant of the same test for drivers
which silently promote to ES 3.0.  This can be worked around by
exporting MESA_GLES_VERSION_OVERRIDE=2.0, but is a bug in dEQP-GLES2.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agomesa: Add GL_RED and GL_RG to ES3 effective internal format mapping.
Kenneth Graunke [Sat, 5 Mar 2016 05:43:37 +0000 (21:43 -0800)]
mesa: Add GL_RED and GL_RG to ES3 effective internal format mapping.

The dEQP-GLES3.functional.fbo.completeness.renderable.texture.
{color0,depth,stencil}.{red,rg}_unsigned_byte tests appear to expect
GL_RED/GL_RG and GL_UNSIGNED_BYTE to map to GL_R8/GL_RG8, rather than
returning an INVALID_OPERATION error.

This makes perfect sense.  However, RED and RG are strangely missing
from the ES 3.0/3.1/3.2 spec's "Effective internal format corresponding
to external format and type" tables.  It may be worth filing a spec bug.

Fixes the 6 dEQP tests mentioned above.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
8 years agonv50,nvc0: make sure to destroy the mutex used for blits
Samuel Pitoiset [Tue, 8 Mar 2016 18:01:13 +0000 (19:01 +0100)]
nv50,nvc0: make sure to destroy the mutex used for blits

This mutex is initialized when the blitter is created, but it is never
destroyed. This doesn't hurt anything but it makes sense to destroy it
at blitter deletion.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agogallium/radeon: don't use temporary buffers for persistent mappings
Marek Olšák [Thu, 25 Feb 2016 22:39:42 +0000 (23:39 +0100)]
gallium/radeon: don't use temporary buffers for persistent mappings

Cc: 11.1 11.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agonir: Add a pass for lower indirect variable dereferences
Jason Ekstrand [Sun, 14 Feb 2016 01:45:37 +0000 (17:45 -0800)]
nir: Add a pass for lower indirect variable dereferences

This new pass lowers load/store_var intrinsics that act on indirect derefs
to if-ladder of direct load/store_var intrinsics.  The if-ladders perform a
simple binary search on the indirect.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
8 years agoi965/fs/nir: "surface_access::" prefix not needed
Alejandro Piñeiro [Fri, 4 Mar 2016 19:38:41 +0000 (20:38 +0100)]
i965/fs/nir: "surface_access::" prefix not needed

"using namespace brw::surface_access" is already present at the
top of the source file.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
8 years agomesa: fix malformed assertion in _image_format_class_to_glenum()
Brian Paul [Tue, 8 Mar 2016 01:57:33 +0000 (18:57 -0700)]
mesa: fix malformed assertion in _image_format_class_to_glenum()

Reviewed-by: Vinson Lee <vlee@freedesktop.org>
8 years agoprogram: minor whitespace clean-ups in program_parse_extra.c
Brian Paul [Mon, 7 Mar 2016 18:10:45 +0000 (11:10 -0700)]
program: minor whitespace clean-ups in program_parse_extra.c

8 years agost/mesa: conditionally enable GL_NV_vdpau_interop
Christian König [Wed, 20 Jan 2016 15:19:08 +0000 (16:19 +0100)]
st/mesa: conditionally enable GL_NV_vdpau_interop

Only enable it when we compile the state tracker as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoradeon/uvd: disable MPEG1
Christian König [Fri, 5 Feb 2016 08:25:59 +0000 (09:25 +0100)]
radeon/uvd: disable MPEG1

The hardware simply doesn't support that correctly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
8 years agoi965/vec4/nir: no need to use surface_access:: to call emit_untyped_atomic
Alejandro Piñeiro [Fri, 4 Mar 2016 17:20:09 +0000 (18:20 +0100)]
i965/vec4/nir: no need to use surface_access:: to call emit_untyped_atomic

Now that brw_vec4_visitor::emit_untyped_atomic was removed, there is no need
to explicitly set it.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
8 years agoi965/vec4/nir: remove emit_untyped_surface_read and emit_untyped_atomic at brw_vec4_v...
Alejandro Piñeiro [Fri, 4 Mar 2016 16:32:08 +0000 (17:32 +0100)]
i965/vec4/nir: remove emit_untyped_surface_read and emit_untyped_atomic at brw_vec4_visitor

surface_access emit_untyped_read and emit_untyped_atomic provides the same
functionality.

v2: surface parameter of emit_untyped_atomic is a const, no need to
    specify default predicate on emit_untyped_atomic, use retype
    (Francisco Jerez).

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
8 years agoi965/vec4: pass the correct src_sz to emit_send at emit_untyped_atomic
Alejandro Piñeiro [Fri, 4 Mar 2016 18:20:27 +0000 (19:20 +0100)]
i965/vec4: pass the correct src_sz to emit_send at emit_untyped_atomic

If the src is invalid, so src size is zero, the src_sz passed to emit
send should be zero too, instead of a default 1 if we are in a simd4x2
case. This can happens if using emit_untyped_atomic for an atomic
dec/inc.

v2: use the proper src_sz when calling emit_send, instead of just
    avoid loading src at emit_send if BAD_FILE (Francisco Jerez)

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
8 years agoglcpp: Remove empty mid-rule action which changes test behavior.
Kenneth Graunke [Sat, 5 Mar 2016 02:52:47 +0000 (18:52 -0800)]
glcpp: Remove empty mid-rule action which changes test behavior.

Apparently this causes a slight difference in the parser's token
expectations, leading to a different error message.

It seems harmless, but I wanted to be cautious and separate it out.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agoglcpp: Clean up most empty mid-rule actions left by previous commit.
Kenneth Graunke [Sat, 5 Mar 2016 02:47:39 +0000 (18:47 -0800)]
glcpp: Clean up most empty mid-rule actions left by previous commit.

I didn't want to pollute the previous patch with all the $4 -> $3
changes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agoglcpp: Delete unnecessary implicit version resolves.
Kenneth Graunke [Sat, 5 Mar 2016 02:45:35 +0000 (18:45 -0800)]
glcpp: Delete unnecessary implicit version resolves.

We now have a bigger hammer.  The HASH_TOKEN NEWLINE rule still needs
to exist to ensure the 146-version-hash-first.c test still passes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agoglcpp: Implicitly resolve version after the first non-space/hash token.
Kenneth Graunke [Sat, 5 Mar 2016 02:26:00 +0000 (18:26 -0800)]
glcpp: Implicitly resolve version after the first non-space/hash token.

We resolved the implicit version directive when processing control lines,
such as #ifdef, to ensure any built-in macros exist.  However, we failed
to resolve it when handling ordinary text.

For example,

        int x = __VERSION__;

should resolve __VERSION__ to 110, but since we never resolved the implicit
version, none of the built-in macros exist, so it was left as is.

This also meant we allowed the following shader to slop through:

        123
        #version 120

Nothing would cause the implicit version to take effect, so when we saw
the #version directive, we thought everything was peachy.

This patch makes the lexer's per-token action resolve the implicit
version on the first non-space/newline/hash token that isn't part of
a #version directive, fulfilling the GLSL language spec:

"The #version directive must occur in a shader before anything else,
 except for comments and white space."

Because we emit #version as HASH_TOKEN then VERSION_TOKEN, we have to
allow HASH_TOKEN to slop through as well, so we don't resolve the
implicit version as soon as we see the # character.  However, this is
fine, because the parser's HASH_TOKEN NEWLINE rule does resolve the
version, disallowing cases like:

        #
        #version 120

This patch also adds the above shaders as new glcpp tests.

Fixes dEQP-GLES2.functional.shaders.preprocessor.predefined_macros.
{gl_es_1_vertex,gl_es_1_fragment}.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agogallium/swr: fix issues preventing a 32-bit build
Tim Rowley [Fri, 4 Mar 2016 19:28:33 +0000 (13:28 -0600)]
gallium/swr: fix issues preventing a 32-bit build

Not a currently tested configuration, but these couple of small changes
allow a 32-bit build.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94383
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Brian Paul <brianp@vmware.com>
8 years agogallium/swr: remove use of UINT64 from swr_fence
Tim Rowley [Mon, 7 Mar 2016 20:59:34 +0000 (14:59 -0600)]
gallium/swr: remove use of UINT64 from swr_fence

Remove use of a win32-style type leaked from the swr rasterizer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
8 years agoglsl: Add function parameters to the parser symbol table.
Kenneth Graunke [Sat, 5 Mar 2016 05:19:49 +0000 (21:19 -0800)]
glsl: Add function parameters to the parser symbol table.

In a shader such as:

    struct S { float f; }
    float identity(float S) { return S; }

we would think that "S" in "return S" referred to a structure, even
though it's shadowed by the "float S" parameter in the inner struct.

This led to the parser's grammar seeing TYPE_IDENTIFIER and getting
confused.

Fixes dEQP-GLES2.functional.shaders.scoping.valid.
function_parameter_hides_struct_type_{vertex,fragment}.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
8 years agoglsl: Add single declaration variables to the symbol table too.
Kenneth Graunke [Sat, 5 Mar 2016 04:32:26 +0000 (20:32 -0800)]
glsl: Add single declaration variables to the symbol table too.

The lexer/parser use a symbol table to classify identifiers as
variables, functions, or structure types.

For some reason, we neglected to add variables in simple declarations
such as

    int x = 5;

but did add subsequent variables in multi-declarations:

    int x = 5, y = 6; // y gets added, but not x, for some reason

Fixes four dEQP-GLES2.functional.shaders.scoping.valid subcases:
- local_int_variable_hides_struct_type_vertex
- local_int_variable_hides_struct_type_fragment
- local_struct_variable_hides_struct_type_vertex
- local_struct_variable_hides_struct_type_fragment

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
8 years agomesa: Change GLboolean to bool in GenerateMipmap target checker.
Kenneth Graunke [Fri, 4 Mar 2016 05:38:32 +0000 (21:38 -0800)]
mesa: Change GLboolean to bool in GenerateMipmap target checker.

This is not API facing, so just use bool.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agomesa: Make GenerateMipmap check the target before finding an object.
Kenneth Graunke [Thu, 3 Mar 2016 09:03:59 +0000 (01:03 -0800)]
mesa: Make GenerateMipmap check the target before finding an object.

If glGenerateMipmap was called with a bogus target, then it would
pass that to _mesa_get_current_tex_object(), which would raise a
_mesa_problem() telling people to file bugs.  We'd then do the
proper error checking, raise an error, and bail.

Doing the check first avoids the _mesa_problem().  The DSA variant
doesn't take a target parameter, so we leave the target validation
exactly as it was in that case.

Fixes one dEQP GLES2 test:
dEQP-GLES2.functional.negative_api.texture.generatemipmap.invalid_target.

v2: Rebase on Antia's recent patch to this area.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com> [v1]
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agogm107/ir: add emission for ATOMS
Samuel Pitoiset [Mon, 7 Mar 2016 17:57:39 +0000 (18:57 +0100)]
gm107/ir: add emission for ATOMS

This allows to perform atomic operations on shared memory.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agotgsi: fix parsing of shared memory declarations
Samuel Pitoiset [Mon, 7 Mar 2016 17:52:19 +0000 (18:52 +0100)]
tgsi: fix parsing of shared memory declarations

The SHARED TGSI keyword is only allowed with TGSI_FILE_MEMORY and not
with TGSI_FILE_BUFFER. I have found this by using the nouveau_compiler
from command line.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
8 years agogm107/ir: add emission for BAR
Samuel Pitoiset [Tue, 1 Mar 2016 17:57:58 +0000 (18:57 +0100)]
gm107/ir: add emission for BAR

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agogk110/ir: add missing src predicate emission for BAR.RED
Samuel Pitoiset [Sun, 28 Feb 2016 21:44:24 +0000 (22:44 +0100)]
gk110/ir: add missing src predicate emission for BAR.RED

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agogk110/ir: allow to emit immediates for BAR
Samuel Pitoiset [Sun, 28 Feb 2016 21:43:50 +0000 (22:43 +0100)]
gk110/ir: allow to emit immediates for BAR

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agogk110/ir: fix wrong emission of BAR.SYNC
Samuel Pitoiset [Sun, 28 Feb 2016 21:38:43 +0000 (22:38 +0100)]
gk110/ir: fix wrong emission of BAR.SYNC

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0/ir: make sure that thread count immediate for BAR fit
Samuel Pitoiset [Mon, 7 Mar 2016 17:26:43 +0000 (18:26 +0100)]
nvc0/ir: make sure that thread count immediate for BAR fit

The limit of the thread count immediate value is 12 bits.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agosvga: add new surface-write-flushes HUD query
Brian Paul [Fri, 4 Mar 2016 22:59:32 +0000 (15:59 -0700)]
svga: add new surface-write-flushes HUD query

To know when we're flushing the command buffer because we need to
write to surface in the command buffer.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agosvga: add new flush-time HUD query
Brian Paul [Fri, 4 Mar 2016 16:14:34 +0000 (09:14 -0700)]
svga: add new flush-time HUD query

To measure the time spent flushing the command buffer.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agosvga: also dump SVGA3D_BUFFER surfaces in svga_screen_cache_dump()
Brian Paul [Fri, 4 Mar 2016 22:58:02 +0000 (15:58 -0700)]
svga: also dump SVGA3D_BUFFER surfaces in svga_screen_cache_dump()

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agomesa: flip current tf object back to default if current is being deleted
Ilia Mirkin [Sun, 6 Mar 2016 17:36:19 +0000 (12:36 -0500)]
mesa: flip current tf object back to default if current is being deleted

In the rather unusual case of Bind + Delete, we need to make sure that
we unbind the current tf object.

Fixes dEQP-GLES3.functional.lifetime.delete_bound.transform_feedback

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agoglsl: avoid stack smashing when there are too many attributes
Ilia Mirkin [Sun, 6 Mar 2016 17:19:04 +0000 (12:19 -0500)]
glsl: avoid stack smashing when there are too many attributes

This fixes a crash in

dEQP-GLES3.functional.transform_feedback.array_element.separate.points.lowp_mat3x2

and likely others. The vertex shader has > 16 input variables (without
explicit locations), which causes us to index outside of the to_assign
array.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
8 years agoi965/vec4: Propagate swizzles correctly during copy propagation.
Francisco Jerez [Sat, 27 Feb 2016 01:42:27 +0000 (17:42 -0800)]
i965/vec4: Propagate swizzles correctly during copy propagation.

This simplifies the code that iterates over the per-component values
found in the matching copy_entry struct and checks whether the
register regions that were copied to each component are similar enough
to be treated as a single (reswizzled) value which can be propagated
into the current instruction.

Aside from being scattered between opt_copy_propagation(),
try_copy_propagate(), and try_constant_propagate(), what I found
terribly confusing about the preexisting logic was that
opt_copy_propagation() tried to reorder the array of values according
to the swizzle of the instruction source, which meant one would have
had to invert the reordering applied at the top level in order to find
out which component to take from each value (we were just taking the
i-th component from the i-th value, which is not correct in general).
The saturate mask was also being swizzled incorrectly.

This consolidates the logic for matching multiple components of a
copy_entry into a single function which returns the result as a
regular src_reg on success, as if the copy had been performed with a
single MOV instruction copying all components of the src_reg into the
destination.

Fixes several ARB_vertex_program MOV test-cases from:
 https://cgit.freedesktop.org/~kwg/piglit/log/?h=arb_program

Acked-by: Matt Turner <mattst88@gmail.com>
8 years agoi965: Don't try copy propagation if constant propagation succeeded.
Francisco Jerez [Sat, 27 Feb 2016 01:28:03 +0000 (17:28 -0800)]
i965: Don't try copy propagation if constant propagation succeeded.

It cannot get any better.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agoi965/vec4: Use swizzle() to swizzle immediates during constant propagation.
Francisco Jerez [Sat, 27 Feb 2016 01:20:19 +0000 (17:20 -0800)]
i965/vec4: Use swizzle() to swizzle immediates during constant propagation.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
8 years agoi965: Add support for swizzling arbitrary immediates to (brw_)swizzle().
Francisco Jerez [Sat, 27 Feb 2016 01:12:27 +0000 (17:12 -0800)]
i965: Add support for swizzling arbitrary immediates to (brw_)swizzle().

Scalar immediates used to be handled correctly by swizzle() (as the
identity) but since commit 58fa9d47b536403c4e3ca5d6a2495691338388fd it
will corrupt the contents of the immediate.  Vector immediates were
never handled correctly, but we had ad-hoc code to swizzle VF
immediates in the vec4 copy propagation pass.  This takes care of
swizzling V and UV in addition.

v2: Don't implement swizzling of V/UV immediates (Matt).  If you need
    to swizzle an integer vector immediate in the future apply the
    following diff to go back to v1:

--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -119,11 +119,10 @@ brw_swap_cmod(uint32_t cmod)
 static unsigned
 imm_shift(enum brw_reg_type type, unsigned i)
 {
-   assert(type != BRW_REGISTER_TYPE_UV && type != BRW_REGISTER_TYPE_V &&
-          "Not implemented.");
-
    if (type == BRW_REGISTER_TYPE_VF)
       return 8 * (i & 3);
+   else if (type == BRW_REGISTER_TYPE_UV || type == BRW_REGISTER_TYPE_V)
+      return 4 * (i & 7);
    else
       return 0;
 }

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
8 years agoi965: Pass symbolic swizzle to brw_swizzle() as a single argument.
Francisco Jerez [Sat, 27 Feb 2016 01:04:38 +0000 (17:04 -0800)]
i965: Pass symbolic swizzle to brw_swizzle() as a single argument.

And replace brw_swizzle1() with brw_swizzle().  Seems slightly cleaner
and will allow reusing brw_swizzle() in the vec4 back-end more easily.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agonvc0: reset TFB bufctx when we no longer hold a reference to the buffers
Ilia Mirkin [Tue, 16 Feb 2016 06:02:52 +0000 (01:02 -0500)]
nvc0: reset TFB bufctx when we no longer hold a reference to the buffers

This fixes some use-after-free situations in dEQP when an xfb state is
removed, and then a clear is triggered, which only does a partial
validation. It would attempt to read the no-longer-valid buffers,
resulting in crashes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
8 years agonv50/ir: using sampleid/pos shouldn't force per-sample interpolation
Ilia Mirkin [Sat, 27 Feb 2016 16:05:04 +0000 (11:05 -0500)]
nv50/ir: using sampleid/pos shouldn't force per-sample interpolation

See https://www.khronos.org/bugzilla/show_bug.cgi?id=1462

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agost/mesa: don't force per-sample interp if only sampleid/pos are used
Ilia Mirkin [Sat, 27 Feb 2016 16:01:27 +0000 (11:01 -0500)]
st/mesa: don't force per-sample interp if only sampleid/pos are used

The OES extensions clarify this behaviour to differentiate between
per-sample invocation and per-sample interpolation. Using sampleid/pos
will force per-sample invocation but not per-sample interpolation.

See https://www.khronos.org/bugzilla/show_bug.cgi?id=1462

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agoswrast: fix GL_ANY_SAMPLES_PASSED values in Result
Ilia Mirkin [Fri, 4 Mar 2016 02:00:06 +0000 (21:00 -0500)]
swrast: fix GL_ANY_SAMPLES_PASSED values in Result

Since commit 922be4eab, the expectation is that the query result
contains the correct value. Unfortunately swrast does not distinguish
between GL_SAMPLES_PASSED and GL_ANY_SAMPLES_PASSED. As a result, we
must fix up the query result in a post-draw fixup.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94274
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
8 years agost/mesa: 78-column wrapping in st_extensions.c
Brian Paul [Fri, 4 Mar 2016 23:28:00 +0000 (16:28 -0700)]
st/mesa: 78-column wrapping in st_extensions.c

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
8 years agogallium/util: add new comments, assertions in u_debug_refcnt.c
Brian Paul [Fri, 4 Mar 2016 20:19:34 +0000 (13:19 -0700)]
gallium/util: add new comments, assertions in u_debug_refcnt.c

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
8 years agogallium/util: update comments and URL in u_debug_refcnt.c
Brian Paul [Fri, 4 Mar 2016 20:05:33 +0000 (13:05 -0700)]
gallium/util: update comments and URL in u_debug_refcnt.c

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
8 years agogallium/util: make stream variable static in u_debug_refcnt.c
Brian Paul [Fri, 4 Mar 2016 20:03:55 +0000 (13:03 -0700)]
gallium/util: make stream variable static in u_debug_refcnt.c

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
8 years agogallium/util: re-indent u_debug_refcnt.[ch]
Brian Paul [Fri, 4 Mar 2016 20:02:46 +0000 (13:02 -0700)]
gallium/util: re-indent u_debug_refcnt.[ch]

Wrap comments to 78 columns, etc.

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>