gem5.git
13 years agoThis patch supports cache flushing in MOESI_hammer
Somayeh Sardashti [Mon, 28 Mar 2011 15:49:45 +0000 (10:49 -0500)]
This patch supports cache flushing in MOESI_hammer

13 years agoConfig: Import math in MI_example.py
Nilay Vaish [Mon, 28 Mar 2011 15:49:36 +0000 (10:49 -0500)]
Config: Import math in MI_example.py

13 years agotests: update reference outputs for ruby cache index change
Steve Reinhardt [Sun, 27 Mar 2011 05:24:36 +0000 (22:24 -0700)]
tests: update reference outputs for ruby cache index change

MOESI_CMP_token is the only protocol that showed noticeable stats
differences.

13 years agomips: cleanup ISA-specific code
Korey Sewell [Sat, 26 Mar 2011 13:23:52 +0000 (09:23 -0400)]
mips: cleanup ISA-specific code
***
(1): get rid of expandForMT function
MIPS is the only ISA that cares about having a piece of ISA state integrate
multiple threads so add constants for MIPS and relieve the other ISAs from having
to define this. Also, InOrder was the only core that was actively calling
this function
* * *
(2): get rid of corespecific type
The CoreSpecific type was used as a proxy to pass in HW specific params to
a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense
to not force every other ISA to use CoreSpecific as well use a special
reset function to set it. That probably should go in a PowerOn reset fault
 anyway.

13 years agoruby: fixed cache index setting
Brad Beckmann [Fri, 25 Mar 2011 17:13:50 +0000 (10:13 -0700)]
ruby: fixed cache index setting

13 years agoArm: Add in a missing miscRegName.
Gabe Black [Fri, 25 Mar 2011 04:46:14 +0000 (00:46 -0400)]
Arm: Add in a missing miscRegName.

13 years agoArm: Get rid of unused and incomplete setCp15Register and readCp15Register.
Gabe Black [Thu, 24 Mar 2011 18:39:00 +0000 (14:39 -0400)]
Arm: Get rid of unused and incomplete setCp15Register and readCp15Register.

13 years agoArm: Get rid of the unused copyStringArray32 method from Arm process classes.
Gabe Black [Thu, 24 Mar 2011 18:00:15 +0000 (14:00 -0400)]
Arm: Get rid of the unused copyStringArray32 method from Arm process classes.

13 years agoISA parser: Set up op_src_decl and op_dest_decl for pc operands.
Gabe Black [Thu, 24 Mar 2011 17:55:16 +0000 (13:55 -0400)]
ISA parser: Set up op_src_decl and op_dest_decl for pc operands.

13 years agoThis patch fixes a build error in networktest.cc that occurs with gcc4.2
Tushar Krishna [Wed, 23 Mar 2011 03:38:09 +0000 (23:38 -0400)]
This patch fixes a build error in networktest.cc that occurs with gcc4.2

13 years agoRuby: Remove CacheMsg class from SLICC
Nilay Vaish [Tue, 22 Mar 2011 11:41:54 +0000 (06:41 -0500)]
Ruby: Remove CacheMsg class from SLICC
The goal of the patch is to do away with the CacheMsg class currently in use
in coherence protocols. In place of CacheMsg, the RubyRequest class will used.
This class is already present in slicc_interface/RubyRequest.hh. In fact,
objects of class CacheMsg are generated by copying values from a RubyRequest
object.

13 years agoThis patch makes garnet use the info about active and inactive vnets during allocatio...
Tushar Krishna [Tue, 22 Mar 2011 02:51:59 +0000 (22:51 -0400)]
This patch makes garnet use the info about active and inactive vnets during allocation and power estimations etc

13 years agofix garnet fleible pipeline
Tushar Krishna [Tue, 22 Mar 2011 02:51:59 +0000 (22:51 -0400)]
fix garnet fleible pipeline

13 years agoThis patch adds the network tester for simple and garnet networks.
Tushar Krishna [Tue, 22 Mar 2011 02:51:58 +0000 (22:51 -0400)]
This patch adds the network tester for simple and garnet networks.
The tester code is in testers/networktest.
The tester can be invoked by configs/example/ruby_network_test.py.
A dummy coherence protocol called Network_test is also addded for network-only simulations and testing. The protocol takes in messages from the tester and just pushes them into the network in the appropriate vnet, without storing any state.

13 years agoSLICC: Remove WakeUp* import calls from ast/__init__.py
Nilay Vaish [Sun, 20 Mar 2011 14:23:27 +0000 (09:23 -0500)]
SLICC: Remove WakeUp* import calls from ast/__init__.py
I had recently committed a patch that removed the WakeUp*.py files from the
slicc/ast directory. I had forgotten to remove the import  calls for these
files from slicc/ast/__init__.py. This resulted in error while running
regressions on zizzer. This patch does the needful.

13 years agoconfigs: combine ruby_se.py and se.py to avoid all that code duplication
Lisa Hsu [Sun, 20 Mar 2011 04:13:04 +0000 (21:13 -0700)]
configs: combine ruby_se.py and se.py to avoid all that code duplication

13 years agoenable x86 workloads on se.py
Lisa Hsu [Sun, 20 Mar 2011 04:13:02 +0000 (21:13 -0700)]
enable x86 workloads on se.py

13 years agose.py: Modify script to make multiprogramming much easier.
Lisa Hsu [Sun, 20 Mar 2011 04:12:59 +0000 (21:12 -0700)]
se.py: Modify script to make multiprogramming much easier.
Now, instead of --bench benchname, you can do --bench bench1-bench2-bench3 and it will
set up a simulation that instantiates those three workloads.  Only caveat is that now,
for sanity checking, your -n X must match the number of benches in the list.

13 years agoutil: update aggregator to handle x86 checkpoints.
Lisa Hsu [Sun, 20 Mar 2011 04:12:55 +0000 (21:12 -0700)]
util:  update aggregator to handle x86 checkpoints.
Also, make update to understand some of the newer serialized variables

13 years agoRuby: Convert CacheRequestType to RubyRequestType
Nilay Vaish [Sat, 19 Mar 2011 23:34:59 +0000 (18:34 -0500)]
Ruby: Convert CacheRequestType to RubyRequestType
This patch converts CacheRequestType to RubyRequestType so that both the
protocol dependent and independent code makes use of the same request type.

13 years agoRuby: Convert AccessModeType to RubyAccessMode
Nilay Vaish [Sat, 19 Mar 2011 23:34:37 +0000 (18:34 -0500)]
Ruby: Convert AccessModeType to RubyAccessMode
This patch converts AccessModeType to RubyAccessMode so that both the
protocol dependent and independent code uses the same access mode.

13 years agoMOESI_hammer: minor fixes to full-bit dir
Brad Beckmann [Sat, 19 Mar 2011 21:17:48 +0000 (14:17 -0700)]
MOESI_hammer: minor fixes to full-bit dir

13 years agoRuby: dma retry fix
Brad Beckmann [Sat, 19 Mar 2011 21:17:48 +0000 (14:17 -0700)]
Ruby: dma retry fix

This patch fixes the problem where Ruby would fail to call sendRetry on ports
after it nacked the port.  This patch is particularly helpful for bursty dma
requests which often include several packets.

13 years agoRubyPort: minor fixes to trace flag and dprintfs
Brad Beckmann [Sat, 19 Mar 2011 21:17:48 +0000 (14:17 -0700)]
RubyPort: minor fixes to trace flag and dprintfs

13 years agoruby: added useful dma progress dprintf
Brad Beckmann [Sat, 19 Mar 2011 21:17:48 +0000 (14:17 -0700)]
ruby: added useful dma progress dprintf

13 years agoslicc: improved invalid transition message
Brad Beckmann [Sat, 19 Mar 2011 21:17:48 +0000 (14:17 -0700)]
slicc: improved invalid transition message

13 years agoMOESI_hammer: fixed dma bug with shared data
Brad Beckmann [Sat, 19 Mar 2011 21:17:48 +0000 (14:17 -0700)]
MOESI_hammer: fixed dma bug with shared data

13 years agoMOESI_CMP_directory: significant dma bug fixes
Brad Beckmann [Sat, 19 Mar 2011 21:17:48 +0000 (14:17 -0700)]
MOESI_CMP_directory: significant dma bug fixes

13 years agoSLICC: Remove external_type for structures
Nilay Vaish [Fri, 18 Mar 2011 19:12:04 +0000 (14:12 -0500)]
SLICC: Remove external_type for structures
In SLICC, in order to define a type a data type for which it should not
generate any code, the keyword external_type is used. For those data types for
which code should be generated, the keyword structure is used. This patch
eliminates the use of keyword external_type for defining structures. structure
key word can now have an optional attribute external, which would be used for
figuring out whether or not to generate the code for this structure. Also, now
structures can have functions as well data members in them.

13 years agoSLICC: Remove the keyword wake_up_dependents
Nilay Vaish [Fri, 18 Mar 2011 19:12:03 +0000 (14:12 -0500)]
SLICC: Remove the keyword wake_up_dependents
In order to add stall and wait facility for protocols, a keyword
wake_up_dependents was introduced. This patch removes the keyword,
instead this functionality is now implemented as function call.

13 years agoSLICC: Remove the keyword wake_up_all_dependents
Nilay Vaish [Fri, 18 Mar 2011 19:12:01 +0000 (14:12 -0500)]
SLICC: Remove the keyword wake_up_all_dependents
In order to add stall and wait facility for protocols, a keyword
wake_up_all_dependents was introduced. This patch removes the keyword,
instead this functionality is now implemented as function call.

13 years agoswig: get rid of m5.internal.random module (swig/random.i)
Steve Reinhardt [Fri, 18 Mar 2011 18:47:15 +0000 (11:47 -0700)]
swig: get rid of m5.internal.random module (swig/random.i)
Thanks to swig this was interfering with the standard Python
random module.  The only function in that module was seed(),
which erroneously called srand48().  Moved the function to
m5.internal.core, renamed it seedRandom(), and made it call
random_mt.init() instead.

13 years agobase: disable FastAlloc in debug builds by default
Steve Reinhardt [Fri, 18 Mar 2011 18:47:11 +0000 (11:47 -0700)]
base: disable FastAlloc in debug builds by default
FastAlloc's reuse policies can mask allocation bugs, so
we typically want it disabled when debugging.  Set
FORCE_FAST_ALLOC to enable even when debugging, and set
NO_FAST_ALLOC to disable even in non-debug builds.

13 years agoAutomated merge with ssh://hg@repo.m5sim.org/m5
Ali Saidi [Fri, 18 Mar 2011 00:24:37 +0000 (19:24 -0500)]
Automated merge with ssh://hg@repo.m5sim.org/m5

13 years agoARM: Update stats for the previous changes and add ARM_FS/O3 regression.
Ali Saidi [Fri, 18 Mar 2011 00:20:22 +0000 (19:20 -0500)]
ARM: Update stats for the previous changes and add ARM_FS/O3 regression.

13 years agoARM: Add minimal ARM_SE support for m5threads.
Chris Emmons [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Add minimal ARM_SE support for m5threads.

Updated some of the assembly code sequences to use armv7 instructions and
coprocessor 15 for storing the TLS pointer.

13 years agoARM: Fix subtle bug in LDM.
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Fix subtle bug in LDM.

If the instruction faults mid-op the base register shouldn't be written back.

13 years agoARM: Implement the Instruction Set Attribute Registers (ISAR).
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Implement the Instruction Set Attribute Registers (ISAR).

The ISAR registers describe which features the processor supports.
Transcribe the values listed in section B5.2.5 of the ARM ARM
into the registers as read-only values

13 years agoARM: Identify branches as conditional or unconditional and direct or indirect.
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Identify branches as conditional or unconditional and  direct or indirect.

13 years agoARM: Bare metal system should have 256MB of RAM.
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Bare metal system should have 256MB of RAM.

13 years agoARM: Fix small bug with VLDM/VSTM instructions.
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Fix small bug with VLDM/VSTM instructions.

13 years agoARM: Detect and skip udelay() functions in linux kernel.
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Detect and skip udelay() functions in linux kernel.

This change speeds up booting, especially in MP cases, by not executing
udelay() on the core but instead skipping ahead tha amount of time that is being
delayed.

13 years agoARM: Allow conditional quiesce instructions.
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
ARM: Allow conditional quiesce instructions.

This patch prevents not executed conditional instructions marked as
IsQuiesce from stalling the pipeline indefinitely. If the instruction
is not executed the quiesceSkip psuedoinst is called which schedules a
wakes up call to the fetch stage.

13 years agoStats: Update the statistics for rfe patch.
Ali Saidi [Fri, 18 Mar 2011 00:20:20 +0000 (19:20 -0500)]
Stats: Update the statistics for rfe patch.

13 years agoARM: Fix RFE macrop.
Matt Horsnell [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
ARM: Fix RFE macrop.

This changes the RFE macroop into 3 microops:

URa = [sp]; URb = [sp+4]; // load CPSR,PC values from stack
sp = sp + offset;         // optionally auto-increment
PC = URa; CPSR = URb;     // write to the PC and CPSR.

Importantly:
- writing to PC is handled in the last micro-op.
- loading occurs prior to state changes.

13 years agoARM: Rename registers used as temporary state by microops.
Matt Horsnell [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
ARM: Rename registers used as temporary state by microops.

13 years agoO3: Send instruction back to fetch on squash to seed predecoder correctly.
Ali Saidi [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
O3: Send instruction back to fetch on squash to seed predecoder correctly.

13 years agoO3: Cleanup the commitInfo comm struct.
Ali Saidi [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
O3: Cleanup the commitInfo comm struct.

Get rid of unused members and use base types rather than derrived values
where possible to limit amount of state.

13 years agoARM: Previous change didn't end up setting instFlags, this does.
Ali Saidi [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
ARM: Previous change didn't end up setting instFlags, this does.

13 years agoO3: Update regressions for mem block caching change.
Ali Saidi [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
O3: Update regressions for mem block caching change.

13 years agoMem: Fix issue with dirty block being lost when entire block transferred to non-cache.
Ali Saidi [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.

This change fixes the problem for all the cases we actively use. If you want to try
more creative I/O device attachments (E.g. sharing an L2), this won't work. You
would need another level of caching between the I/O device and the cache
(which you actually need anyway with our current code to make sure writes
propagate). This is required so that you can mark the cache in between as
top level and it won't try to send ownership of a block to the I/O device.
Asserts have been added that should catch any issues.

13 years agoO3: Fix unaligned stores when cache blocked
Ali Saidi [Fri, 18 Mar 2011 00:20:19 +0000 (19:20 -0500)]
O3: Fix unaligned stores when cache blocked

Without this change the a store can be issued to the cache multiple times.
If this case occurs when the l1 cache is out of mshrs (and thus blocked)
the processor will never make forward progress because each cycle it will
send a single request using the recently freed mshr and not completing the
multipart store. This will continue forever.

13 years agoRuby: minor bugfix, line did not adhere to some macro usage conventions.
Lisa Hsu [Fri, 18 Mar 2011 00:08:35 +0000 (17:08 -0700)]
Ruby: minor bugfix, line did not adhere to some macro usage conventions.

13 years agoRuby: expose a simple mod function in slicc interface.
Lisa Hsu [Fri, 18 Mar 2011 00:01:41 +0000 (17:01 -0700)]
Ruby: expose a simple mod function in slicc interface.

13 years agoX86: Update the stats for parser on x86 O3.
Ali Saidi [Thu, 17 Mar 2011 04:43:54 +0000 (00:43 -0400)]
X86: Update the stats for parser on x86 O3.

13 years agoX86: Update the stats for gzip on x86 O3.
Gabe Black [Thu, 17 Mar 2011 02:08:41 +0000 (19:08 -0700)]
X86: Update the stats for gzip on x86 O3.

13 years agoRegressions: Move the X86_FS regressions to "quick" instead of "long".
Gabe Black [Sat, 12 Mar 2011 22:41:30 +0000 (14:41 -0800)]
Regressions: Move the X86_FS regressions to "quick" instead of "long".

--HG--
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal

13 years agoRegressions: Make X86_FS run automatically.
Gabe Black [Sat, 12 Mar 2011 22:38:57 +0000 (14:38 -0800)]
Regressions: Make X86_FS run automatically.

13 years agoSCons: Stop embedding the mercurial revision into the binary.
Gabe Black [Fri, 11 Mar 2011 19:27:36 +0000 (11:27 -0800)]
SCons: Stop embedding the mercurial revision into the binary.

This causes a lot of rebuilds that could have otherwise possibly been
avoided, and, more annoyingly, a lot of unnecessary rerunning of the
regressions. The benefits of having the revision in the output haven't
materialized, so this change removes it.

13 years agoGems: Eliminate the now unused GEMS_ROOT scons variable.
Gabe Black [Fri, 11 Mar 2011 19:27:26 +0000 (11:27 -0800)]
Gems: Eliminate the now unused GEMS_ROOT scons variable.

13 years agoRuby: Get rid of the dead ruby tester.
Gabe Black [Fri, 11 Mar 2011 19:27:16 +0000 (11:27 -0800)]
Ruby: Get rid of the dead ruby tester.

None of the code in the ruby tester directory is compiled or referred to
outside of that directory. This change eliminates it. If it's needed in the
future, it can be revived from the history. In the mean time, this removes
clutter and the only use of the GEMS_ROOT scons variable.

13 years agoAlpha: Fix the datatypes of some values read from the simulated kernel.
Yi Xiang [Wed, 9 Mar 2011 05:43:11 +0000 (21:43 -0800)]
Alpha: Fix the datatypes of some values read from the simulated kernel.

13 years agoSCons: Fix the polarity on the --ignore-style check.
Gabe Black [Fri, 4 Mar 2011 08:11:02 +0000 (00:11 -0800)]
SCons: Fix the polarity on the --ignore-style check.

13 years agoSCons: Clean up some inconsistent capitalization in scons options.
Gabe Black [Fri, 4 Mar 2011 07:55:21 +0000 (23:55 -0800)]
SCons: Clean up some inconsistent capitalization in scons options.

13 years agoSCons: Turn some scons variables into command line options.
Gabe Black [Fri, 4 Mar 2011 07:54:31 +0000 (23:54 -0800)]
SCons: Turn some scons variables into command line options.

13 years agoMips: MIPS_FS doesn't build currently, so delete it to avoid confusion.
Gabe Black [Fri, 4 Mar 2011 07:01:38 +0000 (23:01 -0800)]
Mips: MIPS_FS doesn't build currently, so delete it to avoid confusion.

MIPS_FS doesn't build and presumably doesn't work right now. Users might see
the MIP_FS file in build_opts and expect it to work. To avoid confusion, this
change deletes that file.

13 years agoStatetrace: Stub out the missing i386 version of sendState.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Stub out the missing i386 version of sendState.

13 years agoStatetrace: Rename i386 to i686.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Rename i386 to i686.

--HG--
rename : util/statetrace/arch/i386/tracechild.cc => util/statetrace/arch/i686/tracechild.cc
rename : util/statetrace/arch/i386/tracechild.hh => util/statetrace/arch/i686/tracechild.hh

13 years agoStatetrace: Fix the i686 detection macro.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Fix the i686 detection macro.

13 years agoStatetrace: Use sys/user.h instead of linux/user.h.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Use sys/user.h instead of linux/user.h.

13 years agoStatetrace: Tweak the help for the -nt option.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Tweak the help for the -nt option.

13 years agoStatetrace: Accomodate cross compiling statetrace with scons.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Accomodate cross compiling statetrace with scons.

--HG--
rename : util/statetrace/arch/tracechild_amd64.cc => util/statetrace/arch/amd64/tracechild.cc
rename : util/statetrace/arch/tracechild_amd64.hh => util/statetrace/arch/amd64/tracechild.hh
rename : util/statetrace/arch/tracechild_arm.cc => util/statetrace/arch/arm/tracechild.cc
rename : util/statetrace/arch/tracechild_arm.hh => util/statetrace/arch/arm/tracechild.hh
rename : util/statetrace/arch/tracechild_i386.cc => util/statetrace/arch/i386/tracechild.cc
rename : util/statetrace/arch/tracechild_i386.hh => util/statetrace/arch/i386/tracechild.hh
rename : util/statetrace/arch/tracechild_sparc.cc => util/statetrace/arch/sparc/tracechild.cc
rename : util/statetrace/arch/tracechild_sparc.hh => util/statetrace/arch/sparc/tracechild.hh
rename : util/statetrace/tracechild_arch.cc => util/statetrace/base/arch_check.h
rename : util/statetrace/regstate.hh => util/statetrace/base/regstate.hh
rename : util/statetrace/statetrace.cc => util/statetrace/base/statetrace.cc
rename : util/statetrace/tracechild.cc => util/statetrace/base/tracechild.cc
rename : util/statetrace/tracechild.hh => util/statetrace/base/tracechild.hh

13 years agoStatetrace: Convert the build to scons.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Convert the build to scons.

13 years agoStatetrace: Allow the user to override CXX.
Gabe Black [Thu, 3 Mar 2011 06:53:11 +0000 (22:53 -0800)]
Statetrace: Allow the user to override CXX.

13 years agoStatetrace: Get rid of explicit register name handling.
Gabe Black [Thu, 3 Mar 2011 06:53:10 +0000 (22:53 -0800)]
Statetrace: Get rid of explicit register name handling.

13 years agoStatetrace: Kill the printer functionality in statetrace.
Gabe Black [Thu, 3 Mar 2011 06:53:10 +0000 (22:53 -0800)]
Statetrace: Kill the printer functionality in statetrace.

13 years agoStatetrace: Clean up style.
Gabe Black [Thu, 3 Mar 2011 06:53:10 +0000 (22:53 -0800)]
Statetrace: Clean up style.

13 years agoX86: Use the npc as the pc when doing a nativetrace, not what M5 considers the pc.
Gabe Black [Wed, 2 Mar 2011 08:41:44 +0000 (00:41 -0800)]
X86: Use the npc as the pc when doing a nativetrace, not what M5 considers the pc.

13 years agoX86: Decode the mysterious and elusive ffreep x87 instruction.
Gabe Black [Wed, 2 Mar 2011 08:41:38 +0000 (00:41 -0800)]
X86: Decode the mysterious and elusive ffreep x87 instruction.

The internet says this instruction was created by accident when an Intel CPU
failed to decode x87 instructions properly. It's been documented on a few rare
occasions and has generally worked to ensure backwards compatability. One
source claims that the gcc toolchain is basically the only thing that emits
it, and that emulators/binary translators like qemu and bochs implement it.

We won't actually implement it here since we're hardly implementing any other
x87 instructions either. If we were to implement it, it would behave the same
as ffree but then also pop the register stack.

http://www.pagetable.com/?p=16

13 years agoSpelling: Fix the a spelling error by changing mmaped to mmapped.
Gabe Black [Wed, 2 Mar 2011 07:18:47 +0000 (23:18 -0800)]
Spelling: Fix the a spelling error by changing mmaped to mmapped.

There may not be a formally correct spelling for the past tense of mmap, but
mmapped is the spelling Google doesn't try to autocorrect. This makes sense
because it mirrors the past tense of map->mapped and not the past tense of
cape->caped.

--HG--
rename : src/arch/alpha/mmaped_ipr.hh => src/arch/alpha/mmapped_ipr.hh
rename : src/arch/arm/mmaped_ipr.hh => src/arch/arm/mmapped_ipr.hh
rename : src/arch/mips/mmaped_ipr.hh => src/arch/mips/mmapped_ipr.hh
rename : src/arch/power/mmaped_ipr.hh => src/arch/power/mmapped_ipr.hh
rename : src/arch/sparc/mmaped_ipr.hh => src/arch/sparc/mmapped_ipr.hh
rename : src/arch/x86/mmaped_ipr.hh => src/arch/x86/mmapped_ipr.hh

13 years agoX86: Update stats for the x86 o3 hello world regression.
Gabe Black [Wed, 2 Mar 2011 07:18:00 +0000 (23:18 -0800)]
X86: Update stats for the x86 o3 hello world regression.

13 years agoX86: Mark IO reads and writes as non-speculative.
Gabe Black [Wed, 2 Mar 2011 06:42:59 +0000 (22:42 -0800)]
X86: Mark IO reads and writes as non-speculative.

13 years agoX86: Mark prefetches as such in their instruction and request flags.
Gabe Black [Wed, 2 Mar 2011 06:42:18 +0000 (22:42 -0800)]
X86: Mark prefetches as such in their instruction and request flags.

13 years agoRuby: Fix DPRINTF bugs in PerfectSwitch and MessageBuffer
Nilay Vaish [Tue, 1 Mar 2011 21:26:11 +0000 (15:26 -0600)]
Ruby: Fix DPRINTF bugs in PerfectSwitch and MessageBuffer
At a couple of places in PerfectSwitch.cc and MessageBuffer.cc, DPRINTF()
has not been provided with correct number of arguments. The patch fixes these
bugs.

13 years agoSCons: Separately label the global non-sticky options.
Gabe Black [Tue, 1 Mar 2011 11:00:42 +0000 (03:00 -0800)]
SCons: Separately label the global non-sticky options.

The global sticky options were being printed with a heading, and then the
global nonsticky options were being printed immediately after them without a
heading. Because the two lists ran together and the first had its own heading,
it looked like -all- those options where sticky even though some of them
aren't. This change adds a label to the second list so it's clear they're
different.

13 years agoRuby: Mention that Ruby's bound checking option only applies to Ruby.
Gabe Black [Tue, 1 Mar 2011 10:59:09 +0000 (02:59 -0800)]
Ruby: Mention that Ruby's bound checking option only applies to Ruby.

13 years agoX86: If PCI config space is disabled, pass through to regular IO addresses.
Gabe Black [Mon, 28 Feb 2011 00:25:06 +0000 (16:25 -0800)]
X86: If PCI config space is disabled, pass through to regular IO addresses.

13 years agoX86: Update X86_FS stats.
Gabe Black [Mon, 28 Feb 2011 00:24:54 +0000 (16:24 -0800)]
X86: Update X86_FS stats.

13 years agoX86: Use regular read requests in the walker instead of read exclusive.
Gabe Black [Mon, 28 Feb 2011 00:24:10 +0000 (16:24 -0800)]
X86: Use regular read requests in the walker instead of read exclusive.

13 years agoinorder: bzip2 regression update
Korey Sewell [Sun, 27 Feb 2011 19:17:26 +0000 (14:17 -0500)]
inorder: bzip2 regression update

13 years agogetopt: Remove GPL code.
Nathan Binkert [Sun, 27 Feb 2011 05:43:11 +0000 (21:43 -0800)]
getopt: Remove GPL code.
This code is unused and should never have been committed

13 years agoRuby: Remove store buffer
Nilay Vaish [Fri, 25 Feb 2011 23:55:20 +0000 (17:55 -0600)]
Ruby: Remove store buffer
This patch removes the store buffer from Ruby. It is not in use currently.
Since libruby is being and store buffer makes calls to libruby, it is not
possible to maintain it until substantial changes are made.

13 years agoRuby: Remove libruby
Nilay Vaish [Fri, 25 Feb 2011 23:54:56 +0000 (17:54 -0600)]
Ruby: Remove libruby
This patch removes libruby_internal.hh, libruby.hh and libruby.cc. It moves
the contents to libruby.hh to RubyRequest.hh and RubyRequest.cc files.

13 years agoRuby: Make Address.hh independent of RubySystem
Nilay Vaish [Fri, 25 Feb 2011 23:51:56 +0000 (17:51 -0600)]
Ruby: Make Address.hh independent of RubySystem
This patch changes Address.hh so that it is not dependent on RubySystem.
This dependence seems unecessary. All those functions that depend on
RubySystem have been moved to Address.cc file.

13 years agoRuby: Make DataBlock.hh independent of RubySystem
Nilay Vaish [Fri, 25 Feb 2011 23:51:02 +0000 (17:51 -0600)]
Ruby: Make DataBlock.hh independent of RubySystem
This patch changes DataBlock.hh so that it is not dependent on RubySystem.
This dependence seems unecessary. All those functions that depende on
RubySystem have been moved to DataBlock.cc file.

13 years agoO3CPU: Fix iqCount and lsqCount SMT fetch policies.
Timothy M. Jones [Fri, 25 Feb 2011 13:50:29 +0000 (13:50 +0000)]
O3CPU: Fix iqCount and lsqCount SMT fetch policies.
Fixes two of the SMT fetch policies in O3CPU that were returning the count
of instructions in the IQ or LSQ rather than the thread ID to fetch from.

13 years agoConfigs: Explicitly import env in Benchmarks.py
Gabe Black [Thu, 24 Feb 2011 10:14:45 +0000 (02:14 -0800)]
Configs: Explicitly import env in Benchmarks.py

env was being implicitly imported into Benchmarks.py through SysPaths.py.
This change brings it in explicitly in the file where it's used.

13 years agoregress: MOESI_hammer memtest updates
Brad Beckmann [Thu, 24 Feb 2011 00:41:59 +0000 (16:41 -0800)]
regress: MOESI_hammer memtest updates

13 years agoruby: automate permission setting
Brad Beckmann [Thu, 24 Feb 2011 00:41:59 +0000 (16:41 -0800)]
ruby: automate permission setting

This patch integrates permissions with cache and memory states, and then
automates the setting of permissions within the generated code.  No longer
does one need to manually set the permissions within the setState funciton.
This patch will faciliate easier functional access support by always correctly
setting permissions for both cache and memory states.

--HG--
rename : src/mem/slicc/ast/EnumDeclAST.py => src/mem/slicc/ast/StateDeclAST.py
rename : src/mem/slicc/ast/TypeFieldEnumAST.py => src/mem/slicc/ast/TypeFieldStateAST.py

13 years agoMOESI_hammer: cache probe address clean up
Brad Beckmann [Thu, 24 Feb 2011 00:41:58 +0000 (16:41 -0800)]
MOESI_hammer: cache probe address clean up