lkcl [Sun, 9 Oct 2022 19:50:44 +0000 (20:50 +0100)]
lkcl [Sun, 9 Oct 2022 19:50:15 +0000 (20:50 +0100)]
lkcl [Sun, 9 Oct 2022 19:49:32 +0000 (20:49 +0100)]
lkcl [Sun, 9 Oct 2022 19:30:14 +0000 (20:30 +0100)]
lkcl [Sun, 9 Oct 2022 19:28:24 +0000 (20:28 +0100)]
lkcl [Sun, 9 Oct 2022 19:02:25 +0000 (20:02 +0100)]
lkcl [Sun, 9 Oct 2022 19:01:45 +0000 (20:01 +0100)]
lkcl [Fri, 7 Oct 2022 23:11:03 +0000 (00:11 +0100)]
lkcl [Fri, 7 Oct 2022 23:09:47 +0000 (00:09 +0100)]
programmerjake [Fri, 7 Oct 2022 07:27:14 +0000 (08:27 +0100)]
add Handy Compiler Algorithms for SimpleV
lkcl [Thu, 6 Oct 2022 21:20:11 +0000 (22:20 +0100)]
lkcl [Thu, 6 Oct 2022 21:19:28 +0000 (22:19 +0100)]
lkcl [Thu, 6 Oct 2022 19:19:12 +0000 (20:19 +0100)]
lkcl [Thu, 6 Oct 2022 17:41:17 +0000 (18:41 +0100)]
Jacob Lifshay [Thu, 6 Oct 2022 01:33:55 +0000 (18:33 -0700)]
fix x86 sh[lr]d, *not* sh[lr]q. if you like AT&T form, it's sh[lr]dq.
for an example, see https://gcc.godbolt.org/z/ME4bE7Mdv
lkcl [Wed, 5 Oct 2022 22:59:24 +0000 (23:59 +0100)]
lkcl [Wed, 5 Oct 2022 17:09:05 +0000 (18:09 +0100)]
lkcl [Wed, 5 Oct 2022 16:44:42 +0000 (17:44 +0100)]
lkcl [Wed, 5 Oct 2022 16:36:53 +0000 (17:36 +0100)]
lkcl [Wed, 5 Oct 2022 16:29:51 +0000 (17:29 +0100)]
lkcl [Wed, 5 Oct 2022 16:21:03 +0000 (17:21 +0100)]
lkcl [Wed, 5 Oct 2022 16:16:57 +0000 (17:16 +0100)]
lkcl [Wed, 5 Oct 2022 15:58:59 +0000 (16:58 +0100)]
lkcl [Wed, 5 Oct 2022 15:55:39 +0000 (16:55 +0100)]
lkcl [Wed, 5 Oct 2022 14:27:48 +0000 (15:27 +0100)]
lkcl [Wed, 5 Oct 2022 14:23:22 +0000 (15:23 +0100)]
lkcl [Wed, 5 Oct 2022 13:43:47 +0000 (14:43 +0100)]
lkcl [Wed, 5 Oct 2022 13:29:13 +0000 (14:29 +0100)]
lkcl [Wed, 5 Oct 2022 13:22:05 +0000 (14:22 +0100)]
lkcl [Wed, 5 Oct 2022 13:18:44 +0000 (14:18 +0100)]
lkcl [Wed, 5 Oct 2022 13:17:32 +0000 (14:17 +0100)]
lkcl [Wed, 5 Oct 2022 13:16:56 +0000 (14:16 +0100)]
lkcl [Wed, 5 Oct 2022 13:12:30 +0000 (14:12 +0100)]
lkcl [Wed, 5 Oct 2022 11:05:00 +0000 (12:05 +0100)]
lkcl [Wed, 5 Oct 2022 10:57:10 +0000 (11:57 +0100)]
Luke Kenneth Casson Leighton [Wed, 5 Oct 2022 10:56:30 +0000 (11:56 +0100)]
add int_fp_mv discussion link to ls002
lkcl [Wed, 5 Oct 2022 10:55:09 +0000 (11:55 +0100)]
lkcl [Wed, 5 Oct 2022 10:54:57 +0000 (11:54 +0100)]
lkcl [Wed, 5 Oct 2022 10:51:23 +0000 (11:51 +0100)]
lkcl [Wed, 5 Oct 2022 10:51:13 +0000 (11:51 +0100)]
lkcl [Wed, 5 Oct 2022 10:30:17 +0000 (11:30 +0100)]
lkcl [Wed, 5 Oct 2022 10:02:34 +0000 (11:02 +0100)]
Luke Kenneth Casson Leighton [Wed, 5 Oct 2022 10:02:14 +0000 (11:02 +0100)]
whoops rename
lkcl [Wed, 5 Oct 2022 09:58:04 +0000 (10:58 +0100)]
lkcl [Wed, 5 Oct 2022 09:56:21 +0000 (10:56 +0100)]
lkcl [Wed, 5 Oct 2022 09:54:24 +0000 (10:54 +0100)]
lkcl [Wed, 5 Oct 2022 03:04:43 +0000 (04:04 +0100)]
lkcl [Tue, 4 Oct 2022 15:16:16 +0000 (16:16 +0100)]
lkcl [Tue, 4 Oct 2022 15:10:51 +0000 (16:10 +0100)]
lkcl [Tue, 4 Oct 2022 13:40:47 +0000 (14:40 +0100)]
lkcl [Tue, 4 Oct 2022 13:39:05 +0000 (14:39 +0100)]
lkcl [Tue, 4 Oct 2022 13:38:06 +0000 (14:38 +0100)]
lkcl [Tue, 4 Oct 2022 13:21:44 +0000 (14:21 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 13:14:48 +0000 (14:14 +0100)]
clarify notes on fishmv being R-M-W
lkcl [Tue, 4 Oct 2022 13:06:47 +0000 (14:06 +0100)]
lkcl [Tue, 4 Oct 2022 13:05:19 +0000 (14:05 +0100)]
lkcl [Tue, 4 Oct 2022 12:15:24 +0000 (13:15 +0100)]
lkcl [Tue, 4 Oct 2022 12:11:51 +0000 (13:11 +0100)]
lkcl [Tue, 4 Oct 2022 12:04:54 +0000 (13:04 +0100)]
lkcl [Tue, 4 Oct 2022 11:44:31 +0000 (12:44 +0100)]
lkcl [Tue, 4 Oct 2022 11:41:55 +0000 (12:41 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 11:29:04 +0000 (12:29 +0100)]
observation motivation on ls002, even FPR=0 needs FLD
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 11:28:38 +0000 (12:28 +0100)]
whitespace
lkcl [Tue, 4 Oct 2022 11:24:59 +0000 (12:24 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 11:12:36 +0000 (12:12 +0100)]
add zero-overhead loop link
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 10:29:32 +0000 (11:29 +0100)]
add asm for affine
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 10:28:48 +0000 (11:28 +0100)]
add gf2p8affineqb bitmatrix-mul to bitmanip page
lkcl [Tue, 4 Oct 2022 05:23:06 +0000 (06:23 +0100)]
lkcl [Tue, 4 Oct 2022 02:33:21 +0000 (03:33 +0100)]
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 01:55:28 +0000 (02:55 +0100)]
formatting
Luke Kenneth Casson Leighton [Tue, 4 Oct 2022 01:54:38 +0000 (02:54 +0100)]
whitespace (linelength)
Jacob Lifshay [Tue, 4 Oct 2022 00:12:21 +0000 (17:12 -0700)]
add 256-bit packed SIMD emulation table
Jacob Lifshay [Tue, 4 Oct 2022 00:05:10 +0000 (17:05 -0700)]
add motivation for SVP64 with VL=1 override
Jacob Lifshay [Mon, 3 Oct 2022 23:40:36 +0000 (16:40 -0700)]
work on SVP64 scalar overriding VL to 1 question
lkcl [Mon, 3 Oct 2022 23:03:08 +0000 (00:03 +0100)]
lkcl [Mon, 3 Oct 2022 22:18:29 +0000 (23:18 +0100)]
lkcl [Mon, 3 Oct 2022 22:16:45 +0000 (23:16 +0100)]
lkcl [Mon, 3 Oct 2022 22:16:10 +0000 (23:16 +0100)]
lkcl [Mon, 3 Oct 2022 20:51:54 +0000 (21:51 +0100)]
lkcl [Mon, 3 Oct 2022 20:50:48 +0000 (21:50 +0100)]
lkcl [Mon, 3 Oct 2022 20:48:21 +0000 (21:48 +0100)]
lkcl [Mon, 3 Oct 2022 20:41:51 +0000 (21:41 +0100)]
lkcl [Mon, 3 Oct 2022 20:36:39 +0000 (21:36 +0100)]
lkcl [Mon, 3 Oct 2022 20:30:22 +0000 (21:30 +0100)]
Luke Kenneth Casson Leighton [Mon, 3 Oct 2022 20:26:10 +0000 (21:26 +0100)]
wildcard Makefile for RFCs
lkcl [Mon, 3 Oct 2022 20:25:31 +0000 (21:25 +0100)]
lkcl [Mon, 3 Oct 2022 20:16:45 +0000 (21:16 +0100)]
lkcl [Mon, 3 Oct 2022 20:10:40 +0000 (21:10 +0100)]
lkcl [Mon, 3 Oct 2022 19:57:27 +0000 (20:57 +0100)]
lkcl [Mon, 3 Oct 2022 19:55:49 +0000 (20:55 +0100)]
lkcl [Mon, 3 Oct 2022 19:44:23 +0000 (20:44 +0100)]
lkcl [Mon, 3 Oct 2022 19:35:00 +0000 (20:35 +0100)]
lkcl [Mon, 3 Oct 2022 19:32:49 +0000 (20:32 +0100)]
lkcl [Mon, 3 Oct 2022 19:22:25 +0000 (20:22 +0100)]
lkcl [Mon, 3 Oct 2022 19:16:34 +0000 (20:16 +0100)]
lkcl [Mon, 3 Oct 2022 19:09:42 +0000 (20:09 +0100)]
lkcl [Mon, 3 Oct 2022 16:17:10 +0000 (17:17 +0100)]
lkcl [Mon, 3 Oct 2022 15:25:11 +0000 (16:25 +0100)]
lkcl [Mon, 3 Oct 2022 15:16:20 +0000 (16:16 +0100)]
lkcl [Mon, 3 Oct 2022 15:00:05 +0000 (16:00 +0100)]