Richard Sandiford [Wed, 3 Jan 2018 21:42:52 +0000 (21:42 +0000)]
poly_int: GET_MODE_SIZE
This patch changes GET_MODE_SIZE from unsigned short to poly_uint16.
The non-mechanical parts were handled by previous patches.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_size): Change from unsigned short to
poly_uint16_pod.
(mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
(GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
(fixed_size_mode::includes_p): Check for constant-sized modes.
* genmodes.c (emit_mode_size_inline): Make mode_size_inline
return a poly_uint16 rather than an unsigned short.
(emit_mode_size): Change the type of mode_size from unsigned short
to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
(emit_mode_adjustments): Cope with polynomial vector sizes.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_SIZE.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_SIZE.
* auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
* builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
* caller-save.c (setup_save_areas): Likewise.
(replace_reg_with_saved_mem): Likewise.
* calls.c (emit_library_call_value_1): Likewise.
* combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
* combine.c (simplify_set, make_extraction, simplify_shift_const_1)
(gen_lowpart_for_combine): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* cse.c (equiv_constant, cse_insn): Likewise.
* cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
(cselib_subst_to_values): Likewise.
* dce.c (word_dce_process_block): Likewise.
* df-problems.c (df_word_lr_mark_ref): Likewise.
* dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
* dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
(concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
(rtl_for_decl_location): Likewise.
* emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
* expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
* expr.c (emit_group_load_1, clear_storage_hints): Likewise.
(emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
(expand_expr_real_1): Likewise.
* function.c (assign_parm_setup_block_p, assign_parm_setup_block)
(pad_below): Likewise.
* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
* gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
* ira.c (get_subreg_tracking_sizes): Likewise.
* ira-build.c (ira_create_allocno_objects): Likewise.
* ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
(ira_sort_regnos_for_alter_reg): Likewise.
* ira-costs.c (record_operand_costs): Likewise.
* lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
(resolve_simple_move): Likewise.
* lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
(process_addr_reg, simplify_operand_subreg, curr_insn_transform)
(lra_constraints): Likewise.
(CONST_POOL_OK_P): Reject variable-sized modes.
* lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
(add_pseudo_to_slot, lra_spill): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
* optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
(expand_mult_highpart, valid_multiword_target_p): Likewise.
* recog.c (offsettable_address_addr_space_p): Likewise.
* regcprop.c (maybe_mode_change): Likewise.
* reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
* regrename.c (build_def_use): Likewise.
* regstat.c (dump_reg_info): Likewise.
* reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
(find_reloads, find_reloads_subreg_address): Likewise.
* reload1.c (eliminate_regs_1): Likewise.
* rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
* simplify-rtx.c (avoid_constant_pool_reference): Likewise.
(simplify_binary_operation_1, simplify_subreg): Likewise.
* targhooks.c (default_function_arg_padding): Likewise.
(default_hard_regno_nregs, default_class_max_nregs): Likewise.
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
(verify_gimple_assign_ternary): Likewise.
* tree-inline.c (estimate_move_cost): Likewise.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
(get_address_cost_ainc): Likewise.
* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
(vect_supportable_dr_alignment): Likewise.
* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
(vectorizable_reduction): Likewise.
* tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
(vectorizable_operation, vectorizable_load): Likewise.
* tree.c (build_same_sized_truth_vector_type): Likewise.
* valtrack.c (cleanup_auto_inc_dec): Likewise.
* var-tracking.c (emit_note_insn_var_location): Likewise.
* config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
(ADDR_VEC_ALIGN): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256201
Richard Sandiford [Wed, 3 Jan 2018 21:42:42 +0000 (21:42 +0000)]
poly_int: GET_MODE_BITSIZE
This patch changes GET_MODE_BITSIZE from an unsigned short
to a poly_uint16.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_to_bits): Return a poly_uint16 rather than an
unsigned short.
(GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is polynomial.
* calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
* combine.c (make_extraction): Likewise.
* dse.c (find_shift_sequence): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
(extract_bit_field, extract_low_bits): Likewise.
* expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
(optimize_bitfield_assignment_op, expand_assignment): Likewise.
(store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
* fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
* reload.c (find_reloads): Likewise.
* reload1.c (alter_reg): Likewise.
* stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
* targhooks.c (default_secondary_memory_needed_mode): Likewise.
* tree-if-conv.c (predicate_mem_writes): Likewise.
* tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
* tree-vect-patterns.c (adjust_bool_pattern): Likewise.
* tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
* valtrack.c (dead_debug_insert_temp): Likewise.
* varasm.c (mergeable_constant_section): Likewise.
* config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Treat GET_MODE_BITSIZE
as polynomial.
gcc/c-family/
* c-ubsan.c (ubsan_instrument_shift): Treat GET_MODE_BITSIZE
as polynomial.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256200
Richard Sandiford [Wed, 3 Jan 2018 21:42:32 +0000 (21:42 +0000)]
poly_int: expand_assignment
This patch makes the CONCAT handing in expand_assignment cope with
polynomial mode sizes. The mode of the CONCAT must be complex,
so we can base the tests on the sizes of the real and imaginary
components.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_assignment): Cope with polynomial mode sizes
when assigning to a CONCAT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256199
Richard Sandiford [Wed, 3 Jan 2018 21:42:20 +0000 (21:42 +0000)]
poly_int: GET_MODE_PRECISION
This patch changes GET_MODE_PRECISION from an unsigned short
to a poly_uint16.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_precision): Change from unsigned short to
poly_uint16_pod.
(mode_to_precision): Return a poly_uint16 rather than an unsigned
short.
(GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
(HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
in which the mode is already known to be a scalar_int_mode.
* genmodes.c (emit_mode_precision): Change the type of mode_precision
from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
initializer.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_PRECISION.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_PRECISION.
* combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
as polynomial.
(try_combine, find_split_point, combine_simplify_rtx): Likewise.
(expand_field_assignment, make_extraction): Likewise.
(make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
(get_last_value): Likewise.
* convert.c (convert_to_integer_1): Likewise.
* cse.c (cse_insn): Likewise.
* expr.c (expand_expr_real_1): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
* optabs-query.c (can_atomic_load_p): Likewise.
* optabs.c (expand_atomic_load): Likewise.
(expand_atomic_store): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
* rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
* tree.h (type_has_mode_precision_p): Likewise.
* ubsan.c (instrument_si_overflow): Likewise.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Treat GET_MODE_PRECISION
as polynomial.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256198
Richard Sandiford [Wed, 3 Jan 2018 21:42:12 +0000 (21:42 +0000)]
poly_int: TYPE_VECTOR_SUBPARTS
This patch changes TYPE_VECTOR_SUBPARTS to a poly_uint64. The value is
encoded in the 10-bit precision field and was previously always stored
as a simple log2 value. The challenge was to use this 10 bits to
encode the number of elements in variable-length vectors, so that
we didn't need to increase the size of the tree.
In practice the number of vector elements should always have the form
N + N * X (where X is the runtime value), and as for constant-length
vectors, N must be a power of 2 (even though X itself might not be).
The patch therefore uses the low 8 bits to encode log2(N) and bit
8 to select between constant-length and variable-length vectors.
Targets without variable-length vectors continue to use the old scheme.
A new valid_vector_subparts_p function tests whether a given number
of elements can be encoded. This is false for the vector modes that
represent an LD3 or ST3 vector triple (which we want to treat as arrays
of vectors rather than single vectors).
Most of the patch is mechanical; previous patches handled the changes
that weren't entirely straightforward.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
polynomial numbers of units.
(SET_TYPE_VECTOR_SUBPARTS): Likewise.
(valid_vector_subparts_p): New function.
(build_vector_type): Remove temporary shim and take the number
of units as a poly_uint64 rather than an int.
(build_opaque_vector_type): Take the number of units as a
poly_uint64 rather than an int.
* tree.c (build_vector_from_ctor): Handle polynomial
TYPE_VECTOR_SUBPARTS.
(type_hash_canon_hash, type_cache_hasher::equal): Likewise.
(uniform_vector_p, vector_type_mode, build_vector): Likewise.
(build_vector_from_val): If the number of units is variable,
use build_vec_duplicate_cst for constant operands and
VEC_DUPLICATE_EXPR otherwise.
(make_vector_type): Remove temporary is_constant ().
(build_vector_type, build_opaque_vector_type): Take the number of
units as a poly_uint64 rather than an int.
(check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
VECTOR_CST_NELTS.
* cfgexpand.c (expand_debug_expr): Likewise.
* expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
(store_constructor, expand_expr_real_1): Likewise.
(const_scalar_mask_from_tree): Likewise.
* fold-const-call.c (fold_const_reduction): Likewise.
* fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
(operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
(native_encode_vector, vec_cst_ctor_to_array): Likewise.
(fold_relational_const): Likewise.
(native_interpret_vector): Likewise. Change the size from an
int to an unsigned int.
* gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
TYPE_VECTOR_SUBPARTS.
(gimple_fold_indirect_ref, gimple_build_vector): Likewise.
(gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
duplicating a non-constant operand into a variable-length vector.
* hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
* ipa-icf.c (sem_variable::equals): Likewise.
* match.pd: Likewise.
* omp-simd-clone.c (simd_clone_subparts): Likewise.
* print-tree.c (print_node): Likewise.
* stor-layout.c (layout_type): Likewise.
* targhooks.c (default_builtin_vectorization_cost): Likewise.
* tree-cfg.c (verify_gimple_comparison): Likewise.
(verify_gimple_assign_binary): Likewise.
(verify_gimple_assign_ternary): Likewise.
(verify_gimple_assign_single): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
(simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
* tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
(vect_grouped_load_supported, vect_permute_load_chain): Likewise.
(vect_shift_permute_load_chain): Likewise.
* tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
(expand_vector_condition, optimize_vector_constructor): Likewise.
(lower_vec_perm, get_compute_type): Likewise.
* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
(get_initial_defs_for_reduction, vect_transform_loop): Likewise.
* tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
(vect_recog_mask_conversion_pattern): Likewise.
* tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
(vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
(get_group_load_store_type, vectorizable_mask_load_store): Likewise.
(vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
(vectorizable_shift, vectorizable_operation, vectorizable_store)
(vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
(supportable_widening_operation): Likewise.
(supportable_narrowing_operation): Likewise.
* tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
Likewise.
* varasm.c (output_constant): Likewise.
gcc/ada/
* gcc-interface/utils.c (gnat_types_compatible_p): Handle
polynomial TYPE_VECTOR_SUBPARTS.
gcc/brig/
* brigfrontend/brig-to-generic.cc (get_unsigned_int_type): Handle
polynomial TYPE_VECTOR_SUBPARTS.
* brigfrontend/brig-util.h (gccbrig_type_vector_subparts): Likewise.
gcc/c-family/
* c-common.c (vector_types_convertible_p, c_build_vec_perm_expr)
(convert_vector_to_array_for_subscript): Handle polynomial
TYPE_VECTOR_SUBPARTS.
(c_common_type_for_mode): Check valid_vector_subparts_p.
* c-pretty-print.c (pp_c_initializer_list): Handle polynomial
VECTOR_CST_NELTS.
gcc/c/
* c-typeck.c (comptypes_internal, build_binary_op): Handle polynomial
TYPE_VECTOR_SUBPARTS.
gcc/cp/
* constexpr.c (cxx_eval_array_reference): Handle polynomial
VECTOR_CST_NELTS.
(cxx_fold_indirect_ref): Handle polynomial TYPE_VECTOR_SUBPARTS.
* call.c (build_conditional_expr_1): Likewise.
* decl.c (cp_finish_decomp): Likewise.
* mangle.c (write_type): Likewise.
* typeck.c (structural_comptypes): Likewise.
(cp_build_binary_op): Likewise.
* typeck2.c (process_init_constructor_array): Likewise.
gcc/fortran/
* trans-types.c (gfc_type_for_mode): Check valid_vector_subparts_p.
gcc/lto/
* lto-lang.c (lto_type_for_mode): Check valid_vector_subparts_p.
* lto.c (hash_canonical_type): Handle polynomial TYPE_VECTOR_SUBPARTS.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Check valid_vector_subparts_p.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256197
Richard Sandiford [Wed, 3 Jan 2018 21:42:01 +0000 (21:42 +0000)]
poly_int: vect_permute_load/store_chain
The GET_MODE_NUNITS patch made vect_grouped_store_supported and
vect_grouped_load_supported check for a constant number of elements,
so vect_permute_store_chain and vect_permute_load_chain can assert
for that. This patch adds commentary to that effect; the actual
asserts will be added by a later, more mechanical, patch.
The patch also reorganises the function so that the asserts
are linked specifically to code that builds permute vectors
element-by-element. This allows a later patch to add support
for some variable-length permutes.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
so that both the length == 3 and length != 3 cases set up their
own permute vectors. Add comments explaining why we know the
number of elements is constant.
(vect_permute_load_chain): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256196
Richard Sandiford [Wed, 3 Jan 2018 21:41:49 +0000 (21:41 +0000)]
poly_int: GET_MODE_NUNITS
This patch changes GET_MODE_NUNITS from unsigned char
to poly_uint16, although it remains a macro when compiling
target code with NUM_POLY_INT_COEFFS == 1.
We can handle permuted loads and stores for variable nunits if
the number of statements is a power of 2, but not otherwise.
The to_constant call in make_vector_type goes away in a later patch.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_nunits): Change from unsigned char to
poly_uint16_pod.
(ONLY_FIXED_SIZE_MODES): New macro.
(pod_mode::measurement_type, scalar_int_mode::measurement_type)
(scalar_float_mode::measurement_type, scalar_mode::measurement_type)
(complex_mode::measurement_type, fixed_size_mode::measurement_type):
New typedefs.
(mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
(GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
* genmodes.c (ZERO_COEFFS): New macro.
(emit_mode_nunits_inline): Make mode_nunits_inline return a
poly_uint16.
(emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
Use ZERO_COEFFS when emitting initializers.
* data-streamer.h (bp_pack_poly_value): New function.
(bp_unpack_poly_value): Likewise.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_NUNITS.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_NUNITS.
* tree.c (make_vector_type): Remove temporary shim and make
the real function take the number of units as a poly_uint64
rather than an int.
(build_vector_type_for_mode): Handle polynomial nunits.
* dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
* emit-rtl.c (const_vec_series_p_1): Likewise.
(gen_rtx_CONST_VECTOR): Likewise.
* fold-const.c (test_vec_duplicate_folding): Likewise.
* genrecog.c (validate_pattern): Likewise.
* optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
* optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
(shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
(expand_vec_cond_expr, expand_mult_highpart): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-loop.c (have_whole_vector_shift): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_const_unary_operation, simplify_binary_operation_1)
(simplify_const_binary_operation, simplify_ternary_operation)
(test_vector_ops_duplicate, test_vector_ops): Likewise.
(simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
instead of CONST_VECTOR_NUNITS.
* varasm.c (output_constant_pool_2): Likewise.
* rtx-vector-builder.c (rtx_vector_builder::build): Only include the
explicit-encoded elements in the XVEC for variable-length vectors.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Handle polynomial
GET_MODE_NUNITS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256195
Richard Sandiford [Wed, 3 Jan 2018 21:39:58 +0000 (21:39 +0000)]
Use partial_subreg_p in curr_insn_transform
Use partial_subreg_p in code that was added since the initial patch
that introduced this function.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
From-SVN: r256194
Richard Sandiford [Wed, 3 Jan 2018 21:39:45 +0000 (21:39 +0000)]
Add a fixed_size_mode_pod class
This patch adds a POD version of fixed_size_mode. The only current use
is for storing the __builtin_apply and __builtin_result register modes,
which were made fixed_size_modes by the previous patch.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (fixed_size_mode): Declare.
(fixed_size_mode_pod): New typedef.
* builtins.h (target_builtins::x_apply_args_mode)
(target_builtins::x_apply_result_mode): Change type to
fixed_size_mode_pod.
* builtins.c (apply_args_size, apply_result_size, result_vector)
(expand_builtin_apply_args_1, expand_builtin_apply)
(expand_builtin_return): Update accordingly.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256193
Richard Sandiford [Wed, 3 Jan 2018 21:39:33 +0000 (21:39 +0000)]
Directly operate on CONST_VECTOR encoding
This patch makes some pieces of code operate directly on the new
CONST_VECTOR encoding.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* cse.c (hash_rtx_cb): Hash only the encoded elements.
* cselib.c (cselib_hash_rtx): Likewise.
* expmed.c (make_tree): Build VECTOR_CSTs directly from the
CONST_VECTOR encoding.
From-SVN: r256192
Jeff Law [Wed, 3 Jan 2018 21:25:10 +0000 (14:25 -0700)]
re PR target/83641 (-fstack-clash-protection generates incorrect CFI on i386)
PR target/83641
* config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
and add REG_CFA_ADJUST_CFA notes in that case to both insns.
PR target/83641
* config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
explicitly probe *sp in a noreturn function if there were any callee
register saves or frame pointer is needed.
PR target/83641
* gcc.target/i386/stack-check-17.c: New test.
* gcc.target/i386/stack-check-12.c: Drop unnecessary asm.
From-SVN: r256191
Jakub Jelinek [Wed, 3 Jan 2018 20:59:50 +0000 (21:59 +0100)]
re PR debug/83621 (ICE: in simplify_subreg, at simplify-rtx.c:6293 with -O -g)
PR debug/83621
* cfgexpand.c (expand_debug_expr): Return NULL if mode is
BLKmode for ternary, binary or unary expressions.
* gcc.dg/pr83621.c: New test.
From-SVN: r256190
Jakub Jelinek [Wed, 3 Jan 2018 20:58:48 +0000 (21:58 +0100)]
re PR debug/83645 (ICE: in get_insn_template, at final.c:2100 with -gstatement-frontiers)
PR debug/83645
* var-tracking.c (delete_vta_debug_insn): New inline function.
(delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
insns from get_insns () to NULL instead of each bb separately.
Use delete_vta_debug_insn. No longer static.
(vt_debug_insns_local, variable_tracking_main_1): Adjust
delete_vta_debug_insns callers.
* rtl.h (delete_vta_debug_insns): Declare.
* final.c (rest_of_handle_final): Call delete_vta_debug_insns
instead of variable_tracking_main.
* gcc.dg/pr83645.c: New test.
From-SVN: r256189
Martin Sebor [Wed, 3 Jan 2018 20:43:47 +0000 (20:43 +0000)]
PR c/83559 - -Wsuggest-attribute=const conflicts with -Wattributes warning about const attribute on function returning void
gcc/ChangeLog:
PR c/83559
* doc/extend.texi (attribute const): Fix a typo.
* ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
issuing -Wsuggest-attribute for void functions.
gcc/testsuite/ChangeLog:
PR c/83559
* gcc.dg/const-2.c: New test.
* gcc.dg/pure-3.c: New test.
From-SVN: r256188
Martin Sebor [Wed, 3 Jan 2018 20:38:30 +0000 (20:38 +0000)]
gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use offset_int::from instead of wide_int::to_shwi.
gcc/ChangeLog:
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
offset_int::from instead of wide_int::to_shwi.
(maybe_diag_overlap): Remove assertion.
Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
* gimple-ssa-sprintf.c (format_directive): Same.
(parse_directive): Same.
(sprintf_dom_walker::compute_format_length): Same.
(try_substitute_return_value): Same.
gcc/testsuite/ChangeLog:
* gcc.dg/Wrestrict-3.c: New test.
From-SVN: r256187
Jakub Jelinek [Wed, 3 Jan 2018 20:37:41 +0000 (21:37 +0100)]
re PR c++/83555 (Unnecessary null check when static_cast is used with references.)
PR c++/83555
* typeck.c (build_static_cast_1): For static casts to reference types,
call build_base_path with flag_delete_null_pointer_checks as nonnull
instead of always false. When -fsanitize=null, call
ubsan_maybe_instrument_reference on the NULL reference INTEGER_CST.
* cp-gimplify.c (cp_genericize_r): Don't walk subtrees of UBSAN_NULL
call if the first argument is INTEGER_CST with REFERENCE_TYPE.
* g++.dg/opt/pr83555.C: New test.
* g++.dg/ubsan/pr83555.C: New test.
From-SVN: r256186
Ville Voutilainen [Wed, 3 Jan 2018 20:33:10 +0000 (22:33 +0200)]
Protect optional's deduction guide with the feature macro
* include/std/optional: Use the feature macro.
From-SVN: r256185
David Malcolm [Wed, 3 Jan 2018 19:01:15 +0000 (19:01 +0000)]
Fix warning in gcc.dg/plugin/expensive_selftests_plugin.c with !CHECKING_P
gcc/testsuite/ChangeLog:
* gcc.dg/plugin/expensive-selftests-1.c: Update regexp to handle
the !CHECKING_P case by expecting a note.
* gcc.dg/plugin/expensive_selftests_plugin.c (plugin_init): Issue
a note for the !CHECKING_P case, and move the return statement
outside of #if CHECKING_P guard.
From-SVN: r256183
Jeff Law [Wed, 3 Jan 2018 18:22:28 +0000 (11:22 -0700)]
re PR middle-end/83654 (-fstack-clash-protection probes below the stack pointer for VLA with constant size)
PR middle-end/83654
* explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
non-constant residual for zero at runtime and avoid probing in
that case. Reorganize code for trailing problem to mirror handling
of the residual.
PR middle-end/83654
* gcc.target/i386/stack-check-18.c: New test.
* gcc.target/i386/stack-check-19.c: New test.
From-SVN: r256182
Martin Sebor [Wed, 3 Jan 2018 16:26:49 +0000 (16:26 +0000)]
PR tree-optimization/83501 - strlen(a) not folded after strcpy(a, "...")
gcc/testsuite/ChangeLog:
* c-c++-common/Warray-bounds-3.c: Remove xfail.
From-SVN: r256181
Prathamesh Kulkarni [Wed, 3 Jan 2018 16:07:32 +0000 (16:07 +0000)]
re PR tree-optimization/83501 (strlen(a) not folded after strcpy(a, "..."))
2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR tree-optimization/83501
* tree-ssa-strlen.c (get_string_cst): New.
(handle_char_store): Call get_string_cst.
testsuite/
* gcc.dg/tree-ssa/pr83501.c: New test.
From-SVN: r256180
Nathan Sidwell [Wed, 3 Jan 2018 16:01:31 +0000 (16:01 +0000)]
[PR c++/83667] Fix tree_dump ICE
https://gcc.gnu.org/ml/gcc-patches/2018-01/msg00148.html
PR c++/83667
* method.c (make_alias_for): Copy DECL_CONTEXT.
PR c++/83667
* g++.dg/ipa/pr83667.C: New.
From-SVN: r256179
Martin Liska [Wed, 3 Jan 2018 14:53:39 +0000 (15:53 +0100)]
Clean-up EH after strlen transformation (PR tree-optimization/83593).
2018-01-03 Martin Liska <mliska@suse.cz>
PR tree-optimization/83593
* tree-ssa-strlen.c: Include tree-cfg.h.
(strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
(strlen_dom_walker): Add new member variable m_cleanup_cfg.
(strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
to false.
(strlen_dom_walker::before_dom_children): Call
gimple_purge_dead_eh_edges. Dump tranformation with details
dump flags.
(strlen_dom_walker::before_dom_children): Update call by adding
new argument cleanup_eh.
(pass_strlen::execute): Return TODO_cleanup_cfg if needed.
2018-01-03 Martin Liska <mliska@suse.cz>
PR tree-optimization/83593
* gcc.dg/pr83593.c: New test.
From-SVN: r256178
Martin Liska [Wed, 3 Jan 2018 14:15:58 +0000 (15:15 +0100)]
Do not inline variadic thunks (PR ipa/83549).
2018-01-03 Martin Liska <mliska@suse.cz>
PR ipa/83549
* cif-code.def (VARIADIC_THUNK): New enum value.
* ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
thunks.
2018-01-03 Martin Liska <mliska@suse.cz>
PR ipa/83549
* g++.dg/ipa/pr83549.C: New test.
From-SVN: r256177
Marek Polacek [Wed, 3 Jan 2018 13:30:00 +0000 (13:30 +0000)]
re PR c++/83592 (Annoying -Wparentheses warnings)
PR c++/83592
* decl.c (grokdeclarator): Don't warn about MVP in typename context.
* g++.dg/warn/mvp2.C: New test.
From-SVN: r256176
Jakub Jelinek [Wed, 3 Jan 2018 12:17:05 +0000 (13:17 +0100)]
re PR preprocessor/83602 (ICE in cpp_macro_definition_location(cpp_hashnode*) on invalid code)
PR preprocessor/83602
* name-lookup.c (lookup_name_fuzzy): Don't use macro_use_before_def
for builtin macros.
* g++.dg/cpp/pr83602.C: New test.
From-SVN: r256175
Jakub Jelinek [Wed, 3 Jan 2018 12:16:13 +0000 (13:16 +0100)]
re PR c++/83634 (ICE in useless_type_conversion_p, at gimple-expr.c:86)
PR c++/83634
* cp-gimplify.c (cp_fold) <case NOP_EXPR>: If the operand folds to
error_mark_node, return error_mark_node.
* g++.dg/parse/pr83634.C: New test.
From-SVN: r256174
Thomas Koenig [Wed, 3 Jan 2018 11:31:20 +0000 (11:31 +0000)]
re PR fortran/83664 (Eoshift accepts missing boundary for non-default types)
2018-01-03 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/83664
* check.c (gfc_check_eoshift): Error for missing boundary if array
is not one of the standard types.
2018-01-03 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/83664
* gfortran.dg/eoshift_7.f90: New test.
From-SVN: r256171
Jan Beulich [Wed, 3 Jan 2018 10:42:08 +0000 (10:42 +0000)]
x86: don't use AVX512BW vmovdqu variants without -mavx512bw
Simply mirror the MODE_XI logic of handling unaligned operands in
mov<mode>_internal into MODE_TI / MODE_OI handling.
gcc/
2018-01-03 Jan Beulich <jbeulich@suse.com>
* sse.md (mov<mode>_internal): Tighten condition for when to use
vmovdqu<ssescalarsize> for TI and OI modes.
gcc/testsuite/
2018-01-03 Jan Beulich <jbeulich@suse.com>
* gcc.target/i386/avx512vl-no-vmovdqu8.c,
gcc.target/i386/avx512vl-no-vmovdqu16.c: New.
From-SVN: r256170
Jakub Jelinek [Wed, 3 Jan 2018 10:03:58 +0000 (11:03 +0100)]
Update copyright years.
From-SVN: r256169
Jakub Jelinek [Wed, 3 Jan 2018 10:00:43 +0000 (11:00 +0100)]
* update-copyright.py: Skip pdt-5.f03 in gfortran.dg subdir.
From-SVN: r256168
Martin Liska [Wed, 3 Jan 2018 09:24:40 +0000 (10:24 +0100)]
Handle noipa attribute in IPA visibility (PR ipa/83594).
2018-01-03 Martin Liska <mliska@suse.cz>
PR ipa/83594
* ipa-visibility.c (function_and_variable_visibility): Skip
functions with noipa attribure.
2018-01-03 Martin Liska <mliska@suse.cz>
PR ipa/83594
* gcc.dg/ipa/pr83594.c: New test.
From-SVN: r256167
Jakub Jelinek [Wed, 3 Jan 2018 09:17:54 +0000 (10:17 +0100)]
gcc.c (process_command): Update copyright notice dates.
gcc/
* gcc.c (process_command): Update copyright notice dates.
* gcov-dump.c (print_version): Ditto.
* gcov.c (print_version): Ditto.
* gcov-tool.c (print_version): Ditto.
* gengtype.c (create_file): Ditto.
* doc/cpp.texi: Bump @copying's copyright year.
* doc/cppinternals.texi: Ditto.
* doc/gcc.texi: Ditto.
* doc/gccint.texi: Ditto.
* doc/gcov.texi: Ditto.
* doc/install.texi: Ditto.
* doc/invoke.texi: Ditto.
gcc/fortran/
* gfortranspec.c (lang_specific_driver): Update copyright notice
dates.
* gfc-internals.texi: Bump @copying's copyright year.
* gfortran.texi: Ditto.
* intrinsic.texi: Ditto.
* invoke.texi: Ditto.
gcc/ada/
* gnat_ugn.texi: Bump @copying's copyright year.
* gnat_rm.texi: Likewise.
gcc/go/
* gccgo.texi: Bump @copyrights-go year.
libitm/
* libitm.texi: Bump @copying's copyright year.
libgomp/
* libgomp.texi: Bump @copying's copyright year.
libquadmath/
* libquadmath.texi: Bump @copying's copyright year.
From-SVN: r256166
Richard Sandiford [Wed, 3 Jan 2018 09:01:52 +0000 (09:01 +0000)]
poly_int: vector_builder element count
This patch changes the number of elements in a vector being built
by a vector_builder from unsigned int to poly_uint64. The case
in which it isn't a constant is the one that motivated adding
the vector encoding in the first place.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* vector-builder.h (vector_builder::m_full_nelts): Change from
unsigned int to poly_uint64.
(vector_builder::full_nelts): Update prototype accordingly.
(vector_builder::new_vector): Likewise.
(vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
(vector_builder::operator ==): Likewise.
(vector_builder::finalize): Likewise.
* int-vector-builder.h (int_vector_builder::int_vector_builder):
Take the number of elements as a poly_uint64 rather than an
unsigned int.
* vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
from unsigned int to poly_uint64.
(vec_perm_indices::vec_perm_indices): Update prototype accordingly.
(vec_perm_indices::new_vector): Likewise.
(vec_perm_indices::length): Likewise.
(vec_perm_indices::nelts_per_input): Likewise.
(vec_perm_indices::input_nelts): Likewise.
* vec-perm-indices.c (vec_perm_indices::new_vector): Take the
number of elements per input as a poly_uint64 rather than an
unsigned int. Use the original encoding for variable-length
vectors, rather than clamping each individual element.
For the second and subsequent elements in each pattern,
clamp the step and base before clamping their sum.
(vec_perm_indices::series_p): Handle polynomial element counts.
(vec_perm_indices::all_in_range_p): Likewise.
(vec_perm_indices_to_tree): Likewise.
(vec_perm_indices_to_rtx): Likewise.
* tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
* tree-vector-builder.c (tree_vector_builder::new_unary_operation)
(tree_vector_builder::new_binary_operation): Handle polynomial
element counts. Return false if we need to know the number
of elements at compile time.
* fold-const.c (fold_vec_perm): Punt if the number of elements
isn't known at compile time.
From-SVN: r256165
Richard Sandiford [Wed, 3 Jan 2018 08:59:18 +0000 (08:59 +0000)]
poly_int: vec_perm_indices element type
This patch changes the vec_perm_indices element type from HOST_WIDE_INT
to poly_int64, so that it can represent indices into a variable-length
vector.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* vec-perm-indices.h (vec_perm_builder): Change element type
from HOST_WIDE_INT to poly_int64.
(vec_perm_indices::element_type): Update accordingly.
(vec_perm_indices::clamp): Handle polynomial element_types.
* vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
(vec_perm_indices::all_in_range_p): Likewise.
(tree_to_vec_perm_builder): Check for poly_int64 trees rather
than shwi trees.
* vector-builder.h (vector_builder::stepped_sequence_p): Handle
polynomial vec_perm_indices element types.
* int-vector-builder.h (int_vector_builder::equal_p): Likewise.
* fold-const.c (fold_vec_perm): Likewise.
* optabs.c (shift_amt_for_vec_perm_mask): Likewise.
* tree-vect-generic.c (lower_vec_perm): Likewise.
* tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
* config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
element type to HOST_WIDE_INT.
From-SVN: r256164
Richard Sandiford [Wed, 3 Jan 2018 07:19:14 +0000 (07:19 +0000)]
poly_int: memrefs_conflict_p
The xsize and ysize arguments to memrefs_conflict_p are encode such
that:
- 0 means the size is unknown
- >0 means the size is known
- <0 means that the negative of the size is a worst-case size after
alignment
In other words, the sign effectively encodes a boolean; it isn't
meant to be taken literally. With poly_ints these correspond to:
- must_eq (..., 0)
- may_gt (..., 0)
- may_lt (..., 0)
respectively.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* alias.c (addr_side_effect_eval): Take the size as a poly_int64
rather than an int. Use plus_constant.
(memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256163
Richard Sandiford [Wed, 3 Jan 2018 07:19:04 +0000 (07:19 +0000)]
poly_int: struct_value_size
This patch makes calls.c treat struct_value_size (one of the
operands to a call pattern) as polynomial.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* calls.c (emit_call_1, expand_call): Change struct_value_size from
a HOST_WIDE_INT to a poly_int64.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256162
Richard Sandiford [Wed, 3 Jan 2018 07:18:58 +0000 (07:18 +0000)]
poly_int: load_register_parameters
This patch makes load_register_parameters cope with polynomial sizes.
The requirement here is that any register parameters with non-constant
sizes must either have a specific mode (e.g. a variable-length vector
mode) or must be represented with a PARALLEL. This is in practice
already a requirement for parameters passed in vector registers,
since the default behaviour of splitting parameters into words doesn't
make sense for them.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* calls.c (load_register_parameters): Cope with polynomial
mode sizes. Require a constant size for BLKmode parameters
that aren't described by a PARALLEL. If BLOCK_REG_PADDING
forces a parameter to be padded at the lsb end in order to
fill a complete number of words, require the parameter size
to be ordered wrt UNITS_PER_WORD.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256161
Richard Sandiford [Wed, 3 Jan 2018 07:18:52 +0000 (07:18 +0000)]
poly_int: alter_reg
This patch makes alter_reg cope with polynomial mode sizes.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* reload1.c (spill_stack_slot_width): Change element type
from unsigned int to poly_uint64_pod.
(alter_reg): Treat mode sizes as polynomial.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256160
Richard Sandiford [Wed, 3 Jan 2018 07:18:45 +0000 (07:18 +0000)]
poly_int: reloading complex subregs
This patch splits out a condition that is common to both push_reload
and reload_inner_reg_of_subreg.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* reload.c (complex_word_subreg_p): New function.
(reload_inner_reg_of_subreg, push_reload): Use it.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256159
Richard Sandiford [Wed, 3 Jan 2018 07:18:38 +0000 (07:18 +0000)]
poly_int: process_alt_operands
This patch makes process_alt_operands check that the mode sizes
are ordered, so that match_reload can validly treat them as subregs
of one another.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* lra-constraints.c (process_alt_operands): Reject matched
operands whose sizes aren't ordered.
(match_reload): Refer to this check here.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256158
Richard Sandiford [Wed, 3 Jan 2018 07:18:28 +0000 (07:18 +0000)]
poly_int: expand_ifn_atomic_compare_exchange_into_call
This patch makes the mode size assumptions in
expand_ifn_atomic_compare_exchange_into_call a bit more
explicit, so that a later patch can add a to_constant () call.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
that the mode size is in the set {1, 2, 4, 8, 16}.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256157
Richard Sandiford [Wed, 3 Jan 2018 07:18:21 +0000 (07:18 +0000)]
poly_int: adjust_mems
This patch makes the var-tracking.c handling of autoinc addresses
cope with polynomial mode sizes.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
Use plus_constant instead of gen_rtx_PLUS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256156
Richard Sandiford [Wed, 3 Jan 2018 07:18:13 +0000 (07:18 +0000)]
poly_int: PUSH_ROUNDING
PUSH_ROUNDING is difficult to convert to a hook since there is still
a lot of conditional code based on it. It isn't clear that a direct
conversion with checks for null hooks is the right thing to do.
Rather than untangle that, this patch converts all implementations
that do something to out-of-line functions that have the same
interface as a hook would have. This should at least help towards
any future hook conversion.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
* config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
* config/cr16/cr16.c (cr16_push_rounding): ...this new function.
* config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
* config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
* config/h8300/h8300.c (h8300_push_rounding): ...this new function.
* config/i386/i386-protos.h (ix86_push_rounding): Declare.
* config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
* config/i386/i386.c (ix86_push_rounding): ...this new function.
* config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
a poly_int64.
* config/m32c/m32c.c (m32c_push_rounding): Likewise.
* config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
* config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
* config/m68k/m68k.c (m68k_push_rounding): ...this new function.
* config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
* config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
* config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
* config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
* config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
* config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
function.
* expr.c (emit_move_resolve_push): Treat the input and result
of PUSH_ROUNDING as a poly_int64.
(emit_move_complex_push, emit_single_push_insn_1): Likewise.
(emit_push_insn): Likewise.
* lra-eliminations.c (mark_not_eliminable): Likewise.
* recog.c (push_operand): Likewise.
* reload1.c (elimination_effects): Likewise.
* rtlanal.c (nonzero_bits1): Likewise.
* calls.c (store_one_arg): Likewise. Require the padding to be
known at compile time.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256155
Richard Sandiford [Wed, 3 Jan 2018 07:18:05 +0000 (07:18 +0000)]
poly_int: emit_single_push_insn_1
This patch makes emit_single_push_insn_1 cope with polynomial mode sizes.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
Use plus_constant instead of gen_rtx_PLUS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256154
Richard Sandiford [Wed, 3 Jan 2018 07:17:57 +0000 (07:17 +0000)]
poly_int: set_inc_state
This trivial patch makes auto-inc-dec.c:set_inc_state take a poly_int64.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
rather than an int.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256153
Richard Sandiford [Wed, 3 Jan 2018 07:17:52 +0000 (07:17 +0000)]
poly_int: expand_expr_real_1
This patch makes the VIEW_CONVERT_EXPR handling in expand_expr_real_1
cope with polynomial type and mode sizes.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_expr_real_1): Use tree_to_poly_uint64
instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
via stack temporaries. Treat the mode size as polynomial too.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256152
Richard Sandiford [Wed, 3 Jan 2018 07:17:46 +0000 (07:17 +0000)]
poly_int: expand_expr_real_2
This patch makes expand_expr_real_2 cope with polynomial mode sizes
when handling conversions involving a union type.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_expr_real_2): When handling conversions involving
unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
as a poly_uint64 too.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256151
Richard Sandiford [Wed, 3 Jan 2018 07:17:39 +0000 (07:17 +0000)]
poly_int: subreg_get_info
This patch makes subreg_get_info handle polynomial sizes.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256150
Richard Sandiford [Wed, 3 Jan 2018 07:17:33 +0000 (07:17 +0000)]
poly_int: REGMODE_NATURAL_SIZE
This patch makes target-independent code that uses REGMODE_NATURAL_SIZE
treat it as a poly_int rather than a constant.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (can_change_dest_mode): Handle polynomial
REGMODE_NATURAL_SIZE.
* expmed.c (store_bit_field_1): Likewise.
* expr.c (store_constructor): Likewise.
* emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
and polynomial REGMODE_NATURAL_SIZE.
(gen_lowpart_common): Likewise.
* reginfo.c (record_subregs_of_mode): Likewise.
* rtlanal.c (read_modify_subreg_p): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256149
Richard Sandiford [Wed, 3 Jan 2018 07:17:27 +0000 (07:17 +0000)]
poly_int: expand_vector_ubsan_overflow
This patch makes expand_vector_ubsan_overflow cope with a polynomial
number of elements.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
numbers of elements.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256148
Richard Sandiford [Wed, 3 Jan 2018 07:17:18 +0000 (07:17 +0000)]
poly_int: folding BIT_FIELD_REFs on vectors
This patch makes the:
(BIT_FIELD_REF CONSTRUCTOR@0 @1 @2)
folder cope with polynomial numbers of elements.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* match.pd: Cope with polynomial numbers of vector elements.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256147
Richard Sandiford [Wed, 3 Jan 2018 07:17:12 +0000 (07:17 +0000)]
poly_int: fold_indirect_ref_1
This patch makes fold_indirect_ref_1 handle polynomial offsets in
a POINTER_PLUS_EXPR. The specific reason for doing this now is
to handle:
(tree_to_uhwi (part_width) / BITS_PER_UNIT
* TYPE_VECTOR_SUBPARTS (op00type));
when TYPE_VECTOR_SUBPARTS becomes a poly_int.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
in a POINTER_PLUS_EXPR.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256146
Richard Sandiford [Wed, 3 Jan 2018 07:17:06 +0000 (07:17 +0000)]
poly_int: omp-simd-clone.c
This patch adds a wrapper around TYPE_VECTOR_SUBPARTS for omp-simd-clone.c.
Supporting SIMD clones for variable-length vectors is post GCC8 work.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* omp-simd-clone.c (simd_clone_subparts): New function.
(simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
(ipa_simd_modify_function_body): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256145
Richard Sandiford [Wed, 3 Jan 2018 07:17:00 +0000 (07:17 +0000)]
poly_int: brig vector elements
This patch adds a brig-specific wrapper around TYPE_VECTOR_SUBPARTS,
since presumably it will never need to support variable vector lengths.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/brig/
* brigfrontend/brig-util.h (gccbrig_type_vector_subparts): New
function.
* brigfrontend/brig-basic-inst-handler.cc
(brig_basic_inst_handler::build_shuffle): Use it instead of
TYPE_VECTOR_SUBPARTS.
(brig_basic_inst_handler::build_unpack): Likewise.
(brig_basic_inst_handler::build_pack): Likewise.
(brig_basic_inst_handler::build_unpack_lo_or_hi): Likewise.
(brig_basic_inst_handler::operator ()): Likewise.
(brig_basic_inst_handler::build_lower_element_broadcast): Likewise.
* brigfrontend/brig-code-entry-handler.cc
(brig_code_entry_handler::get_tree_cst_for_hsa_operand): Likewise.
(brig_code_entry_handler::get_comparison_result_type): Likewise.
(brig_code_entry_handler::expand_or_call_builtin): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256144
Richard Sandiford [Wed, 3 Jan 2018 07:16:53 +0000 (07:16 +0000)]
poly_int: tree-vect-generic.c
This patch makes tree-vect-generic.c cope with variable-length vectors.
Decomposition is only supported for constant-length vectors, since we
should never generate unsupported variable-length operations.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
(expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
(expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
(expand_vector_condition, vector_element): Likewise.
(subparts_gt): New function.
(get_compute_type): Use subparts_gt.
(count_type_subparts): Delete.
(expand_vector_operations_1): Use subparts_gt instead of
count_type_subparts.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256143
Richard Sandiford [Wed, 3 Jan 2018 07:16:47 +0000 (07:16 +0000)]
poly_int: vect_no_alias_p
This patch replaces the two-state vect_no_alias_p with a three-state
vect_compile_time_alias that handles polynomial segment lengths.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-data-refs.c (vect_no_alias_p): Replace with...
(vect_compile_time_alias): ...this new function. Do the calculation
on poly_ints rather than trees.
(vect_prune_runtime_alias_test_list): Update call accordingly.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256142
Richard Sandiford [Wed, 3 Jan 2018 07:16:41 +0000 (07:16 +0000)]
poly_int: two-operation SLP
This patch makes two-operation SLP handle but reject variable-length
vectors. Adding support for this is a post-GCC8 thing.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
numbers of units.
(vect_schedule_slp_instance): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256141
Richard Sandiford [Wed, 3 Jan 2018 07:16:35 +0000 (07:16 +0000)]
poly_int: vect_get_constant_vectors
For now, vect_get_constant_vectors can only cope with constant-length
vectors, although a patch after the main SVE submission relaxes this.
This patch adds an appropriate guard for variable-length vectors.
The TYPE_VECTOR_SUBPARTS use in vect_get_constant_vectors will then
have a to_constant call when TYPE_VECTOR_SUBPARTS becomes a poly_int.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
constant and extern definitions for variable-length vectors.
(vect_get_constant_vectors): Note that the number of units
is known to be constant.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256140
Richard Sandiford [Wed, 3 Jan 2018 07:16:28 +0000 (07:16 +0000)]
poly_int: vectorizable_conversion
This patch makes vectorizable_conversion cope with variable-length
vectors. We already require the number of elements in one vector
to be a multiple of the number of elements in the other vector,
so the patch uses that to choose between widening and narrowing.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-stmts.c (vectorizable_conversion): Treat the number
of units as polynomial. Choose between WIDE and NARROW based
on multiple_p.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256139
Richard Sandiford [Wed, 3 Jan 2018 07:16:22 +0000 (07:16 +0000)]
poly_int: vectorizable_simd_clone_call
This patch makes vectorizable_simd_clone_call cope with variable-length
vectors. For now we don't support SIMD clones for variable-length
vectors; this will be post GCC 8 material.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-stmts.c (simd_clone_subparts): New function.
(vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256138
Richard Sandiford [Wed, 3 Jan 2018 07:16:14 +0000 (07:16 +0000)]
poly_int: vectorizable_call
This patch makes vectorizable_call handle variable-length vectors.
The only substantial change is to use build_index_vector for
IFN_GOMP_SIMD_LANE; this makes no functional difference for
fixed-length vectors.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-stmts.c (vectorizable_call): Treat the number of
vectors as polynomial. Use build_index_vector for
IFN_GOMP_SIMD_LANE.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256137
Richard Sandiford [Wed, 3 Jan 2018 07:16:06 +0000 (07:16 +0000)]
poly_int: vectorizable_load/store
This patch makes vectorizable_load and vectorizable_store cope with
variable-length vectors. The reverse and permute cases will be
excluded by the code that checks the permutation mask (although a
patch after the main SVE submission adds support for the reversed
case). Here we also need to exclude VMAT_ELEMENTWISE and
VMAT_STRIDED_SLP, which split the operation up into a constant
number of constant-sized operations. We also don't try to extend
the current widening gather/scatter support to variable-length
vectors, since SVE uses a different approach.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-stmts.c (get_load_store_type): Treat the number of
units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
for variable-length vectors.
(vectorizable_mask_load_store): Treat the number of units as
polynomial, asserting that it is constant if the condition has
already been enforced.
(vectorizable_store, vectorizable_load): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256136
Richard Sandiford [Wed, 3 Jan 2018 07:16:00 +0000 (07:16 +0000)]
poly_int: vectorizable_live_operation
This patch makes vectorizable_live_operation cope with variable-length
vectors. For now we just handle cases in which we can tell at compile
time which vector contains the final result.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-loop.c (vectorizable_live_operation): Treat the number
of units as polynomial. Punt if we can't tell at compile time
which vector contains the final result.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256135
Richard Sandiford [Wed, 3 Jan 2018 07:15:54 +0000 (07:15 +0000)]
poly_int: vectorizable_induction
This patch makes vectorizable_induction cope with variable-length
vectors. For now we punt on SLP inductions, but patchees after
the main SVE submission add support for those too.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-loop.c (vectorizable_induction): Treat the number
of units as polynomial. Punt on SLP inductions. Use an integer
VEC_SERIES_EXPR for variable-length integer reductions. Use a
cast of such a series for variable-length floating-point
reductions.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256134
Richard Sandiford [Wed, 3 Jan 2018 07:15:47 +0000 (07:15 +0000)]
poly_int: vectorizable_reduction
This patch makes vectorizable_reduction cope with variable-length vectors.
We can handle the simple case of an inner loop reduction for which
the target has native support for the epilogue operation. For now we
punt on other cases, but patches after the main SVE submission allow
SLP and double reductions too.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree.h (build_index_vector): Declare.
* tree.c (build_index_vector): New function.
* tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
of units as polynomial, forcibly converting it to a constant if
vectorizable_reduction has already enforced the condition.
(vect_create_epilog_for_reduction): Likewise. Use build_index_vector
to create a {1,2,3,...} vector.
(vectorizable_reduction): Treat the number of units as polynomial.
Choose vectype_in based on the largest scalar element size rather
than the smallest number of units. Enforce the restrictions
relied on above.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256133
Richard Sandiford [Wed, 3 Jan 2018 07:15:41 +0000 (07:15 +0000)]
poly_int: vector_alignment_reachable_p
This patch makes vector_alignment_reachable_p cope with variable-length
vectors.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
number of units as polynomial.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256132
Richard Sandiford [Wed, 3 Jan 2018 07:15:20 +0000 (07:15 +0000)]
poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZES
This patch changes the type of current_vector_size to poly_uint64.
It also changes TARGET_AUTOVECTORIZE_VECTOR_SIZES so that it fills
in a vector of possible sizes (as poly_uint64s) instead of returning
a bitmask. The documentation claimed that the hook didn't need to
include the default vector size (returned by preferred_simd_mode),
but that wasn't consistent with the omp-low.c usage.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.h (vector_sizes, auto_vector_sizes): New typedefs.
* target.def (autovectorize_vector_sizes): Return the vector sizes
by pointer, using vector_sizes rather than a bitmask.
* targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
* targhooks.c (default_autovectorize_vector_sizes): Likewise.
* config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
Likewise.
* config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
* config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
* config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
* config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
* omp-general.c (omp_max_vf): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (can_vec_mask_load_store_p): Likewise.
* tree-vect-loop.c (vect_analyze_loop): Likewise.
* tree-vect-slp.c (vect_slp_bb): Likewise.
* doc/tm.texi: Regenerate.
* tree-vectorizer.h (current_vector_size): Change from an unsigned int
to a poly_uint64.
* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
the vector size as a poly_uint64 rather than an unsigned int.
(current_vector_size): Change from an unsigned int to a poly_uint64.
(get_vectype_for_scalar_type): Update accordingly.
* tree.h (build_truth_vector_type): Take the size and number of
units as a poly_uint64 rather than an unsigned int.
(build_vector_type): Add a temporary overload that takes
the number of units as a poly_uint64 rather than an unsigned int.
* tree.c (make_vector_type): Likewise.
(build_truth_vector_type): Take the number of units as a poly_uint64
rather than an unsigned int.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256131
Richard Sandiford [Wed, 3 Jan 2018 07:14:43 +0000 (07:14 +0000)]
poly_int: get_mask_mode
This patch makes TARGET_GET_MASK_MODE take polynomial nunits and
vector_size arguments. The gcc_assert in default_get_mask_mode
is now handled by the exact_div call in vector_element_size.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (get_mask_mode): Take the number of units and length
as poly_uint64s rather than unsigned ints.
* targhooks.h (default_get_mask_mode): Update accordingly.
* targhooks.c (default_get_mask_mode): Likewise.
* config/i386/i386.c (ix86_get_mask_mode): Likewise.
* doc/tm.texi: Regenerate.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256130
Richard Sandiford [Wed, 3 Jan 2018 07:14:31 +0000 (07:14 +0000)]
poly_int: omp_max_vf
This patch makes omp_max_vf return a polynomial vectorization factor.
We then need to be able to stash a polynomial value in
OMP_CLAUSE_SAFELEN_EXPR too:
/* If max_vf is non-zero, then we can use only a vectorization factor
up to the max_vf we chose. So stick it into the safelen clause. */
For now the cfgloop safelen is still constant though.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
* omp-general.c (omp_max_vf): Likewise.
* omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
(expand_omp_simd): Handle polynomial safelen.
* omp-low.c (omplow_simd_context): Add a default constructor.
(omplow_simd_context::max_vf): Change from int to poly_uint64.
(lower_rec_simd_input_clauses): Update accordingly.
(lower_rec_input_clauses): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256129
Richard Sandiford [Wed, 3 Jan 2018 07:14:24 +0000 (07:14 +0000)]
poly_int: vect_nunits_for_cost
This patch adds a function for getting the number of elements in
a vector for cost purposes, which is always constant. It makes
it possible for a later patch to change GET_MODE_NUNITS and
TYPE_VECTOR_SUBPARTS to a poly_int.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vectorizer.h (vect_nunits_for_cost): New function.
* tree-vect-loop.c (vect_model_reduction_cost): Use it.
* tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
(vect_analyze_slp_cost): Likewise.
* tree-vect-stmts.c (vect_model_store_cost): Likewise.
(vect_model_load_cost): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256128
Richard Sandiford [Wed, 3 Jan 2018 07:14:16 +0000 (07:14 +0000)]
poly_int: SLP max_units
This match makes tree-vect-slp.c track the maximum number of vector
units as a poly_uint64 rather than an unsigned int.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
(vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
from an unsigned int * to a poly_uint64_pod *.
(calculate_unrolling_factor): New function.
(vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256127
Richard Sandiford [Wed, 3 Jan 2018 07:14:07 +0000 (07:14 +0000)]
poly_int: vectoriser vf and uf
This patch changes the type of the vectorisation factor and SLP
unrolling factor to poly_uint64. This in turn required some knock-on
changes in signedness elsewhere.
Cost decisions are generally based on estimated_poly_value,
which for VF is wrapped up as vect_vf_for_cost.
The patch doesn't on its own enable variable-length vectorisation.
It just makes the minimum changes necessary for the code to build
with the new VF and UF types. Later patches also make the
vectoriser cope with variable TYPE_VECTOR_SUBPARTS and variable
GET_MODE_NUNITS, at which point the code really does handle
variable-length vectors.
The patch also changes MAX_VECTORIZATION_FACTOR to INT_MAX,
to avoid hard-coding a particular architectural limit.
The patch includes a new test because a development version of the patch
accidentally used file print routines instead of dump_*, which would
fail with -fopt-info.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vectorizer.h (_slp_instance::unrolling_factor): Change
from an unsigned int to a poly_uint64.
(_loop_vec_info::slp_unrolling_factor): Likewise.
(_loop_vec_info::vectorization_factor): Change from an int
to a poly_uint64.
(MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
(vect_get_num_vectors): New function.
(vect_update_max_nunits, vect_vf_for_cost): Likewise.
(vect_get_num_copies): Use vect_get_num_vectors.
(vect_analyze_data_ref_dependences): Change max_vf from an int *
to an unsigned int *.
(vect_analyze_data_refs): Change min_vf from an int * to a
poly_uint64 *.
(vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
than an unsigned HOST_WIDE_INT.
* tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
(vect_analyze_data_ref_dependence): Change max_vf from an int *
to an unsigned int *.
(vect_analyze_data_ref_dependences): Likewise.
(vect_compute_data_ref_alignment): Handle polynomial vf.
(vect_enhance_data_refs_alignment): Likewise.
(vect_prune_runtime_alias_test_list): Likewise.
(vect_shift_permute_load_chain): Likewise.
(vect_supportable_dr_alignment): Likewise.
(dependence_distance_ge_vf): Take the vectorization factor as a
poly_uint64 rather than an unsigned HOST_WIDE_INT.
(vect_analyze_data_refs): Change min_vf from an int * to a
poly_uint64 *.
* tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
vfm1 as a poly_uint64 rather than an int. Make the same change
for the returned bound_scalar.
(vect_gen_vector_loop_niters): Handle polynomial vf.
(vect_do_peeling): Likewise. Update call to
vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
(vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
be constant.
* tree-vect-loop.c (vect_determine_vectorization_factor)
(vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
(vect_get_known_peeling_cost): Likewise.
(vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
(vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
(vect_transform_loop): Likewise. Use the lowest possible VF when
updating the upper bounds of the loop.
(vect_min_worthwhile_factor): Make static. Return an unsigned int
rather than an int.
* tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
polynomial unroll factors.
(vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
(vect_make_slp_decision): Likewise.
(vect_supported_load_permutation_p): Likewise, and polynomial
vf too.
(vect_analyze_slp_cost): Handle polynomial vf.
(vect_slp_analyze_node_operations): Likewise.
(vect_slp_analyze_bb_1): Likewise.
(vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
than an unsigned HOST_WIDE_INT.
* tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
(vectorizable_load): Handle polynomial vf.
* tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
a poly_uint64.
(adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
gcc/testsuite/
* gcc.dg/vect-opt-info-1.c: New test.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256126
Richard Sandiford [Wed, 3 Jan 2018 07:13:57 +0000 (07:13 +0000)]
match.pd handling of three-constant bitops
natch.pd tries to reassociate two bit operations if both of them have
constant operands. However, with the polynomial integers added later,
there's no guarantee that a bit operation on two integers can be folded
at compile time. This means that the pattern can trigger for operations
on three constants, and as things stood could endlessly oscillate
between the two associations.
This patch keeps the existing pattern for the normal case of a
non-constant first operand. When all three operands are constant it
tries to find a pair of constants that do fold. If none do, it keeps
the original expression as-was.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* match.pd: Handle bit operations involving three constants
and try to fold one pair.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r256125
Richard Sandiford [Wed, 3 Jan 2018 07:13:50 +0000 (07:13 +0000)]
Add an alternative vector loop iv mechanism
Normally we adjust the vector loop so that it iterates:
(original number of scalar iterations - number of peels) / VF
times, enforcing this using an IV that starts at zero and increments
by one each iteration. However, dividing by VF would be expensive
for variable VF, so this patch adds an alternative in which the IV
increments by VF each iteration instead. We then need to take care
to handle possible overflow in the IV.
The new mechanism isn't used yet; a later patch replaces the
"if (1)" with a check for variable VF.
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vect-loop-manip.c: Include gimple-fold.h.
(slpeel_make_loop_iterate_ntimes): Add step, final_iv and
niters_maybe_zero parameters. Handle other cases besides a step of 1.
(vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
Add a path that uses a step of VF instead of 1, but disable it
for now.
(vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
and niters_no_overflow parameters. Update calls to
slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
Create a new SSA name if the latter choses to use a ste other
than zero, and return it via niters_vector_mult_vf_var.
* tree-vect-loop.c (vect_transform_loop): Update calls to
vect_do_peeling, vect_gen_vector_loop_niters and
slpeel_make_loop_iterate_ntimes.
* tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
(vect_gen_vector_loop_niters): Update declarations after above changes.
From-SVN: r256124
Ben Elliston [Wed, 3 Jan 2018 04:32:45 +0000 (15:32 +1100)]
Summary: Replace a few instances of 8 leading spaces with horizontal tabs.
From-SVN: r256123
Ben Elliston [Wed, 3 Jan 2018 04:25:18 +0000 (15:25 +1100)]
config.guess: Import latest version.
* config.guess: Import latest version.
* config.sub: Likewise.
From-SVN: r256122
Michael Meissner [Wed, 3 Jan 2018 02:38:09 +0000 (02:38 +0000)]
rs6000.md (floor<mode>2): Add support for IEEE 128-bit round to integer instructions.
[gcc]
2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
128-bit round to integer instructions.
(ceil<mode>2): Likewise.
(btrunc<mode>2): Likewise.
(round<mode>2): Likewise.
[gcc/testsuite]
2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/float128-hw2.c: Add tests for ceilf128,
floorf128, truncf128, and roundf128.
* gcc.target/powerpc/float128-hw5.c: New tests for _Float128
optimizations added in match.pd.
* gcc.target/powerpc/float128-hw6.c: Likewise.
* gcc.target/powerpc/float128-hw7.c: Likewise.
* gcc.target/powerpc/float128-hw8.c: Likewise.
* gcc.target/powerpc/float128-hw9.c: Likewise.
* gcc.target/powerpc/float128-hw10.c: Likewise.
* gcc.target/powerpc/float128-hw11.c: Likewise.
From-SVN: r256118
GCC Administrator [Wed, 3 Jan 2018 00:16:18 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r256116
Aaron Sawdey [Tue, 2 Jan 2018 23:01:43 +0000 (23:01 +0000)]
rs6000-string.c (expand_block_move): Allow the use of unaligned VSX load/store on P8/P9.
2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
* config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
unaligned VSX load/store on P8/P9.
(expand_block_clear): Allow the use of unaligned VSX
load/store on P8/P9.
From-SVN: r256112
Bill Schmidt [Tue, 2 Jan 2018 22:56:45 +0000 (22:56 +0000)]
rs6000-p8swap.c (swap_feeds_both_load_and_store): New function.
2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
New function.
(rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
swap associated with both a load and a store.
From-SVN: r256111
Andrew Waterman [Tue, 2 Jan 2018 20:34:01 +0000 (20:34 +0000)]
RISC-V: Fix for icache flush issue on multicore processors.
gcc/
* config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
* config/riscv/riscv.md (clear_cache): Use it.
From-SVN: r256109
Artyom Skrobov [Tue, 2 Jan 2018 19:16:44 +0000 (19:16 +0000)]
* web.c: Remove out-of-date comment.
From-SVN: r256106
Richard Sandiford [Tue, 2 Jan 2018 19:14:43 +0000 (19:14 +0000)]
Fix REG_ARGS_SIZE handling when pushing TLS addresses
The new assert in add_args_size_note triggered for gcc.dg/tls/opt-3.c
and others on m68k. This looks like a pre-existing bug: if we pushed
a value that needs a call to something like __tls_get_addr, we ended
up with two different REG_ARGS_SIZE notes on the same instruction.
It seems to be OK for emit_single_push_insn to push something that
needs a call to __tls_get_addr:
/* We have to allow non-call_pop patterns for the case
of emit_single_push_insn of a TLS address. */
if (GET_CODE (pat) != PARALLEL)
return 0;
so I think the bug is in the way this is handled rather than the fact
that it occurs at all.
If we're pushing a value X that needs a call C to calculate, we'll
add REG_ARGS_SIZE notes to the pushes and pops for C as part of the
call sequence. Then emit_single_push_insn calls fixup_args_size_notes
on the whole push sequence (the calculation of X, including C,
and the push of X itself). This is where the double notes came from.
But emit_single_push_insn_1 adjusted stack_pointer_delta *before* the
push, so the notes added for C were relative to the situation after
the future push of X rather than before it.
Presumably this didn't matter in practice because the note added
second tended to trump the note added first. But code is allowed to
walk REG_NOTES without having to disregard secondary notes.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* expr.c (fixup_args_size_notes): Check that any existing
REG_ARGS_SIZE notes are correct, and don't try to re-add them.
(emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
(emit_single_push_insn): ...here.
From-SVN: r256105
Richard Sandiford [Tue, 2 Jan 2018 18:28:14 +0000 (18:28 +0000)]
Make CONST_VECTOR_ELT handle implicitly-encoded elements
This patch makes CONST_VECTOR_ELT handle implicitly-encoded elements,
in a similar way to VECTOR_CST_ELT.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
(const_vector_encoded_nelts): New function.
(CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
(const_vector_int_elt, const_vector_elt): Declare.
* emit-rtl.c (const_vector_int_elt_1): New function.
(const_vector_elt): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
of CONST_VECTOR_ELT.
From-SVN: r256104
Richard Sandiford [Tue, 2 Jan 2018 18:28:06 +0000 (18:28 +0000)]
Make more use of rtx_vector_builder
This patch makes various bits of CONST_VECTOR-building code use
rtx_vector_builder, operating directly on a specific encoding.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* expr.c: Include rtx-vector-builder.h.
(const_vector_mask_from_tree): Use rtx_vector_builder and operate
directly on the tree encoding.
(const_vector_from_tree): Likewise.
* optabs.c: Include rtx-vector-builder.h.
(expand_vec_perm_var): Use rtx_vector_builder and create a repeating
sequence of "u" values.
* vec-perm-indices.c: Include rtx-vector-builder.h.
(vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
directly on the vec_perm_indices encoding.
From-SVN: r256103
Richard Sandiford [Tue, 2 Jan 2018 18:27:50 +0000 (18:27 +0000)]
New CONST_VECTOR layout
This patch makes CONST_VECTOR use the same encoding as VECTOR_CST.
One problem that occurs in RTL but not at the tree level is that a fair
amount of code uses XVEC and XVECEXP directly on CONST_VECTORs (which is
valid, just with looser checking). This is complicated by the fact that
vectors are also represented as PARALLELs in some target interfaces,
so using XVECEXP is a good polymorphic way of handling both forms.
Rather than try to untangle all that, the best approach seemed to be to
continue to encode every element in a fixed-length vector. That way only
target-independent and AArch64 code need to be precise about using
CONST_VECTOR_ELT over XVECEXP.
After this change is no longer valid to modify CONST_VECTORs in-place.
This needed some fix-up in the powerpc backends.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* doc/rtl.texi (const_vector): Describe new encoding scheme.
* Makefile.in (OBJS): Add rtx-vector-builder.o.
* rtx-vector-builder.h: New file.
* rtx-vector-builder.c: Likewise.
* rtl.h (rtx_def::u2): Add a const_vector field.
(CONST_VECTOR_NPATTERNS): New macro.
(CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
(CONST_VECTOR_DUPLICATE_P): Likewise.
(CONST_VECTOR_STEPPED_P): Likewise.
(CONST_VECTOR_ENCODED_ELT): Likewise.
(const_vec_duplicate_p): Check for a duplicated vector encoding.
(unwrap_const_vec_duplicate): Likewise.
(const_vec_series_p): Check for a non-duplicated vector encoding.
Say that the function only returns true for integer vectors.
* emit-rtl.c: Include rtx-vector-builder.h.
(gen_const_vec_duplicate_1): Delete.
(gen_const_vector): Call gen_const_vec_duplicate instead of
gen_const_vec_duplicate_1.
(const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
(gen_const_vec_duplicate): Use rtx_vector_builder.
(gen_const_vec_series): Likewise.
(gen_rtx_CONST_VECTOR): Likewise.
* config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
(swap_const_vector_halves): Take an rtx pointer rather than rtx.
Build a new vector rather than modifying a CONST_VECTOR in-place.
(handle_special_swappables): Update call accordingly.
* config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
(swap_const_vector_halves): Take an rtx pointer rather than rtx.
Build a new vector rather than modifying a CONST_VECTOR in-place.
(handle_special_swappables): Update call accordingly.
From-SVN: r256102
Richard Sandiford [Tue, 2 Jan 2018 18:27:42 +0000 (18:27 +0000)]
Use CONST_VECTOR_ELT instead of XVECEXP
This patch replaces target-independent uses of XVECEXP with uses
of CONST_VECTOR_ELT. This kind of replacement isn't necessary
for code specific to targets other than AArch64.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* simplify-rtx.c (simplify_const_binary_operation): Use
CONST_VECTOR_ELT instead of XVECEXP.
From-SVN: r256101
Richard Sandiford [Tue, 2 Jan 2018 18:27:35 +0000 (18:27 +0000)]
Use ssizetype selectors for autovectorised VEC_PERM_EXPRs
The previous patches mean that there's no reason that constant
VEC_PERM_EXPRs need to have the same shape as the data inputs.
This patch makes the autovectoriser use sizetype elements instead,
so that indices don't get truncated for large or variable-length
vectors.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
the selector elements to be different from the data elements
if the selector is a VECTOR_CST.
* tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
ssizetype for the selector.
From-SVN: r256100
Richard Sandiford [Tue, 2 Jan 2018 18:27:24 +0000 (18:27 +0000)]
Use vec_perm_builder::series_p in shift_amt_for_vec_perm_mask
This patch makes shift_amt_for_vec_perm_mask use series_p to check
for the simple case of a natural linear series before falling back
to testing each element individually. The series_p test works with
variable-length vectors but testing every individual element doesn't.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
before testing each element individually.
* tree-vect-generic.c (lower_vec_perm): Likewise.
From-SVN: r256099
Richard Sandiford [Tue, 2 Jan 2018 18:27:15 +0000 (18:27 +0000)]
Rework VEC_PERM_EXPR folding
This patch reworks the VEC_PERM_EXPR folding so that more of it
works for variable-length vectors. E.g. it means that we can
now recognise variable-length permutes that reduce to a single
vector, or cases in which a variable-length permute only needs
one input. There should be no functional change for fixed-length
vectors.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* selftest.h (selftest::vec_perm_indices_c_tests): Declare.
* selftest-run-tests.c (selftest::run_tests): Call it.
* vector-builder.h (vector_builder::operator ==): New function.
(vector_builder::operator !=): Likewise.
* vec-perm-indices.h (vec_perm_indices::series_p): Declare.
(vec_perm_indices::all_from_input_p): New function.
* vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
(test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
* fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
instead of reading the VECTOR_CST directly. Detect whether both
vector inputs are the same before constructing the vec_perm_indices,
and update the number of inputs argument accordingly. Use the
utility functions added above. Only construct sel2 if we need to.
From-SVN: r256098
Richard Sandiford [Tue, 2 Jan 2018 18:27:05 +0000 (18:27 +0000)]
Use explicit encodings for simple permutes
This patch makes users of vec_perm_builders use the compressed encoding
where possible. This means that they work with variable-length vectors.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* optabs.c (expand_vec_perm_var): Use an explicit encoding for
the broadcast of the low byte.
(expand_mult_highpart): Use an explicit encoding for the permutes.
* optabs-query.c (can_mult_highpart_p): Likewise.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
(vectorizable_bswap): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Use an
explicit encoding for the power-of-2 permutes.
(vect_permute_store_chain): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_permute_load_chain): Likewise.
From-SVN: r256097
Richard Sandiford [Tue, 2 Jan 2018 18:26:56 +0000 (18:26 +0000)]
Add a vec_perm_indices_to_tree helper function
This patch adds a function for creating a VECTOR_CST from a
vec_perm_indices, operating directly on the encoding.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
* vec-perm-indices.c (vec_perm_indices_to_tree): New function.
* tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
* tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
* tree-vect-stmts.c (vectorizable_bswap): Likewise.
(vect_gen_perm_mask_any): Likewise.
From-SVN: r256096
Richard Sandiford [Tue, 2 Jan 2018 18:26:47 +0000 (18:26 +0000)]
Make vec_perm_indices use new vector encoding
This patch changes vec_perm_indices from a plain vec<> to a class
that stores a canonicalized permutation, using the same encoding
as for VECTOR_CSTs. This means that vec_perm_indices now carries
information about the number of vectors being permuted (currently
always 1 or 2) and the number of elements in each input vector.
A new vec_perm_builder class is used to actually build up the vector,
like tree_vector_builder does for trees. vec_perm_indices is the
completed representation, a bit like VECTOR_CST is for trees.
The patch just does a mechanical conversion of the code to
vec_perm_builder: a later patch uses explicit encodings where possible.
The point of all this is that it makes the representation suitable
for variable-length vectors. It's no longer necessary for the
underlying vec<>s to store every element explicitly.
In int-vector-builder.h, "using the same encoding as tree and rtx constants"
describes the endpoint -- adding the rtx encoding comes later.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* int-vector-builder.h: New file.
* vec-perm-indices.h: Include int-vector-builder.h.
(vec_perm_indices): Redefine as an int_vector_builder.
(auto_vec_perm_indices): Delete.
(vec_perm_builder): Redefine as a stand-alone class.
(vec_perm_indices::vec_perm_indices): New function.
(vec_perm_indices::clamp): Likewise.
* vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
(vec_perm_indices::new_vector): New function.
(vec_perm_indices::new_expanded_vector): Update for new
vec_perm_indices class.
(vec_perm_indices::rotate_inputs): New function.
(vec_perm_indices::all_in_range_p): Operate directly on the
encoded form, without computing elided elements.
(tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
encoding. Update for new vec_perm_indices class.
* optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
the given vec_perm_builder.
(expand_vec_perm_var): Update vec_perm_builder constructor.
(expand_mult_highpart): Use vec_perm_builder instead of
auto_vec_perm_indices.
* optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices. Use a single
or double series encoding as appropriate.
* fold-const.c (fold_ternary_loc): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_permute_store_chain): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_permute_load_chain): Likewise.
(vect_shift_permute_load_chain): Likewise.
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
(vect_transform_slp_perm_load): Likewise.
(vect_schedule_slp_instance): Likewise.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
(vectorizable_mask_load_store): Likewise.
(vectorizable_bswap): Likewise.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
* tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices. Use
tree_to_vec_perm_builder to read the vector from a tree.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
vec_perm_builder instead of a vec_perm_indices.
(have_whole_vector_shift): Use vec_perm_builder and
vec_perm_indices instead of auto_vec_perm_indices. Leave the
truncation to calc_vec_perm_mask_for_shift.
(vect_create_epilog_for_reduction): Likewise.
* config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
from auto_vec_perm_indices to vec_perm_indices.
(aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
instead of changing individual elements.
(aarch64_vectorize_vec_perm_const): Use new_vector to install
the vector in d.perm.
* config/arm/arm.c (expand_vec_perm_d::perm): Change
from auto_vec_perm_indices to vec_perm_indices.
(arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
instead of changing individual elements.
(arm_vectorize_vec_perm_const): Use new_vector to install
the vector in d.perm.
* config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
Update vec_perm_builder constructor.
(rs6000_expand_interleave): Likewise.
* config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
(rs6000_expand_interleave): Likewise.
From-SVN: r256095
Richard Sandiford [Tue, 2 Jan 2018 18:26:35 +0000 (18:26 +0000)]
Check whether a vector of QIs can store all indices
The patch to remove the vec_perm_const optab checked whether replacing
a constant permute with a variable permute is safe, or whether it might
truncate the indices. This patch adds a corresponding check for whether
variable permutes can be lowered to QImode-based permutes.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* optabs-query.c (can_vec_perm_var_p): Check whether lowering
to qimode could truncate the indices.
* optabs.c (expand_vec_perm_var): Likewise.
From-SVN: r256094
Richard Sandiford [Tue, 2 Jan 2018 18:26:27 +0000 (18:26 +0000)]
Remove vec_perm_const optab
One of the changes needed for variable-length VEC_PERM_EXPRs -- and for
long fixed-length VEC_PERM_EXPRs -- is the ability to use constant
selectors that wouldn't fit in the vectors being permuted. E.g. a
permute on two V256QIs can't be done using a V256QI selector.
At the moment constant permutes use two interfaces:
targetm.vectorizer.vec_perm_const_ok for testing whether a permute is
valid and the vec_perm_const optab for actually emitting the permute.
The former gets passed a vec<> selector and the latter an rtx selector.
Most ports share a lot of code between the hook and the optab, with a
wrapper function for each interface.
We could try to keep that interface and require ports to define wider
vector modes that could be attached to the CONST_VECTOR (e.g. V256HI or
V256SI in the example above). But building a CONST_VECTOR rtx seems a bit
pointless here, since the expand code only creates the CONST_VECTOR in
order to call the optab, and the first thing the target does is take
the CONST_VECTOR apart again.
The easiest approach therefore seemed to be to remove the optab and
reuse the target hook to emit the code. One potential drawback is that
it's no longer possible to use match_operand predicates to force
operands into the required form, but in practice all targets want
register operands anyway.
The patch also changes vec_perm_indices into a class that provides
some simple routines for handling permutations. A later patch will
flesh this out and get rid of auto_vec_perm_indices, but I didn't
want to do all that in this patch and make it more complicated than
it already is.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* Makefile.in (OBJS): Add vec-perm-indices.o.
* vec-perm-indices.h: New file.
* vec-perm-indices.c: Likewise.
* target.h (vec_perm_indices): Replace with a forward class
declaration.
(auto_vec_perm_indices): Move to vec-perm-indices.h.
* optabs.h: Include vec-perm-indices.h.
(expand_vec_perm): Delete.
(selector_fits_mode_p, expand_vec_perm_var): Declare.
(expand_vec_perm_const): Declare.
* target.def (vec_perm_const_ok): Replace with...
(vec_perm_const): ...this new hook.
* doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
(TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
* doc/tm.texi: Regenerate.
* optabs.def (vec_perm_const): Delete.
* doc/md.texi (vec_perm_const): Likewise.
(vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
* expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
expand_vec_perm for constant permutation vectors. Assert that
the mode of variable permutation vectors is the integer equivalent
of the mode that is being permuted.
* optabs-query.h (selector_fits_mode_p): Declare.
* optabs-query.c: Include vec-perm-indices.h.
(selector_fits_mode_p): New function.
(can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
is defined, instead of checking whether the vec_perm_const_optab
exists. Use targetm.vectorize.vec_perm_const instead of
targetm.vectorize.vec_perm_const_ok. Check whether the indices
fit in the vector mode before using a variable permute.
* optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
vec_perm_indices instead of an rtx.
(expand_vec_perm): Replace with...
(expand_vec_perm_const): ...this new function. Take the selector
as a vec_perm_indices rather than an rtx. Also take the mode of
the selector. Update call to shift_amt_for_vec_perm_mask.
Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
Use vec_perm_indices::new_expanded_vector to expand the original
selector into bytes. Check whether the indices fit in the vector
mode before using a variable permute.
(expand_vec_perm_var): Make global.
(expand_mult_highpart): Use expand_vec_perm_const.
* fold-const.c: Includes vec-perm-indices.h.
* tree-ssa-forwprop.c: Likewise.
* tree-vect-data-refs.c: Likewise.
* tree-vect-generic.c: Likewise.
* tree-vect-loop.c: Likewise.
* tree-vect-slp.c: Likewise.
* tree-vect-stmts.c: Likewise.
* config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
Delete.
* config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
* config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
(aarch64_vectorize_vec_perm_const_ok): Fuse into...
(aarch64_vectorize_vec_perm_const): ...this new function.
(TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
* config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
* config/arm/vec-common.md (vec_perm_const<mode>): Delete.
* config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
(arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
into...
(arm_vectorize_vec_perm_const): ...this new function. Explicitly
check for NEON modes.
* config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
* config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
* config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
(ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
into...
(ix86_vectorize_vec_perm_const): ...this new function. Incorporate
the old VEC_PERM_CONST conditions.
* config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
* config/ia64/vect.md (vec_perm_const<mode>): Delete.
* config/ia64/ia64.c (ia64_expand_vec_perm_const)
(ia64_vectorize_vec_perm_const_ok): Merge into...
(ia64_vectorize_vec_perm_const): ...this new function.
* config/mips/loongson.md (vec_perm_const<mode>): Delete.
* config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
* config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
* config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
* config/mips/mips.c (mips_expand_vec_perm_const)
(mips_vectorize_vec_perm_const_ok): Merge into...
(mips_vectorize_vec_perm_const): ...this new function.
* config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
* config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
* config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
* config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
* config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
(rs6000_expand_vec_perm_const): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
(altivec_expand_vec_perm_const_le): Take each operand individually.
Operate on constant selectors rather than rtxes.
(altivec_expand_vec_perm_const): Likewise. Update call to
altivec_expand_vec_perm_const_le.
(rs6000_expand_vec_perm_const): Delete.
(rs6000_vectorize_vec_perm_const_ok): Delete.
(rs6000_vectorize_vec_perm_const): New function.
(rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
an element count and rtx array.
(rs6000_expand_extract_even): Update call accordingly.
(rs6000_expand_interleave): Likewise.
* config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
* config/rs6000/paired.md (vec_perm_constv2sf): Delete.
* config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
* config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
(rs6000_expand_vec_perm_const): Delete.
* config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
(altivec_expand_vec_perm_const_le): Take each operand individually.
Operate on constant selectors rather than rtxes.
(altivec_expand_vec_perm_const): Likewise. Update call to
altivec_expand_vec_perm_const_le.
(rs6000_expand_vec_perm_const): Delete.
(rs6000_vectorize_vec_perm_const_ok): Delete.
(rs6000_vectorize_vec_perm_const): New function. Remove stray
reference to the SPE evmerge intructions.
(rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
an element count and rtx array.
(rs6000_expand_extract_even): Update call accordingly.
(rs6000_expand_interleave): Likewise.
* config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
* config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
new function.
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
From-SVN: r256093
Richard Sandiford [Tue, 2 Jan 2018 18:26:16 +0000 (18:26 +0000)]
Refactor expand_vec_perm
This patch splits the variable handling out of expand_vec_perm into
a subroutine, so that the next patch can use a different interface
for expanding constant permutes. expand_vec_perm now does all the
CONST_VECTOR handling directly and defers to expand_vec_perm_var
for other rtx codes. Handling CONST_VECTORs includes handling the
fallback to variable permutes.
The patch also adds an assert for valid optab modes to expand_vec_perm_1,
so that we get it when using optabs for CONST_VECTORs. The MODE_VECTOR_INT
part was previously in expand_vec_perm and the mode_for_int_vector part
is new.
Most of the patch is just reindentation.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* optabs.c (expand_vec_perm_1): Assert that SEL has an integer
vector mode and that that mode matches the mode of the data
being permuted.
(expand_vec_perm): Split handling of non-CONST_VECTOR selectors
out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
directly using expand_vec_perm_1 when forcing selectors into
registers.
(expand_vec_perm_var): New function, split out from expand_vec_perm.
From-SVN: r256092
Richard Sandiford [Tue, 2 Jan 2018 18:26:06 +0000 (18:26 +0000)]
Split can_vec_perm_p into can_vec_perm_{var,const}_p
This patch splits can_vec_perm_p into two functions: can_vec_perm_var_p
for testing permute operations with variable selection vectors, and
can_vec_perm_const_p for testing permute operations with specific
constant selection vectors. This means that we can pass the constant
selection vector by reference.
Constant permutes can still use a variable permute as a fallback.
A later patch adds a check to makre sure that we don't truncate the
vector indices when doing this.
However, have_whole_vector_shift checked:
if (direct_optab_handler (vec_perm_const_optab, mode) == CODE_FOR_nothing)
return false;
which had the effect of disallowing the fallback to variable permutes.
I'm not sure whether that was the intention or whether it was just
supposed to short-cut the loop on targets that don't support permutes.
(But then why bother? The first check in the loop would fail and
we'd bail out straightaway.)
The patch adds a parameter for disallowing the fallback. I think it
makes sense to do this for the following code in the VEC_PERM_EXPR
folder:
/* Some targets are deficient and fail to expand a single
argument permutation while still allowing an equivalent
2-argument version. */
if (need_mask_canon && arg2 == op2
&& !can_vec_perm_p (TYPE_MODE (type), false, &sel)
&& can_vec_perm_p (TYPE_MODE (type), false, &sel2))
since it's really testing whether the expand_vec_perm_const code expects
a particular form.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* optabs-query.h (can_vec_perm_p): Delete.
(can_vec_perm_var_p, can_vec_perm_const_p): Declare.
* optabs-query.c (can_vec_perm_p): Split into...
(can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
(can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
particular selector is valid.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_shift_permute_load_chain): Likewise.
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
(vect_transform_slp_perm_load): Likewise.
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
(vectorizable_bswap): Likewise.
(vect_gen_perm_mask_checked): Likewise.
* fold-const.c (fold_ternary_loc): Likewise. Don't take
implementations of variable permutation vectors into account
when deciding which selector to use.
* tree-vect-loop.c (have_whole_vector_shift): Don't check whether
vec_perm_const_optab is supported; instead use can_vec_perm_const_p
with a false third argument.
* tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
to test whether the constant selector is valid and can_vec_perm_var_p
to test whether a variable selector is valid.
From-SVN: r256091
Richard Sandiford [Tue, 2 Jan 2018 18:25:57 +0000 (18:25 +0000)]
Pass vec_perm_indices by reference
This patch makes functions take vec_perm_indices by reference rather
than value, since a later patch will turn vec_perm_indices into a class
that would be more expensive to copy.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
* optabs-query.c (can_vec_perm_p): Likewise.
* fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
instead of vec_perm_indices.
* tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
(vect_gen_perm_mask_checked): Likewise,
* tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
(vect_gen_perm_mask_checked): Likewise,
From-SVN: r256090
Richard Sandiford [Tue, 2 Jan 2018 18:25:45 +0000 (18:25 +0000)]
The vec_perm code falls back to doing byte-level permutes if element-level permutes aren't supported.
qimode_for_vec_perm
The vec_perm code falls back to doing byte-level permutes if
element-level permutes aren't supported. There were two copies
of the code to calculate the mode, and later patches add another,
so this patch splits it out into a helper function.
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* optabs-query.h (qimode_for_vec_perm): Declare.
* optabs-query.c (can_vec_perm_p): Split out qimode search to...
(qimode_for_vec_perm): ...this new function.
* optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
From-SVN: r256089
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