bugzilla-daemon [Sat, 21 Mar 2020 23:24:54 +0000 (23:24 +0000)]
[libre-riscv-dev] [Bug 184] new mailing lists proposal for libre-soc.org
bugzilla-daemon [Sat, 21 Mar 2020 20:10:32 +0000 (20:10 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Sat, 21 Mar 2020 18:59:45 +0000 (18:59 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
Luke Kenneth Casson Leighton [Sat, 21 Mar 2020 15:52:35 +0000 (15:52 +0000)]
[libre-riscv-dev] Please go through the new public-inbox elaborate setup revison
bugzilla-daemon [Sat, 21 Mar 2020 15:47:05 +0000 (15:47 +0000)]
[libre-riscv-dev] [Bug 184] new mailing lists proposal for libre-soc.org
bugzilla-daemon [Sat, 21 Mar 2020 15:44:32 +0000 (15:44 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Sat, 21 Mar 2020 15:36:52 +0000 (15:36 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Sat, 21 Mar 2020 15:30:21 +0000 (15:30 +0000)]
[libre-riscv-dev] [Bug 263] New: LD/ST batching needed
bugzilla-daemon [Sat, 21 Mar 2020 15:28:01 +0000 (15:28 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Sat, 21 Mar 2020 11:49:23 +0000 (11:49 +0000)]
[libre-riscv-dev] [Bug 212] test power isa decoder against gnu/llvm assemblers/disassemblers
Luke Kenneth Casson Leighton [Sat, 21 Mar 2020 11:24:53 +0000 (11:24 +0000)]
[libre-riscv-dev] powerpc endian modes
bugzilla-daemon [Sat, 21 Mar 2020 07:01:25 +0000 (07:01 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
bugzilla-daemon [Sat, 21 Mar 2020 04:18:07 +0000 (04:18 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
Luke Kenneth Casson Leighton [Sat, 21 Mar 2020 04:13:45 +0000 (04:13 +0000)]
Re: [libre-riscv-dev] New formal verification checking tool
bugzilla-daemon [Sat, 21 Mar 2020 04:12:53 +0000 (04:12 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
Samuel Falvo II [Sat, 21 Mar 2020 03:20:47 +0000 (20:20 -0700)]
[libre-riscv-dev] New formal verification checking tool
bugzilla-daemon [Sat, 21 Mar 2020 01:56:02 +0000 (01:56 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Sat, 21 Mar 2020 01:14:51 +0000 (01:14 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
bugzilla-daemon [Sat, 21 Mar 2020 01:13:01 +0000 (01:13 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
bugzilla-daemon [Sat, 21 Mar 2020 00:48:09 +0000 (00:48 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Sat, 21 Mar 2020 00:28:40 +0000 (00:28 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
Cole Poirier [Fri, 20 Mar 2020 21:47:31 +0000 (14:47 -0700)]
Re: [libre-riscv-dev] [OT]: Dropbox rewriting their sync engine in Rust instead of Python
Veera [Fri, 20 Mar 2020 21:05:13 +0000 (02:35 +0530)]
Re: [libre-riscv-dev] Please go through the new public-inbox elaborate setup revison
bugzilla-daemon [Fri, 20 Mar 2020 20:21:40 +0000 (20:21 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Fri, 20 Mar 2020 19:53:41 +0000 (19:53 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Fri, 20 Mar 2020 19:07:41 +0000 (19:07 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
lkcl . [Fri, 20 Mar 2020 18:55:26 +0000 (18:55 +0000)]
Re: [libre-riscv-dev] Epic MegaGrants - Libre RISC-V 3D GPU / CPU / VPU Update Requested
bugzilla-daemon [Fri, 20 Mar 2020 18:54:38 +0000 (18:54 +0000)]
[libre-riscv-dev] [Bug 184] new mailing lists proposal for libre-soc.org
bugzilla-daemon [Fri, 20 Mar 2020 18:34:48 +0000 (18:34 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
Luke Kenneth Casson Leighton [Fri, 20 Mar 2020 18:30:00 +0000 (18:30 +0000)]
Re: [libre-riscv-dev] Please go through the new public-inbox elaborate setup revison
bugzilla-daemon [Fri, 20 Mar 2020 18:27:26 +0000 (18:27 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
Jacob Lifshay [Fri, 20 Mar 2020 14:09:49 +0000 (07:09 -0700)]
[libre-riscv-dev] [OT]: Dropbox rewriting their sync engine in Rust instead of Python
bugzilla-daemon [Fri, 20 Mar 2020 13:06:15 +0000 (13:06 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Fri, 20 Mar 2020 13:03:03 +0000 (13:03 +0000)]
[libre-riscv-dev] [Bug 262] power virtual memory needed (radix?)
Veera [Fri, 20 Mar 2020 12:59:56 +0000 (18:29 +0530)]
[libre-riscv-dev] Please go through the new public-inbox elaborate setup revison
bugzilla-daemon [Fri, 20 Mar 2020 12:51:24 +0000 (12:51 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
bugzilla-daemon [Fri, 20 Mar 2020 12:46:55 +0000 (12:46 +0000)]
[libre-riscv-dev] [Bug 181] test and install public-inbox
bugzilla-daemon [Fri, 20 Mar 2020 12:09:59 +0000 (12:09 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Fri, 20 Mar 2020 11:03:18 +0000 (11:03 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Fri, 20 Mar 2020 08:47:56 +0000 (08:47 +0000)]
[libre-riscv-dev] [Bug 262] power virtual memory needed (radix?)
bugzilla-daemon [Fri, 20 Mar 2020 08:39:03 +0000 (08:39 +0000)]
[libre-riscv-dev] [Bug 262] New: power virtual memory needed (radix?)
bugzilla-daemon [Thu, 19 Mar 2020 17:11:21 +0000 (17:11 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Thu, 19 Mar 2020 15:33:27 +0000 (15:33 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Thu, 19 Mar 2020 15:29:55 +0000 (15:29 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Thu, 19 Mar 2020 06:56:07 +0000 (06:56 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Thu, 19 Mar 2020 03:00:55 +0000 (03:00 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Thu, 19 Mar 2020 00:24:42 +0000 (00:24 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Thu, 19 Mar 2020 00:21:06 +0000 (00:21 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 23:41:57 +0000 (23:41 +0000)]
[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page
bugzilla-daemon [Wed, 18 Mar 2020 23:39:30 +0000 (23:39 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Wed, 18 Mar 2020 23:27:01 +0000 (23:27 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 23:20:08 +0000 (23:20 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 22:47:19 +0000 (22:47 +0000)]
[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page
bugzilla-daemon [Wed, 18 Mar 2020 22:13:35 +0000 (22:13 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 22:09:21 +0000 (22:09 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Wed, 18 Mar 2020 21:38:08 +0000 (21:38 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 21:28:29 +0000 (21:28 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 21:23:43 +0000 (21:23 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 20:51:20 +0000 (20:51 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 19:31:31 +0000 (19:31 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 19:27:22 +0000 (19:27 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
Immanuel, Yehowshua U [Wed, 18 Mar 2020 18:23:46 +0000 (18:23 +0000)]
Re: [libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
Luke Kenneth Casson Leighton [Wed, 18 Mar 2020 18:22:14 +0000 (18:22 +0000)]
Re: [libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 17:14:12 +0000 (17:14 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
Luke Kenneth Casson Leighton [Wed, 18 Mar 2020 16:27:40 +0000 (16:27 +0000)]
[libre-riscv-dev] travelling today, 18mar2020 -> 19mar2020
bugzilla-daemon [Wed, 18 Mar 2020 16:12:33 +0000 (16:12 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 16:07:16 +0000 (16:07 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 15:49:56 +0000 (15:49 +0000)]
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
bugzilla-daemon [Wed, 18 Mar 2020 15:46:25 +0000 (15:46 +0000)]
[libre-riscv-dev] [Bug 261] power_enums.py to read SPRs from sprs.csv
bugzilla-daemon [Wed, 18 Mar 2020 15:18:39 +0000 (15:18 +0000)]
[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page
bugzilla-daemon [Wed, 18 Mar 2020 15:15:08 +0000 (15:15 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Wed, 18 Mar 2020 14:40:34 +0000 (14:40 +0000)]
[libre-riscv-dev] [Bug 261] power_enums.py to read SPRs from sprs.csv
bugzilla-daemon [Wed, 18 Mar 2020 14:38:01 +0000 (14:38 +0000)]
[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page
bugzilla-daemon [Wed, 18 Mar 2020 14:31:43 +0000 (14:31 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Wed, 18 Mar 2020 14:31:33 +0000 (14:31 +0000)]
[libre-riscv-dev] [Bug 261] power_enums.py to read SPRs from sprs.csv
bugzilla-daemon [Wed, 18 Mar 2020 13:59:09 +0000 (13:59 +0000)]
[libre-riscv-dev] [Bug 261] power_enums.py to read SPRs from sprs.csv
bugzilla-daemon [Wed, 18 Mar 2020 13:31:48 +0000 (13:31 +0000)]
[libre-riscv-dev] [Bug 261] power_enums.py to read SPRs from sprs.csv
bugzilla-daemon [Wed, 18 Mar 2020 12:11:55 +0000 (12:11 +0000)]
[libre-riscv-dev] [Bug 261] New: power_enums.py to read SPRs from sprs.csv
Adrienne G. Thompson [Fri, 13 Mar 2020 01:19:23 +0000 (20:19 -0500)]
Re: [libre-riscv-dev] NLNet Funding Proposals for the Libre RISC-V SoC: call for participation
Jacob Lifshay [Wed, 18 Mar 2020 07:02:22 +0000 (00:02 -0700)]
Re: [libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float
bugzilla-daemon [Wed, 18 Mar 2020 06:59:02 +0000 (06:59 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
Luke Kenneth Casson Leighton [Wed, 18 Mar 2020 06:57:42 +0000 (06:57 +0000)]
Re: [libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float
bugzilla-daemon [Wed, 18 Mar 2020 05:23:18 +0000 (05:23 +0000)]
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
bugzilla-daemon [Wed, 18 Mar 2020 04:37:51 +0000 (04:37 +0000)]
[libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float
Luke Kenneth Casson Leighton [Tue, 17 Mar 2020 21:51:57 +0000 (21:51 +0000)]
[libre-riscv-dev] priority picker
Luke Kenneth Casson Leighton [Tue, 17 Mar 2020 18:56:59 +0000 (18:56 +0000)]
Re: [libre-riscv-dev] next tasks
Luke Kenneth Casson Leighton [Tue, 17 Mar 2020 18:56:26 +0000 (18:56 +0000)]
Re: [libre-riscv-dev] [Bug 260] Figure out creating userspace-driven explicit synchronization for Linux Kernel sync_file and dma_fence
bugzilla-daemon [Tue, 17 Mar 2020 18:55:38 +0000 (18:55 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Tue, 17 Mar 2020 18:25:47 +0000 (18:25 +0000)]
[libre-riscv-dev] [Bug 260] Figure out creating userspace-driven explicit synchronization for Linux Kernel sync_file and dma_fence
Jacob Lifshay [Tue, 17 Mar 2020 18:23:15 +0000 (11:23 -0700)]
Re: [libre-riscv-dev] next tasks
bugzilla-daemon [Tue, 17 Mar 2020 18:15:08 +0000 (18:15 +0000)]
[libre-riscv-dev] [Bug 260] New: Figure out creating userspace-driven explicit synchronization for Linux Kernel sync_file and dma_fence
bugzilla-daemon [Tue, 17 Mar 2020 18:07:31 +0000 (18:07 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Tue, 17 Mar 2020 17:53:31 +0000 (17:53 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Tue, 17 Mar 2020 17:42:41 +0000 (17:42 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Tue, 17 Mar 2020 17:28:11 +0000 (17:28 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Tue, 17 Mar 2020 17:24:28 +0000 (17:24 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
bugzilla-daemon [Tue, 17 Mar 2020 17:06:33 +0000 (17:06 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
Luke Kenneth Casson Leighton [Tue, 17 Mar 2020 16:44:24 +0000 (16:44 +0000)]
Re: [libre-riscv-dev] provisional Vulkan ray tracing extension published
bugzilla-daemon [Tue, 17 Mar 2020 16:41:00 +0000 (16:41 +0000)]
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
Jacob Lifshay [Tue, 17 Mar 2020 16:30:41 +0000 (09:30 -0700)]
[libre-riscv-dev] provisional Vulkan ray tracing extension published
projects / libre-riscv-dev.git / log