Clifford Wolf [Thu, 16 Apr 2015 16:13:41 +0000 (18:13 +0200)]
A "#" does start a comment, not a label.
Clifford Wolf [Thu, 16 Apr 2015 10:09:14 +0000 (12:09 +0200)]
Changed ice40 ICESTORM_CARRYCONST port name
Clifford Wolf [Thu, 16 Apr 2015 09:47:59 +0000 (11:47 +0200)]
Fixed "
dff2dffe -direct-match"
Clifford Wolf [Thu, 16 Apr 2015 09:31:15 +0000 (11:31 +0200)]
Added simple ice40 dff tests
Clifford Wolf [Thu, 16 Apr 2015 09:30:56 +0000 (11:30 +0200)]
improved ice40 dff cell mapping
Clifford Wolf [Thu, 16 Apr 2015 09:30:17 +0000 (11:30 +0200)]
Added "
dff2dffe -direct-match"
Clifford Wolf [Tue, 14 Apr 2015 11:45:15 +0000 (13:45 +0200)]
use "hierarchy -auto-top" in synth_ice40
Clifford Wolf [Tue, 14 Apr 2015 11:44:43 +0000 (13:44 +0200)]
more cells in ice40 cell library
Clifford Wolf [Mon, 13 Apr 2015 17:28:12 +0000 (19:28 +0200)]
Added "splice -wires"
Clifford Wolf [Mon, 13 Apr 2015 17:27:49 +0000 (19:27 +0200)]
Added handling of bool-output cells to "wreduce"
Clifford Wolf [Thu, 9 Apr 2015 15:12:12 +0000 (17:12 +0200)]
Improved xilinx "bram1" test
Clifford Wolf [Thu, 9 Apr 2015 14:08:54 +0000 (16:08 +0200)]
Added memory_bram "make_outreg" feature
Clifford Wolf [Thu, 9 Apr 2015 13:37:54 +0000 (15:37 +0200)]
Added back-end auto-detect for .edif and .json
Clifford Wolf [Thu, 9 Apr 2015 13:12:26 +0000 (15:12 +0200)]
Minor fixes in handling of "init" attribute
Clifford Wolf [Thu, 9 Apr 2015 11:37:07 +0000 (13:37 +0200)]
Xilinx DRAMS: RAM64X1D, RAM128X1D
Clifford Wolf [Thu, 9 Apr 2015 11:20:19 +0000 (13:20 +0200)]
Fixed const2big performance bug
Clifford Wolf [Thu, 9 Apr 2015 10:02:26 +0000 (12:02 +0200)]
techmap code cleanup
Clifford Wolf [Thu, 9 Apr 2015 06:17:14 +0000 (08:17 +0200)]
Towards DRAM support in Xilinx flow
Clifford Wolf [Wed, 8 Apr 2015 10:14:34 +0000 (12:14 +0200)]
Added support for "file names with blanks"
Clifford Wolf [Wed, 8 Apr 2015 10:13:53 +0000 (12:13 +0200)]
Removed "techmap -share_map" (use "-map +/filename" instead)
Clifford Wolf [Tue, 7 Apr 2015 20:22:09 +0000 (22:22 +0200)]
Added %M and %C select operators
Clifford Wolf [Tue, 7 Apr 2015 18:27:10 +0000 (20:27 +0200)]
Added "pmuxtree" command
Clifford Wolf [Tue, 7 Apr 2015 17:21:30 +0000 (19:21 +0200)]
Added "chparam -list"
Clifford Wolf [Tue, 7 Apr 2015 16:03:27 +0000 (18:03 +0200)]
Added decoder generation to "muxcover"
Clifford Wolf [Tue, 7 Apr 2015 15:23:30 +0000 (17:23 +0200)]
Added hashlib support for std::tuple<>
Clifford Wolf [Tue, 7 Apr 2015 13:42:25 +0000 (15:42 +0200)]
Added "muxcover" command
Clifford Wolf [Tue, 7 Apr 2015 13:07:01 +0000 (15:07 +0200)]
Added pool<K>::pop()
Clifford Wolf [Tue, 7 Apr 2015 05:43:01 +0000 (07:43 +0200)]
typo fix
Clifford Wolf [Tue, 7 Apr 2015 05:30:14 +0000 (07:30 +0200)]
Added "chparam" command
Clifford Wolf [Mon, 6 Apr 2015 15:07:10 +0000 (17:07 +0200)]
Added support for initialized xilinx brams
Clifford Wolf [Mon, 6 Apr 2015 15:06:15 +0000 (17:06 +0200)]
Added support for initialized brams
Clifford Wolf [Mon, 6 Apr 2015 11:03:37 +0000 (13:03 +0200)]
Added Xilinx test case for initialized brams
Clifford Wolf [Mon, 6 Apr 2015 06:44:30 +0000 (08:44 +0200)]
Added Xilinx bram black-box modules
Clifford Wolf [Sun, 5 Apr 2015 23:49:58 +0000 (01:49 +0200)]
Added "port_directions" to write_json output
Clifford Wolf [Sun, 5 Apr 2015 16:04:19 +0000 (18:04 +0200)]
Avoid parameter values with size 0 ($mem cells)
Clifford Wolf [Sun, 5 Apr 2015 15:26:53 +0000 (17:26 +0200)]
make all vector-size related integer params in $mem sim model signed
this fixes iverilog crashes such as the following:
warning: verinum::as_long() truncated 32 bits to 31, returns
2147483647
draw_net_input.c:711: Error: malloc() ran out of memory.
Clifford Wolf [Sun, 5 Apr 2015 07:45:14 +0000 (09:45 +0200)]
Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types
Clifford Wolf [Sat, 4 Apr 2015 17:00:15 +0000 (19:00 +0200)]
Added "dffinit", Support for initialized Xilinx DFF
Clifford Wolf [Sat, 4 Apr 2015 16:06:52 +0000 (18:06 +0200)]
Added "init" attribute support to verilog backend
Clifford Wolf [Sat, 4 Apr 2015 13:13:35 +0000 (15:13 +0200)]
appnote 012 fix
Clifford Wolf [Sat, 4 Apr 2015 11:48:13 +0000 (13:48 +0200)]
Appnote 012
Clifford Wolf [Sat, 4 Apr 2015 09:47:59 +0000 (11:47 +0200)]
Updated ABC to
51705b168d7a
Clifford Wolf [Sat, 4 Apr 2015 07:35:21 +0000 (09:35 +0200)]
Merge pull request #55 from ahmedirfan1983/master
added appnote and impr in btor
Ahmed Irfan [Fri, 3 Apr 2015 15:11:45 +0000 (17:11 +0200)]
Update README
corrected url
Ahmed Irfan [Fri, 3 Apr 2015 14:45:54 +0000 (16:45 +0200)]
Delete btor.ys
.ys script not needed
Ahmed Irfan [Fri, 3 Apr 2015 14:45:14 +0000 (16:45 +0200)]
Update README
pmux cell is implemented
Ahmed Irfan [Fri, 3 Apr 2015 14:41:50 +0000 (16:41 +0200)]
separated memory next from write cell
Ahmed Irfan [Fri, 3 Apr 2015 14:38:07 +0000 (16:38 +0200)]
Merge branch 'master' of https://github.com/cliffordwolf/yosys
Ahmed Irfan [Fri, 3 Apr 2015 14:34:05 +0000 (16:34 +0200)]
Merge branch 'btor' of https://github.com/ahmedirfan1983/yosys into btor
Ahmed Irfan [Fri, 3 Apr 2015 14:20:29 +0000 (16:20 +0200)]
appnote for verilog to btor
Clifford Wolf [Sun, 29 Mar 2015 18:22:08 +0000 (20:22 +0200)]
documentation improvements
Clifford Wolf [Wed, 25 Mar 2015 18:46:12 +0000 (19:46 +0100)]
Ignore celldefine directive in verilog front-end
Clifford Wolf [Wed, 25 Mar 2015 08:00:41 +0000 (09:00 +0100)]
Fixes in cmos_cells.v
Clifford Wolf [Sun, 22 Mar 2015 10:03:56 +0000 (11:03 +0100)]
Fixed detection of absolute paths in ABC for win32
Clifford Wolf [Sun, 22 Mar 2015 08:49:46 +0000 (09:49 +0100)]
Added blif reference to appnote 010
Clifford Wolf [Fri, 20 Mar 2015 08:10:16 +0000 (09:10 +0100)]
Merge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Fri, 20 Mar 2015 08:10:02 +0000 (09:10 +0100)]
fix for python 2.6.6
Clifford Wolf [Wed, 18 Mar 2015 15:03:19 +0000 (16:03 +0100)]
Fixed handling of quotes in liberty parser
Clifford Wolf [Wed, 18 Mar 2015 07:33:40 +0000 (08:33 +0100)]
Added hierarchy -auto-top
Clifford Wolf [Wed, 18 Mar 2015 07:01:37 +0000 (08:01 +0100)]
Added Verilog backend $dffsr support
Clifford Wolf [Fri, 6 Mar 2015 09:21:21 +0000 (10:21 +0100)]
Documentation for JSON format, added attributes
Clifford Wolf [Thu, 5 Mar 2015 19:37:55 +0000 (20:37 +0100)]
Added very first version of "synth_ice40"
Clifford Wolf [Wed, 4 Mar 2015 14:52:34 +0000 (15:52 +0100)]
Fixed bug in "hierarchy" for parametric designs
Clifford Wolf [Tue, 3 Mar 2015 08:41:41 +0000 (09:41 +0100)]
Json bugfix
Clifford Wolf [Tue, 3 Mar 2015 08:28:44 +0000 (09:28 +0100)]
Json backend improvements
Clifford Wolf [Mon, 2 Mar 2015 22:47:45 +0000 (23:47 +0100)]
Added write_blif -attr
Clifford Wolf [Mon, 2 Mar 2015 22:30:58 +0000 (23:30 +0100)]
Added JSON backend
Clifford Wolf [Sun, 1 Mar 2015 10:20:22 +0000 (11:20 +0100)]
Const-fold parameter defs on-demand in AstNode::detectSignWidthWorker()
Clifford Wolf [Thu, 26 Feb 2015 18:02:55 +0000 (19:02 +0100)]
Added $assume support to write_smt2
Clifford Wolf [Thu, 26 Feb 2015 17:47:39 +0000 (18:47 +0100)]
Added non-std verilog assume() statement
Clifford Wolf [Thu, 26 Feb 2015 17:04:10 +0000 (18:04 +0100)]
Added $assume cell type
Clifford Wolf [Wed, 25 Feb 2015 22:01:54 +0000 (23:01 +0100)]
Merge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Wed, 25 Feb 2015 22:01:42 +0000 (23:01 +0100)]
Bugfix in iopadmap
Clifford Wolf [Wed, 25 Feb 2015 11:46:00 +0000 (12:46 +0100)]
Added "keep_hierarchy" attribute
Clifford Wolf [Tue, 24 Feb 2015 21:31:30 +0000 (22:31 +0100)]
Some cleanups in "clean"
Clifford Wolf [Tue, 24 Feb 2015 10:01:00 +0000 (11:01 +0100)]
Fixed compilation problems with gcc 4.6.3; use enum instead of const ints.
(original patch by Andrew Becker <andrew.becker@epfl.ch>)
Clifford Wolf [Sun, 22 Feb 2015 15:30:02 +0000 (16:30 +0100)]
Minor "write_smt2" help msg change
Clifford Wolf [Sun, 22 Feb 2015 15:29:44 +0000 (16:29 +0100)]
Fixed "check -assert"
Clifford Wolf [Sun, 22 Feb 2015 15:19:10 +0000 (16:19 +0100)]
Added "<mod>_a" and "<mod>_i" to write_smt2 output
Clifford Wolf [Sun, 22 Feb 2015 12:02:48 +0000 (13:02 +0100)]
Added "check -assert" doc
Clifford Wolf [Sun, 22 Feb 2015 12:00:41 +0000 (13:00 +0100)]
Added "check -assert"
Clifford Wolf [Sun, 22 Feb 2015 11:42:05 +0000 (12:42 +0100)]
Fixed "sat -initsteps" off-by-one bug
Clifford Wolf [Sat, 21 Feb 2015 21:52:49 +0000 (22:52 +0100)]
Added "sat -stepsize" and "sat -tempinduct-step"
Clifford Wolf [Sat, 21 Feb 2015 21:03:54 +0000 (22:03 +0100)]
sat docu change
Clifford Wolf [Sat, 21 Feb 2015 19:05:16 +0000 (20:05 +0100)]
When "sat -tempinduct-baseonly -maxsteps N" reaches maxsteps it is a good thing.
Clifford Wolf [Sat, 21 Feb 2015 16:53:22 +0000 (17:53 +0100)]
Added "sat -tempinduct-baseonly -tempinduct-inductonly"
Clifford Wolf [Sat, 21 Feb 2015 16:43:49 +0000 (17:43 +0100)]
Fixed basecase init for "sat -tempinduct"
Clifford Wolf [Sat, 21 Feb 2015 14:01:13 +0000 (15:01 +0100)]
Fixed "flatten" for non-pre-derived modules
Clifford Wolf [Sat, 21 Feb 2015 13:31:02 +0000 (14:31 +0100)]
Hotfix for yosysjs/demo03.html
Clifford Wolf [Sat, 21 Feb 2015 13:25:34 +0000 (14:25 +0100)]
YosysJS: Wait for Viz to load
Clifford Wolf [Sat, 21 Feb 2015 11:15:41 +0000 (12:15 +0100)]
Replaced ezDefaultSAT with ezSatPtr
Clifford Wolf [Sat, 21 Feb 2015 10:21:28 +0000 (11:21 +0100)]
Catch constants assigned to cell outputs in "flatten"
Clifford Wolf [Fri, 20 Feb 2015 09:33:20 +0000 (10:33 +0100)]
Added deep recursion warning to AST simplify
Clifford Wolf [Fri, 20 Feb 2015 09:21:36 +0000 (10:21 +0100)]
Parser support for complex delay expressions
Clifford Wolf [Thu, 19 Feb 2015 12:55:36 +0000 (13:55 +0100)]
YosysJS firefox fixes
Clifford Wolf [Thu, 19 Feb 2015 12:36:54 +0000 (13:36 +0100)]
YosysJS stuff
Clifford Wolf [Thu, 19 Feb 2015 12:19:04 +0000 (13:19 +0100)]
format fixes in "sat -dump_json"
Clifford Wolf [Thu, 19 Feb 2015 09:53:40 +0000 (10:53 +0100)]
Added "sat -dump_json" (WaveJSON format)
Clifford Wolf [Thu, 19 Feb 2015 08:11:38 +0000 (09:11 +0100)]
Changed "show" defaults for Win32
Clifford Wolf [Wed, 18 Feb 2015 22:35:23 +0000 (23:35 +0100)]
Convert floating point cell parameters to strings