mesa.git
5 years agointel/vec4: Emit constants for some ALU sources as immediate values
Ian Romanick [Thu, 13 Dec 2018 23:39:49 +0000 (15:39 -0800)]
intel/vec4: Emit constants for some ALU sources as immediate values

In some cases of flow control, the constant propagation is not able to
determine that the source of an instruction must be a constant value.
When we still have NIR SSA values, we can easily determine this.  Emit
the immediate value during code generation to possible avoid spurious
loads of constants into registers.

I wrote this patch to prevent a couple trivial regressions in vec4
shaders caused by "nir/algebraic: Replace i2b used by bcsel or
if-statement with comparison".  The final result was quite a bit better
than that...

No shader-db changes on any Gen8+ platform.

v2: Assert that we never get a negation source modifier on Gen8+.
Suggested by Ken.  This should never happen because we don't normally
use vec4 for Gen8+ (requires and environment variable to force it), and
there's no code to generate these negations.  Still, erring on the side
of caution is better.

Haswell
total instructions in shared programs: 13776218 -> 13764783 (-0.08%)
instructions in affected programs: 663931 -> 652496 (-1.72%)
helped: 3495
HURT: 1
helped stats (abs) min: 1 max: 30 x̄: 3.28 x̃: 2
helped stats (rel) min: 0.21% max: 10.00% x̄: 1.79% x̃: 1.49%
HURT stats (abs)   min: 24 max: 24 x̄: 24.00 x̃: 24
HURT stats (rel)   min: 12.24% max: 12.24% x̄: 12.24% x̃: 12.24%
95% mean confidence interval for instructions value: -3.39 -3.15
95% mean confidence interval for instructions %-change: -1.84% -1.75%
Instructions are helped.

total cycles in shared programs: 386818984 -> 386511910 (-0.08%)
cycles in affected programs: 20379636 -> 20072562 (-1.51%)
helped: 3052
HURT: 476
helped stats (abs) min: 2 max: 12516 x̄: 110.40 x̃: 6
helped stats (rel) min: 0.05% max: 24.68% x̄: 1.58% x̃: 0.69%
HURT stats (abs)   min: 2 max: 416 x̄: 62.76 x̃: 24
HURT stats (rel)   min: 0.10% max: 10.75% x̄: 4.03% x̃: 2.18%
95% mean confidence interval for cycles value: -115.57 -58.51
95% mean confidence interval for cycles %-change: -0.93% -0.73%
Cycles are helped.

total spills in shared programs: 100482 -> 100480 (<.01%)
spills in affected programs: 79 -> 77 (-2.53%)
helped: 3
HURT: 1

total fills in shared programs: 96883 -> 96877 (<.01%)
fills in affected programs: 85 -> 79 (-7.06%)
helped: 4
HURT: 0

Ivy Bridge
total instructions in shared programs: 12000562 -> 11990113 (-0.09%)
instructions in affected programs: 572581 -> 562132 (-1.82%)
helped: 3106
HURT: 0
helped stats (abs) min: 1 max: 30 x̄: 3.36 x̃: 2
helped stats (rel) min: 0.21% max: 10.00% x̄: 1.86% x̃: 1.49%
95% mean confidence interval for instructions value: -3.49 -3.23
95% mean confidence interval for instructions %-change: -1.91% -1.81%
Instructions are helped.

total cycles in shared programs: 180958504 -> 180664500 (-0.16%)
cycles in affected programs: 19991810 -> 19697806 (-1.47%)
helped: 2654
HURT: 486
helped stats (abs) min: 2 max: 12516 x̄: 121.61 x̃: 6
helped stats (rel) min: 0.05% max: 20.66% x̄: 1.48% x̃: 0.68%
HURT stats (abs)   min: 2 max: 396 x̄: 59.18 x̃: 24
HURT stats (rel)   min: 0.05% max: 9.62% x̄: 3.82% x̃: 2.16%
95% mean confidence interval for cycles value: -125.62 -61.64
95% mean confidence interval for cycles %-change: -0.76% -0.56%
Cycles are helped.

Sandy Bridge
total instructions in shared programs: 10842336 -> 10835438 (-0.06%)
instructions in affected programs: 395340 -> 388442 (-1.74%)
helped: 1926
HURT: 0
helped stats (abs) min: 1 max: 22 x̄: 3.58 x̃: 2
helped stats (rel) min: 0.10% max: 9.68% x̄: 1.78% x̃: 1.42%
95% mean confidence interval for instructions value: -3.73 -3.43
95% mean confidence interval for instructions %-change: -1.84% -1.72%
Instructions are helped.

total cycles in shared programs: 154590074 -> 154569050 (-0.01%)
cycles in affected programs: 8159932 -> 8138908 (-0.26%)
helped: 1670
HURT: 228
helped stats (abs) min: 2 max: 260 x̄: 18.13 x̃: 6
helped stats (rel) min: 0.02% max: 8.70% x̄: 0.74% x̃: 0.28%
HURT stats (abs)   min: 2 max: 1798 x̄: 40.58 x̃: 14
HURT stats (rel)   min: 0.03% max: 12.97% x̄: 1.04% x̃: 0.31%
95% mean confidence interval for cycles value: -13.51 -8.64
95% mean confidence interval for cycles %-change: -0.60% -0.46%
Cycles are helped.

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8212357 -> 8206587 (-0.07%)
instructions in affected programs: 323664 -> 317894 (-1.78%)
helped: 1457
HURT: 0
helped stats (abs) min: 1 max: 12 x̄: 3.96 x̃: 3
helped stats (rel) min: 0.33% max: 11.49% x̄: 1.86% x̃: 1.44%
95% mean confidence interval for instructions value: -4.14 -3.78
95% mean confidence interval for instructions %-change: -1.93% -1.78%
Instructions are helped.

total cycles in shared programs: 187668016 -> 187657422 (<.01%)
cycles in affected programs: 14856234 -> 14845640 (-0.07%)
helped: 1372
HURT: 83
helped stats (abs) min: 2 max: 24 x̄: 7.92 x̃: 6
helped stats (rel) min: 0.02% max: 1.14% x̄: 0.12% x̃: 0.08%
HURT stats (abs)   min: 2 max: 14 x̄: 3.20 x̃: 2
HURT stats (rel)   min: 0.03% max: 0.60% x̄: 0.12% x̃: 0.12%
95% mean confidence interval for cycles value: -7.65 -6.91
95% mean confidence interval for cycles %-change: -0.11% -0.10%
Cycles are helped.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoRevert "swr/rast: Archrast codegen updates"
Eric Engestrom [Fri, 1 Mar 2019 16:37:31 +0000 (16:37 +0000)]
Revert "swr/rast: Archrast codegen updates"

This reverts the following commits:
71a76a47ccb34c5c259781ed49b0013e86dfaa31 "swr/codegen: fix autotools build"
7763e664cefd1e394101b37fbc552b50f820f44a "meson/swr: replace hard-coded path with current_build_dir()"
773b3ceacaf6d32135348e07878b8514a4350b0e "swr/rast: Fix autotools and scons codegen"
16e10b8c304481e423e76311f70de5de9e7424b1 "swr/rast: Add general SWTag statistics"
b45a15a39f7630d569fcf1296dac1415eb758249 "swr/rast: Add string handling to AR event framework"
8608a747aafe6aef42fba148bfcdbb3ca136e7de "swr/rast: Add initial SWTag proto definitions"
93cd9905c8fbb98985ae1a61c0eebdb225fd1325 "swr/rast: Cleanup and generalize gen_archrast"

The last one in this list broke all the build systems that can build
this (meson, autotools & scons).

See MR !304 for more details:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/304

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agofreedreno/a6xx: Enable UBWC modifier
Fritz Koenig [Wed, 27 Feb 2019 02:31:38 +0000 (18:31 -0800)]
freedreno/a6xx: Enable UBWC modifier

Adding the supported_modifiers allows buffers
to be created with UBWC

5 years agofreedreno: UBWC allocator
Fritz Koenig [Mon, 7 Jan 2019 20:00:41 +0000 (12:00 -0800)]
freedreno: UBWC allocator

UBWC requires space for a metadata or flag buffer
that contains compression data. Each 16x4 tile of image
data corresponds to a byte of compression data.

This buffer needs to be stored before (at a lower address)
the image buffer in order to match up with what the
display driver. This allows the display driver to directly
scan-out at UBWC buffer.

5 years agofreedreno/a6xx: UBWC support
Fritz Koenig [Mon, 7 Jan 2019 19:58:53 +0000 (11:58 -0800)]
freedreno/a6xx: UBWC support

Universal bandwidth compression(UBWC) reduces memory bandwidth
by compressing buffers. This compression takes the form of
a full sized image buffer as well as a smaller metadata buffer.

5 years agofreedreno: pass count to query_dmabuf_modifiers
Fritz Koenig [Wed, 27 Feb 2019 04:06:31 +0000 (20:06 -0800)]
freedreno: pass count to query_dmabuf_modifiers

query_dmabuf_modifiers needs to know the max number
of modifiers that the list will hold.

5 years agoanv: fix typo
Eric Engestrom [Wed, 27 Feb 2019 12:02:47 +0000 (12:02 +0000)]
anv: fix typo

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoanv: remove spaces around kwargs assignment
Eric Engestrom [Wed, 27 Feb 2019 10:43:40 +0000 (10:43 +0000)]
anv: remove spaces around kwargs assignment

pylint complains:
> C0326: No space allowed around keyword argument assignment

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoanv: drop unused parameter
Eric Engestrom [Wed, 27 Feb 2019 10:40:52 +0000 (10:40 +0000)]
anv: drop unused parameter

I'm guessing a previous version of this script used an index-based map
of entrypoints, but that's not the case anymore.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoanv: simplify chained comparison
Eric Engestrom [Wed, 27 Feb 2019 10:40:14 +0000 (10:40 +0000)]
anv: simplify chained comparison

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agonir/copy_prop_vars: handle indirect vector elements
Caio Marcelo de Oliveira Filho [Tue, 26 Feb 2019 04:37:59 +0000 (20:37 -0800)]
nir/copy_prop_vars: handle indirect vector elements

Differently than the direct case, the indirect array derefs of vector
are handled like regular derefs, with the exception that we ignore any
vector entry that has SSA values when performing a load.  Such SSA
values don't help loading of the indirect unless we emit an if-ladder.

Copy_derefs are supported for indirects.

Also enable two tests that now pass.

v2: Remove unnecessary temporaries.  Be clearer when identifying the
    case where copy_entry doesn't help when we are dealing with an
    indirect array_deref (of a vector).  (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/copy_prop_vars: prefer using entries from equal derefs
Caio Marcelo de Oliveira Filho [Tue, 29 Jan 2019 20:39:28 +0000 (12:39 -0800)]
nir/copy_prop_vars: prefer using entries from equal derefs

When looking up an entry to use, always prefer an equal match, as it
more likely to contain reusable SSA or derefs to propagate.

This will be necessary when adding entries with array derefs of
vectors, because we don't want the vector if the equal entry (an array
deref of that vector) is present.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/copy_prop_vars: add tests for indirect array deref
Caio Marcelo de Oliveira Filho [Tue, 29 Jan 2019 14:35:20 +0000 (06:35 -0800)]
nir/copy_prop_vars: add tests for indirect array deref

Both on an actual array and on a vector, and an extra test on a vector
mixing direct and indirect access.  The vector tests are disabled and
will be enabled by a later commit.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/copy_prop_vars: handle load/store of vector elements
Caio Marcelo de Oliveira Filho [Mon, 14 Jan 2019 23:28:33 +0000 (15:28 -0800)]
nir/copy_prop_vars: handle load/store of vector elements

When direct array deref is used on a vector type (for loads and
stores), copy_prop_vars is now smart to propagate values it knows
about.

Given a 'vec4 v', storing to v[3] will update the copy entry for v and
it is equivalent to a write to v.w.  Loading from v[1] will try first
to see if there's a known value for v.y -- and drop the load in that
case.

The copy entries still always refer to the entire vectors, so the
operations happen on the parent deref (the 'vector') and the values
are fixed accordingly.

It might be the case now that certain entries have not only different
SSA defs in each element but also those come from different components
than they are set to, because stores to individual elements always
come from a SSA definition with a single component.

Tests related to these cases are now enabled.

v2: Instead of asserting on invalid indices, "load" an undef and
    remove the store.  (Jason)

v3: Merge code path for the cases of is_array_deref_of_vector into the
    regular code path.  Add a base_index parameter to
    value_set_from_value.  (code changes by Jason)

v4: Removed the get_entry_for_deref helper, now being used only once.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/copy_prop_vars: use NIR_MAX_VEC_COMPONENTS
Caio Marcelo de Oliveira Filho [Wed, 16 Jan 2019 19:48:32 +0000 (11:48 -0800)]
nir/copy_prop_vars: use NIR_MAX_VEC_COMPONENTS

Also replace uses of 0xf with the appropriate full mask created from
the number of components.

Note that an increase of MAX might make us change how the data is
stored later on, but for now at least we make sure the pass is not
hardcoded.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/copy_prop_vars: rename/refactor store_to_entry helper
Caio Marcelo de Oliveira Filho [Wed, 16 Jan 2019 19:27:43 +0000 (11:27 -0800)]
nir/copy_prop_vars: rename/refactor store_to_entry helper

The name reflected this function role back when the pass also did dead
write elimination.  So rename it to what it does now, which is setting
a value using another value; and narrow the argument list.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoetnaviv: fix compile warnings
Christian Gmeiner [Fri, 1 Mar 2019 07:42:04 +0000 (08:42 +0100)]
etnaviv: fix compile warnings

Fixes the following compile warnings:

[591/629] Compiling C object 'src/gallium/drivers/etnaviv/df32d18@@etnaviv@sta/etnaviv_context.c.o'.
../../src/ac_mesa/src/gallium/drivers/etnaviv/etnaviv_context.c: In function 'etna_cmd_stream_reset_notify':
../../src/ac_mesa/src/gallium/drivers/etnaviv/etnaviv_context.c:334:22: warning: unused variable 'entry' [-Wunused-variable]
    struct set_entry *entry;
                      ^~~~~
[604/629] Compiling C object 'src/gallium/drivers/etnaviv/df32d18@@etnaviv@sta/etnaviv_resource.c.o'.
../../src/ac_mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c: In function 'etna_resource_used':
../../src/ac_mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c:649:22: warning: unused variable 'entry' [-Wunused-variable]
    struct set_entry *entry;
                      ^~~~~

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
5 years agoetnaviv: fix resource usage tracking across different pipe_context's
Christian Gmeiner [Sat, 23 Feb 2019 15:15:19 +0000 (16:15 +0100)]
etnaviv: fix resource usage tracking across different pipe_context's

A pipe_resource can be shared by all the pipe_context's hanging off the
same pipe_screen.

Changes from v2 -> v3:
 - add locking with mtx_*() to resource and screen (Marek)
Changes from v3 -> v4:
 - drop rsc->lock, just use screen->lock for the entire serialization (Marek)
 - simplify etna_resource_used() flush condition, which also prevents
   potentially flushing resources twice (Marek)
 - don't remove resouces from screen->used_resources in
   etna_cmd_stream_reset_notify(), they may still be used in other
   contexts and may need flushing there later on (Marek)
Changes from v4 -> v5:
 - Fix coding style issues reported by Guido
Changes from v5 -> v6:
 - Add missing locking in etna_transfer_map(..) (Boris)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Boris Brezillon <boris.brezillon@collabora.com>
5 years agoetnaviv: enable ETC2 texture compression support for HALTI0 GPUs
Christian Gmeiner [Thu, 28 Feb 2019 06:26:40 +0000 (07:26 +0100)]
etnaviv: enable ETC2 texture compression support for HALTI0 GPUs

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
5 years agoetnaviv: hook-up etc2 patching
Christian Gmeiner [Thu, 28 Feb 2019 06:26:39 +0000 (07:26 +0100)]
etnaviv: hook-up etc2 patching

Changes v1 -> v2:
 - Avoid the GPU sampling from the resource that gets mutated by the the
   transfer map by setting DRM_ETNA_PREP_WRITE.

Changes v2 -> v3:
 - make use of likely(..)
 - drop minor optimization regarding rsc->layout == ETNA_LAYOUT_LINEAR
 - better documentation why DRM_ETNA_PREP_WRITE is needed

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
5 years agoetnaviv: keep track of mapped bo address
Christian Gmeiner [Thu, 28 Feb 2019 06:26:38 +0000 (07:26 +0100)]
etnaviv: keep track of mapped bo address

Saves us from calling etna_bo_map(..) and saves us from doing the
same offset calcs for map() and unmap() operations.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
5 years agoetnaviv: implement ETC2 block patching for HALTI0
Christian Gmeiner [Thu, 28 Feb 2019 06:26:37 +0000 (07:26 +0100)]
etnaviv: implement ETC2 block patching for HALTI0

ETC2 is supported with HALTI0, however that implementation is buggy
in hardware. The blob driver does per-block patching to work around
this. We need to swap colors for t-mode etc2 blocks.

Changes v2 -> v3:
 - Drop redundant format check

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
5 years agointel/compiler: Re-prefix non-logical surface opcodes with VEC4
Jason Ekstrand [Thu, 21 Feb 2019 16:41:59 +0000 (10:41 -0600)]
intel/compiler: Re-prefix non-logical surface opcodes with VEC4

The scalar back-end uses SHADER_OPCODE_SEND for all surface messages so
we no longer need the non-logical opcodes there.  Prefix them VEC4 so
it's clear that they're only used by the vec4 back-end.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agointel/schedule_instructions: Move some comments
Jason Ekstrand [Thu, 21 Feb 2019 16:32:01 +0000 (10:32 -0600)]
intel/schedule_instructions: Move some comments

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agointel/compiler: Drop unused surface opcodes
Jason Ekstrand [Thu, 21 Feb 2019 16:14:17 +0000 (10:14 -0600)]
intel/compiler: Drop unused surface opcodes

The unused typed surface read/write support in the vec4 back-end has
been dropped and the fs back-end now uses SHADER_OPCODE_SEND for all
image and buffer ops.  There's no reason to keep these opcodes around
anymore.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agointel/fs: Get rid of the IMAGE_SIZE opcode
Jason Ekstrand [Thu, 21 Feb 2019 15:59:35 +0000 (09:59 -0600)]
intel/fs: Get rid of the IMAGE_SIZE opcode

Since switching to SHADER_OPCODE_SEND for image operations, we no longer
need the non-logical opcode.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agointel/vec4: Drop dead code for handling typed surface messages
Jason Ekstrand [Thu, 21 Feb 2019 16:12:07 +0000 (10:12 -0600)]
intel/vec4: Drop dead code for handling typed surface messages

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agointel/fs: Drop the fs_surface_builder
Jason Ekstrand [Mon, 11 Feb 2019 22:11:35 +0000 (16:11 -0600)]
intel/fs: Drop the fs_surface_builder

All of the actual abstraction (except possibly setting size_written)
happens as part of the logical opcodes.  The only thing that the surface
builder is providing at this point is extra levels of functions to call
through.  I'm going to be adding bindless image support soon and all the
extra abstraction here is just getting in the way.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agointel/fs: Re-order logical surface arguments
Jason Ekstrand [Mon, 11 Feb 2019 22:15:50 +0000 (16:15 -0600)]
intel/fs: Re-order logical surface arguments

It makes more sense to start at the surface then move on to the address
and then the data.  Also, this is a really good test of whether or not
we got all the places that use the sources by explicit integer number.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agointel/fs: Add an enum type for logical sampler inst sources
Jason Ekstrand [Mon, 11 Feb 2019 20:51:02 +0000 (14:51 -0600)]
intel/fs: Add an enum type for logical sampler inst sources

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoscons: Workaround failures with MSVC when using SCons 3.0.[2-4].
Jose Fonseca [Thu, 28 Feb 2019 09:53:28 +0000 (09:53 +0000)]
scons: Workaround failures with MSVC when using SCons 3.0.[2-4].

This change applies the workaround suggested by Bill Deegan on the
affected SCons versions.

It also adds a comment with the URL explaining why we were using
customizing the decider and max_drift in the first place, as I had
forgotten all about it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109443
Tested-by: liviuprodea@yahoo.com
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agofreedreno: Fix a couple of warnings
Kristian H. Kristensen [Tue, 26 Feb 2019 06:14:53 +0000 (22:14 -0800)]
freedreno: Fix a couple of warnings

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agofreedreno/a6xx: Don't zero SO buffer addresses
Kristian H. Kristensen [Sat, 23 Feb 2019 19:23:54 +0000 (11:23 -0800)]
freedreno/a6xx: Don't zero SO buffer addresses

Just disable SO in VPC_SO_BUF_CNTL. Less noise in dumps.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agofreedreno/a6xx: Only output MRT control for used framebuffers
Kristian H. Kristensen [Sat, 23 Feb 2019 19:12:23 +0000 (11:12 -0800)]
freedreno/a6xx: Only output MRT control for used framebuffers

Not much of an optimization, but makes for less noise in the command
buffer dumps.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agogitlab-ci: install xmllint to validate 00-mesa-defaults.conf
Eric Engestrom [Wed, 27 Feb 2019 09:48:46 +0000 (09:48 +0000)]
gitlab-ci: install xmllint to validate 00-mesa-defaults.conf

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agodriconf: add DTD to allow the drirc xml (00-mesa-defaults.conf) to be validated
Eric Engestrom [Tue, 26 Feb 2019 12:32:04 +0000 (12:32 +0000)]
driconf: add DTD to allow the drirc xml (00-mesa-defaults.conf) to be validated

This DTD can be used to validate the drirc xml:
$ xmllint --noout --valid 00-mesa-defaults.conf

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agovulkan: use VkBase{In,Out}Structure instead of a custom struct
Eric Engestrom [Thu, 28 Feb 2019 14:48:09 +0000 (14:48 +0000)]
vulkan: use VkBase{In,Out}Structure instead of a custom struct

VkBaseInStructure and VkBaseOutStructure are part of vulkan_core.h
(which is part of vulkan.h)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agovulkan/overlay: add support for fps output in file
Lionel Landwerlin [Mon, 25 Feb 2019 17:48:14 +0000 (17:48 +0000)]
vulkan/overlay: add support for fps output in file

Also make the sampling period configurable.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agovulkan/overlay: rework option parsing
Lionel Landwerlin [Mon, 25 Feb 2019 12:37:27 +0000 (12:37 +0000)]
vulkan/overlay: rework option parsing

Makes adding new options easier.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agovulkan/overlay: fix min/max computations
Lionel Landwerlin [Tue, 26 Feb 2019 12:44:36 +0000 (12:44 +0000)]
vulkan/overlay: fix min/max computations

This shouldn't be condition to the acquire time being visible.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoegl/sl: use kms_swrast with vgem instead of a random GPU
Emil Velikov [Tue, 19 Feb 2019 14:08:08 +0000 (14:08 +0000)]
egl/sl: use kms_swrast with vgem instead of a random GPU

VGEM and kms_swrast were introduced to work with one another.

All we do is CPU rendering to dumb buffers. There is no reason to carve
out GPU memory, increasing the memory pressure on a device that could
make a better use of it.

Note:
 - The original code did not work out of the box, since the dumb buffer
ioctls are not exposed to render nodes.
 - This requires libdrm commit 3df8a7f0 ("xf86drm: fallback to MODALIAS
for OF less platform devices")
 - The non-kms, swrast is unaffected by this change.

v2:
 - elaborate what and how is/isn't working (Eric)
 - simplify driver_name handling (Eric)

v3:
 - move node_type outside of the loop (Eric)
 - kill no longer needed DRM_RENDER_DEV_NAME define

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
5 years agoegl/sl: use drmDevice API to enumerate available devices
Emil Velikov [Tue, 19 Feb 2019 14:08:07 +0000 (14:08 +0000)]
egl/sl: use drmDevice API to enumerate available devices

This provides for a more comprehensive iteration and slightly more
straight-forward codebase.

v2:
 - s/dpy/disp/
 - keep original 64 devices (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
5 years agoegl/sl: split out swrast probe into separate function
Emil Velikov [Tue, 19 Feb 2019 14:08:06 +0000 (14:08 +0000)]
egl/sl: split out swrast probe into separate function

Make the code a bit easier to read.

As a bonus point this makes it obvious that we forgot to call
_eglAddDevice() for the device - do so.

v2:
 - s/dpy/disp/ (Eric)
 - free(driver_name) on dri2_load_driver_swrast() failure (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de> (v1)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
5 years agonir/spirv: return after emitting a branch in block
Juan A. Suarez Romero [Wed, 27 Feb 2019 10:42:00 +0000 (10:42 +0000)]
nir/spirv: return after emitting a branch in block

When emitting a branch in a block, it does not make sense to continue
processing further instructions, as they will not be reachable.

This fixes a nasty case with a loop with a branch that both then-part
and else-part exits the loop:

%1 = OpLabel
     OpLoopMerge %2 %3 None
     OpBranchConditional %false %2 %2
%3 = OpLabel
     OpBranch %1
%2 = OpLabel
    [...]

We know that block %1 will branch always to block %2, which is the merge
block for the loop. And thus a break is emitted. If we keep continuing
processing further instructions, we will be processing the branch
conditional and thus emitting the proper NIR conditional, which leads to
instructions after the break.

This fixes dEQP-VK.graphicsfuzz.continue-and-merge.

CC: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoegl/android: replace magic 0=CbCr,1=CrCb with simple enum
Eric Engestrom [Fri, 9 Nov 2018 11:55:10 +0000 (11:55 +0000)]
egl/android: replace magic 0=CbCr,1=CrCb with simple enum

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agost/nir: count num_uniforms for FS bultin shader
Caio Marcelo de Oliveira Filho [Wed, 27 Feb 2019 06:29:27 +0000 (22:29 -0800)]
st/nir: count num_uniforms for FS bultin shader

Usually the uniforms will be assigned locations and have their slots
counted automatically, but for builtin shaders the location assignment
is manual.  So count them too otherwise we get num_uniforms == 0.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoglx: fix shared memory leak in X11
Ray Zhang [Wed, 27 Feb 2019 06:54:05 +0000 (06:54 +0000)]
glx: fix shared memory leak in X11

call XShmDetach to allow X server to free shared memory

Fixes: bcd80be49a8260c2233d "drisw/glx: use XShm if possible"
Signed-off-by: Ray Zhang <zhanglei002@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agoradeonsi/nir: move si_lower_nir() call into compiler thread
Timothy Arceri [Wed, 27 Feb 2019 03:30:29 +0000 (14:30 +1100)]
radeonsi/nir: move si_lower_nir() call into compiler thread

This helps improve compile times. For example the shader-db dolphin
shader shaders/dolphin/ubershaders/120.shader_test goes from
~1.69 -> ~1.57 seconds on my machine with this change.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoglsl: fix shader cache for packed param list
Timothy Arceri [Wed, 27 Feb 2019 07:26:07 +0000 (18:26 +1100)]
glsl: fix shader cache for packed param list

Some types of params such as some builtins are always padded. We
need to keep track of this so we can restore the list correctly.

Here we also remove a couple of cache entries that are not actually
required as they get rebuilt by the _mesa_add_parameter() calls.

This patch fixes a bunch of arb_texture_multisample and
arb_sample_shading piglit tests for the radeonsi NIR backend.

Fixes: edded1237607 ("mesa: rework ParameterList to allow packing")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoi965: Fix allow_higher_compat_version workaround limited by OpenGL 3.0
Yevhenii Kolesnikov [Mon, 25 Feb 2019 14:21:48 +0000 (16:21 +0200)]
i965: Fix allow_higher_compat_version workaround limited by OpenGL 3.0

Added check for higher compat profile being allowed
before assigning certain extensions.

Fixes: 272fe9494232 (mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile)
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107052

5 years agointel/compiler: use correct swizzle for replacement
Lionel Landwerlin [Wed, 27 Feb 2019 15:53:21 +0000 (15:53 +0000)]
intel/compiler: use correct swizzle for replacement

The optimization in 4cd1a0be76883c introduced a replacement of :

cmp(8).z.f0.0 vgrf11.y:D, vgrf10.xxxx:D, vgrf2.xyyy:D
...
cmp(8).nz.f0.0 null.x:D, vgrf11.yyyy:D, 0D

By :

cmp(8).z.f0.0 vgrf15.x:D, vgrf10.xxxx:D, vgrf2.yyyy:D
...
mov(8) vgrf11.y:D, vgrf15.yyyy:D

The first cmp instruction is storing in x while the second mov is
sourcing from y. We need to take into account where the replacement on
the scan_inst destination is going to store thing so that the
replacement mov can source things from the correct location.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4cd1a0be76883c ("i965/vec4: Propagate conditional modifiers from more compares to other compares")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109759
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agofreedreno: catch failing fd_blit and fallback to software blit
Jonathan Marek [Tue, 26 Feb 2019 16:54:56 +0000 (11:54 -0500)]
freedreno: catch failing fd_blit and fallback to software blit

Fixes cases where the fd_blit fails and never happens (ex: blit to etc1)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
5 years agofreedreno: use renderonly path for buffers allocated with modifiers
Jonathan Marek [Wed, 20 Feb 2019 10:50:47 +0000 (11:50 +0100)]
freedreno: use renderonly path for buffers allocated with modifiers

Now that freedreno has create_with_modifiers(), this "hack" is needed to
make some cases work. Copied from vc4.

Fixes: 41ddf1d1
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
5 years agofreedreno: a2xx: fix mipmapping for NPOT textures
Jonathan Marek [Tue, 26 Feb 2019 17:00:01 +0000 (12:00 -0500)]
freedreno: a2xx: fix mipmapping for NPOT textures

Fixes: 3a273a4a
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
5 years agofreedreno: a2xx: fix fast clear for some gmem configurations
Jonathan Marek [Tue, 19 Feb 2019 18:01:55 +0000 (19:01 +0100)]
freedreno: a2xx: fix fast clear for some gmem configurations

In freedreno_gmem.c, gmem_align of 0x8000 is used. Alignment used here
should be the same.

Fixes: 912a9c8d
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
5 years agofreedreno: a2xx: add use_hw_binning function
Jonathan Marek [Tue, 19 Feb 2019 21:41:54 +0000 (22:41 +0100)]
freedreno: a2xx: add use_hw_binning function

Fixes: cb2322c7
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
5 years agofreedreno: a2xx: don't write 4th vertex in mem2gmem
Jonathan Marek [Fri, 22 Feb 2019 18:21:27 +0000 (19:21 +0100)]
freedreno: a2xx: don't write 4th vertex in mem2gmem

There is only room for 3 vertices now (RECT has 3 vertices).

Fixes: 6ef7700a
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
5 years agoswr/codegen: fix autotools build
Erik Faye-Lund [Tue, 26 Feb 2019 13:53:25 +0000 (14:53 +0100)]
swr/codegen: fix autotools build

When the output directory was changed, the BUILT_SOURCES and build-rule
target-path was no longer correct, leading to races to generate the
sources and compiling them.

Fix this by updating both sets of paths, so automake see what's going on
here.

Fixes: 773b3ceacaf ("swr/rast: Fix autotools and scons codegen")
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Alok Hota <alok.hota@intel.com>
5 years agoutil/os_misc: Add check for PIPE_OS_HURD
Timo Aaltonen [Wed, 6 Feb 2019 08:02:40 +0000 (10:02 +0200)]
util/os_misc: Add check for PIPE_OS_HURD

Fix build on Hurd.

Signed-off-by: Timo Aaltonen <tjaalton@debian.org>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
5 years agovulkan/overlay: install layer binary in libdir
Lionel Landwerlin [Tue, 26 Feb 2019 23:23:03 +0000 (23:23 +0000)]
vulkan/overlay: install layer binary in libdir

This will allow multilib.

v2: Drop path from json file, dlopen should be able to locate the lib in libdir

v3: Switch from configure_file to install_data (Dylan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109788
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agomeson/swr: replace hard-coded path with current_build_dir()
Eric Engestrom [Tue, 26 Feb 2019 14:30:53 +0000 (14:30 +0000)]
meson/swr: replace hard-coded path with current_build_dir()

Fixes: 93cd9905c8fbb98985ae "swr/rast: Cleanup and generalize gen_archrast"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Alok Hota <alok.hota@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agonir: Add posibility to not lower to source mod 'abs' for ops with three sources
Gert Wollny [Sat, 2 Feb 2019 17:38:17 +0000 (18:38 +0100)]
nir: Add posibility to not lower to source mod 'abs' for ops with three sources

This is useful for r600 since there the abs source modifier is not supported
for ops with three sources

v2: Use correct logic to enable lowering to abs source mod (Eric Anhold)

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agovirgl/vtest: deprecate protocol version 1
Gurchetan Singh [Fri, 14 Dec 2018 23:12:48 +0000 (15:12 -0800)]
virgl/vtest: deprecate protocol version 1

This is a partial revert of 9d81cd ("virgl: Pass resource size and
transfer offsets").

The adjustments made in the client code means there's various
mismatches when transfering data.

Let's fallback to protocol version 0 and deprecate protocol
version 1.  We can still use the protocol version 1 slots for
a shared memory transfer mechanism later.

Fixes:
  dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.*_renderbuffer

Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
5 years agoutil: fix a warning when building against clang7 headers
Tapani Pälli [Tue, 26 Feb 2019 10:51:07 +0000 (12:51 +0200)]
util: fix a warning when building against clang7 headers

Header xmmintrin.h conditionally includes emmintrin.h that defines
_MM_DENORMALS_ZERO_MASK, add ifndef to fix this warning.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agoiris: add libmesa_iris_gen8 library to the build
Tapani Pälli [Tue, 26 Feb 2019 08:21:32 +0000 (10:21 +0200)]
iris: add libmesa_iris_gen8 library to the build

Patch fixes iris build on Android.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agoandroid: make libbacktrace optional on USE_LIBBACKTRACE
Tapani Pälli [Tue, 26 Feb 2019 08:27:15 +0000 (10:27 +0200)]
android: make libbacktrace optional on USE_LIBBACKTRACE

Otherwise with VNDK enabled we fail linking:
   src/gallium/targets/dri/Android.mk: error: gallium_dri (native:vendor)
   should not link to libbacktrace.vendor (native:vndk_private)

Option makes it possible to use libbacktrace only when VNDK is not
enabled.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agoandroid: add liblog to libmesa_intel_common build
Tapani Pälli [Thu, 21 Feb 2019 13:00:10 +0000 (15:00 +0200)]
android: add liblog to libmesa_intel_common build

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agopanfrost/midgard: Allow flt to run on most units
Alyssa Rosenzweig [Mon, 25 Feb 2019 03:42:12 +0000 (03:42 +0000)]
panfrost/midgard: Allow flt to run on most units

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Expose perf counters in environment
Alyssa Rosenzweig [Mon, 25 Feb 2019 03:31:29 +0000 (03:31 +0000)]
panfrost: Expose perf counters in environment

Previously, we were guarded by an #ifdef, which is generally a bad form.
This patch instead guards them behind an environmental variable.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Identify 4-bit channel texture formats
Alyssa Rosenzweig [Sun, 24 Feb 2019 06:28:39 +0000 (06:28 +0000)]
panfrost: Identify 4-bit channel texture formats

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Add RGB565, RGB5A1 texture formats
Alyssa Rosenzweig [Sun, 24 Feb 2019 05:43:14 +0000 (05:43 +0000)]
panfrost: Add RGB565, RGB5A1 texture formats

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agoiris: Enable ARB_shader_draw_parameters support
Jose Maria Casanova Crespo [Tue, 26 Feb 2019 13:37:23 +0000 (14:37 +0100)]
iris: Enable ARB_shader_draw_parameters support

Additional VERTEX_ELEMENT_STATE are used to store basevertex and
baseinstance and drawid updating the DWordLength of the
3DSTATE_VERTEX_ELEMENTS command.

This passes all piglit tests for spec.*draw_parameters.* tests
and VK-GL-CTS KHR-GL45.shader_draw_parameters_tests.* tests.

Now we only mark a dirty_update when parameters are changed or
when we have an indirect draw.

We enable PIPE_CAP_DRAW_PARAMETERS on Iris.

There is no edge flag support in the Vertex Elements setup.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoclover: Fix indentation issues
Pierre Moreau [Sat, 2 Feb 2019 14:33:51 +0000 (15:33 +0100)]
clover: Fix indentation issues

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover: Only use devices supporting IR_NATIVE
Pierre Moreau [Wed, 30 Jan 2019 17:38:18 +0000 (18:38 +0100)]
clover: Only use devices supporting IR_NATIVE

Currently clover will advertise any device that advertises
PIPE_CAP_COMPUTE, even if they do not support PIPE_SHADER_IR_NATIVE,
which is the IR used internally by clover.
This avoids clover advertising devices as available even though they
actually are not supported.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover: Move platform extensions definitions to clover/platform.cpp
Pierre Moreau [Thu, 18 Jan 2018 22:42:51 +0000 (23:42 +0100)]
clover: Move platform extensions definitions to clover/platform.cpp

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Aaron Watry <awatry@gmail.com>
5 years agoclover: Move device extensions definitions to core/device.cpp
Pierre Moreau [Sun, 21 Jan 2018 17:49:00 +0000 (18:49 +0100)]
clover: Move device extensions definitions to core/device.cpp

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Aaron Watry <awatry@gmail.com>
5 years agoclover: Validate program and library linking options
Pierre Moreau [Wed, 30 Jan 2019 21:27:54 +0000 (22:27 +0100)]
clover: Validate program and library linking options

Program linking options are only valid if the library was created with
the `-enable-link-options` option, which itself is only valid when
creating a library, and only when creating an executable.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover: Disallow creating libraries from other libraries
Pierre Moreau [Sat, 27 Jan 2018 17:25:31 +0000 (18:25 +0100)]
clover: Disallow creating libraries from other libraries

If creating a library, do not allow non-compiled object in it, as
executables are not allowed, and libraries would make it really hard to
enforce the "-enable-link-options" flag.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Aaron Watry <awatry@gmail.com>
5 years agoclover/api: Fail if trying to build a non-executable binary
Pierre Moreau [Sat, 27 Jan 2018 17:12:16 +0000 (18:12 +0100)]
clover/api: Fail if trying to build a non-executable binary

From the OpenCL 1.2 Specification, Section 5.6.2 (about clBuildProgram):

> If program is created with clCreateProgramWithBinary, then the
> program binary must be an executable binary (not a compiled binary or
> library).

Reviewed-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover/api: Rework the validation of devices for building
Pierre Moreau [Sat, 27 Jan 2018 17:11:17 +0000 (18:11 +0100)]
clover/api: Rework the validation of devices for building

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover: Add an helper for checking if an IR is supported
Pierre Moreau [Tue, 3 Oct 2017 19:07:45 +0000 (21:07 +0200)]
clover: Add an helper for checking if an IR is supported

Reviewed-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover: Remove the TGSI backend as unused
Pierre Moreau [Sat, 10 Feb 2018 15:56:11 +0000 (16:56 +0100)]
clover: Remove the TGSI backend as unused

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover: Avoid warnings from new OpenCL headers
Pierre Moreau [Fri, 1 Feb 2019 11:33:37 +0000 (12:33 +0100)]
clover: Avoid warnings from new OpenCL headers

* Avoid warnings from references to deprecated CL 1.0, 1.2, 2.0 and 2.1 APIs.
* Avoid warnings from not defining CL_TARGET_OPENCL_VERSION.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoclover: update ICD table to support everything up to 2.2
Karol Herbst [Mon, 22 Jan 2018 09:33:36 +0000 (10:33 +0100)]
clover: update ICD table to support everything up to 2.2

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agoinclude/CL: Update to the latest OpenCL 2.2 headers
Pierre Moreau [Sun, 28 Jan 2018 10:38:46 +0000 (11:38 +0100)]
include/CL: Update to the latest OpenCL 2.2 headers

Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
5 years agogallium/u_tests: use a compute-only context to test GCN compute ring
Marek Olšák [Mon, 11 Feb 2019 19:33:32 +0000 (14:33 -0500)]
gallium/u_tests: use a compute-only context to test GCN compute ring

5 years agoradeonsi: always use compute rings for clover on CI and newer (v2)
Marek Olšák [Thu, 7 Feb 2019 05:01:13 +0000 (00:01 -0500)]
radeonsi: always use compute rings for clover on CI and newer (v2)

initialize all non-compute context functions to NULL.

v2: fix SI

5 years agoradv: Interpolate less aggressively.
Bas Nieuwenhuizen [Sat, 23 Feb 2019 13:33:31 +0000 (14:33 +0100)]
radv: Interpolate less aggressively.

Seems like dxvk used integer builtins without setting the flat
interpolation decoration.

I believe in the current spec the app is required to set these,
but in the meantime to avoid breaking things in stable releases
(and so close to release for 19.0), only expand the interpolation
to float16 and struct (which cannot be builtins as our spirv parser
lowers the builtin block).

Fixes: f3247841040 "radv: Allow interpolation on non-float types."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoutil: Don't block SIGSYS for new threads
Drew Davenport [Sat, 23 Feb 2019 07:04:52 +0000 (00:04 -0700)]
util: Don't block SIGSYS for new threads

SIGSYS is needed for programs using seccomp for sandboxing.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agofreedreno/ir3: gsampler2DMSArray fixes
Rob Clark [Tue, 26 Feb 2019 15:57:16 +0000 (10:57 -0500)]
freedreno/ir3: gsampler2DMSArray fixes

Array index should come before sample-id.  And exclude all isam variants
(which take integer texel coords) from adding of offset.

Fixes dEQP-GLES31.functional.texture.multisample.samples_1.use_texture_*_2d_array

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3/a6xx: fix atomic shader outputs
Rob Clark [Tue, 26 Feb 2019 15:06:25 +0000 (10:06 -0500)]
freedreno/ir3/a6xx: fix atomic shader outputs

We also need to put in the output mov.  Possibly we could just fixup the
output register to read it directly from the dummy, but that is more
work and I guess dEQP is probably the only time you encounter this.

Fixes dEQP-GLES31.functional.shaders.opaque_type_indexing.atomic_counter.const_literal_fragment

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: vertex_id is not _zero_based
Rob Clark [Tue, 26 Feb 2019 13:28:09 +0000 (08:28 -0500)]
freedreno/a6xx: vertex_id is not _zero_based

Fixes dEQP-GLES31.functional.draw_base_vertex.draw_elements_base_vertex.builtin_variable.vertex_id

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: fix DRAW_IDX_INDIRECT max_indicies
Rob Clark [Tue, 26 Feb 2019 12:56:58 +0000 (07:56 -0500)]
freedreno/a6xx: fix DRAW_IDX_INDIRECT max_indicies

The indirect offset does not effect the index buffer size.  Fixes all of
dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawelements_combined_grid_100x100_drawcount_*
with drawcount > 1.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3/a6xx: fix non-ssa atomic dst
Rob Clark [Mon, 25 Feb 2019 19:22:04 +0000 (14:22 -0500)]
freedreno/ir3/a6xx: fix non-ssa atomic dst

We weren't propagating the array info for cases where result of atomic
is array/reg.  This can happen, for example, if result is part of a phi
web lowered to regs.

Fixes dEQP-GLES31.functional.ssbo.atomic.compswap.*

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: fix ssbo alignment
Rob Clark [Mon, 25 Feb 2019 15:15:29 +0000 (10:15 -0500)]
freedreno/a6xx: fix ssbo alignment

Fixes a bunch of deqp ssbo tests that use multiple ssbo blocks packed
into a single buffer.

Note the a5xx value seems suspicious, but this is what blob seems to
advertise.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: use nopN encoding when possible
Rob Clark [Sat, 23 Feb 2019 16:14:32 +0000 (11:14 -0500)]
freedreno/ir3: use nopN encoding when possible

Use the (nopN) encoding for slightly denser shaders.. this lets us fold
nop instructions into the previous alu instruction in certain cases.

Shouldn't change the # of cycles a shader takes to execute, but reduces
the size.  (ex: glmark2 refract goes from 168 to 116 instructions)

Currently only enabled for a6xx, but I think we could enable this for
a5xx and possibly a4xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: fix hangs with large shaders
Rob Clark [Fri, 22 Feb 2019 20:01:17 +0000 (15:01 -0500)]
freedreno/a6xx: fix hangs with large shaders

We were overflowing instrlen (which is # of groups of 16 instructions)
in a couple dEQP tests, causing gpu hangs:

dEQP-GLES31.functional.ubo.random.all_per_block_buffers.13
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.20

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agomesa: fix display list corner case assertion
Brian Paul [Mon, 25 Feb 2019 21:51:37 +0000 (14:51 -0700)]
mesa: fix display list corner case assertion

This fixes a failed assertion in glDeleteLists() for the following
case:

list = glGenLists(1);
glDeleteLists(list, 1);

when those are the first display list commands issued by the
application.

When we generate display lists, we plug in empty lists created with
the make_list() helper.  This function uses the OPCODE_END_OF_LIST
opcode but does not call dlist_alloc() which would set the
InstSize[OPCODE_END_OF_LIST] element to non-zero.

When the empty list was deleted, we failed the InstSize[opcode] > 0
assertion.

Typically, display lists are created with glNewList/glEndList so we
set InstSize[OPCODE_END_OF_LIST] = 1 in dlist_alloc().  That's why
this bug wasn't found before.

To fix this failure, simply initialize the InstSize[OPCODE_END_OF_LIST]
element in make_list().

The game oolite was hitting this.

Fixes: https://github.com/OoliteProject/oolite/issues/325
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agosvga: fix dma.pending > 0 test
Brian Paul [Fri, 1 Feb 2019 03:01:30 +0000 (20:01 -0700)]
svga: fix dma.pending > 0 test

The dma.pending field is boolean, so testing for > 0 isn't right.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
5 years agosvga: assorted whitespace and formatting fixes
Brian Paul [Fri, 1 Feb 2019 02:58:30 +0000 (19:58 -0700)]
svga: assorted whitespace and formatting fixes

Remove trailing whitespace, etc.

Trivial.