mesa.git
11 years agogallium: add SQRT shader opcode
Brian Paul [Fri, 1 Feb 2013 17:59:43 +0000 (10:59 -0700)]
gallium: add SQRT shader opcode

The glsl-to-tgsi translater will emit SQRT to implement GLSL's sqrt()
and distance() functions if the PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
query says it's supported by the driver.

Otherwise, sqrt(x) is implemented with x*rsq(x).  The problem with
this is sqrt(0) must be handled specially because rsq(0) might be
Inf/NaN/undefined (and then 0*rsq(0) is Inf/Nan/undefined).  In the
glsl-to-tgsi code we use an extra CMP to check if x is zero and then
replace the result of x*rsq(x) with zero.

In the end, this makes sqrt() generate much more reasonable code for
drivers that can do square roots.

Note that many of piglit's generated shader tests use the GLSL
distance() function.

11 years agoradeonsi: Remove spurious traces of R16G16B16 support.
Michel Dänzer [Fri, 25 Jan 2013 15:04:37 +0000 (16:04 +0100)]
radeonsi: Remove spurious traces of R16G16B16 support.

The hardware can't do it, and these were causing warnings in some piglit tests.

NOTE: This is a candidate for the 9.1 branch.

11 years agoradeonsi: Enable texture arrays.
Michel Dänzer [Fri, 25 Jan 2013 17:30:30 +0000 (18:30 +0100)]
radeonsi: Enable texture arrays.

28/30 piglit tests pass.

NOTE: This is a candidate for the 9.1 branch.

11 years agoradeonsi: Improve packing of texture address parameters.
Michel Dänzer [Fri, 25 Jan 2013 11:10:11 +0000 (12:10 +0100)]
radeonsi: Improve packing of texture address parameters.

In particular, the LOD bias and depth comparison values are packed before the
'normal' texture coordinates, and the array slice and LOD values are appended.

NOTE: This is a candidate for the 9.1 branch.

11 years agoradeonsi: Adapt to sample intrinsics changes.
Michel Dänzer [Thu, 24 Jan 2013 17:54:51 +0000 (18:54 +0100)]
radeonsi: Adapt to sample intrinsics changes.

Fix up intrinsic names, and bitcast texture address parameters to integers.

NOTE: This is a candidate for the 9.1 branch.

11 years agost/mesa: simplify the update_single_texture() function
Brian Paul [Sat, 2 Feb 2013 01:00:45 +0000 (18:00 -0700)]
st/mesa: simplify the update_single_texture() function

In particular, rework the sRGB/linear format selection code.
There's no reason to mess with the Mesa format.
Just do everything in terms of the gallium pipe_format.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
11 years agost/mesa: merge st_ChooseTextureFormat_renderable() into st_ChooseTextureFormat()
Brian Paul [Fri, 1 Feb 2013 18:44:35 +0000 (11:44 -0700)]
st/mesa: merge st_ChooseTextureFormat_renderable() into st_ChooseTextureFormat()

That was the only place it was being called from.

11 years agost/mesa: improve the format choosing code for DrawPixels
Brian Paul [Fri, 1 Feb 2013 18:38:28 +0000 (11:38 -0700)]
st/mesa: improve the format choosing code for DrawPixels

The code before was getting a pipe format, then calling
st_pipe_format_to_mesa_format() and then converting back again with
st_mesa_format_to_pipe_format().  This removes one conversion step.

11 years agogallium: handle unhandled PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT
Andreas Boll [Thu, 31 Jan 2013 08:35:14 +0000 (09:35 +0100)]
gallium: handle unhandled PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60098

Signed-off-by: Brian Paul <brianp@vmware.com>
11 years agost/mesa: don't choose DXT formats if we can't do DXT compression
Brian Paul [Fri, 1 Feb 2013 01:52:57 +0000 (18:52 -0700)]
st/mesa: don't choose DXT formats if we can't do DXT compression

If we call gl[Copy]TexImage2D() with a generic compression format
(e.g. intFormat=GL_COMPRESSED_RGBA) we can't choose a DXT format if
we don't have the external DXT compression library.

We weren't actually enforcing this before since the
pipe_screen::is_format_supported(DXT) query has no dependency on
the DXT compression library.

Now if we're given a generic compressed format and we can't do DXT
compression we'll fall back to a non-compressed format.

v2: use util_format_is_s3tc() function and add more comments about
the allow_dxt parameter.

Note: This is a candidate for the stable branches.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
11 years agomesa: don't use format chooser code for glCompressedTexImage
Brian Paul [Fri, 1 Feb 2013 01:49:01 +0000 (18:49 -0700)]
mesa: don't use format chooser code for glCompressedTexImage

When glCompressedTexImage is called the internalFormat is a specific
format for the incoming image and the the hardware format should be
the same (since we never do format transcoding).  So use the simpler
_mesa_glenum_to_compressed_format() function.  This change is also
needed for the next patch.

Note: This is a candidate for the stable branches.

11 years agoi965: Fix the SF Vertex URB Read Length calculation for Gen7 platforms.
Kenneth Graunke [Sat, 2 Feb 2013 20:46:57 +0000 (12:46 -0800)]
i965: Fix the SF Vertex URB Read Length calculation for Gen7 platforms.

Ivybridge doesn't appear to have the same errata as Sandybridge; no
corruption was observed by setting it to more than the minimal correct
value.  It's possible that we were simply lucky, since the URB entries
are 1024-bit on Ivybridge vs. 512-bit Sandybridge.  Or perhaps the
underlying hardware issue is fixed.

Either way, we may as well program the minimum value since it's now
readily available, likely to be more efficient, and possibly more
correct.

v2: Use GEN7_SBE_* defines rather than GEN6_SF_*.  (A copy and paste
    mistake.)  They're the same, but using the right names is better.

NOTE: This is a candidate for all stable branches.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
11 years agoi965: Fix the SF Vertex URB Read Length calculation for Sandybridge.
Kenneth Graunke [Sat, 2 Feb 2013 20:46:49 +0000 (12:46 -0800)]
i965: Fix the SF Vertex URB Read Length calculation for Sandybridge.

(This commit message was primarily written by Paul Berry, who explained
 what's going on far better than I would have.)

Previous to this patch, we thought that the only restrictions on
3DSTATE_SF's URB read length were (a) it needs to be large enough to
read all the VUE data that the SF needs, and (b) it can't be so large
that it tries to read VUE data that doesn't exist.  Since the VUE map
already tells us how much VUE data exists, we didn't bother worrying
about restriction (a); we just did the easy thing and programmed the
read length to satisfy restriction (b).

However, we didn't notice this erratum in the hardware docs: "[errata]
Corruption/Hang possible if length programmed larger than recommended".
Judging by the context surrounding this erratum, it's pretty clear that
it means "URB read length must be exactly the size necessary to read all
the VUE data that the SF needs, and no larger".  Which means that we
can't program the read length based on restriction (b)--we have to
program it based on restriction (a).

The URB read size needs to precisely match the amount of data that the
SF consumes; it doesn't work to simply base it on the size of the VUE.

Thankfully, the PRM contains the precise formula the hardware expects.

Fixes random UI corruption in Steam's "Big Picture Mode", random terrain
corruption in PlaneShift, and Piglit's fbo-5-varyings test.

NOTE: This is a candidate for all stable branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56920
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60172
Tested-by: Jordan Justen <jordan.l.justen@intel.com> (v1/Piglit)
Tested-by: Martin Steigerwald <martin@lichtvoll.de> (PlaneShift)
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
11 years agoi965: Compute the maximum SF source attribute.
Kenneth Graunke [Sat, 2 Feb 2013 20:40:54 +0000 (12:40 -0800)]
i965: Compute the maximum SF source attribute.

The maximum SF source attribute is necessary to compute the Vertex URB
read length properly, which will be done in the next commit.

NOTE: This is a candidate for all stable branches.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Tested-by: Martin Steigerwald <martin@lichtvoll.de>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
11 years agoi965: Refactor Gen6+ SF attribute override code.
Kenneth Graunke [Sat, 2 Feb 2013 20:33:21 +0000 (12:33 -0800)]
i965: Refactor Gen6+ SF attribute override code.

The next patch will benefit from easy access to the source attribute
number and whether or not we're swizzling.  It doesn't want the final
attr_override DWord form, however.

NOTE: This is a candidate for all stable branches.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Tested-by: Martin Steigerwald <martin@lichtvoll.de>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
11 years agoglsl: Remove hash table from ir_set_program_inouts pass.
Kenneth Graunke [Thu, 31 Jan 2013 06:11:17 +0000 (22:11 -0800)]
glsl: Remove hash table from ir_set_program_inouts pass.

Back when ir_var_in and ir_var_out signified both function parameters
and shader input/outputs, we had trouble distinguishing the two when
looking at a dereference.  Now that we have separate ir_var_shader_in
and ir_var_shader_out modes, we can determine this easily.

Removing the hash table saves memory and CPU overhead.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
11 years agoi965: Remove dead field brw_wm_prog_data::error.
Kenneth Graunke [Thu, 31 Jan 2013 05:39:00 +0000 (21:39 -0800)]
i965: Remove dead field brw_wm_prog_data::error.

11 years agoi965: Remove dead field brw_context::constant_map.
Kenneth Graunke [Thu, 31 Jan 2013 05:36:38 +0000 (21:36 -0800)]
i965: Remove dead field brw_context::constant_map.

This was used by the old VS backend, but that's long gone.

11 years agor600g: Fix memory leak.
Vinson Lee [Fri, 1 Feb 2013 07:45:13 +0000 (23:45 -0800)]
r600g: Fix memory leak.

Fixes resource leak defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agoegl/dri2: Fix memory leak.
Vinson Lee [Fri, 1 Feb 2013 07:41:14 +0000 (23:41 -0800)]
egl/dri2: Fix memory leak.

Fixes resource leak defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agonv30: Fix memory leak.
Vinson Lee [Fri, 1 Feb 2013 07:37:41 +0000 (23:37 -0800)]
nv30: Fix memory leak.

Fixes resource leak defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agonv50: Fix memory leak.
Vinson Lee [Fri, 1 Feb 2013 07:35:26 +0000 (23:35 -0800)]
nv50: Fix memory leak.

Fixes resource leak defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agonvc0: Fix memory leak.
Vinson Lee [Fri, 1 Feb 2013 07:32:41 +0000 (23:32 -0800)]
nvc0: Fix memory leak.

Fixes resource leak defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agoswrast: Fix memory leak.
Vinson Lee [Fri, 1 Feb 2013 07:28:41 +0000 (23:28 -0800)]
swrast: Fix memory leak.

Fixes resource leak defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agoconfigure.ac: Fix --with-llvm-shared-libs
Quentin Glidic [Fri, 25 Jan 2013 14:02:04 +0000 (15:02 +0100)]
configure.ac: Fix --with-llvm-shared-libs

The third argument of AC_ARG_WITH is evaluated for any provided value,
not only on --with-, so it must not force-enable the feature
Also, setting $with_llvm_shared_libs in the opencl check was overriding
the user switch

https://bugs.freedesktop.org/show_bug.cgi?id=59851

Signed-off-by: Quentin Glidic <sardemff7+git@sardemff7.net>
11 years agor600g/llvm: Select the correct GPU type for RV670
Tom Stellard [Fri, 1 Feb 2013 16:03:56 +0000 (16:03 +0000)]
r600g/llvm: Select the correct GPU type for RV670

RV670 belongs in the R600 chip class

https://bugs.freedesktop.org/show_bug.cgi?id=58666

NOTE: This is a candidate for the 9.1 branch

11 years agointel: implement create image from texture
Abdiel Janulgue [Wed, 28 Nov 2012 11:30:18 +0000 (13:30 +0200)]
intel: implement create image from texture

Save miptree level info to DRIImage:
- Appropriately-aligned base offset pointing to the image
- Additional x/y adjustment offsets from above.

v8:  -Bump intelImageExtension version
v9:  -Don't use internal _eglError but implement error reporting in new DRI inteface
      instead. This fixes Android build problems based on feedback from
      Adrian M Negreanu and Chad Versace.
     -Move the non-tile-aligned check and error-reporting to intel_set_texture_image_region
v10: -Don't #include "egl/main/eglcurrent.h". [chadv]

Reviewed-by: Eric Anholt <eric@anholt.net> (v6)
Acked-by: Chad Versace <chad.versace@linux.intel.com> (v10)
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agointel: Account for mt->offset in intel_miptree_map
Abdiel Janulgue [Fri, 25 Jan 2013 13:37:00 +0000 (15:37 +0200)]
intel: Account for mt->offset in intel_miptree_map

We need to take account the offset from original bo when using glTexSubImage()
and other functions that manipulate the subregion of an exported texture.
Offsets are appended to mapped region address and when blitting from a source
region.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agointel: Create a miptree using offsets in intel_set_texture_image_region
Abdiel Janulgue [Wed, 28 Nov 2012 13:10:33 +0000 (15:10 +0200)]
intel: Create a miptree using offsets in intel_set_texture_image_region

When binding a region to a texture image, re-create the miptree base-level
considering the offset and dimension information exported by DRIImage.

v8: - Move the alignment surface address checks from the image-from-texture
      code to the texture-from-image side. This allows the error reporting to conform to
      OES_EGL_Image and to prevent mixing up EGL and GL errors. Reported by Chad Versace.
    - Addressed an existing issue in renderbuffer case where there is a
      a possibility of creating EGL images out of depthstencil textures which isn't
      really possible. This was spotted by Eric earlier.

Reviewed-by: Eric Anholt <eric@anholt.net> (v6)
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> (v8)
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agoi965: Account for offsets when updating SURFACE_STATE.
Abdiel Janulgue [Wed, 28 Nov 2012 10:34:21 +0000 (12:34 +0200)]
i965: Account for offsets when updating SURFACE_STATE.

If the offsets are present, this lets us specify a particular level and slice
in a shared region using the base level of an exported mip-map tree.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agointel: add pixel offset calculator for miptree levels
Abdiel Janulgue [Fri, 7 Dec 2012 11:40:35 +0000 (13:40 +0200)]
intel: add pixel offset calculator for miptree levels

Add helper to calculate fine-grained x and y adjustment pixels
to an image within a miptree level for tiled regions.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agointel: Expose intel_miptree_create_internal as intel_miptree_create_layout.
Abdiel Janulgue [Thu, 17 Jan 2013 15:04:01 +0000 (17:04 +0200)]
intel: Expose intel_miptree_create_internal as intel_miptree_create_layout.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agointel: expose dimensions and offsets of a miptree level in DRIImage
Abdiel Janulgue [Thu, 17 Jan 2013 15:04:27 +0000 (17:04 +0200)]
intel: expose dimensions and offsets of a miptree level in DRIImage

v8: - Append has_depthstencil field in DRIImage structure.

Reviewed-by: Eric Anholt <eric@anholt.net> (v6)
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> (v8)
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agodri2: Create image from texture
Abdiel Janulgue [Tue, 27 Nov 2012 13:19:54 +0000 (15:19 +0200)]
dri2: Create image from texture

Add create image from texture extension and bump version.

v8: - Add appropriate image errors codes in DRI interface so we don't
      have to use internal EGL functions in driver. Suggested by Chad Versace.

Reviewed-by: Eric Anholt <eric@anholt.net> (v6)
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> (v8)
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
11 years agoradeonsi: Fix draws using user index buffer.
Michel Dänzer [Fri, 1 Feb 2013 17:49:07 +0000 (18:49 +0100)]
radeonsi: Fix draws using user index buffer.

Was broken since commit bf469f4edc60bd1c5fd770cb231b8d5ab801427f
('gallium: add void *user_buffer in pipe_index_buffer').

Fixes 11 piglit tests and lots of missing geometry e.g. in TORCS.

NOTE: This is a candidate for the 9.1 branch.

11 years agost/mesa: whitespace/indentation fix
Brian Paul [Fri, 1 Feb 2013 00:57:24 +0000 (17:57 -0700)]
st/mesa: whitespace/indentation fix

11 years agosvga: check for NaN shader immediates
Brian Paul [Thu, 31 Jan 2013 00:44:25 +0000 (17:44 -0700)]
svga: check for NaN shader immediates

The svga device doesn't handle them.  Replace with zeros.
Fixes several piglit tests, such as "glsl-const-builtin-inversesqrt".

Reviewed-by: Reviewed-by: José Fonseca <jfonseca@vmware.com>
11 years agosvga: add, use SVGA3D_SURFACE_HINT_VOLUME flag
Brian Paul [Thu, 31 Jan 2013 00:43:57 +0000 (17:43 -0700)]
svga: add, use SVGA3D_SURFACE_HINT_VOLUME flag

Reviewed-by: Reviewed-by: José Fonseca <jfonseca@vmware.com>
11 years agotrace: measure time for each gallium call
Brian Paul [Wed, 30 Jan 2013 22:45:08 +0000 (15:45 -0700)]
trace: measure time for each gallium call

To get a rough idea of how much time is spent in each gallium driver
function.  The time is measured in microseconds.

11 years agotrace: add void to function definition
Brian Paul [Tue, 29 Jan 2013 23:49:58 +0000 (16:49 -0700)]
trace: add void to function definition

11 years agotrace: allow GALLIUM_TRACE=stdout/stderr
Brian Paul [Tue, 29 Jan 2013 23:48:25 +0000 (16:48 -0700)]
trace: allow GALLIUM_TRACE=stdout/stderr

11 years agoradeonsi: port some of get_shader_param changes from r600g
Marek Olšák [Thu, 31 Jan 2013 18:40:24 +0000 (19:40 +0100)]
radeonsi: port some of get_shader_param changes from r600g

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
11 years agomesa: don't expose IBM_rasterpos_clip in a core context
Marek Olšák [Tue, 29 Jan 2013 14:55:10 +0000 (15:55 +0100)]
mesa: don't expose IBM_rasterpos_clip in a core context

glRasterPos doesn't exist in the core profile.

NOTE: This is a candidate for the stable branches (9.0 and 9.1).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
11 years agor300g: always put MSAA resources in VRAM
Marek Olšák [Thu, 31 Jan 2013 23:32:55 +0000 (00:32 +0100)]
r300g: always put MSAA resources in VRAM

This along with the latest drm-fixes branch should help with bad performance
of MSAA. Remember: Nx MSAA can't be more than N times slower (where N=2,4,6).

Anyway, I recommend at least 512 MB of VRAM for Full HD 6x MSAA.

NOTE: This is a candidate for the 9.1 branch.

11 years agoconfigure.ac: GLX cannot work without OpenGL
Michel Dänzer [Thu, 31 Jan 2013 10:47:55 +0000 (11:47 +0100)]
configure.ac: GLX cannot work without OpenGL

GLX uses mapi/glapi/libglapi.la, which is only built for OpenGL.

If the user specified --enable-xlib-glx --disable-opengl, error out, as these
cannot be both observed at the same time. If the user just specified
--disable-opengl but not --disable-glx, print a warning and disable GLX as
well.

NOTE: This is a candidate for the stable branches.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59364

Tested-by: Tom Stellard <thomas.stellard@amd.com>
11 years agor600g: remove broken assert from r600_isa.c
Vadim Girlin [Fri, 1 Feb 2013 09:19:35 +0000 (13:19 +0400)]
r600g: remove broken assert from r600_isa.c

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
11 years agor600g: implement shader disassembler v3
Vadim Girlin [Fri, 1 Feb 2013 07:46:29 +0000 (11:46 +0400)]
r600g: implement shader disassembler v3

R600_DUMP_SHADERS environment var now allows to choose dump method:
 0 (default) - no dump
 1 - full dump (old dump)
 2 - disassemble
 3 - both

v2: fix output for burst_count > 1
v3: use more human-readable output for kcache data in CF_ALU_xxx clauses,
    improve output for ALU_EXTENDED, other minor fixes

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
11 years agor600g: use tables with ISA info v3
Vadim Girlin [Fri, 1 Feb 2013 07:45:35 +0000 (11:45 +0400)]
r600g: use tables with ISA info v3

v3: added some flags including condition codes for ALU,
    fixed issue with CF reverse lookup (overlapping ranges of CF_ALU_xxx
    and other CF instructions)
    rebased on current master

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
11 years agoglapi: Do not use backtrace on MinGW.
Vinson Lee [Thu, 31 Jan 2013 07:23:54 +0000 (23:23 -0800)]
glapi: Do not use backtrace on MinGW.

execinfo.h is not available on MinGW.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
11 years agor600g: add cs memory usage accounting and limit it v3
Jerome Glisse [Tue, 29 Jan 2013 17:52:17 +0000 (12:52 -0500)]
r600g: add cs memory usage accounting and limit it v3

We are now seing cs that can go over the vram+gtt size to avoid
failing flush early cs that goes over 70% (gtt+vram) usage. 70%
is use to allow some fragmentation.

The idea is to compute a gross estimate of memory requirement of
each draw call. After each draw call, memory will be precisely
accounted. So the uncertainty is only on the current draw call.
In practice this gave very good estimate (+/- 10% of the target
memory limit).

v2: Remove left over from testing version, remove useless NULL
    checking. Improve commit message.
v3: Add comment to code on memory accounting precision

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
11 years agor600g: fix htile buffer leak
Marek Olšák [Thu, 31 Jan 2013 14:29:16 +0000 (15:29 +0100)]
r600g: fix htile buffer leak

NOTE: This is a candidate for the 9.1 branch.

11 years agomesa: bump version to 9.2 (devel)
Andreas Boll [Wed, 30 Jan 2013 20:07:54 +0000 (21:07 +0100)]
mesa: bump version to 9.2 (devel)

Now that branch 9.1 is created, bump the minor version in
master.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
11 years agoRevert "mesa: Return INVALID_OPERATION when type is known but not allowed"
Matt Turner [Wed, 30 Jan 2013 00:35:30 +0000 (16:35 -0800)]
Revert "mesa: Return INVALID_OPERATION when type is known but not allowed"

This reverts commit 2906e2034c9d674601960a5b586b6e986e6ef04f.

Fixes a regression in the glean depthStencil test.

Reverting this does not affect any tests in es3conform, so a more recent
patch must have also fixed the failure this one was intended to fix.

Reported-by: lu hua <huax.lu@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59494

11 years agomesa: Add TexBufferRange to dispatch_sanity.
Kenneth Graunke [Wed, 30 Jan 2013 18:48:05 +0000 (10:48 -0800)]
mesa: Add TexBufferRange to dispatch_sanity.

Christoph implemented this, so we should expect it to be present now.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60082

11 years agonv50,nvc0: fix/enable texture buffer objects
Christoph Bumiller [Sat, 12 Jan 2013 13:59:43 +0000 (14:59 +0100)]
nv50,nvc0: fix/enable texture buffer objects

11 years agost/mesa: add support for GL_ARB_texture_buffer_range
Christoph Bumiller [Sat, 22 Dec 2012 12:46:27 +0000 (13:46 +0100)]
st/mesa: add support for GL_ARB_texture_buffer_range

v2: Update to handle BufferSize being -1 and return a NULL sampler
view if the specified range would cause out of bounds access.

Reviewed-by: Brian Paul <brianp@vmware.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
11 years agogallium: add PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT
Christoph Bumiller [Sun, 16 Dec 2012 16:23:15 +0000 (17:23 +0100)]
gallium: add PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT

Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agomesa: implement GL_ARB_texture_buffer_range
Christoph Bumiller [Fri, 25 Jan 2013 13:54:05 +0000 (14:54 +0100)]
mesa: implement GL_ARB_texture_buffer_range

v2: Record texObj.BufferSize as -1 in TexBuffer(non-Range) instead
of the buffer's current size so we know we always have to use the
full size of the buffer object (i.e. even if it changes without the
user calling TexBuffer again) for the texture.

Clarify invalid offset alignment error message.

v3: Use extra GL_CORE-only section in get_hash_params.py for
TEXTURE_BUFFER_OFFSET_ALIGNMENT.

v4: Remove unnecessary check for profile in _mesa_TexBufferRange.
Add check for extension enable in get_tex_level_parameter_buffer.

v5: Fix position in gl_API.xml.
Add comment about meaning of BufferSize == -1.

v6: Add back checks for core profile and add a note about it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
11 years agobuild: Add missing comma in AS_IF
Matt Turner [Tue, 29 Jan 2013 19:22:06 +0000 (11:22 -0800)]
build: Add missing comma in AS_IF

Reported-by: Lauri Kasanen<curaga@operamail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47248#c15

11 years agomesa: remove ctx->Driver.Error() hook
Brian Paul [Tue, 29 Jan 2013 19:09:56 +0000 (12:09 -0700)]
mesa: remove ctx->Driver.Error() hook

Not used by any driver anymore.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
11 years agoglx: Check that swap_buffers_reply is non-NULL before using it
Stéphane Marchesin [Mon, 28 Jan 2013 23:04:00 +0000 (15:04 -0800)]
glx: Check that swap_buffers_reply is non-NULL before using it

Check that the return value from xcb_dri2_swap_buffers_reply is
non-NULL before accessing the struct members.

Note: This is a candidate for the 9.0 branch.

Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agomesa: fix comment typo: s/formaat/format/
Brian Paul [Tue, 29 Jan 2013 18:52:39 +0000 (11:52 -0700)]
mesa: fix comment typo: s/formaat/format/

11 years agollvmpipe: Don't advertise S8_UNORM (with feeble attempt at supporting it).
José Fonseca [Tue, 29 Jan 2013 13:27:44 +0000 (13:27 +0000)]
llvmpipe: Don't advertise S8_UNORM (with feeble attempt at supporting it).

S8_UNORM was inadvertedly supported together with Z16_UNORM.

I tried to update the code to accomodate stencil-only -- it seemed a simple
thing to do -- but "fbo-stencil clear GL_STENCIL_INDEX8" still fails,
and it's not worth debugging.

Therefore although this change tries to update for S8_UNORM, it also
disables it completely.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
11 years agollvmpipe: Fix deferred depth writes for Z16_UNORM.
José Fonseca [Tue, 29 Jan 2013 10:45:01 +0000 (10:45 +0000)]
llvmpipe: Fix deferred depth writes for Z16_UNORM.

This special path hadn't been exercised by my earlier testing, and mask
values weren't being properly truncated to match the values.

This change fixes that.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
11 years agodraw: fix draw_llvm_variant_key struct padding to avoid recompiles
Roland Scheidegger [Tue, 29 Jan 2013 16:39:09 +0000 (08:39 -0800)]
draw: fix draw_llvm_variant_key struct padding to avoid recompiles

The struct padding got broken by c789b981b244333cfc903bcd1e2fefc010500013.
This caused serious performance regression because part of the key was
uninitialized and hence the shader always recompiled (at least on release
builds...).
While here also fix key size calculation when the number of samplers
and the number of sampler views are different.

v2: add comment

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agodocs/relnotes-9.1: document new features in radeon drivers
Marek Olšák [Tue, 29 Jan 2013 16:32:14 +0000 (17:32 +0100)]
docs/relnotes-9.1: document new features in radeon drivers

11 years agodocs: more VMware guest driver info, tips
Brian Paul [Tue, 29 Jan 2013 00:44:46 +0000 (17:44 -0700)]
docs: more VMware guest driver info, tips

11 years agost/mesa: only enable GL_EXT_framebuffer_multisample if GL_MAX_SAMPLES >= 2
Brian Paul [Mon, 28 Jan 2013 18:32:13 +0000 (11:32 -0700)]
st/mesa: only enable GL_EXT_framebuffer_multisample if GL_MAX_SAMPLES >= 2

We never really have multisampling with one sample per pixel.
See also http://bugs.freedesktop.org/show_bug.cgi?id=59873

Note: This is a candidate for the 9.0 branch.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
11 years agomesa: don't enable GL_EXT_framebuffer_multisample for software drivers
Brian Paul [Mon, 28 Jan 2013 18:31:33 +0000 (11:31 -0700)]
mesa: don't enable GL_EXT_framebuffer_multisample for software drivers

Note: This is a candidate for the 9.0 branch.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
11 years agoosmesa: use _mesa_generate_mipmap() for mipmap generation, not meta
Brian Paul [Sat, 26 Jan 2013 18:07:35 +0000 (11:07 -0700)]
osmesa: use _mesa_generate_mipmap() for mipmap generation, not meta

See previous commit for more info.

Note: This is a candidate for the 9.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
11 years agoxlib: use _mesa_generate_mipmap() for mipmap generation, not meta
Brian Paul [Sat, 26 Jan 2013 17:58:37 +0000 (10:58 -0700)]
xlib: use _mesa_generate_mipmap() for mipmap generation, not meta

The swrast fragment program interpreter has trouble computing the
right texture LOD because it doesn't have easy access to input
derivatives.  This causes the GLSL-based meta generate mipmap code
to fetch texels from the wrong mipmap level.

One possible fix would be to set the GL_TEXTURE_MIN/MAX_LOD parameters
to limit sampling from the right level.  But let's just use the
_mesa_generate_mipmap() fallback since it's a lot faster than using
the fragment shader interpreter.

Fixes http://bugs.freedesktop.org/show_bug.cgi?id=54240

Note: This is a candidate for the 9.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
11 years agost/mesa: set ctx->Const.MaxSamples = 0, not 1
Brian Paul [Sat, 26 Jan 2013 17:09:37 +0000 (10:09 -0700)]
st/mesa: set ctx->Const.MaxSamples = 0, not 1

The gallium docs for pipe_screen::is_format_supported() says that
samples==0 or samples==1 both mean that multisampling is not supported.
Return GL_MAX_SAMPLES==0 instead of 1 for consistency with other drivers.

Note: This is a candidate for the 9.0 branch.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
11 years agoxlib: stop use _mesa_enable_extension(), just set the boolean flags
Brian Paul [Mon, 28 Jan 2013 19:58:53 +0000 (12:58 -0700)]
xlib: stop use _mesa_enable_extension(), just set the boolean flags

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
11 years agoxlib: fix incorrect GL_ANGLE_texture_compression_dxt enable
Brian Paul [Sat, 26 Jan 2013 16:43:07 +0000 (09:43 -0700)]
xlib: fix incorrect GL_ANGLE_texture_compression_dxt enable

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
11 years agollvmpipe: Support Z16_UNORM as depth-stencil format.
José Fonseca [Mon, 28 Jan 2013 19:10:22 +0000 (19:10 +0000)]
llvmpipe: Support Z16_UNORM as depth-stencil format.

Simply by adjusting the vector element width after/before
reading/writing the depth-stencil values.

Ran several GL_DEPTH_COMPONENT16 piglit tests without regressions.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
11 years agoi965: Add chipset limits for Haswell GT1/GT2.
Kenneth Graunke [Sat, 13 Aug 2011 01:27:16 +0000 (18:27 -0700)]
i965: Add chipset limits for Haswell GT1/GT2.

The maximum number of URB entries come from the 3DSTATE_URB_VS and
3DSTATE_URB_GS state packet documentation; the thread count information
comes from the 3DSTATE_VS and 3DSTATE_PS state packet documentation.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
11 years agointel: Un-hardcode lengths from blitter commands.
Kenneth Graunke [Mon, 14 Jan 2013 22:22:38 +0000 (14:22 -0800)]
intel: Un-hardcode lengths from blitter commands.

The packet length may change at some point in the future.  Specifying it
explicitly (rather than hardcoding it in the command #define) allows us
to change it much more easily in the future.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
11 years agoRemove APIspec.dtd
Matt Turner [Mon, 21 Jan 2013 18:11:52 +0000 (10:11 -0800)]
Remove APIspec.dtd

Left behind by a8ab7e33.

11 years agodocs: List new extensions added in Mesa 9.1
Matt Turner [Fri, 25 Jan 2013 23:06:16 +0000 (15:06 -0800)]
docs: List new extensions added in Mesa 9.1

I did not list the *_get_program_binary extensions since they're not
useful to anyone with their current implementation (that supports 0
binary formats).

11 years agointel: Use a CPU map of the batch on LLC-sharing architectures.
Eric Anholt [Sat, 19 Jan 2013 02:18:57 +0000 (18:18 -0800)]
intel: Use a CPU map of the batch on LLC-sharing architectures.

Before, we were keeping a CPU-only buffer to accumulate the batchbuffer in,
which was an improvement over mapping the batch through the GTT directly
(since any readback or other failure to stream through write combining
correctly would hurt).  However, on LLC-sharing architectures we can do better
by mapping the batch directly, which reduces the cache footprint of the
application since we no longer have this extra copy of a batchbuffer around.

Improves performance of GLBenchmark 2.1 offscreen on IVB by 3.5% +/- 0.4%
(n=21).  Improves Lightsmark performance by 1.1 +/- 0.1% (n=76).  Improves
cairo-gl performance by 1.9% +/- 1.4% (n=57).

No statistically significant difference in GLB2.1 on SNB (n=37).  Improves
cairo-gl performance by 2.1% +/- 0.1% (n=278).

11 years agor600g: use uint64_t instead of unsigned long for proper 32bits cpu support
Jerome Glisse [Tue, 29 Jan 2013 00:07:10 +0000 (19:07 -0500)]
r600g: use uint64_t instead of unsigned long for proper 32bits cpu support

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
11 years agor600g: real fix for non 3.8 kernel
Jerome Glisse [Mon, 28 Jan 2013 22:14:09 +0000 (17:14 -0500)]
r600g: real fix for non 3.8 kernel

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
11 years agoi965: Fix assignment instead of comparison in asserts.
Vinson Lee [Sat, 26 Jan 2013 07:27:50 +0000 (08:27 +0100)]
i965: Fix assignment instead of comparison in asserts.

Fixes side effect in assertion defects reported by Coverity.

Note: This is a candidate for the 9.1 branch.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
11 years agoandroid: use gralloc_drm_get_gem_handle api
Tapani Pälli [Thu, 24 Jan 2013 07:56:47 +0000 (09:56 +0200)]
android: use gralloc_drm_get_gem_handle api

Currently a gralloc internal structure is exposed to Mesa,
Use a query function instead to maintain ABI compatibility.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
11 years agointel: Typo fix: "pitsh" -> "pitch"
Paul Berry [Mon, 28 Jan 2013 20:30:46 +0000 (12:30 -0800)]
intel: Typo fix: "pitsh" -> "pitch"

Comment change only.

11 years agor600g: fix segfault with old kernel
Jerome Glisse [Mon, 28 Jan 2013 19:48:46 +0000 (14:48 -0500)]
r600g: fix segfault with old kernel

Old kernel do not have dma support, patch pushed were missing some
of the check needed to not use dma.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
11 years agoglx: only advertise GLX_INTEL_swap_event if it's supported
Zack Rusin [Fri, 25 Jan 2013 01:48:12 +0000 (17:48 -0800)]
glx: only advertise GLX_INTEL_swap_event if it's supported

Only drivers supporting DRI2 version >=4 support GLX_INTEL_swap_event.
So lets mark it as such otherwise applications which use this extension
(i.e. everything based on Clutter, e.g. gnome-shell) break horribly on
drivers supporting DRI2 versions only up to 3.

Note: This is a candidate for the 9.0 branch.

Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agor600g: improve inputs/interpolation handling with llvm backend
Vadim Girlin [Wed, 23 Jan 2013 20:30:02 +0000 (21:30 +0100)]
r600g: improve inputs/interpolation handling with llvm backend

Get rid of special handling for reserved regs.
Use one intrinsic for all kinds of interpolation.

v2[Vincent Lejeune]: Rebased against current master

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
11 years agor600g: Add ar_chan member to struct r600_bytecode
Tom Stellard [Tue, 22 Jan 2013 20:22:11 +0000 (21:22 +0100)]
r600g: Add ar_chan member to struct r600_bytecode

r600_bytecode::ar_chan stores the register channel for the value that
will be loaded into the AR register.

At the moment, this field is only used by the LLVM backend.  The default
backend always sets ar_chan = 0.

11 years agor600g: More robust checks for MOVA_INT instructions
Tom Stellard [Tue, 22 Jan 2013 20:22:10 +0000 (21:22 +0100)]
r600g: More robust checks for MOVA_INT instructions

11 years agor600g/llvm: Add dummy export for vs output
Vincent Lejeune [Fri, 25 Jan 2013 15:27:06 +0000 (16:27 +0100)]
r600g/llvm: Add dummy export for vs output

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=59588
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
11 years agor600g: Fix building with --enable-r600-llvm-compiler
Tom Stellard [Sat, 26 Jan 2013 01:50:31 +0000 (20:50 -0500)]
r600g: Fix building with --enable-r600-llvm-compiler

https://bugs.freedesktop.org/show_bug.cgi?id=59877

11 years agor600g: don't emit WAIT_UNTIL on cayman/TN (v2)
Alex Deucher [Mon, 28 Jan 2013 03:13:52 +0000 (22:13 -0500)]
r600g: don't emit WAIT_UNTIL on cayman/TN (v2)

It shouldn't be needed and older kernels don't support
it.

v2: Replace with PS partial flush as before.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=59945

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
11 years agor600g: add async for staging buffer upload v2
Jerome Glisse [Mon, 7 Jan 2013 22:45:59 +0000 (17:45 -0500)]
r600g: add async for staging buffer upload v2

v2: Add virtual address to dma src/dst offset for cayman

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
11 years agor600g: add multi ring support with dma as first second ring v4
Jerome Glisse [Mon, 7 Jan 2013 19:25:11 +0000 (14:25 -0500)]
r600g: add multi ring support with dma as first second ring v4

We keep track of ring emission order in a stack, whenever we need to
flush we empty the stack in a fifo order. There is few helpers function
for bo mapping and other ring activities that will make sure that
the ring stack is properly flush and submitted.

v2: fix st flush path, and other flush path to properly flush all
    rings if necessary
v3: - improve name of ring helpers
    - make sure that each time a cs is gona be written it endup at
      top of the stack to avoid any issue such as :
      STACK[0] = dma (withbo A,B)
      STACK[1] = gfx (withbo C,D)
      Now if code try to emit a dma command relative to bo C or D
      it will start writting cmd stream into the cs and once it
      reach the point where it adds relocation it will flush.
      At that point the cs will have cmd that don't have proper
      relocation into the relocation buffer and kernel will just
      refuse to run.
v4: - Drop the stack idea as it turn out there is no way to use it
      or benefit from it. Any time the driver start command on other
      ring, it always need to flush the previous ring. So make code
      simpler by not using a stack.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
11 years agoradeon/winsys: add dma ring support to winsys v3
Jerome Glisse [Mon, 7 Jan 2013 16:49:23 +0000 (11:49 -0500)]
radeon/winsys: add dma ring support to winsys v3

Add ring support, you can create a cs for each ring. DMA ring is
bit special regarding relocation as you must emit as much relocation
as there is use of the buffer.

v2: - Improved comment on relocation changes
    - Use a single thread to queue cs submittion this simplify driver
      code while not impacting performances. Rational for this is that
      you have to wait for all previous submission to have completed
      so there was never a case while we could have 2 different thread
      submitting a command stream at the same time. This code just
      consolidate submission into one single thread per winsys.
v3: - Do not use semaphore for empty queue signaling, instead use
      cond var. This is because it's tricky to maintain an even number
      of call to semaphore wait and semaphore signal (the number of
      cs in the stack would for instance make that number vary).

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
11 years agogallivm,draw,llvmpipe: mass rename of unit->texture_unit/sampler_unit
Roland Scheidegger [Sat, 26 Jan 2013 00:33:43 +0000 (16:33 -0800)]
gallivm,draw,llvmpipe: mass rename of unit->texture_unit/sampler_unit

Make it obvious what "unit" this is (no change in functionality).
draw still uses "unit" in places where it changes the shader by adding
texture sampling itself - it seems like this can't work with shaders
using dx10-style sample opcodes (can't mix gl-style and dx10-style
sample instructions in a shader).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
11 years agogallivm: split sampler and texture state
Roland Scheidegger [Mon, 28 Jan 2013 14:50:36 +0000 (06:50 -0800)]
gallivm: split sampler and texture state

Split the sampler interface to use separate sampler and texture (sampler_view)
state. This is needed to support dx10-style sampling instructions.
This is not quite complete since both draw/llvmpipe don't really track
textures/samplers independently yet, as well as the gallivm code not quite
using the right sampler or texture index respectively (but it should work
for the sampling codes used by opengl).
We are however losing some optimizations in the process, apply_max_lod will
no longer work, and we potentially could end up with more (unnecessary)
recompiles (if switching textures with/without mipmaps only so it shouldn't
be too bad).

v2: don't use different callback structs for sampler/sampler view functions
(which just complicates things), fix up sampling code to actually use the
right texture or sampler index, and similar for llvmpipe/draw actually
distinguish between samplers and sampler views.

v3: fix more of PIPE_MAX_SAMPLER / PIPE_MAX_SHADER_SAMPLER_VIEWS mismatches
(both in draw and llvmpipe), based on feedback from José get rid of unneeded
static sampler derived state.(which also fixes the only 2 piglit regressions
due to a forgotten assignment), fix comments based on Brian's feedback.

v4: remove some accidental unrelated whitespace changes

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agogallium/u_upload_mgr: fix a serious memory leak
Marek Olšák [Mon, 28 Jan 2013 01:47:24 +0000 (02:47 +0100)]
gallium/u_upload_mgr: fix a serious memory leak

It can eat all memory and crash in a matter of minutes with r600g.

11 years agonouveau: don't try to use push_data if it's not implemented
Christoph Bumiller [Fri, 25 Jan 2013 18:37:40 +0000 (19:37 +0100)]
nouveau: don't try to use push_data if it's not implemented