Carl Love [Thu, 6 Jul 2017 14:34:41 +0000 (14:34 +0000)]
ChangeLog: Clean up from mid air collision
gcc/ChangeLog:
2017-07-06 Carl Love <cel@us.ibm.com>
* ChangeLog: Clean up from mid air collision
gcc/testsuite/ChangeLog:
2017-07-06 Carl Love <cel@us.ibm.com>
* ChangeLog: Clean up from mid air collision
From-SVN: r250024
Carl Love [Thu, 6 Jul 2017 14:28:15 +0000 (14:28 +0000)]
rs6000-c.c: Add support for built-in functions vector signed int vec_subc (vector signed int...
gcc/ChangeLog:
2017-07-06 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c: Add support for built-in functions
vector signed int vec_subc (vector signed int, vector signed int);
vector signed __int128 vec_subc (vector signed __int128,
vector signed __int128);
vector unsigned __int128 vec_subc (vector unsigned __int128,
vector unsigned __int128);
vector signed int vec_sube (vector signed int, vector signed int,
vector signed int);
vector unsigned int vec_sube (vector unsigned int,
vector unsigned int,
vector unsigned int);
vector signed __int128 vec_sube (vector signed __int128,
vector signed __int128,
vector signed__int128);
vector unsigned __int128 vec_sube (vector unsigned __int128,
vector unsigned __int128,
vector unsigned __int128);
vector signed int vec_subec (vector signed int, vector signed int,
vector signed int);
vector unsigned int vec_subec (vector unsigned int,
vector unsigned int,
vector unsigned int);
vector signed __int128 vec_subec (vector signed __int128,
vector signed __int128,
vector signed__int128);
vector unsigned __int128 vec_subec (vector unsigned __int128,
vector unsigned __int128,
vector unsigned __int128);
* config/rs6000/rs6000.c (ALTIVEC_BUILTIN_VEC_SUBE,
ALTIVEC_BUILTIN_VEC_SUBEC): Add ef_builtins.
* config/rs6000/rs6000-builtin.def (SUBE, SUBEC): Add
BU_ALTIVEC_OVERLOAD_X definitions.
* config/rs6000/altivec.h (vec_sube, vec_subec): Add builtin defines.
* doc/extend.texi: Update the built-in documentation file for the new
built-in functions.
gcc/testsuite/ChangeLog:
2017-07-06 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/p8vector-builtin-8.c (foo): Add test cases for
the new vec_subc, vec_sube, vec_subec built-ins. Add the missing test
cases for vec_addc, adde and addec builtins.
From-SVN: r250023
David Malcolm [Thu, 6 Jul 2017 14:17:24 +0000 (14:17 +0000)]
diagnostics: fix end-points of ranges within macros (PR c++/79300)
gcc/ChangeLog:
PR c++/79300
* diagnostic-show-locus.c (layout::layout): Use start and finish
spelling location for the start and finish of each range.
* genmatch.c (linemap_client_expand_location_to_spelling_point):
Add unused aspect param.
* input.c (expand_location_1): Add "aspect" param, and use it
to access the correct part of the location.
(expand_location): Pass LOCATION_ASPECT_CARET to new param of
expand_location_1.
(expand_location_to_spelling_point): Likewise.
(linemap_client_expand_location_to_spelling_point): Add "aspect"
param, and pass it to expand_location_1.
gcc/testsuite/ChangeLog:
PR c++/79300
* c-c++-common/Wmisleading-indentation-3.c (fn_14): Update
expected underlining within macro expansion.
* c-c++-common/pr70264.c: Likewise.
* g++.dg/plugin/diagnostic-test-expressions-1.C
(test_within_macro_1): New test.
(test_within_macro_2): Likewise.
(test_within_macro_3): Likewise.
(test_within_macro_4): Likewise.
* gcc.dg/format/diagnostic-ranges.c (test_macro_3): Update
expected underlining within macro expansion.
(test_macro_4): Likewise.
* gcc.dg/plugin/diagnostic-test-expressions-1.c
(test_within_macro_1): New test.
(test_within_macro_2): Likewise.
(test_within_macro_3): Likewise.
(test_within_macro_4): Likewise.
* gcc.dg/spellcheck-fields-2.c (test_macro): Update expected
underlining within macro expansion.
libcpp/ChangeLog:
PR c++/79300
* include/line-map.h (enum location_aspect): New enum.
(linemap_client_expand_location_to_spelling_point): Add
enum location_aspect param.
* line-map.c (rich_location::get_expanded_location): Update for
new param of linemap_client_expand_location_to_spelling_point.
(rich_location::maybe_add_fixit): Likewise.
(fixit_hint::affects_line_p): Likewise.
From-SVN: r250022
Jonathan Wakely [Thu, 6 Jul 2017 12:42:51 +0000 (13:42 +0100)]
Fix memory leaks in libstdc++ tests
* testsuite/20_util/specialized_algorithms/memory_management_tools/
1.cc: Free memory.
* testsuite/22_locale/locale/cons/5.cc: Remove redundant restoration
of original environment and free memory.
From-SVN: r250021
Jonathan Wakely [Thu, 6 Jul 2017 12:42:46 +0000 (13:42 +0100)]
Fix memory leaks in libstdc++ ABI tests
* testsuite/abi/pr42230.cc: Free memory.
* testsuite/util/testsuite_abi.cc (demangle): Return std::string
instead of pointer that might need freeing.
* testsuite/util/testsuite_abi.h (demangle): Likewise.
* testsuite/util/testsuite_hooks.cc (verify_demangle): Free memory.
From-SVN: r250020
Jonathan Wakely [Thu, 6 Jul 2017 11:54:10 +0000 (12:54 +0100)]
Prevent __uses_alloc from holding dangling references
* include/bits/uses_allocator.h (__use_alloc(const _Alloc&&)): Add
deleted overload to prevent dangling references to rvalues.
* include/experimental/memory_resource
(polymorphic_allocator::construct): Do not call __use_alloc with
rvalue arguments.
From-SVN: r250019
Sebastian Peryt [Thu, 6 Jul 2017 11:52:05 +0000 (13:52 +0200)]
Add missing intrinsics for VGETMANT[SD,SS] and VGETEXP[SD,SS]
gcc/
* config/i386/avx512fintrin.h (_mm_mask_getexp_round_ss,
_mm_maskz_getexp_round_ss, _mm_mask_getexp_round_sd,
_mm_maskz_getexp_round_sd, _mm_mask_getmant_round_sd,
_mm_maskz_getmant_round_sd, _mm_mask_getmant_round_ss,
_mm_maskz_getmant_round_ss, _mm_mask_getexp_ss, _mm_maskz_getexp_ss,
_mm_mask_getexp_sd, _mm_maskz_getexp_sd, _mm_mask_getmant_sd,
_mm_maskz_getmant_sd, _mm_mask_getmant_ss,
_mm_maskz_getmant_ss): New intrinsics.
(__builtin_ia32_getexpss128_mask): Changed to ...
__builtin_ia32_getexpss128_round ... this.
(__builtin_ia32_getexpsd128_mask): Changed to ...
__builtin_ia32_getexpsd128_round ... this.
* config/i386/i386-builtin-types.def
((V2DF, V2DF, V2DF, INT, V2DF, UQI, INT),
(V4SF, V4SF, V4SF, INT, V4SF, UQI, INT)): New function type aliases.
* config/i386/i386-builtin.def (__builtin_ia32_getexpsd_mask_round,
__builtin_ia32_getexpss_mask_round, __builtin_ia32_getmantsd_mask_round,
__builtin_ia32_getmantss_mask_round): New builtins.
* config/i386/i386.c (V2DF_FTYPE_V2DF_V2DF_INT_V2DF_UQI_INT,
V4SF_FTYPE_V4SF_V4SF_INT_V4SF_UQI_INT): Handle new types.
(CODE_FOR_avx512f_vgetmantv2df_mask_round,
CODE_FOR_avx512f_vgetmantv4sf_mask_round): New cases.
* config/i386/sse.md
(avx512f_sgetexp<mode><round_saeonly_name>): Changed to ...
avx512f_sgetexp<mode><mask_scalar_name>
<round_saeonly_scalar_name> ... this.
(vgetexp<ssescalarmodesuffix>\t{<round_saeonly_op3>%2, %1, %0|
%0, %1, %2<round_saeonly_op3>}): Changed to ...
vgetexp<ssescalarmodesuffix>
\t{<round_saeonly_scalar_mask_op3>%2, %1, %0<mask_scalar_operand3>|
%0<mask_scalar_operand3>, %1, %2<round_saeonly_scalar_mask_op3>} ... this.
(avx512f_vgetmant<mode><round_saeonly_name>): Changed to ...
avx512f_vgetmant<mode><mask_scalar_name>
<round_saeonly_scalar_name> ... this.
(vgetmant<ssescalarmodesuffix>\t{%3, <round_saeonly_op4>%2, %1, %0|
%0, %1, %2<round_saeonly_op4>, %3}): Changed to ...
vgetmant<ssescalarmodesuffix>
\t{%3, <round_saeonly_scalar_mask_op4>%2, %1, %0<mask_scalar_operand4>|
%0<mask_scalar_operand4>, %1, %2
<round_saeonly_scalar_mask_op4>, %3} ... this.
* config/i386/subst.md (mask_scalar_operand4,
round_saeonly_scalar_mask_operand4, round_saeonly_scalar_mask_op4,
round_saeonly_scalar_nimm_predicate): New subst attributes.
gcc/testsuite/
* gcc.target/i386/avx512f-vgetexpsd-1.c (_mm_mask_getexp_sd,
_mm_maskz_getexp_sd, _mm_mask_getexp_round_sd,
_mm_maskz_getexp_round_sd): Test new intrinsics.
* gcc.target/i386/avx512f-vgetexpss-1.c (_mm_mask_getexp_ss,
_mm_maskz_getexp_ss, _mm_mask_getexp_round_ss,
_mm_maskz_getexp_round_ss): Ditto.
* gcc.target/i386/avx512f-vgetmantsd-1.c (_mm_mask_getmant_sd,
_mm_maskz_getmant_sd, _mm_mask_getmant_round_sd,
_mm_maskz_getmant_round_sd): Ditto.
* gcc.target/i386/avx512f-vgetmantss-1.c (_mm_mask_getmant_ss,
_mm_maskz_getmant_ss, _mm_mask_getmant_round_ss,
_mm_maskz_getmant_round_ss): Ditto.
* gcc.target/i386/avx512f-vgetexpsd-2.c (_mm_mask_getexp_sd,
_mm_maskz_getexp_sd, _mm_getexp_round_sd, _mm_mask_getexp_round_sd,
_mm_maskz_getexp_round_sd): New runtime tests.
* gcc.target/i386/avx512f-vgetexpss-2.c (_mm_mask_getexp_ss,
_mm_maskz_getexp_ss, _mm_getexp_round_ss, _mm_mask_getexp_round_ss,
_mm_maskz_getexp_round_ss): Ditto.
* gcc.target/i386/avx512f-vgetmantsd-2.c (_mm_mask_getmant_sd,
_mm_maskz_getmant_sd, _mm_getmant_round_sd, _mm_mask_getmant_round_sd,
_mm_maskz_getmant_round_sd): Ditto.
* gcc.target/i386/avx512f-vgetmantss-2.c (_mm_mask_getmant_ss,
_mm_maskz_getmant_ss, _mm_getmant_round_ss, _mm_mask_getmant_round_ss,
_mm_maskz_getmant_round_ss): Ditto.
* gcc.target/i386/avx-1.c (__builtin_ia32_getexpsd_mask_round,
__builtin_ia32_getexpss_mask_round, __builtin_ia32_getmantsd_mask_round,
__builtin_ia32_getmantss_mask_round): Test new builtins.
* gcc.target/i386/sse-13.c : Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/sse-14.c (_mm_maskz_getexp_round_sd,
_mm_maskz_getexp_round_ss, _mm_mask_getmant_round_sd,
_mm_maskz_getmant_round_sd, _mm_mask_getmant_round_ss,
_mm_maskz_getmant_round_ss, _mm_mask_getexp_round_sd,
_mm_mask_getexp_round_ss): Test new intrinsics.
* gcc.target/i386/testround-1.c: Ditto.
* gcc.target/i386/sse-22.c (_mm_maskz_getmant_round_sd,
_mm_maskz_getmant_round_ss, _mm_mask_getmant_round_sd,
_mm_mask_getmant_round_ss): Test new intrinsics
* gcc.target/i386/testimm-10.c (_mm_mask_getmant_sd,
_mm_maskz_getmant_sd, _mm_mask_getmant_ss,
_mm_maskz_getmant_ss): Test new intrinsics.
From-SVN: r250018
Julia Koval [Thu, 6 Jul 2017 11:03:35 +0000 (13:03 +0200)]
Remove old rounding code
gcc/
* gcc/config/i386/i386.c (ix86_erase_embedded_rounding):
Remove code for old rounding pattern.
From-SVN: r250017
Richard Earnshaw [Thu, 6 Jul 2017 10:00:44 +0000 (10:00 +0000)]
[arm] Fix warning in parsecpu.awk
In awk, single quotes within a quoted string do not need escaping.
The existing code causes awk to grumble in the build logs.
* config/arm/parsecpu.awk (gen_comm_data): Do not escape single quotes
in quoted strings.
From-SVN: r250016
Richard Earnshaw [Thu, 6 Jul 2017 09:49:19 +0000 (09:49 +0000)]
[arm] Fix cross-native builds
The patch I committed yesterday to remove some generated headers from
the source tree unfortunately has a dependency missing that is only
revealed when doing a cross-native or full Canadian cross build. The
gen* programs were missing a dependency on one of the generated
headers.
Fixed by adding an explicit dependency rule for GTM_H in the same way
as we do for TM_H.
* config/arm/t-arm (GTM_H): Add arm-cpu.h.
Checked that this restores cross-native building.
From-SVN: r250015
Christophe Lyon [Thu, 6 Jul 2017 08:12:33 +0000 (08:12 +0000)]
[testsuite] Add dg-require-stack-check
2017-07-06 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* doc/sourcebuild.texi (Test Directives, Variants of
dg-require-support): Add documentation for dg-require-stack-check.
gcc/testsuite/
* lib/target-supports-dg.exp (dg-require-stack-check): New.
* lib/target-supports.exp (check_stack_check_available): New.
* g++.dg/other/i386-9.C: Add dg-require-stack-check.
* gcc.c-torture/compile/stack-check-1.c: Likewise.
* gcc.dg/graphite/run-id-pr47653.c: Likewise.
* gcc.dg/pr47443.c: Likewise.
* gcc.dg/pr48134.c: Likewise.
* gcc.dg/pr70017.c: Likewise.
* gcc.target/aarch64/stack-checking.c: Likewise.
* gcc.target/arm/stack-checking.c: Likewise.
* gcc.target/i386/pr48723.c: Likewise.
* gcc.target/i386/pr55672.c: Likewise.
* gcc.target/i386/pr67265-2.c: Likewise.
* gcc.target/i386/pr67265.c: Likewise.
* gnat.dg/opt49.adb: Likewise.
* gnat.dg/stack_check1.adb: Likewise.
* gnat.dg/stack_check2.adb: Likewise.
* gnat.dg/stack_check3.adb: Likewise.
From-SVN: r250013
GCC Administrator [Thu, 6 Jul 2017 00:16:26 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r250012
Kelvin Nilsen [Wed, 5 Jul 2017 20:51:37 +0000 (20:51 +0000)]
re PR target/80103 (ICE in output_1144, at config/rs6000/vsx.md:2298)
gcc/testsuite/ChangeLog:
2017-07-05 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/80103
* gcc.target/powerpc/pr80103-1.c (void b): Correct spelling of
__attribute__.
From-SVN: r250008
Sebastian Peryt [Wed, 5 Jul 2017 16:44:18 +0000 (18:44 +0200)]
Scalar mask and round RTL templates
gcc/
* config/i386/subst.md (mask_scalar, round_scalar,
round_saeonly_scalar): New meta-templates.
(mask_scalar_name, mask_scalar_operand3, round_scalar_name,
round_scalar_mask_operand3, round_scalar_mask_op3,
round_scalar_constraint, round_scalar_prefix, round_saeonly_scalar_name,
round_saeonly_scalar_mask_operand3, round_saeonly_scalar_mask_op3,
round_saeonly_scalar_constraint,
round_saeonly_scalar_prefix): New subst attribute.
* config/i386/sse.md
(<sse>_vm<plusminus_insn><mode>3<mask_name><round_name>): Renamed to ...
<sse>_vm<plusminus_insn><mode>3<mask_scalar_name>
<round_scalar_name> ... this.
(<sse>_vm<multdiv_mnemonic><mode>3<mask_name><round_name>): Renamed to ...
<sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name>
<round_scalar_name> ... this.
(<sse>_vm<code><mode>3<mask_name><round_saeonly_name>): Renamed to ...
<sse>_vm<code><mode>3<mask_scalar_name>
<round_saeonly_scalar_name> ... this.
(v<plusminus_mnemonic><ssescalarmodesuffix>
\t{<round_mask_op3>%2, %1, %0<mask_operand3>|
%0<mask_operand3>, %1, %<iptr>2<round_mask_op3>}): Changed to ...
v<plusminus_mnemonic><ssescalarmodesuffix>
\t{<round_scalar_mask_op3>%2, %1, %0<mask_scalar_operand3>|
%0<mask_scalar_operand3>, %1, %<iptr>2<round_scalar_mask_op3>} ... this.
(v<multdiv_mnemonic><ssescalarmodesuffix>
\t{<round_mask_op3>%2, %1, %0<mask_operand3>|
%0<mask_operand3>, %1, %<iptr>2<round_mask_op3>}): Changed to ...
v<multdiv_mnemonic><ssescalarmodesuffix>
\t{<round_scalar_mask_op3>%2, %1, %0<mask_scalar_operand3>|
%0<mask_scalar_operand3>, %1, %<iptr>2<round_scalar_mask_op3>} ... this.
(v<maxmin_float><ssescalarmodesuffix>
\t{<round_saeonly_mask_op3>%2, %1, %0<mask_operand3>|
%0<mask_operand3>, %1, %<iptr>2<round_saeonly_mask_op3>}): Changed to ...
v<maxmin_float><ssescalarmodesuffix>
\t{<round_saeonly_scalar_mask_op3>%2, %1, %0<mask_scalar_operand3>|
%0<mask_scalar_operand3>, %1, %<iptr>2
<round_saeonly_scalar_mask_op3>} ... this.
gcc/testsuite/
* gcc.target/i386/avx512f-vaddsd-3.c: New test for mask 0 verification.
* gcc.target/i386/avx512f-vaddss-3.c: Ditto.
* gcc.target/i386/avx512f-vdivsd-3.c: Ditto.
* gcc.target/i386/avx512f-vdivss-3.c: Ditto.
* gcc.target/i386/avx512f-vmaxsd-3.c: Ditto.
* gcc.target/i386/avx512f-vmaxss-3.c: Ditto.
* gcc.target/i386/avx512f-vminsd-3.c: Ditto.
* gcc.target/i386/avx512f-vminss-3.c: Ditto.
* gcc.target/i386/avx512f-vmulsd-3.c: Ditto.
* gcc.target/i386/avx512f-vmulss-3.c: Ditto.
* gcc.target/i386/avx512f-vsubsd-3.c: Ditto.
* gcc.target/i386/avx512f-vsubss-3.c: Ditto.
From-SVN: r250006
Richard Earnshaw [Wed, 5 Jul 2017 15:32:47 +0000 (15:32 +0000)]
[ARM] Implement TARGET_FIXED_CONDITION_CODE_REGS
This patch implements TARGET_FIXED_CONDITION_CODE_REGS on ARM.
We have two main cases to consider: in Thumb1 code there are no
condition code registers, so we simply return false. For other
cases we set the the first pointer to CC_REGNUM and the second to
VFPCC_REGNUM iff generating hard-float code.
Running the CSiBE benchmark I see a couple of cases (both in the same
file) where this feature kicks in, so it's not a major change.
* config/arm/arm.c (arm_fixed_condition_code_regs): New function.
(TARGET_FIXED_CONDITION_CODE_REGS): Redefine.
From-SVN: r250005
Richard Sandiford [Wed, 5 Jul 2017 15:32:37 +0000 (15:32 +0000)]
Use SET_DECL_MODE in libcc1
2017-07-05 Richard Sandiford <richard.sandiford@linaro.org>
libcc1/
* libcp1plugin.cc (plugin_build_field): Use SET_DECL_MODE.
From-SVN: r250004
Richard Sandiford [Wed, 5 Jul 2017 15:29:27 +0000 (15:29 +0000)]
Remove enum before machine_mode
r216834 did a mass removal of "enum" before "machine_mode". This patch
removes some new uses that have been added since then.
2017-07-05 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_if_then_else): Remove "enum" before
"machine_mode".
* compare-elim.c (can_eliminate_compare): Likewise.
* config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type):
Likewise.
(aarch64_lookup_simd_builtin_type): Likewise.
(aarch64_simd_builtin_type): Likewise.
(aarch64_init_simd_builtin_types): Likewise.
(aarch64_simd_expand_args): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_rglist):
Likewise.
(aarch64_reverse_mask): Likewise.
(aarch64_simd_emit_reg_reg_move): Likewise.
(aarch64_gen_adjusted_ldpstp): Likewise.
(aarch64_ccmp_mode_to_code): Likewise.
(aarch64_operands_ok_for_ldpstp): Likewise.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
* config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class):
Likewise.
(aarch64_min_divisions_for_recip_mul): Likewise.
(aarch64_reassociation_width): Likewise.
(aarch64_get_condition_code_1): Likewise.
(aarch64_simd_emit_reg_reg_move): Likewise.
(aarch64_simd_attr_length_rglist): Likewise.
(aarch64_reverse_mask): Likewise.
(aarch64_operands_ok_for_ldpstp): Likewise.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
(aarch64_gen_adjusted_ldpstp): Likewise.
* config/aarch64/cortex-a57-fma-steering.c (fma_node::rename):
Likewise.
* config/arc/arc.c (legitimate_offset_address_p): Likewise.
* config/arm/arm-builtins.c (arm_simd_builtin_std_type): Likewise.
(arm_lookup_simd_builtin_type): Likewise.
(arm_simd_builtin_type): Likewise.
(arm_init_simd_builtin_types): Likewise.
(arm_expand_builtin_args): Likewise.
* config/arm/arm-protos.h (arm_expand_builtin): Likewise.
* config/ft32/ft32.c (ft32_libcall_value): Likewise.
(ft32_setup_incoming_varargs): Likewise.
(ft32_function_arg): Likewise.
(ft32_function_arg_advance): Likewise.
(ft32_pass_by_reference): Likewise.
(ft32_arg_partial_bytes): Likewise.
(ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Likewise.
(ft32_addr_space_legitimate_address_p): Likewise.
* config/i386/i386-protos.h (ix86_operands_ok_for_move_multiple):
Likewise.
* config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise.
(ix86_emit_outlined_ms2sysv_restore): Likewise.
(iamcu_alignment): Likewise.
(canonicalize_vector_int_perm): Likewise.
(ix86_noce_conversion_profitable_p): Likewise.
(ix86_mpx_bound_mode): Likewise.
(ix86_operands_ok_for_move_multiple): Likewise.
* config/microblaze/microblaze-protos.h
(microblaze_expand_conditional_branch_reg): Likewise.
* config/microblaze/microblaze.c
(microblaze_expand_conditional_branch_reg): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):
Likewise.
(rs6000_reassociation_width): Likewise.
(rs6000_invalid_binary_op): Likewise.
(fusion_p9_p): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/riscv/riscv-protos.h (riscv_regno_mode_ok_for_base_p):
Likewise.
(riscv_hard_regno_mode_ok_p): Likewise.
(riscv_address_insns): Likewise.
(riscv_split_symbol): Likewise.
(riscv_legitimize_move): Likewise.
(riscv_function_value): Likewise.
(riscv_hard_regno_nregs): Likewise.
(riscv_expand_builtin): Likewise.
* config/riscv/riscv.c (riscv_build_integer_1): Likewise.
(riscv_build_integer): Likewise.
(riscv_split_integer): Likewise.
(riscv_legitimate_constant_p): Likewise.
(riscv_cannot_force_const_mem): Likewise.
(riscv_regno_mode_ok_for_base_p): Likewise.
(riscv_valid_base_register_p): Likewise.
(riscv_valid_offset_p): Likewise.
(riscv_valid_lo_sum_p): Likewise.
(riscv_classify_address): Likewise.
(riscv_legitimate_address_p): Likewise.
(riscv_address_insns): Likewise.
(riscv_load_store_insns): Likewise.
(riscv_force_binary): Likewise.
(riscv_split_symbol): Likewise.
(riscv_force_address): Likewise.
(riscv_legitimize_address): Likewise.
(riscv_move_integer): Likewise.
(riscv_legitimize_const_move): Likewise.
(riscv_legitimize_move): Likewise.
(riscv_address_cost): Likewise.
(riscv_subword): Likewise.
(riscv_output_move): Likewise.
(riscv_canonicalize_int_order_test): Likewise.
(riscv_emit_int_order_test): Likewise.
(riscv_function_arg_boundary): Likewise.
(riscv_pass_mode_in_fpr_p): Likewise.
(riscv_pass_fpr_single): Likewise.
(riscv_pass_fpr_pair): Likewise.
(riscv_get_arg_info): Likewise.
(riscv_function_arg): Likewise.
(riscv_function_arg_advance): Likewise.
(riscv_arg_partial_bytes): Likewise.
(riscv_function_value): Likewise.
(riscv_pass_by_reference): Likewise.
(riscv_setup_incoming_varargs): Likewise.
(riscv_print_operand): Likewise.
(riscv_elf_select_rtx_section): Likewise.
(riscv_save_restore_reg): Likewise.
(riscv_for_each_saved_reg): Likewise.
(riscv_register_move_cost): Likewise.
(riscv_hard_regno_mode_ok_p): Likewise.
(riscv_hard_regno_nregs): Likewise.
(riscv_class_max_nregs): Likewise.
(riscv_memory_move_cost): Likewise.
* config/rl78/rl78-protos.h (rl78_split_movsi): Likewise.
* config/rl78/rl78.c (rl78_split_movsi): Likewise.
(rl78_addr_space_address_mode): Likewise.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Likewise.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_reassociation_width): Likewise.
(rs6000_invalid_binary_op): Likewise.
(fusion_p9_p): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/visium/visium-protos.h (prepare_move_operands): Likewise.
(ok_for_simple_move_operands): Likewise.
(ok_for_simple_move_strict_operands): Likewise.
(ok_for_simple_arith_logic_operands): Likewise.
(visium_legitimize_reload_address): Likewise.
(visium_select_cc_mode): Likewise.
(output_cbranch): Likewise.
(visium_split_double_move): Likewise.
(visium_expand_copysign): Likewise.
(visium_expand_int_cstore): Likewise.
(visium_expand_fp_cstore): Likewise.
* config/visium/visium.c (visium_pass_by_reference): Likewise.
(visium_function_arg): Likewise.
(visium_function_arg_advance): Likewise.
(visium_libcall_value): Likewise.
(visium_setup_incoming_varargs): Likewise.
(visium_legitimate_constant_p): Likewise.
(visium_legitimate_address_p): Likewise.
(visium_legitimize_address): Likewise.
(visium_secondary_reload): Likewise.
(visium_register_move_cost): Likewise.
(visium_memory_move_cost): Likewise.
(prepare_move_operands): Likewise.
(ok_for_simple_move_operands): Likewise.
(ok_for_simple_move_strict_operands): Likewise.
(ok_for_simple_arith_logic_operands): Likewise.
(visium_function_value_1): Likewise.
(rtx_ok_for_offset_p): Likewise.
(visium_legitimize_reload_address): Likewise.
(visium_split_double_move): Likewise.
(visium_expand_copysign): Likewise.
(visium_expand_int_cstore): Likewise.
(visium_expand_fp_cstore): Likewise.
(visium_split_cstore): Likewise.
(visium_select_cc_mode): Likewise.
(visium_split_cbranch): Likewise.
(output_cbranch): Likewise.
(visium_print_operand_address): Likewise.
* expmed.c (flip_storage_order): Likewise.
* expmed.h (emit_cstore): Likewise.
(flip_storage_order): Likewise.
* genrecog.c (validate_pattern): Likewise.
* hsa-gen.c (gen_hsa_addr): Likewise.
* internal-fn.c (expand_arith_overflow): Likewise.
* ira-color.c (allocno_copy_cost_saving): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_invariant_for_inheritance): Likewise.
* lra-eliminations.c (move_plus_up): Likewise.
* omp-low.c (lower_oacc_reductions): Likewise.
* simplify-rtx.c (simplify_subreg): Likewise.
* target.def (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise.
(TARGET_CHKP_BOUND_MODE): Likewise..
* targhooks.c (default_chkp_bound_mode): Likewise.
(default_setup_incoming_vararg_bounds): Likewise.
* targhooks.h (default_chkp_bound_mode): Likewise.
(default_setup_incoming_vararg_bounds): Likewise.
* tree-ssa-math-opts.c (divmod_candidate_p): Likewise.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
(have_whole_vector_shift): Likewise.
* tree-vect-stmts.c (vectorizable_load): Likewise.
* doc/tm.texi: Regenerate.
gcc/brig/
* brig-c.h (brig_type_for_mode): Remove "enum" before "machine_mode".
* brig-lang.c (brig_langhook_type_for_mode): Likewise.
gcc/jit/
* dummy-frontend.c (jit_langhook_type_for_mode): Remove "enum" before
"machine_mode".
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r250003
Georg-Johann Lay [Wed, 5 Jul 2017 13:57:28 +0000 (13:57 +0000)]
Graceful degrade if Binutils PR21472 is not available.
gcc/
Graceful degrade if Binutils PR21472 is not available.
PR target/81072
* configure.ac [target=avr]: WARN instead of ERROR if avrxmega3
.rodata in flash test fails.
(HAVE_LD_AVR_AVRXMEGA3_RODATA_IN_FLASH): Define it if test passes.
* confgure: Regenerate.
* config.in: Regenerate.
* config/avr/avr.c (avr_asm_named_section)
[HAVE_LD_AVR_AVRXMEGA3_RODATA_IN_FLASH]: Only trigger
__do_copy_data for stuff in .rodata if flash_pm_offset = 0.
(avr_asm_init_sections): Same.
From-SVN: r250000
Ramana Radhakrishnan [Wed, 5 Jul 2017 12:58:46 +0000 (12:58 +0000)]
[Patch ARM] Remove %? string from some Advanced SIMD patterns.
Advanced SIMD patterns are not predicable, thus they should not have
%? in their output templates. Found when auditing the code for
something else. This has been in my tree for sometime , bootstrapped
and regression tested on armhf for armv7ve+simd as the architectural
base.
Applied to trunk
<DATE> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/neon.md (fma<VCVTF:mode>4): Remove %?.
(fma<VH:mode>4_intrinsic): Likewise.
(*fmsub<VCVTF:mode>4): Likewise.
(*fmsub<VH:mode>4_intrinsic): Likewise.
regards
Ramana
From-SVN: r249999
Georg-Johann Lay [Wed, 5 Jul 2017 12:38:51 +0000 (12:38 +0000)]
Move ChangeLog entry to testsuite.
From-SVN: r249997
Georg-Johann Lay [Wed, 5 Jul 2017 12:34:36 +0000 (12:34 +0000)]
re PR target/81305 ([avr] avrtiny uses LDS for SREG in ISR routines which is out of range of LDS.)
gcc/
PR target/81305
* testsuite/gcc.target/avr/isr-test.h: New file.
From-SVN: r249996
Georg-Johann Lay [Wed, 5 Jul 2017 12:28:19 +0000 (12:28 +0000)]
re PR target/81305 ([avr] avrtiny uses LDS for SREG in ISR routines which is out of range of LDS.)
gcc/
PR target/81305
* config/avr/avr.c (avr_out_movhi_mr_r_xmega) [CONSTANT_ADDRESS_P]:
Don't depend on "optimize > 0".
(out_movhi_r_mr, out_movqi_mr_r): Same.
(out_movhi_mr_r, out_movqi_r_mr): Same.
(avr_address_cost) [CONSTANT_ADDRESS_P]: Don't depend cost for
io_address_operand on "optimize > 0".
* testsuite/gcc.target/avr/torture/isr-01-simple.c: New test.
* testsuite/gcc.target/avr/torture/isr-02-call.c: New test.
* testsuite/gcc.target/avr/torture/isr-03-fixed.c: New test.
From-SVN: r249995
Bin Cheng [Wed, 5 Jul 2017 12:08:28 +0000 (12:08 +0000)]
tree-loop-distribution.c: Add general explanantion on the pass.
* tree-loop-distribution.c: Add general explanantion on the pass.
(generate_loops_for_partition): Mark distributed loop.
(pg_add_dependence_edges): New parameter. Handle alias data
dependence specially and record it in the parameter if asked.
(struct pg_vdata, pg_edata, pg_edge_callback_data): New structs.
(init_partition_graph_vertices, add_partition_graph_edge): New.
(pg_skip_alias_edge, free_partition_graph_edata_cb): New.
(free_partition_graph_vdata, build_partition_graph): New.
(sort_partitions_by_post_order, merge_dep_scc_partitions): New.
(pg_collect_alias_ddrs, break_alias_scc_partitions): New.
(data_ref_segment_size, latch_dominated_by_data_ref): New.
(compute_alias_check_pairs, version_loop_by_alias_check): New.
(version_for_distribution_p, finalize_partitions): New.
(distribute_loop): Handle alias data dependence specially. Factor
out loop fusion code as functions and call these functions.
gcc/testsuite
* gcc.dg/tree-ssa/ldist-4.c: Adjust test string.
* gcc.dg/tree-ssa/ldist-12.c: Ditto.
* gcc.dg/tree-ssa/ldist-13.c: Ditto.
* gcc.dg/tree-ssa/ldist-14.c: Ditto.
From-SVN: r249994
Bin Cheng [Wed, 5 Jul 2017 12:05:44 +0000 (12:05 +0000)]
tree-loop-distribution.c (classify_partition): New parameter and better handle reduction statement.
* tree-loop-distribution.c (classify_partition): New parameter and
better handle reduction statement.
(rdg_build_partitions): Revise comment.
(distribute_loop): Compute statements in all partitions and pass it
to classify_partition.
gcc/testsuite
* gcc.dg/tree-ssa/ldist-26.c: New test.
From-SVN: r249993
Bin Cheng [Wed, 5 Jul 2017 12:02:21 +0000 (12:02 +0000)]
tree-loop-distribution.c (enum partition_type): New.
* tree-loop-distribution.c (enum partition_type): New.
(struct partition): New field type.
(partition_merge_into): Add parameter. Update partition type.
(data_dep_in_cycle_p, update_type_for_merge): New functions.
(build_rdg_partition_for_vertex): Compute partition type.
(rdg_build_partitions): Dump partition type.
(distribute_loop): Update calls to partition_merge_into.
From-SVN: r249992
Bin Cheng [Wed, 5 Jul 2017 12:01:03 +0000 (12:01 +0000)]
tree-loop-distribution.c (struct ddr_hasher): New.
* tree-loop-distribution.c (struct ddr_hasher): New.
(ddr_hasher::hash, ::equal, get_data_dependence): New function.
(ddrs_table): New.
(classify_partition): Call get_data_dependence.
(pg_add_dependence_edges): Ditto.
(distribute_loop): Release data dependence hash table.
From-SVN: r249991
Bin Cheng [Wed, 5 Jul 2017 11:59:40 +0000 (11:59 +0000)]
tree-loop-distribution.c (ref_base_address): Delete.
* tree-loop-distribution.c (ref_base_address): Delete.
(similar_memory_accesses): Rename ...
(share_memory_accesses): ... to this. Check if partitions access
the same memory reference.
(distribute_loop): Call share_memory_accesses.
gcc/testsuite
* gcc.dg/tree-ssa/ldist-6.c: XFAIL.
From-SVN: r249990
Bin Cheng [Wed, 5 Jul 2017 11:57:44 +0000 (11:57 +0000)]
tree-loop-distribution.c (struct partition): New field recording its data reference.
* tree-loop-distribution.c (struct partition): New field recording
its data reference.
(partition_alloc, partition_free): Init and release data refs.
(partition_merge_into): Merge data refs.
(build_rdg_partition_for_vertex): Collect data refs for partition.
(pg_add_dependence_edges): Change parameters from vector to bitmap.
Update uses.
(distribute_loop): Remve data refs from vertice data of partition
graph.
From-SVN: r249989
Bin Cheng [Wed, 5 Jul 2017 11:56:04 +0000 (11:56 +0000)]
tree-loop-distribution.c (params.h): Include header file.
* tree-loop-distribution.c (params.h): Include header file.
(MAX_DATAREFS_NUM, DR_INDEX): New macro.
(datarefs_vec): New global var.
(create_rdg_vertices): Use datarefs_vec directly.
(free_rdg): Don't free data references.
(build_rdg): Update use. Don't free data references.
(distribute_loop): Compute global variable for data references.
Bail out if there are too many data references.
From-SVN: r249988
Bin Cheng [Wed, 5 Jul 2017 11:54:34 +0000 (11:54 +0000)]
tree-loop-distribution.c (loop_nest): New global var.
* tree-loop-distribution.c (loop_nest): New global var.
(build_rdg): Use loop directly, rather than loop nest.
(pg_add_dependence_edges): Remove loop nest parameter. Use global
variable directly.
(distribute_loop): Compute global variable loop nest. Update use.
From-SVN: r249987
Bin Cheng [Wed, 5 Jul 2017 11:52:24 +0000 (11:52 +0000)]
tree-loop-distribution.c (enum fuse_type, [...]): New.
* tree-loop-distribution.c (enum fuse_type, fuse_message): New.
(partition_merge_into): New parameter. Dump reason for fusion.
(distribute_loop): Update use of partition_merge_into.
From-SVN: r249986
Bin Cheng [Wed, 5 Jul 2017 11:51:22 +0000 (11:51 +0000)]
tree-loop-distribution.c (bb_top_order_index): New.
* tree-loop-distribution.c (bb_top_order_index): New.
(bb_top_order_index_size, bb_top_order_cmp): New.
(stmts_from_loop): Use topological order.
(pass_loop_distribution::execute): Compute and release topological
order for basic blocks.
From-SVN: r249985
Bin Cheng [Wed, 5 Jul 2017 11:50:09 +0000 (11:50 +0000)]
tree-loop-distribution.c (pass_loop_distribution::execute): Skip if no loops.
* tree-loop-distribution.c (pass_loop_distribution::execute): Skip
if no loops.
From-SVN: r249984
Bin Cheng [Wed, 5 Jul 2017 11:49:02 +0000 (11:49 +0000)]
cfgloop.h (struct loop): Add comment.
* cfgloop.h (struct loop): Add comment. New field orig_loop_num.
* cfgloopmanip.c (lv_adjust_loop_entry_edge): Comment change.
* internal-fn.c (expand_LOOP_DIST_ALIAS): New function.
* internal-fn.def (LOOP_DIST_ALIAS): New.
* tree-vectorizer.c (fold_loop_vectorized_call): Rename to ...
(fold_loop_internal_call): ... this.
(vect_loop_dist_alias_call): New function.
(set_uid_loop_bbs): Call fold_loop_internal_call.
(vectorize_loops): Fold IFN_LOOP_VECTORIZED and IFN_LOOP_DIST_ALIAS
internal calls.
From-SVN: r249983
GCC Administrator [Wed, 5 Jul 2017 00:16:30 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r249982
Uros Bizjak [Tue, 4 Jul 2017 20:52:32 +0000 (22:52 +0200)]
re PR target/81300 (-fpeephole2 breaks __builtin_ia32_sbb_u64, _subborrow_u64 on AMD64)
2017-07-04 Uros Bizjak <ubizjak@gmail.com>
PR target/81300
* config/i386/i386.md (setcc + movzbl/and to xor + setcc peepholes):
Require dead FLAGS_REG at the beginning of a peephole.
testsuite/ChangeLog:
PR target/81300
* gcc.target/i386/pr81300.c: New test.
From-SVN: r249977
Uros Bizjak [Tue, 4 Jul 2017 20:46:38 +0000 (22:46 +0200)]
re PR target/81294 (_subborrow_u64 argument order inconsistent with intrinsic reference, icc)
PR target/81294
* config/i386/adxintrin.h (_subborrow_u32): Swap _X and _Y
arguments in the call to __builtin_ia32_sbb_u32.
(_subborrow_u64): Swap _X and _Y arguments in the call to
__builtin_ia32_sbb_u64.
testsuite/ChangeLog:
PR target/81294
* gcc.target/i386/adx-addcarryx32-2.c (adx_test): Swap
x and y arguments in the call to _subborrow_u32.
* gcc.target/i386/adx-addcarryx64-2.c (adx_test): Swap
x and y arguments in the call to _subborrow_u64.
* gcc.target/i386/pr81294-1.c: New test.
* gcc.target/i386/pr81294-2.c: Ditto.
From-SVN: r249976
Jakub Jelinek [Tue, 4 Jul 2017 18:51:02 +0000 (20:51 +0200)]
re PR debug/81278 (-fcompare-debug failure (length))
PR debug/81278
* tree-vrp.c (compare_assert_loc): Turn into a function template
with stable template parameter. Only test if a->e is NULL,
!a->e == !b->e has been verified already. Use e == NULL or
e != NULL instead of e or ! e tests. If stable is true, don't use
iterative_hash_expr, on the other side allow a or b or both NULL
and sort the NULLs last.
(process_assert_insertions): Sort using compare_assert_loc<false>
instead of compare_assert_loc, later sort using
compare_assert_loc<true> before calling process_assert_insertions_for
in a loop. Use break instead of continue once seen NULL pointer.
From-SVN: r249975
Thomas Preud'homme [Tue, 4 Jul 2017 17:44:38 +0000 (17:44 +0000)]
[ARM] Add MIDR info for ARM Cortex-R7 and Cortex-R8
2017-07-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/driver-arm.c (arm_cpu_table): Add entry for ARM
Cortex-R7 and Cortex-R8 processors.
From-SVN: r249974
Jan Hubicka [Tue, 4 Jul 2017 17:05:26 +0000 (19:05 +0200)]
ipa-utils.c (ipa_merge_profiles): Fix merging when dst is uninitialized while src is not.
* ipa-utils.c (ipa_merge_profiles): Fix merging when dst is
uninitialized while src is not.
From-SVN: r249973
Kyrylo Tkachov [Tue, 4 Jul 2017 15:19:30 +0000 (15:19 +0000)]
[AArch64] Fix strict aliasing issue in gcc.target/aarch64/simd/vminmaxnm_1.c
While doing some unrelated work the gcc.target/aarch64/simd/vminmaxnm_1.c testcase started failing for me.
Upon investigation it turns out that it breaks the C strict aliasing rules in the CHECK macro by casting
a pointer to an incompatible type and dereferencing it. GCC even warns about it if compiled with -Wstrict-aliasing.
This patch fixes the testcase by making it use memcmp to compare the vector elements.
This avoids the undefined behaviour.
The testcase still passes on trunk.
* gcc.target/aarch64/simd/vminmaxnm_1.c: Fix strict aliasing issues.
From-SVN: r249972
Richard Earnshaw [Tue, 4 Jul 2017 14:49:38 +0000 (14:49 +0000)]
[arm] Move some generated files out of the source tree
When I originally started work on the new options framework for ARM
I'd worked on the assumption that AWK might not be available on every
build machine (only on developer's machines). However, looking again
I notice that all the options framework relies on it being present for
every build. This means that some of the generated files that come
from running parsecpu.awk do not need to be kept under revision
control.
Unfortunately, it's not _all_ generated files. The build
infrastructure assumes that all .md fragments are in the source tree
and similarly that all .opt fragments are there as well.
Still, eliminating the very big .h files is a step forward as they are
very regular in structure and diff/patch/merge tools can sometimes
make mistakes when resolving conflicts.
So this patch removes the generated .h files from the source tree and
tweaks the make rules accordingly. I've also changed the build rules
to use the stamp technique to eliminate some false dependencies in a
rebuild.
Top-level:
* contrib/gcc_update (files_and_dependencies): Remove stamp rules for
arm-specific auto-generated header files.
gcc:
* common/config/arm/arm-common.c: Adjust include path for
arm-cpu-cdata.h
* t-arm (TM_H): Adjust path for arm-cpu.h.
(arm-cpu.h): Create in build directory. Adjust dependency rules.
(arm-cpu-data.h): Likewise.
(arm-cpu-cdata.h): Likewise.
* config/arm/arm-cpu.h: Delete.
* config/arm/arm-cpu-cdata.h: Delete.
* config/arm/arm-cpu-data.h: Delete.
From-SVN: r249971
James Greenhalgh [Tue, 4 Jul 2017 14:05:31 +0000 (14:05 +0000)]
[Patch ARM] Add initial tuning for Cortex-A55 and Cortex-A75
Much like my AArch64 patch a few weeks ago, this patch adds support
for the ARM Cortex-A75 and Cortex-A55 processors through the
-mcpu/-mtune values cortex-a55 and cortex-a75, and an
ARM DynamIQ big.LITTLE configuration of these two processors through
the -mcpu/-mtune value cortex-a75.cortex-a55
Both Cortex-A55 and Cortex-A75 support ARMv8-A with the ARM8.1-A and
ARMv8.2-A extensions. This is reflected in the patch, -mcpu=cortex-a75 is
treated as equivalent to passing -mtune=cortex-a75 -march=armv8.2-a+fp16
gcc/
2017-07-04 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm-cpus.in (cortex-a55): New.
(cortex-a75): Likewise.
(cortex-a75.cortex-a55): Likewise.
* config/arm/driver-arm.c (arm_cpu_table): Add cortex-a55 and
cortex-a75.
* doc/invoke.texi (-mcpu): Document cortex-a55 and cortex-a75.
* config/arm/arm-cpu-cdata.h: Regenerate.
* config/arm/arm-cpu-data.h: Regenerate.
* config/arm/arm-cpu.h: Regenerate.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
From-SVN: r249970
Jan Hubicka [Tue, 4 Jul 2017 13:42:22 +0000 (15:42 +0200)]
* haifa-sched.c (sched_create_recovery_edges): Update profile.
From-SVN: r249967
Jan Hubicka [Tue, 4 Jul 2017 13:41:21 +0000 (15:41 +0200)]
bb-reorder.c (better_edge_p): Fix handling of uninitialized probability.
* bb-reorder.c (better_edge_p): Fix handling of uninitialized
probability.
From-SVN: r249966
Thomas Preud'homme [Tue, 4 Jul 2017 13:19:23 +0000 (13:19 +0000)]
Fix ChangeLog format in r247584
This patch fixes relative pathnames in gcc/ChangeLog for r247584.
From-SVN: r249964
Marek Polacek [Tue, 4 Jul 2017 12:17:22 +0000 (12:17 +0000)]
re PR c/81231 (ICE with invalid argument to __atomic_*)
PR c/81231
* c-common.c (sync_resolve_size): Give error for pointers to incomplete
types.
* gcc.dg/atomic-pr81231.c: New test.
From-SVN: r249963
Jakub Jelinek [Tue, 4 Jul 2017 11:53:50 +0000 (13:53 +0200)]
brig-function.cc: Include profile-count.h.
* brigfrontend/brig-function.cc: Include profile-count.h.
* brigfrontend/brig-to-generic.cc: Likewise.
From-SVN: r249962
Richard Sandiford [Tue, 4 Jul 2017 11:48:44 +0000 (11:48 +0000)]
PR 81292: ICE on related strlens after r249880
r249880 installed the result of a strlen in a strinfo if the strinfo
wasn't previously a full string. But as Jakub says in the PR comments,
we can't just do that in isolation, because there are no vdefs on the
call that would invalidate any related strinfos.
This patch updates the related strinfos if the adjustment is simple and
invalidates them otherwise. As elsewhere, we treat adjustments of the
form strlen +/- INTEGER_CST as simple but anything else as too complex.
2017-07-04 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR tree-optimization/81292
* tree-ssa-strlen.c (handle_builtin_strlen): When setting
full_string_p, also call adjust_related_strinfos if the adjustment
is simple, otherwise invalidate related strinfos.
gcc/testsuite/
PR tree-optimization/81292
* gcc.dg/pr81292-1.c: New test.
* gcc.dg/pr81292-2.c: Likewise.
From-SVN: r249961
Martin Liska [Tue, 4 Jul 2017 10:53:18 +0000 (12:53 +0200)]
Enable addressable params sanitization with --param asan-stack=1.
2017-07-04 Martin Liska <mliska@suse.cz>
PR sanitizer/81040
* sanopt.c (sanitize_rewrite_addressable_params): Mark the
newly created variable as DECL_IGNORED_P.
2017-07-04 Martin Liska <mliska@suse.cz>
PR sanitizer/81040
* g++.dg/asan/function-argument-1.C: Run the test-case w/o
use-after-scope sanitization.
From-SVN: r249960
Martin Liska [Tue, 4 Jul 2017 10:51:25 +0000 (12:51 +0200)]
Use xstrdup_for_dump in ipa-inline.c (PR ipa/81293).
2017-07-04 Martin Liska <mliska@suse.cz>
PR ipa/81293
* ipa-inline.c (inline_small_functions):
Use xstrdup_for_dump.
From-SVN: r249959
Tom de Vries [Tue, 4 Jul 2017 09:44:00 +0000 (09:44 +0000)]
Save and restore EDGE_DFS_BACK in draw_cfg_edges
2017-07-04 Tom de Vries <tom@codesourcery.com>
* graph.c (draw_cfg_edges): Save and restore EDGE_DFS_BACK.
From-SVN: r249954
Olivier Hainque [Tue, 4 Jul 2017 08:50:03 +0000 (08:50 +0000)]
Add missing libgcc/ChangeLog entry.
From-SVN: r249953
Jakub Jelinek [Tue, 4 Jul 2017 08:46:45 +0000 (10:46 +0200)]
function-argument-3.C: Add -Wno-psabi to additional options.
* g++.dg/asan/function-argument-3.C: Add -Wno-psabi to additional
options.
From-SVN: r249952
Jakub Jelinek [Tue, 4 Jul 2017 08:44:40 +0000 (10:44 +0200)]
re PR target/81175 (EXC_BAD_ACCESS in ::slpeel_duplicate_current_defs_from_edges(edge, edge, edge, edge) at is-a.h:192)
PR target/81175
* gcc.target/i386/pr69255-2.c (foo): Use the return value of the
gather.
From-SVN: r249951
Olivier Hainque [Tue, 4 Jul 2017 08:41:39 +0000 (08:41 +0000)]
vxworks.h (PTRDIFF_TYPE, SIZE_TYPE): Restore unconditional basic definitions.
2017-07-04 Olivier Hainque <hainque@adacore.com>
* config/vxworks.h (PTRDIFF_TYPE, SIZE_TYPE): Restore
unconditional basic definitions.
(VXWORKS_LIBS_RTP): Likewise, prefixed by VXWORKS_SYSCALL_LIBS_RTP,
empty by default.
* config/i386/vxworks.h (PTRDIFF_TYPE, SIZE_TYPE): Redefine,
accounting for 64bit ABIs using cpu specific macros available for
this purpose.
(VXWORKS_SYSCALL_LIBS_RTP): Likewise.
From-SVN: r249950
Martin Liska [Tue, 4 Jul 2017 07:44:18 +0000 (09:44 +0200)]
Add dg-require ifunc for mvc test-cases.
2017-07-04 Martin Liska <mliska@suse.cz>
PR ipa/81214
* g++.dg/ext/mvc2.C: Add dg-require ifunc.
* g++.dg/ext/mvc3.C: Likewise.
* gcc.target/i386/mvc2.c: Likewise.
* gcc.target/i386/mvc3.c: Likewise.
From-SVN: r249949
Jakub Jelinek [Tue, 4 Jul 2017 07:40:00 +0000 (09:40 +0200)]
parser.c (cp_parser_decomposition_declaration): Replace decomposition declaration with structured binding in diagnostics.
* parser.c (cp_parser_decomposition_declaration): Replace
decomposition declaration with structured binding in diagnostics.
* decl.c (cp_finish_decomp): Likewise.
(grokdeclarator): Likewise.
* g++.dg/cpp1z/decomp1.C: Expect structured binding instead of
decomposition declaration in diagnostics.
* g++.dg/cpp1z/decomp2.C: Likewise.
* g++.dg/cpp1z/decomp3.C: Likewise.
* g++.dg/cpp1z/decomp4.C: Likewise.
* g++.dg/cpp1z/decomp5.C: Likewise.
* g++.dg/cpp1z/decomp6.C: Likewise.
* g++.dg/cpp1z/decomp7.C: Likewise.
* g++.dg/cpp1z/decomp8.C: Likewise.
* g++.dg/cpp1z/decomp13.C: Likewise.
* g++.dg/cpp1z/decomp14.C: Likewise.
* g++.dg/cpp1z/decomp18.C: Likewise.
* g++.dg/cpp1z/decomp19.C: Likewise.
* g++.dg/cpp1z/decomp22.C: Likewise.
* g++.dg/cpp1z/decomp23.C: Likewise.
* g++.dg/cpp1z/decomp24.C: Likewise.
* g++.dg/cpp1z/decomp25.C: Likewise.
* g++.dg/cpp1z/decomp26.C: Likewise.
* g++.dg/cpp1z/decomp28.C: Likewise.
From-SVN: r249948
Jakub Jelinek [Tue, 4 Jul 2017 07:38:59 +0000 (09:38 +0200)]
re PR c++/81258 (ICE on C++1z code with invalid decomposition declaration: in cp_finish_decl, at cp/decl.c:6760)
PR c++/81258
* parser.c (cp_parser_decomposition_declaration): Diagnose invalid
forms of structured binding initializers.
* g++.dg/cpp1z/decomp21.C (foo): Adjust expected diagnostics.
* g++.dg/cpp1z/decomp30.C: New test.
From-SVN: r249947
Marek Polacek [Tue, 4 Jul 2017 06:53:08 +0000 (06:53 +0000)]
* c-warn.c (warn_if_unused_value): Remove WITH_CLEANUP_EXPR handling.
From-SVN: r249943
GCC Administrator [Tue, 4 Jul 2017 00:16:25 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r249942
Olivier Hainque [Mon, 3 Jul 2017 20:27:58 +0000 (20:27 +0000)]
t-vxworks7: New file.
2017-06-27 Olivier Hainque <hainque@adacore.com>
* config/t-vxworks7: New file.
New file mistakenly omitted from previous commit referencing it.
From-SVN: r249938
Paolo Carlini [Mon, 3 Jul 2017 18:10:52 +0000 (18:10 +0000)]
re PR c++/65775 (Late-specified return type bypasses return type checks (qualified, function, array))
/cp
2017-07-03 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/65775
* decl.c (grokdeclarator): Move checks on function return type after
the splice_late_return_type call; if declspecs->locations[ds_type_spec]
is UNKNOWN_LOCATION fall back to input_location.
/testsuite
2017-07-03 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/65775
* g++.dg/cpp0x/trailing14.C: New.
From-SVN: r249935
Dominique d'Humieres [Mon, 3 Jul 2017 18:03:51 +0000 (20:03 +0200)]
re PR fortran/79866 (diagnostics: typo in "Variable %s at %L of type EVENT_TYPE")
2017-07-03 Dominique d'Humieres <dominiq@lps.ens.fr>
PR fortran/79866
* resolve.c (resolve_symbol): Fix typo.
PR testsuite/79866
* gfortran.dg/coarray_event_2.f08: New test.
From-SVN: r249934
Dominique d'Humieres [Mon, 3 Jul 2017 17:56:08 +0000 (19:56 +0200)]
re PR fortran/79843 (diagnostics: missing word in fortran/symbol.c, conflict_std)
2017-07-03 Dominique d'Humieres <dominiq@lps.ens.fr>
PR fortran/79843
* symbol.c (check_conflict): Add missing "conflicts".
PR testsuite/79843
* gfortran.dg/namelist_3.f90: Adjust the dg-error string.
* gfortran.dg/pointer_intent_2.f90: Likewise.
From-SVN: r249933
David Malcolm [Mon, 3 Jul 2017 17:49:09 +0000 (17:49 +0000)]
C++: fix "RT_INTERATION" typo
gcc/cp/ChangeLog:
* parser.c (enum required_token): Fix spelling of
RT_INTERATION to RT_ITERATION.
(cp_parser_iteration_statement): Likewise.
(cp_parser_required_error): Likewise.
From-SVN: r249931
Dominique d'Humieres [Mon, 3 Jul 2017 17:42:54 +0000 (19:42 +0200)]
re PR bootstrap/81033 (there are cases where ld64 is not able to determine correct atom boundaries from the output GCC currently produces)
2017-07-03 Dominique d'Humieres <dominiq@lps.ens.fr>
PR target/81033
* config/darwin.c (darwin_function_switched_text_sections):
Fix spaces.
From-SVN: r249930
Jan Hubicka [Mon, 3 Jul 2017 17:31:02 +0000 (19:31 +0200)]
* tree-vect-loop-manip.c (vect_do_peeling): Fix scaling up.
From-SVN: r249929
Richard Earnshaw [Mon, 3 Jul 2017 16:33:34 +0000 (16:33 +0000)]
[arm] Add -mbe8 and -mbe32 to options summary.
* doc/invoke.texi (ARM Options): Add -mbe8 and -mbe32 to option summary.
From-SVN: r249928
Richard Sandiford [Mon, 3 Jul 2017 16:30:43 +0000 (16:30 +0000)]
Avoid minimum - 1 confusion in vectoriser
The variables that claimed to be the "minimum number of iterations" for
which vectorisation was profitable were actually the maximum number of
iterations for which vectorisation wasn't profitable. The loop threshold
was too.
This patch makes the values be what the variable names suggest.
2017-07-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vect-loop.c (vect_analyze_loop_2): Treat min_scalar_loop_bound,
min_profitable_iters, and th as inclusive lower bounds.
Fix LOOP_VINFO_PEELING_FOR_GAPS condition.
(vect_estimate_min_profitable_iters): Return inclusive lower bounds
for min_profitable_iters and min_profitable_estimate.
(vect_transform_loop): Treat th as an inclusive lower bound.
* tree-vect-loop-manip.c (vect_loop_versioning): Likewise.
From-SVN: r249927
Dominique d'Humieres [Mon, 3 Jul 2017 15:53:56 +0000 (17:53 +0200)]
re PR bootstrap/81033 (there are cases where ld64 is not able to determine correct atom boundaries from the output GCC currently produces)
2017-07-03 Dominique d'Humieres <dominiq@lps.ens.fr>
PR target/81033
* config/darwin.c (darwin_function_switched_text_sections):
Replace DECL_NAME with DECL_ASSEMBLER_NAME, split assemble_name_raw
in two pieces, and suppress the use of buf.
From-SVN: r249926
Nathan Sidwell [Mon, 3 Jul 2017 15:06:02 +0000 (15:06 +0000)]
* hash-table.h (hash_table_mod1): Fix indentation.
From-SVN: r249925
Jan Hubicka [Mon, 3 Jul 2017 14:40:46 +0000 (16:40 +0200)]
re PR rtl-optimization/81290 (ICE in update_br_prob_note)
PR middle-end/81290
* predict.c (force_edge_cold): Be more careful about propagation
backward.
* profile-count.h (profile_probability::guessed,
profile_probability::fdo, profile_count::guessed, profile_count::fdo):
New.
* tree-ssa-threadupdate.c (recompute_probabilities): Result is guessed.
* gcc.c-torture/compile/pr81290.c: New.
From-SVN: r249924
James Greenhalgh [Mon, 3 Jul 2017 14:32:30 +0000 (14:32 +0000)]
Andrew pointed out that I did not document the new architecture extension flag I added for the RcPc extension.
Andrew pointed out that I did not document the new architecture extension
flag I added for the RcPc extension. This was intentional, as enabling the
rcpc extension does not change GCC code generation, and is just
an assembler flag. But for completeness, here is documentation for the
new option.
gcc/
2017-07-03 James Greenhalgh <james.greenhalgh@arm.com>
* doc/invoke.texi (rcpc architecture extension): Document it.
From-SVN: r249923
Nathan Sidwell [Mon, 3 Jul 2017 14:16:59 +0000 (14:16 +0000)]
configure.ac: Set srcdir when sourcing config-lang.in fragments.
* configure.ac: Set srcdir when sourcing config-lang.in fragments.
* configure: Rebuilt.
gcc/objcp/
* config-lang.in: Source cp/config-lang.in, sort objc++ gtfiles list.
From-SVN: r249922
Bernd Schmidt [Mon, 3 Jul 2017 14:01:00 +0000 (14:01 +0000)]
Readd myself as c6x maintainer.
From-SVN: r249920
Richard Biener [Mon, 3 Jul 2017 13:44:13 +0000 (13:44 +0000)]
re PR tree-optimization/60510 (SLP blocks loop vectorization (with reduction))
2017-07-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/60510
* tree-vect-loop.c (vect_create_epilog_for_reduction): Pass in
the scalar reduction PHI and use it.
(vectorizable_reduction): Properly guard the single_defuse_cycle
path for non-SLP reduction chains where we cannot use it.
Rework reduc_def/index and vector type deduction. Rework
vector operand gathering during reduction op code-gen.
* tree-vect-slp.c (vect_analyze_slp): For failed SLP reduction
chains dissolve the chain and leave it to non-SLP reduction
handling.
* gfortran.dg/vect/pr60510.f: New testcase.
From-SVN: r249919
Tom de Vries [Mon, 3 Jul 2017 13:40:19 +0000 (13:40 +0000)]
Fix secure_getenv.h include in plugin-hsa.c
2017-07-03 Tom de Vries <tom@codesourcery.com>
* plugin/plugin-hsa.c: Fix secure_getenv.h include.
From-SVN: r249918
Richard Sandiford [Mon, 3 Jul 2017 13:37:07 +0000 (13:37 +0000)]
Add a helper for getting the overall alignment of a DR
This combines the information from previous patches to give a guaranteed
alignment for the DR as a whole. This should be a bit safer than using
base_element_aligned, since that only really took the base into account
(not the init or offset).
2017-07-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-data-ref.h (dr_alignment): Declare.
* tree-data-ref.c (dr_alignment): New function.
* tree-vectorizer.h (dataref_aux): Remove base_element_aligned.
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
set it.
* tree-vect-stmts.c (vectorizable_store): Use dr_alignment.
From-SVN: r249917
Richard Sandiford [Mon, 3 Jul 2017 13:36:55 +0000 (13:36 +0000)]
Add DR_BASE_ALIGNMENT and DR_BASE_MISALIGNMENT
This patch records the base alignment and misalignment in
innermost_loop_behavior, to avoid the second-guessing that was
previously done in vect_compute_data_ref_alignment. It also makes
vect_analyze_data_refs use dr_analyze_innermost, instead of having an
almost-copy of the same code.
I wasn't sure whether the alignments should be measured in bits
(for consistency with most other interfaces) or in bytes (for consistency
with DR_ALIGNED_TO, now DR_OFFSET_ALIGNMENT, and with *_ptr_info_alignment).
I went for bytes because:
- I think in practice most consumers are going to want bytes.
E.g. using bytes avoids having to mix TYPE_ALIGN and TYPE_ALIGN_UNIT
in vect_compute_data_ref_alignment.
- It means that any bit-level paranoia is dealt with when building
the innermost_loop_behavior and doesn't get pushed down to consumers.
2017-07-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-data-ref.h (innermost_loop_behavior): Add base_alignment
and base_misalignment fields.
(DR_BASE_ALIGNMENT, DR_BASE_MISALIGNMENT): New macros.
* tree-data-ref.c: Include builtins.h.
(dr_analyze_innermost): Set up the new innmost_loop_behavior fields.
* tree-vectorizer.h (STMT_VINFO_DR_BASE_ALIGNMENT): New macro.
(STMT_VINFO_DR_BASE_MISALIGNMENT): Likewise.
* tree-vect-data-refs.c: Include tree-cfg.h.
(vect_compute_data_ref_alignment): Use the new innermost_loop_behavior
fields instead of calculating an alignment here.
(vect_analyze_data_refs): Use dr_analyze_innermost. Dump the new
innermost_loop_behavior fields.
From-SVN: r249916
Richard Sandiford [Mon, 3 Jul 2017 13:36:45 +0000 (13:36 +0000)]
Add DR_STEP_ALIGNMENT
A later patch adds base alignment information to innermost_loop_behavior.
After that, the only remaining piece of alignment information that wasn't
immediately obvious was the step alignment. Adding that allows a minor
simplification to vect_compute_data_ref_alignment, and also potentially
improves the handling of variable strides for outer loop vectorisation.
A later patch will also use it to give the alignment of the DR as a whole.
2017-07-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-data-ref.h (innermost_loop_behavior): Add a step_alignment
field.
(DR_STEP_ALIGNMENT): New macro.
* tree-vectorizer.h (STMT_VINFO_DR_STEP_ALIGNMENT): Likewise.
* tree-data-ref.c (dr_analyze_innermost): Initalize step_alignment.
(create_data_ref): Print it.
* tree-vect-stmts.c (vectorizable_load): Use the step alignment
to tell whether the step preserves vector (mis)alignment.
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Likewise.
Move the check for an integer step and generalise to all INTEGER_CST.
(vect_analyze_data_refs): Set DR_STEP_ALIGNMENT when setting DR_STEP.
Print the outer step alignment.
From-SVN: r249915
Richard Sandiford [Mon, 3 Jul 2017 13:36:36 +0000 (13:36 +0000)]
Rename DR_ALIGNED_TO to DR_OFFSET_ALIGNMENT
This patch renames DR_ALIGNED_TO to DR_OFFSET_ALIGNMENT, to avoid
confusion with the upcoming DR_BASE_ALIGNMENT. Nothing needed the
value as a tree, and the value is clipped to BIGGEST_ALIGNMENT
(maybe it should be MAX_OFILE_ALIGNMENT?) so we might as well use
an unsigned int instead.
2017-07-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-data-ref.h (innermost_loop_behavior): Replace aligned_to
with offset_alignment.
(DR_ALIGNED_TO): Delete.
(DR_OFFSET_ALIGNMENT): New macro.
* tree-vectorizer.h (STMT_VINFO_DR_ALIGNED_TO): Delete.
(STMT_VINFO_DR_OFFSET_ALIGNMENT): New macro.
* tree-data-ref.c (dr_analyze_innermost): Update after above changes.
(create_data_ref): Likewise.
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Likewise.
(vect_analyze_data_refs): Likewise.
* tree-if-conv.c (if_convertible_loop_p_1): Use memset before
creating dummy innermost behavior.
From-SVN: r249914
Richard Sandiford [Mon, 3 Jul 2017 13:36:26 +0000 (13:36 +0000)]
Make dr_analyze_innermost operate on innermost_loop_behavior
This means that callers to dr_analyze_innermost don't need a full
data_reference and don't need to fill in any fields beforehand.
2017-07-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-data-ref.h (dr_analyze_innermost): Replace the dr argument
with a "innermost_loop_behavior *" and refeence tree.
* tree-data-ref.c (dr_analyze_innermost): Likewise.
(create_data_ref): Update call accordingly.
* tree-predcom.c (find_looparound_phi): Likewise.
From-SVN: r249913
Rainer Orth [Mon, 3 Jul 2017 13:36:20 +0000 (13:36 +0000)]
Require ifunc support in gcc.target/i386/mvc6.c
* gcc.target/i386/mvc6.c: Require ifunc support.
From-SVN: r249912
Richard Sandiford [Mon, 3 Jul 2017 13:36:13 +0000 (13:36 +0000)]
Use innermost_loop_behavior for outer loop vectorisation
This patch replaces the individual stmt_vinfo dr_* fields with
an innermost_loop_behavior, so that the changes in later patches
get picked up automatically. It also adds a helper function for
getting the behavior of a data reference wrt the vectorised loop.
2017-07-03 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vectorizer.h (_stmt_vec_info): Replace individual dr_*
fields with dr_wrt_vec_loop.
(STMT_VINFO_DR_BASE_ADDRESS, STMT_VINFO_DR_INIT, STMT_VINFO_DR_OFFSET)
(STMT_VINFO_DR_STEP, STMT_VINFO_DR_ALIGNED_TO): Update accordingly.
(STMT_VINFO_DR_WRT_VEC_LOOP): New macro.
(vect_dr_behavior): New function.
(vect_create_addr_base_for_vector_ref): Remove loop parameter.
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
vect_dr_behavior. Use a step_preserves_misalignment_p boolean to
track whether the step preserves the misalignment.
(vect_create_addr_base_for_vector_ref): Remove loop parameter.
Use vect_dr_behavior.
(vect_setup_realignment): Update call accordingly.
(vect_create_data_ref_ptr): Likewise. Use vect_dr_behavior.
* tree-vect-loop-manip.c (vect_gen_prolog_loop_niters): Update
call to vect_create_addr_base_for_vector_ref.
(vect_create_cond_for_align_checks): Likewise.
* tree-vect-patterns.c (vect_recog_bool_pattern): Copy
STMT_VINFO_DR_WRT_VEC_LOOP as a block.
(vect_recog_mask_conversion_pattern): Likewise.
* tree-vect-stmts.c (compare_step_with_zero): Use vect_dr_behavior.
(new_stmt_vec_info): Remove redundant zeroing.
From-SVN: r249911
Richard Earnshaw [Mon, 3 Jul 2017 13:22:05 +0000 (13:22 +0000)]
[arm] Clean up generation of BE8 format images.
The existing code in arm/bpabi.h was quite fragile and relied on matching
specific CPU and/or architecture names. The introduction of the option
format for -mcpu and -march broke that in a way that would be non-trivial
to fix by updating the list. The hook in that file was always a pain
as it required every new CPU being added to be add an update here as well
(easy to miss).
I've fixed that problem once and for all by adding a new callback into
the driver to select the correct BE8 behaviour. This uses features in
the ISA capabilities list to select whether or not to use BE8 format
during linking.
I also noticed that if the user happened to pass both -mbig-endian and
-mlittle-endian on the command line then the linker spec rules would
get somewhat confused and potentially do the wrong thing. I've fixed that
by marking these options as opposites in the option descriptions. The
driver will now automatically suppress overridden options leading to the
correct desired behavior.
Whilst fixing this I noticed a couple of anomolus cases in the
existing BE8 support: we were not generating BE8 format for ARMv6 or
ARMv7-R targets. While the ARMv6 status was probably deliberate at
the time, this is probably not a good idea in the long term as the
alternative, BE32, has been deprecated by ARM. After discussion with
a couple of colleagues I've decided to change this, but to then add an
option to restore the existing behaviour at the user's option. So
this patch introduces two new options (opposites) -mbe8 and -mbe32.
This is a quiet behavior change, so I'll add a comment to the release
notes shortly.
* common/config/arm/arm-common.c (arm_be8_option): New function.
* config/arm/arm-isa.h (isa_feature): Add new feature bit isa_bit_be8.
(ISA_ARMv6): Add isa_bit_be8.
* config/arm/arm.h (arm_be8_option): Add prototype.
(BE8_SPEC_FUNCTION): New define.
(EXTRA_SPEC_FUNCTIONS): Add BE8_SPEC_FUNCTION.
* config/arm/arm.opt (mbig-endian): Mark as Negative of mlittle-endian.
(mlittle-endian): Similarly.
(mbe8, mbe32): New options.
* config/arm/bpabi.h (BE8_LINK_SPEC): Call arm_be8_option.
* doc/invoke.texi (ARM Options): Document -mbe8 and -mbe32.
From-SVN: r249909
Jan Hubicka [Mon, 3 Jul 2017 12:43:19 +0000 (14:43 +0200)]
* tree-cfg.c (gimple_find_sub_bbs): Fix profile updating.
From-SVN: r249908
Jan Hubicka [Mon, 3 Jul 2017 12:42:07 +0000 (14:42 +0200)]
tree-cfgcleanup.c (want_merge_blocks_p): New function.
* tree-cfgcleanup.c (want_merge_blocks_p): New function.
(cleanup_tree_cfg_bb): Use it.
* profile-count.h (profile_count::of_for_merging, profile_count::merge):
New functions.
* tree-cfg.c (gimple_merge_blocks): Use profile_count::merge.
From-SVN: r249907
Jan Hubicka [Mon, 3 Jul 2017 12:17:59 +0000 (14:17 +0200)]
re PR target/81285 (r249888 breaks bootstrap on ppc64le)
PR bootstrap/81285
* loop-doloop.c (add_test): Update profile.
From-SVN: r249904
Martin Liska [Mon, 3 Jul 2017 11:48:47 +0000 (13:48 +0200)]
ASAN: handle addressable params (PR sanitize/81040).
2017-07-03 Martin Liska <mliska@suse.cz>
PR sanitize/81040
* g++.dg/asan/function-argument-1.C: New test.
* g++.dg/asan/function-argument-2.C: New test.
* g++.dg/asan/function-argument-3.C: New test.
2017-07-03 Martin Liska <mliska@suse.cz>
PR sanitize/81040
* sanopt.c (rewrite_usage_of_param): New function.
(sanitize_rewrite_addressable_params): Likewise.
(pass_sanopt::execute): Call rewrite_usage_of_param.
From-SVN: r249903
Richard Biener [Mon, 3 Jul 2017 09:42:22 +0000 (09:42 +0000)]
tree-vect-loop.c (vect_create_epilog_for_reduction): Revert back to using VIEW_CONVERT_EXPR.
2017-07-03 Richard Biener <rguenther@suse.de>
* tree-vect-loop.c (vect_create_epilog_for_reduction): Revert
back to using VIEW_CONVERT_EXPR.
From-SVN: r249902
Martin Liska [Mon, 3 Jul 2017 09:26:31 +0000 (11:26 +0200)]
Make stack epilogue more efficient
2017-07-03 Martin Liska <mliska@suse.cz>
* asan.c (asan_emit_stack_protection): Unpoison just red zones
and shadow memory of auto variables which are subject of
use-after-scope sanitization.
(asan_expand_mark_ifn): Add do set only when is_poison.
From-SVN: r249900
Richard Biener [Mon, 3 Jul 2017 07:28:28 +0000 (07:28 +0000)]
tree-vect-loop.c (vect_analyze_loop_operations): Also analyze reduction PHIs.
2016-07-03 Richard Biener <rguenther@suse.de>
* tree-vect-loop.c (vect_analyze_loop_operations): Also analyze
reduction PHIs.
(vect_force_simple_reduction): Record reduction def -> phi mapping.
(vectorizable_reduction): Perform reduction PHI creation when
visiting a reduction PHI and adjust and simplify code generation
phase of the reduction op. Cache dts, use fold_binary, not fold_build2.
(vect_transform_loop): Visit reduction PHIs.
* tree-vect-slp.c (vect_get_and_check_slp_defs): Record reduction
defs into the SLP tree.
(vect_build_slp_tree): Reduction defs terminate the recursion.
* tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Allow lookup
of reduction defs.
(vect_get_vec_defs_for_stmt_copy): Export.
(vect_get_vec_defs): Likewise.
* tree-vectorizer.h (struct _stmt_vec_info): Amend reduc_def
purpose.
(vect_get_vec_defs_for_stmt_copy): Declare.
(vect_get_vec_defs): Likewise.
From-SVN: r249897
Richard Sandiford [Mon, 3 Jul 2017 07:26:21 +0000 (07:26 +0000)]
Tweak BB analysis for dr_analyze_innermost
dr_analyze_innermost had a "struct loop *nest" parameter that acted
like a boolean. This was added in r179161, with the idea that a
null nest selected BB-level analysis rather than loop analysis.
The handling seemed strange though. If the DR was part of a loop,
we still tried to express the base and offset values as IVs, potentially
giving a nonzero step. If that failed for any reason, we'd revert to
using the original base and offset, just as we would if we hadn't asked
for an IV in the first place.
It seems more natural to use the !in_loop handling whenever nest is null
and always set the step to zero. This actually enables one more SLP
opportunity in bb-slp-pr65935.c.
I checked out r179161 and tried the patch there. The test case added
in that revision still passes, so I don't think there was any particular
need to check simple_iv.
2017-06-28 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-data-ref.c (dr_analyze_innermost): Replace the "nest"
parameter with a "loop" parameter and use it instead of the
loop containing DR_STMT. Don't check simple_iv when doing
BB analysis. Describe the two analysis modes in the comment.
gcc/testsuite/
* gcc.dg/vect/bb-slp-pr65935.c: Expect SLP to be used in main
as well.
From-SVN: r249896
Tom de Vries [Mon, 3 Jul 2017 07:23:01 +0000 (07:23 +0000)]
Ignore EDGE_{DFS_BACK,EXECUTABLE} in tail-merge
2017-07-03 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/69468
* tree-ssa-tail-merge.c (ignore_edge_flags): New constant.
(find_same_succ_bb): Handle ignore_edge_flags.
* gcc.dg/pr81192.c: Update.
From-SVN: r249895
Tom de Vries [Mon, 3 Jul 2017 07:21:34 +0000 (07:21 +0000)]
Don't tail-merge blocks from different loops
2017-07-03 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/81192
* tree-ssa-tail-merge.c (same_succ_hash): Use bb->loop_father->num in
hash.
(same_succ::equal): Don't find bbs to be equal if bb->loop_father
differs.
(find_same_succ_bb): Remove obsolete test on bb->loop_father->latch.
* gcc.dg/pr81192.c: Update.
From-SVN: r249894
Tom de Vries [Mon, 3 Jul 2017 07:20:49 +0000 (07:20 +0000)]
Fix sigsegv in find_same_succ_bb
2017-07-03 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/81192
* tree-ssa-tail-merge.c (same_succ_flush_bb): Handle
BB_SAME_SUCC (bb) == NULL.
* gcc.dg/pr81192.c: New test.
From-SVN: r249893
GCC Administrator [Mon, 3 Jul 2017 00:16:42 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r249892
Jan Hubicka [Sun, 2 Jul 2017 22:27:50 +0000 (00:27 +0200)]
cfgrtl.c (rtl_verify_edges): Enable checking of profile_probability consistency.
* cfgrtl.c (rtl_verify_edges): Enable checking of profile_probability
consistency.
From-SVN: r249888
Jan Hubicka [Sun, 2 Jul 2017 22:25:59 +0000 (00:25 +0200)]
dumpfile.c: Include profile-count.h
* dumpfile.c: Include profile-count.h
* tree-cfg.c (gimple_duplicate_sese_tail): Drop UNUSED attributes; update
profile.
(insert_cond_bb): Update profile.
* tree-cfg.h (insert_cond_bb): Update prototype.
* tree-chkp-opt.c (chkp_optimize_string_function_calls): Update.
* tree-dump.c: Do not include tree-cfg.
From-SVN: r249887
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