binutils-gdb.git
2 years agobfd: remove wrong comment in xcofflink.c
Clément Chigot [Fri, 19 Nov 2021 13:28:52 +0000 (14:28 +0100)]
bfd: remove wrong comment in xcofflink.c

This comment was long time ago associated to the function
"xcoff_build_ldsyms" which have since been replaced by
"xcoff_build_ldsym".

* xcofflink.c: Remove wrong comment.

2 years agosim: bfin: fix short --env usage in testsuite
Mike Frysinger [Sat, 20 Nov 2021 02:26:57 +0000 (21:26 -0500)]
sim: bfin: fix short --env usage in testsuite

Now that we have more than one option that matches "--env", the test
config here doesn't work.  Use the explicit --environment.

2 years agoAutomatic date update in version.in
GDB Administrator [Sat, 20 Nov 2021 00:00:11 +0000 (00:00 +0000)]
Automatic date update in version.in

2 years agoelfedit: Align --[in|out]put-abiversion usage
H.J. Lu [Fri, 19 Nov 2021 16:11:59 +0000 (08:11 -0800)]
elfedit: Align --[in|out]put-abiversion usage

Align

  --input-abiversion [0-255]  Set input ABIVERSION
  --output-abiversion [0-255] Set output ABIVERSION

instead of

  --input-abiversion [0-255]
                              Set input ABIVERSION
  --output-abiversion [0-255]
                              Set output ABIVERSION

* elfedit.c (usage): Align --[in|out]put-abiversion usage.

2 years ago[gdb/testsuite] Handle runto fail in gdb.mi/mi-var-cp.exp
Tom de Vries [Fri, 19 Nov 2021 14:55:16 +0000 (15:55 +0100)]
[gdb/testsuite] Handle runto fail in gdb.mi/mi-var-cp.exp

On OBS I ran into:
...
PASS: gdb.mi/mi-var-cp.exp: run to mi-var-cp.cc:81 (set breakpoint)
UNRESOLVED: gdb.mi/mi-var-cp.exp: unable to start target
...
followed by 81 FAILs and two more UNRESOLVEDs.

I didn't manage to reproduce this, but I did notice that the initial
problem causing the UNRESOLVED caused all subsequent UNRESOLVEDs and FAILs.

I emulated the problem by commenting out the send_gdb "run\n" in
mi_run_cmd_full.

Fix this by:
- handling mi_run_cmd failure in mi_get_inline_test
- handling mi_run_inline_test failure in gdb.mi/mi-var-cp.exp, and
  other test-cases using mi_get_inline_test

Tested on x86_64-linux.

2 years ago[gdb/testsuite] Fix 64-bit dwarf test-cases with -m32
Tom de Vries [Fri, 19 Nov 2021 14:09:05 +0000 (15:09 +0100)]
[gdb/testsuite] Fix 64-bit dwarf test-cases with -m32

When running test-case gdb.dwarf2/loc-sec-offset.exp with target board -m32,
I run into:
...
builtin_spawn -ignore SIGHUP gcc -fno-stack-protector -m32 \
  -fdiagnostics-color=never -c -o loc-sec-offset-dw641.o \
  loc-sec-offset-dw64.S^M
as: loc-sec-offset-dw641.o: unsupported relocation type: 0x1^M
loc-sec-offset-dw64.S: Assembler messages:^M
loc-sec-offset-dw64.S:29: Error: cannot represent relocation type \
  BFD_RELOC_64^M
...

Looking at line 29, we have:
...
        .8byte        .Labbrev1_begin   /* Abbrevs */
...

It would be nice if the assembler could handle this somehow.  But I guess
it's not unreasonable that an assembler for a 32-bit architecture will object
to handling 64-bit labels.

Instead, work around this in the dwarf assembler by emitting:
...
        .4byte        .Labbrev1_begin   /* Abbrevs (lsw) */
        .4byte        0                 /* Abbrevs (msw) */
...

Tested on x86_64-linux with target board unix/-m32.

Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=28383

2 years ago[gdb/testsuite] Fix gdb.threads/thread-specific-bp.exp
Tom de Vries [Fri, 19 Nov 2021 13:33:39 +0000 (14:33 +0100)]
[gdb/testsuite] Fix gdb.threads/thread-specific-bp.exp

On OBS I ran into a failure in test-case gdb.threads/thread-specific-bp.exp:
...
(gdb) PASS: gdb.threads/thread-specific-bp.exp: non-stop: continue to end
info breakpoint^M
Num     Type           Disp Enb Address            What^M
1       breakpoint     keep y   0x0000555555555167 in main at $src:36^M
        breakpoint already hit 1 time^M
2       breakpoint     keep y   0x0000555555555151 in start at $src:23^M
        breakpoint already hit 1 time^M
3       breakpoint     keep y   0x0000555555555167 in main at $src:36 thread 2^M
        stop only in thread 2^M
4       breakpoint     keep y   0x000055555555515c in end at $src:29^M
        breakpoint already hit 1 time^M
(gdb) [Thread 0x7ffff7db1640 (LWP 19984) exited]^M
Thread-specific breakpoint 3 deleted - thread 2 no longer in the thread list.^M
FAIL: gdb.threads/thread-specific-bp.exp: non-stop: \
  thread-specific breakpoint was deleted (timeout)
...

Fix this by waiting for the "[Thread 0x7ffff7db1640 (LWP 19984) exited]"
message before issuing the "info breakpoint command".

Tested on x86_64-linux.

2 years agogdb/testsuite: Extend tests for print of cv qualifiers
Christina Schimpe [Tue, 16 Nov 2021 09:58:11 +0000 (10:58 +0100)]
gdb/testsuite: Extend tests for print of cv qualifiers

This commit supplements whatis and ptype command tests for print of
const-volatile qualifiers.

gdb/testsuite/ChangeLog:
2021-11-16  Christina Schimpe  <christina.schimpe@intel.com>

* gdb.cp/ptype-cv-cp.cc: New const and volatile typedef
  variables.
* gdb.cp/ptype-cv-cp.exp: Add new tests.

2 years agogdb: Print cv qualifiers if class attributes are substituted
Christina Schimpe [Tue, 16 Nov 2021 09:58:10 +0000 (10:58 +0100)]
gdb: Print cv qualifiers if class attributes are substituted

Make ptype print const/volatile qualifiers when template or typedef
attributes are substituted.

For a programm like
~~~
template<typename DataT>
class Cfoo
{
  typedef float myfloat;
public:
  DataT me0;
  const DataT me1=1;
  const myfloat me2=2.0;
};

int main()
{
  Cfoo<int> cfoo;
  return 0;
}
~~~

gdb outputs the following type for cfoo's attributes:

~~~
(gdb) b 14
Breakpoint 1 at 0x1170: file tmp.cc, line 14.
(gdb) run
Starting program: /tmp

Breakpoint 1, main () at tmp.cc:14
14        return 0;
(gdb) ptype cfoo
type = class Cfoo<int> [with DataT = int] {
  public:
    DataT me0;
    DataT me1;
    myfloat me2;

  private:
    typedef float myfloat;
}

~~~

The cv qualifiers (const in this case) are ignored for me1 and me2.

After:
~~~
(gdb) ptype cfoo
type = class Cfoo<int> [with DataT = int] {
  public:
    DataT me0;
    const DataT me1;
    const myfloat me2;

  private:
    typedef float myfloat;
}
~~~

gdb/ChangeLog:
2021-11-16  Christina Schimpe  <christina.schimpe@intel.com>

* gdb/c-typeprint.c: Print cv qualifiers in case of parameter
  substitution.

gdb/testsuite/ChangeLog:
2021-11-16  Christina Schimpe  <christina.schimpe@intel.com>

* gdb.cp/templates.cc:  New template class Cfoo with const,
  template, typdef and integer attributes.
* gdb.cp/templates.exp: Add new test using ptype and ptype/r
  commmands for template class CFoo.

2 years agoRISC-V: Support new .option arch directive.
Nelson Chu [Fri, 19 Nov 2021 09:11:06 +0000 (17:11 +0800)]
RISC-V: Support new .option arch directive.

https://github.com/riscv/riscv-asm-manual/pull/67

Format:
.option arch, +<extension><version>, ...
.option arch, -<extension>
.option arch, =<ISA string>

The new direcitve is used to enable/disable extensions for the specific
code region.  For example,

.attribute arch, "rv64ic"   # arch = rv64i2p0_c2p0
.option push
.option arch, +d2p0, -c     # arch = rv64i2p0_f2p0_d2p0, f is added implied
.option arch, =rv32gc       # arch = rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0
.option pop                 # arch = rv64i2p0_c2p0

Note that,
1. ".option rvc/norvc" have the same behavior as ".option arch +c/-c".
2. ".option arch -i" is illegal, since we cannot remove base i extension.
3. If arch=rv64i2p0, then ".option arch, +i3p0" will update the i's version
   from 2.0 to 3.0.
4. If arch=rv64i3p0, then ".option arch, +i" will update the i's version
   from 2.0 to the default one according to the chosen isa spec.

bfd/
* elfxx-riscv.c (riscv_add_subset): If the subset is already added,
and the new versions are not RISCV_UNKNOWN_VERSION, then update the
versions to the subset list.
(riscv_copy_subset): New function.  Copy the subset from list.
(riscv_copy_subset_list): New function.  Return the new copyed list.
(riscv_update_subset): Updated to make .option arch directives workable.
* elfxx-riscv.h: Updated.
gas/
* config/tc-riscv.c (riscv_subsets): Defined as a pointer.
(riscv_rps_as): Init the subset_list to NULL, we will set it later
once riscv_opts_stack is created or updated.
(struct riscv_option_stack, riscv_opts_stack): Moved forward.
(riscv_set_arch): Updated.
(s_riscv_option): Support new .option arch directive, to add, remove
or update subsets for the specific code region.
(riscv_write_out_attrs): Updated.
* doc/c-riscv.texi: Added document for new .option arch directive.
* testsuite/gas/riscv/option-arch-01a.d: New testcase.
* testsuite/gas/riscv/option-arch-01b.d: Likewise.
* testsuite/gas/riscv/option-arch-01.s: Likewise..
* testsuite/gas/riscv/option-arch-02.d: Likewise.
* testsuite/gas/riscv/option-arch-02.s: Likewise.
* testsuite/gas/riscv/option-arch-fail.d: Likewise.
* testsuite/gas/riscv/option-arch-fail.l: Likewise.
* testsuite/gas/riscv/option-arch-fail.s: Likewise.

2 years agoRe: Add multibyte character warning option to the assembler.
Alan Modra [Fri, 19 Nov 2021 00:21:27 +0000 (10:51 +1030)]
Re: Add multibyte character warning option to the assembler.

On hppa*-hp-hpux* run_dump_test edits the test file, adjusting .comm
directives to suit those target's unusual syntax.  Thus gas is passed
a temporary file name.

* testsuite/gas/all/multibyte1.l: Ignore file name.

2 years agosim: install various doc files
Mike Frysinger [Fri, 19 Nov 2021 00:32:31 +0000 (19:32 -0500)]
sim: install various doc files

2 years agoRISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.
Nelson Chu [Wed, 11 Aug 2021 08:26:39 +0000 (01:26 -0700)]
RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.

This is the original discussion,
https://github.com/riscv/riscv-elf-psabi-doc/pull/190

And here is the glibc part,
https://sourceware.org/pipermail/libc-alpha/2021-August/129931.html

For binutils part, we need to support a new direcitve: .variant_cc.
The function symbol marked by .variant_cc means it need to be resolved
directly without resolver for dynamic linker.  We also add a new dynamic
entry, STO_RISCV_VARIANT_CC, to indicate there are symbols with the
special attribute in the dynamic symbol table of the object.

I heard that llvm already have supported this in their mainline, so
I think it's time to commit this.

bfd/
* elfnn-riscv.c (riscv_elf_link_hash_table): Added variant_cc
flag. It is used to check if relocations for variant CC symbols
may be present.
(allocate_dynrelocs): If the symbol has STO_RISCV_VARIANT_CC
flag, then raise the variant_cc flag of riscv_elf_link_hash_table.
(riscv_elf_size_dynamic_sections): Added dynamic entry for
variant_cc.
(riscv_elf_merge_symbol_attribute): New function, used to merge
non-visibility st_other attributes, including STO_RISCV_VARIANT_CC.
binutils/
* readelf.c (get_riscv_dynamic_type): New function.
(get_dynamic_type): Called get_riscv_dynamic_type for riscv targets.
(get_riscv_symbol_other): New function.
(get_symbol_other): Called get_riscv_symbol_other for riscv targets.
gas/
* config/tc-riscv.c (s_variant_cc): Marked symbol that it follows a
variant CC convention.
(riscv_elf_copy_symbol_attributes): Same as elf_copy_symbol_attributes,
but without copying st_other.  If a function symbol has special st_other
value set via directives, then attaching an IFUNC resolver to that symbol
should not override the st_other setting.
(riscv_pseudo_table): Support variant_cc diretive.
* config/tc-riscv.h (OBJ_COPY_SYMBOL_ATTRIBUTES): Defined.
* testsuite/gas/riscv/variant_cc-set.d: New testcase.
* testsuite/gas/riscv/variant_cc-set.s: Likewise.
* testsuite/gas/riscv/variant_cc.d: Likewise.
* testsuite/gas/riscv/variant_cc.s: Likewise.
include/
* elf/riscv.h (DT_RISCV_VARIANT_CC): Defined to (DT_LOPROC + 1).
(STO_RISCV_VARIANT_CC): Defined to 0x80.
ld/
* testsuite/ld-riscv-elf/variant_cc-1.s: New testcase.
* testsuite/ld-riscv-elf/variant_cc-2.s: Likewise.
* testsuite/ld-riscv-elf/variant_cc-now.d: Likewise.
* testsuite/ld-riscv-elf/variant_cc-r.d: Likewise.
* testsuite/ld-riscv-elf/variant_cc-shared.d: Likewise.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.

2 years agosim: use program_transform_name for libsim
Mike Frysinger [Fri, 19 Nov 2021 00:56:45 +0000 (19:56 -0500)]
sim: use program_transform_name for libsim

Instead of always using target_alias as a prefix on the name, use
program_transform_name instead so that the library is scoped in the
same way as the run program.

2 years agosim: avoid installing headers when there is no sim
Mike Frysinger [Fri, 19 Nov 2021 00:10:28 +0000 (19:10 -0500)]
sim: avoid installing headers when there is no sim

If we aren't building any sims, don't install the sim headers as they
won't be useful to anyone.

2 years agoAutomatic date update in version.in
GDB Administrator [Fri, 19 Nov 2021 00:00:07 +0000 (00:00 +0000)]
Automatic date update in version.in

2 years agodprintf-execution-x-script.exp: Adjust test for native-extended-gdbserver
Kevin Buettner [Thu, 18 Nov 2021 22:06:01 +0000 (15:06 -0700)]
dprintf-execution-x-script.exp: Adjust test for native-extended-gdbserver

Without this commit, doing...

make check RUNTESTFLAGS="--target_board=native-extended-gdbserver" \
           TESTS="gdb.base/dprintf-execution-x-script.exp"

...will show one failure.

Here's a snippet from gdb.log showing the circumstances - I've trimmed
the paths for readability:

builtin_spawn gdb -nw -nx -data-directory data-directory -iex set height 0 -iex set width 0 -iex set auto-connect-native-target off -iex set sysroot -ex set height unlimited -x testsuite/gdb.base/dprintf-execution-x-script.gdb --args testsuite/outputs/gdb.base/dprintf-execution-x-script/dprintf-execution-x-script
...
Reading symbols from testsuite/outputs/gdb.base/dprintf-execution-x-script/dprintf-execution-x-script...
Dprintf 1 at 0x40116e: file testsuite/gdb.base/dprintf-execution-x-script.c, line 38.
Breakpoint 2 at 0x40113a: file testsuite/gdb.base/dprintf-execution-x-script.c, line 26.
testsuite/gdb.base/dprintf-execution-x-script.gdb:21: Error in sourced command file:
Don't know how to run.  Try "help target".
(gdb) FAIL: gdb.base/dprintf-execution-x-script.exp: load and run script with -x
...
GNU gdb (GDB) 12.0.50.20211118-git
Copyright (C) 2021 Free Software Foundation, Inc.
...
(gdb) set height 0
(gdb) set width 0
(gdb) builtin_spawn gdbserver/gdbserver --once --multi localhost:2346
Listening on port 2346
target extended-remote localhost:2346
Remote debugging using localhost:2346
...
[Tests after this point will pass.]

Note that the command which spawns gdb prevents the gdb script from
using the native target via "-iex set auto-connect-native-target off".

Moreover, the script in question contains a "run" command, so GDB
doesn't know how to run (since it's prevented from using the native
target and no alternate "target" command has been issued.  But, once
GDB finishes starting up, the test will spawn a gdbserver and then
connect to it.  The other (two) tests after this point both pass.

I've fixed this by using gdb_test_multiple instead of gdb_test.
When a "Don't know how to run message" is received, the test is
unsupported.

I've also added a comment explaining the reason for needing to check
for "Don't know how to run" despite bailing out at the top of the test
via:

  if ![target_can_use_run_cmd] {
      return 0
  }

2 years agogdb: fix array-view-selftests.c build with g++ 4.8
Simon Marchi [Thu, 18 Nov 2021 21:35:34 +0000 (16:35 -0500)]
gdb: fix array-view-selftests.c build with g++ 4.8

When building with g++ 4.8, I get:

    CXX    unittests/array-view-selftests.o
  /home/smarchi/src/binutils-gdb/gdb/unittests/array-view-selftests.c:123:42: error: expected 'class' before 'Container'
   template<template<typename ...> typename Container>
    ^

I am no C++ template expert, but it looks like if I change "typename" for
"class", as the compiler kind of suggests, the code compiles.

Change-Id: I9c3edd29fb2b190069f0ce0dbf3bc3604d175f48

2 years agogdb: fix ia64-tdep.c build with g++ 4.8
Simon Marchi [Thu, 18 Nov 2021 21:35:31 +0000 (16:35 -0500)]
gdb: fix ia64-tdep.c build with g++ 4.8

When building with g++ 4.8, I get:

      CXX    ia64-tdep.o
    /home/smarchi/src/binutils-gdb/gdb/ia64-tdep.c:3862:1: error: could not convert '{ia64_allocate_new_rse_frame, ia64_store_argument_in_slot, ia64_set_function_addr}' from '<brace
-enclosed initializer list>' to 'const ia64_infcall_ops'
     };
     ^

This happens since commit 345bd07cce3 ("gdb: fix gdbarch_tdep ODR
violation"), which added default values for ia64_infcall_ops fields.  It
looks like g++ 4.8 doesn't like initializing the ia64_infcall_ops object
using the brace-enclosed initializer list when the ia64_infcall_ops
fields are assigned default values.

Later compilers don't have a problem with that, so I suppose that the
code is correct, but still, change it to make gcc 4.8 happy.  Don't
initialize the fields of ia64_infcall_ops directly, instead
default-initialize ia64_gdbarch_tdep::infcall_ops.

Change-Id: I35e3a61abd7b7bbcafe6cb207078c738c5266d76

2 years agogdb: move AIX_TEXT_SEGMENT_BASE to rs6000-aix-tdep.c, remove rs6000-tdep.h
Simon Marchi [Tue, 16 Nov 2021 03:04:21 +0000 (22:04 -0500)]
gdb: move AIX_TEXT_SEGMENT_BASE to rs6000-aix-tdep.c, remove rs6000-tdep.h

The contents of rs6000-tdep.h (AIX_TEXT_SEGMENT_BASE) is AIX-specific,
so I thought that this file should be named rs6000-aix-tdep.h.  But
there's already a rs6000-aix-tdep.h, so then I though
AIX_TEXT_SEGMENT_BASE should simply be moved there, and rs6000-tdep.h
deleted.  But then I realized that AIX_TEXT_SEGMENT_BASE is only used in
rs6000-aix-tdep.c, so move it to the beginning of that file.

Change-Id: Ia212c6fae202f31aedb46575821cd642beeda7a3

2 years agogdb: rename rs6000-nat.c to rs6000-aix-nat.c
Simon Marchi [Tue, 16 Nov 2021 03:04:20 +0000 (22:04 -0500)]
gdb: rename rs6000-nat.c to rs6000-aix-nat.c

This file seems to be AIX-specific, according to its contents and
configure.nat.  Rename it to rs6000-aix-nat.c, to make that clear (and
to follow the convention).

Change-Id: Ib418dddc6b79b2e28f64431121742b5e87f5f4f5

2 years ago[gdb/doc] Fix negative repeat count examining memory example
Tom de Vries [Thu, 18 Nov 2021 18:22:51 +0000 (19:22 +0100)]
[gdb/doc] Fix negative repeat count examining memory example

The documentation for the examining memory command x contains an example:
...
You can also specify a negative repeat count to examine memory backward from
the given address.  For example, 'x/-3uh 0x54320' prints three halfwords (h)
at 0x54314, 0x54328, and 0x5431c.
...

The 0x54328 looks like a typo, which was intended to be 0x54318.

But the series uses a 4-byte distance, while the halfword size used in the
command means a 2-byte distance, so the series should be:
...
0x5431a, 0x5431c, and 0x5431e.
...

Fix this by updating the addresses in the example accordingly.

Reported here ( https://sourceware.org/pipermail/gdb/2021-November/049784.html
).

2 years agoAdd multibyte character warning option to the assembler.
Nick Clifton [Thu, 18 Nov 2021 16:48:19 +0000 (16:48 +0000)]
Add multibyte character warning option to the assembler.

* as.c (parse_args): Add support for --multibyte-handling.
* as.h (multibyte_handling): Declare.
* app.c (scan_for_multibyte_characters): New function.
(do_scrub_chars): Call the new function if multibyte warning is
enabled.
* input-scrub,c (input_scrub_next_buffer): Call the multibyte
scanning function if multibyte warnings are enabled.
* symbols.c (struct symbol_flags): Add multibyte_warned bit.
(symbol_init): Call the multibyte scanning function if multibyte
symbol warnings are enabled.
(S_SET_SEGMENT): Likewise.
* NEWS: Mention the new feature.
* doc/as.texi: Document the new feature.
* testsuite/gas/all/multibyte.s: New test source file.
* testsuite/gas/all/multibyte1.d: New test driver file.
* testsuite/gas/all/multibyte1.l: New test expected output.
* testsuite/gas/all/multibyte2.d: New test driver file.
* testsuite/gas/all/multibyte2.l: New test expected output.
* testsuite/gas/all/gas.exp: Run the new tests.

2 years agogdb: include gdbarch.h in all files extending gdbarch_tdep
Simon Marchi [Wed, 17 Nov 2021 17:13:47 +0000 (12:13 -0500)]
gdb: include gdbarch.h in all files extending gdbarch_tdep

Commit 345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") made a bunch
of files define a *_gdbarch_tdep class that inherits from a gdbarch_tdep
base.  But some of these files don't include gdbarch.h, where
gdbarch_tdep is defined.  This may cause build errors if gdbarch.h isn't
already included by chance by some other header file.  Avoid this by
making them include gdbarch.h.

Change-Id: If433d302007e274daa4f656cfc94f769cf1aa68a

2 years agogdbsupport: make gdb_assert_not_reached accept a format string
Simon Marchi [Wed, 17 Nov 2021 18:44:01 +0000 (13:44 -0500)]
gdbsupport: make gdb_assert_not_reached accept a format string

Change gdb_assert_not_reached to accept a format string plus
corresponding arguments.  This allows giving more precise messages.

Because the format string passed by the caller is prepended with a "%s:"
to add the function name, the callers can no longer pass a translated
string (`_(...)`).  Make the gdb_assert_not_reached include the _(),
just like the gdb_assert_fail macro just above.

Change-Id: Id0cfda5a57979df6cdaacaba0d55dd91ae9efee7

2 years agogdb fix for catch-syscall.exp
Carl Love [Wed, 17 Nov 2021 22:29:33 +0000 (22:29 +0000)]
gdb fix for catch-syscall.exp

Remove check_continue "execve" from Proc test_catch_syscall_execve.

The check_continue proceedure checs that the command, execve, starts and
checks for the return from the command.  The execve command starts a new
program and thus the return from the command causing the test to fail.

The call to proc check_continue "execve" is removed and replaced with
just the call to check_call_to_syscall "execve" to verify the command
executed.  The next test in proc test_catch_syscall_execve verifies that
the new program started and hit the break point in main.

Update the check for the PowerPC architecture.  Power Little Endian systems
include "le" in the name.  The istarget "power64-*-linux*" check fails to
match LE sytems.  The expected string is updated to capture both Big Endian
and Little Endian systems.  Power 10 LE istarget prints as:
powerpc64le-unknown-linux-gnu.

This patch fixes three failures and the error:

    ERROR: can't read "arch1": no such variable

Patch tested on Power 10 ppc64le GNU/Linux platform.

2 years agogdb: PowerPC fix gdb.base/break-interp.exp
Carl Love [Mon, 15 Nov 2021 20:31:06 +0000 (20:31 +0000)]
gdb: PowerPC fix gdb.base/break-interp.exp

This patch fixes eight test failures on PowerPC for the test
gdb.base/break-interp.exp. The patch adds a funtion and registers it to
setup the displaced stepping for ppc-linux platform.  The patch moves the
struct ppc_inferior_data to the ppc-tdep.h include file to make it visible
to the ppc-linux-tdep.c and rs6000-tdep.c files.  Additionally the function
get_ppc_per_inferior is made external in ppc-tdep.h to make it visible in
both files.

Tested on Power 10 ppc64le-linux with no regressions.

2 years agogdb fix PowerPC test gdb.arch/ppc-longdouble.exp
Carl Love [Thu, 18 Nov 2021 00:08:18 +0000 (00:08 +0000)]
gdb fix PowerPC test gdb.arch/ppc-longdouble.exp

The test complains of duplicate tests.

DUPLICATE: gdb.arch/ppc-longdouble.exp: continue to breakpoint: return

The do_test calls gdb_continue_to_breakpoint "return".  The duplicates
are the result of calling do_test three times with different arguments.

This patch fixes the duplicate tests by adding $name to the
gdb_continue_to_breakpoint argument.

Patch tested on Power 10  ppc64le GNU/Linux, no duplicate tests reported,
no new regression errors.

2 years agoelf/x86: Issue an error on discarded output .plt section
H.J. Lu [Thu, 18 Nov 2021 15:54:34 +0000 (07:54 -0800)]
elf/x86: Issue an error on discarded output .plt section

Issue an error, instead of crash, on discarded output .plt section.

bfd/

PR ld/28597
* elf32-i386.c (elf_i386_finish_dynamic_sections): Issue an error
on discarded output .plt section.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Likewise.

ld/

PR ld/28597
* testsuite/ld-elf/pr28597.d: New file.
* testsuite/ld-elf/pr28597.s: Likewise.
* testsuite/ld-elf/pr28597.t: Likewise.

2 years ago[gdb/testsuite] Add missing wait in gdb.base/signals-state-child.exp
Tom de Vries [Thu, 18 Nov 2021 14:52:07 +0000 (15:52 +0100)]
[gdb/testsuite] Add missing wait in gdb.base/signals-state-child.exp

On OBS I ran into:
...
(gdb) shell diff -s outputs/gdb.base/signals-state-child/standalone.txt \
  outputs/gdb.base/signals-state-child/gdb.txt^M
diff: outputs/gdb.base/signals-state-child/standalone.txt: \
  No such file or directory^M
(gdb) FAIL: gdb.base/signals-state-child.exp: signals states are identical
...

I managed to reproduce this by adding "sleep (5)" at the start of main in
signals-state-child.c.

Fix this by waiting on the result of the spawned command.

Tested on x86_64-linux.

2 years agoRe: Don't compile some opcodes files when bfd is 32-bit only
Alan Modra [Thu, 18 Nov 2021 08:21:11 +0000 (18:51 +1030)]
Re: Don't compile some opcodes files when bfd is 32-bit only

Put bpf back in the 32-bit targets, even though bpf requires a 64-bit
bfd.  bpf sim support apparently works without being 64-bit.

* Makefile.am (TARGET64_LIBOPCODES_CFILES): Move bpf files..
(TARGET32_LIBOPCODES_CFILES): ..to here.
* Makefile.in: Regenerate.

2 years agoPass DEBUGINFOD_CFLAGS when compiling dwarf.c
Alan Modra [Wed, 17 Nov 2021 04:40:04 +0000 (15:10 +1030)]
Pass DEBUGINFOD_CFLAGS when compiling dwarf.c

Pick up the elfutils/debuginfod.h install location -I flags from
a variable set by debuginfod.m4 (via pkg.m4 and pkg-config).

* Makefile.am (DEBUGINFOD_CFLAGS): Define.
(dwarf.@OBJECT@): New rule.

2 years agoRISC-V: Add testcases for z[fdq]inx
jiawei [Wed, 17 Nov 2021 12:10:08 +0000 (20:10 +0800)]
RISC-V: Add testcases for z[fdq]inx

Use gpr when the zfinx enable, the testcases contain float
instructions that reuse by z[fdq]inx.

gas/ChangeLog:

* testsuite/gas/riscv/zdinx.d: New test.
* testsuite/gas/riscv/zdinx.s: New test.
* testsuite/gas/riscv/zfinx.d: New test.
* testsuite/gas/riscv/zfinx.s: New test.
* testsuite/gas/riscv/zqinx.d: New test.
* testsuite/gas/riscv/zqinx.s: New test.

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
2 years agoRISC-V: Add instructions and operand set for z[fdq]inx
jiawei [Wed, 17 Nov 2021 12:10:07 +0000 (20:10 +0800)]
RISC-V: Add instructions and operand set for z[fdq]inx

Reuse float instructions in INSN_CLASS_F/D/Q, use riscv_subset_supports to
verify if z*inx enabled and use gpr instead of fpr when z*inx is enable.

bfd/ChangeLog:

* elfxx-riscv.c (riscv_multi_subset_supports): Added support for
  z*inx extension.

gas/ChangeLog:

* config/tc-riscv.c (riscv_ip): Added register choice for z*inx.

include/ChangeLog:

* opcode/riscv.h (enum riscv_insn_class): Reused INSN_CLASS_* for z*inx.

opcodes/ChangeLog:

* riscv-dis.c (riscv_disassemble_insn): Added disassemble check for
  z*inx.
* riscv-opc.c: Reused INSN_CLASS_* for z*inx.

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
2 years agoRISC-V: Add mininal support for z[fdq]inx
jiawei [Wed, 17 Nov 2021 12:10:06 +0000 (20:10 +0800)]
RISC-V: Add mininal support for z[fdq]inx

Minimal support for zfinx, zdinx, zqinx. Like f/d/q, the zqinx
imply zdinx and zdinx imply zfinx, where zfinx are not compatible
with f/d/q.

bfd/ChangeLog:

* elfxx-riscv.c (riscv_implicit_subsets): Added implicit rules
for z*inx extensions.
(riscv_supported_std_z_ext): Added entries for z*inx.
(riscv_parse_check_conflicts): Added conflict check for z*inx.

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
2 years agoAutomatic date update in version.in
GDB Administrator [Thu, 18 Nov 2021 00:00:05 +0000 (00:00 +0000)]
Automatic date update in version.in

2 years agoaarch64: [SME] SVE2 instructions added to support SME
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:26:53 +0000 (20:26 +0000)]
aarch64: [SME] SVE2 instructions added to support SME

This patch is adding new SVE2 instructions added to support SME extension.
The following SVE2 instructions are added by the SME architecture:
* PSEL,
* REVD, SCLAMP and UCLAMP.

gas/ChangeLog:

* config/tc-aarch64.c (parse_sme_pred_reg_with_index):
New parser.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-9-illegal.d: New test.
* testsuite/gas/aarch64/sme-9-illegal.l: New test.
* testsuite/gas/aarch64/sme-9-illegal.s: New test.
* testsuite/gas/aarch64/sme-9.d: New test.
* testsuite/gas/aarch64/sme-9.s: New test.

include/ChangeLog:

* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_PnT_Wm_imm.

opcodes/ChangeLog:

* aarch64-asm.c (aarch64_ins_sme_pred_reg_with_index):
New inserter.
* aarch64-dis.c (aarch64_ext_sme_pred_reg_with_index):
New extractor.
* aarch64-opc.c (aarch64_print_operand): Printout of
OPND_SME_PnT_Wm_imm.
* aarch64-opc.h (enum aarch64_field_kind): New bitfields
FLD_SME_Rm, FLD_SME_i1, FLD_SME_tszh, FLD_SME_tszl.
* aarch64-tbl.h (OP_SVE_NN_BHSD): New qualifier.
(OP_SVE_QMQ): New qualifier.
(struct aarch64_opcode): New instructions PSEL, REVD,
SCLAMP and UCLAMP.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.

2 years agoaarch64: [SME] Add new SME system registers
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:20:50 +0000 (20:20 +0000)]
aarch64: [SME] Add new SME system registers

This patch is adding miscellaneous SME related system registers.

gas/ChangeLog:

* testsuite/gas/aarch64/sme-sysreg.d: New test.
* testsuite/gas/aarch64/sme-sysreg.s: New test.
* testsuite/gas/aarch64/sme-sysreg-illegal.d: New test.
* testsuite/gas/aarch64/sme-sysreg-illegal.l: New test.
* testsuite/gas/aarch64/sme-sysreg-illegal.s: New test.

opcodes/ChangeLog:

* aarch64-opc.c: New system registers id_aa64smfr0_el1,
smcr_el1, smcr_el12, smcr_el2, smcr_el3, smpri_el1,
smprimap_el2, smidr_el1, tpidr2_el0 and mpamsm_el1.

2 years agoaarch64: [SME] Add SME mode selection and state access instructions
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:15:13 +0000 (20:15 +0000)]
aarch64: [SME] Add SME mode selection and state access instructions

This patch is adding new SME mode selection and state access instructions:
* Add SMSTART and SMSTOP instructions.
* Add SVCR system register.

gas/ChangeLog:

* config/tc-aarch64.c (parse_sme_sm_za): New parser.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-8-illegal.d: New test.
* testsuite/gas/aarch64/sme-8-illegal.l: New test.
* testsuite/gas/aarch64/sme-8-illegal.s: New test.
* testsuite/gas/aarch64/sme-8.d: New test.
* testsuite/gas/aarch64/sme-8.s: New test.

include/ChangeLog:

* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_SM_ZA.
(enum aarch64_insn_class): New instruction classes
sme_start and sme_stop.

opcodes/ChangeLog:

* aarch64-asm.c (aarch64_ins_pstatefield): New inserter.
(aarch64_ins_sme_sm_za): New inserter.
* aarch64-dis.c (aarch64_ext_imm): New extractor.
(aarch64_ext_pstatefield): New extractor.
(aarch64_ext_sme_sm_za): New extractor.
* aarch64-opc.c (operand_general_constraint_met_p):
New pstatefield value for SME instructions.
(aarch64_print_operand): Printout for OPND_SME_SM_ZA.
(SR_SME): New register SVCR.
* aarch64-opc.h (F_REG_IN_CRM): New register endcoding.
* aarch64-opc.h (F_IMM_IN_CRM): New immediate endcoding.
(PSTATE_ENCODE_CRM): Encode CRm field.
(PSTATE_DECODE_CRM): Decode CRm field.
(PSTATE_ENCODE_CRM_IMM): Encode CRm immediate field.
(PSTATE_DECODE_CRM_IMM): Decode CRm immediate field.
(PSTATE_ENCODE_CRM_AND_IMM): Encode CRm and immediate
field.
* aarch64-tbl.h (struct aarch64_opcode): New SMSTART
and SMSTOP instructions.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.

2 years agoaarch64: [SME] Add LD1x, ST1x, LDR and STR instructions
Przemyslaw Wirkus [Wed, 17 Nov 2021 20:02:06 +0000 (20:02 +0000)]
aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions

This patch is adding new loads and stores defined by SME instructions.

gas/ChangeLog:

* config/tc-aarch64.c (parse_sme_address): New parser.
(parse_sme_za_hv_tiles_operand_with_braces): New parser.
(parse_sme_za_array): New parser.
(output_operand_error_record): Print error details if
present.
(parse_operands): Support new operands.
* testsuite/gas/aarch64/sme-5-illegal.d: New test.
* testsuite/gas/aarch64/sme-5-illegal.l: New test.
* testsuite/gas/aarch64/sme-5-illegal.s: New test.
* testsuite/gas/aarch64/sme-5.d: New test.
* testsuite/gas/aarch64/sme-5.s: New test.
* testsuite/gas/aarch64/sme-6-illegal.d: New test.
* testsuite/gas/aarch64/sme-6-illegal.l: New test.
* testsuite/gas/aarch64/sme-6-illegal.s: New test.
* testsuite/gas/aarch64/sme-6.d: New test.
* testsuite/gas/aarch64/sme-6.s: New test.
* testsuite/gas/aarch64/sme-7-illegal.d: New test.
* testsuite/gas/aarch64/sme-7-illegal.l: New test.
* testsuite/gas/aarch64/sme-7-illegal.s: New test.
* testsuite/gas/aarch64/sme-7.d: New test.
* testsuite/gas/aarch64/sme-7.s: New test.

include/ChangeLog:

* opcode/aarch64.h (enum aarch64_opnd): New operands.
(enum aarch64_insn_class): Added sme_ldr and sme_str.
(AARCH64_OPDE_UNTIED_IMMS): New operand error kind.

opcodes/ChangeLog:

* aarch64-asm.c (aarch64_ins_sme_za_hv_tiles): New inserter.
(aarch64_ins_sme_za_list): New inserter.
(aarch64_ins_sme_za_array): New inserter.
(aarch64_ins_sme_addr_ri_u4xvl): New inserter.
* aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): Added
ins_sme_za_list, ins_sme_za_array and ins_sme_addr_ri_u4xvl.
* aarch64-dis.c (aarch64_ext_sme_za_hv_tiles): New extractor.
(aarch64_ext_sme_za_list): New extractor.
(aarch64_ext_sme_za_array): New extractor.
(aarch64_ext_sme_addr_ri_u4xvl): New extractor.
* aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): Added
ext_sme_za_list, ext_sme_za_array and ext_sme_addr_ri_u4xvl.
* aarch64-opc.c (operand_general_constraint_met_p):
(aarch64_match_operands_constraint): Handle sme_ldr, sme_str
and sme_misc.
(aarch64_print_operand): New operands supported.
* aarch64-tbl.h (OP_SVE_QUU): New qualifier.
(OP_SVE_QZU): New qualifier.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.

2 years agoaarch64: [SME] Add ZERO instruction
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:56:09 +0000 (19:56 +0000)]
aarch64: [SME] Add ZERO instruction

This patch is adding ZERO (a list of 64-bit element ZA tiles)
instruction.

gas/ChangeLog:

* config/tc-aarch64.c (parse_sme_list_of_64bit_tiles):
New parser.
(parse_operands): Handle OPND_SME_list_of_64bit_tiles.
* testsuite/gas/aarch64/sme-4-illegal.d: New test.
* testsuite/gas/aarch64/sme-4-illegal.l: New test.
* testsuite/gas/aarch64/sme-4-illegal.s: New test.
* testsuite/gas/aarch64/sme-4.d: New test.
* testsuite/gas/aarch64/sme-4.s: New test.

include/ChangeLog:

* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_list_of_64bit_tiles.

opcodes/ChangeLog:

* aarch64-opc.c (print_sme_za_list): New printing function.
(aarch64_print_operand): Handle OPND_SME_list_of_64bit_tiles.
* aarch64-opc.h (enum aarch64_field_kind): New bitfield
FLD_SME_zero_mask.
* aarch64-tbl.h (struct aarch64_opcode): New ZERO instruction.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.

2 years agoaarch64: [SME] Add MOV and MOVA instructions
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:31:25 +0000 (19:31 +0000)]
aarch64: [SME] Add MOV and MOVA instructions

This patch is adding new MOV (alias) and MOVA SME instruction.

gas/ChangeLog:

* config/tc-aarch64.c (enum sme_hv_slice): new enum.
(struct reloc_entry): Added ZAH and ZAV registers.
(parse_sme_immediate): Immediate parser.
(parse_sme_za_hv_tiles_operand): ZA tile parser.
(parse_sme_za_hv_tiles_operand_index): Index parser.
(parse_operands): Added ZA tile parser calls.
(REGNUMS): New macro. Regs with suffix.
(REGSET16S): New macro. 16 regs with suffix.
* testsuite/gas/aarch64/sme-2-illegal.d: New test.
* testsuite/gas/aarch64/sme-2-illegal.l: New test.
* testsuite/gas/aarch64/sme-2-illegal.s: New test.
* testsuite/gas/aarch64/sme-2.d: New test.
* testsuite/gas/aarch64/sme-2.s: New test.
* testsuite/gas/aarch64/sme-2a.d: New test.
* testsuite/gas/aarch64/sme-2a.s: New test.
* testsuite/gas/aarch64/sme-3-illegal.d: New test.
* testsuite/gas/aarch64/sme-3-illegal.l: New test.
* testsuite/gas/aarch64/sme-3-illegal.s: New test.
* testsuite/gas/aarch64/sme-3.d: New test.
* testsuite/gas/aarch64/sme-3.s: New test.
* testsuite/gas/aarch64/sme-3a.d: New test.
* testsuite/gas/aarch64/sme-3a.s: New test.

include/ChangeLog:

* opcode/aarch64.h (enum aarch64_opnd): New enums
AARCH64_OPND_SME_ZA_HV_idx_src and
AARCH64_OPND_SME_ZA_HV_idx_dest.
(struct aarch64_opnd_info): New ZA tile vector struct.

opcodes/ChangeLog:

* aarch64-asm.c (aarch64_ins_sme_za_hv_tiles):
New inserter.
* aarch64-asm.h (AARCH64_DECL_OPD_INSERTER):
New inserter ins_sme_za_hv_tiles.
* aarch64-dis.c (aarch64_ext_sme_za_hv_tiles):
New extractor.
* aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR):
New extractor ext_sme_za_hv_tiles.
* aarch64-opc.c (aarch64_print_operand):
Handle SME_ZA_HV_idx_src and SME_ZA_HV_idx_dest.
* aarch64-opc.h (enum aarch64_field_kind): New enums
FLD_SME_size_10, FLD_SME_Q, FLD_SME_V and FLD_SME_Rv.
(struct aarch64_operand): Increase fields size to 5.
* aarch64-tbl.h (OP_SME_BHSDQ_PM_BHSDQ): New qualifiers
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.

2 years agoaarch64: [SME] Add SME instructions
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:21:33 +0000 (19:21 +0000)]
aarch64: [SME] Add SME instructions

Patch is adding new SME matrix instructions. Please note additional
instructions will be added in following patches.

gas/ChangeLog:

* config/tc-aarch64.c (parse_sme_zada_operand):
New parser.
* config/tc-aarch64.c (parse_reg_with_qual):
New reg parser.
* config/tc-aarch64.c (R_ZA): New egister type.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-illegal.d: New test.
* testsuite/gas/aarch64/sme-illegal.l: New test.
* testsuite/gas/aarch64/sme-illegal.s: New test.
* testsuite/gas/aarch64/sme.d: New test.
* testsuite/gas/aarch64/sme.s: New test.
* testsuite/gas/aarch64/sme-f64.d: New test.
* testsuite/gas/aarch64/sme-f64.s: New test.
* testsuite/gas/aarch64/sme-i64.d: New test.
* testsuite/gas/aarch64/sme-i64.s: New test.

include/ChangeLog:

* opcode/aarch64.h (enum aarch64_opnd): New operands
AARCH64_OPND_SME_ZAda_2b, AARCH64_OPND_SME_ZAda_3b and
AARCH64_OPND_SME_Pm.
(enum aarch64_insn_class): New instruction class sme_misc.

opcodes/ChangeLog:

* aarch64-opc.c (aarch64_print_operand):
Print OPND_SME_ZAda_2b and OPND_SME_ZAda_3b operands.
(verify_constraints): Handle OPND_SME_Pm.
* aarch64-opc.h (enum aarch64_field_kind):
New bit fields FLD_SME_ZAda_2b, FLD_SME_ZAda_3b and FLD_SME_Pm.
* aarch64-tbl.h (OP_SME_ZADA_PN_PM_ZN_S): New qualifier set.
(OP_SME_ZADA_PN_PM_ZN_D): New qualifier.
(OP_SME_ZADA_PN_PM_ZN_ZM): New qualifier.
(OP_SME_ZADA_S_PM_PM_S_S): New qualifier.
(OP_SME_ZADA_D_PM_PM_D_D): New qualifier.
(OP_SME_ZADA_S_PM_PM_H_H): New qualifier.
(OP_SME_ZADA_S_PM_PM_B_B): New qualifier.
(OP_SME_ZADA_D_PM_PM_H_H): New qualifier.
(SME_INSN): New instruction macro.
(SME_F64_INSN): New instruction macro.
(SME_I64_INSN): New instruction macro.
(SME_INSNC): New instruction macro.
(struct aarch64_opcode): New SME instructions.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.

2 years agoaarch64: [SME] Add +sme option to -march
Przemyslaw Wirkus [Wed, 17 Nov 2021 19:02:54 +0000 (19:02 +0000)]
aarch64: [SME] Add +sme option to -march

This series of patches (tagged [SME]) add support for the Scalable
Matrix Extension. Patch introduces new command line options: +sme, +sme-f64 and
+sme-i64 to -march command line options.

gas/ChangeLog:

* NEWS: Updated docs.
* config/tc-aarch64.c: New SME command line options.
* doc/c-aarch64.texi: Update docs.

include/ChangeLog:

* opcode/aarch64.h (AARCH64_FEATURE_SME): New flag.
(AARCH64_FEATURE_SME_F64): New flag.
(AARCH64_FEATURE_SME_I64): New flag.

opcodes/ChangeLog:

* aarch64-tbl.h (SME): New feature object.

2 years agoSet the default DLL chracteristics to 0 for Cygwin based targets.
Jeremy Drake [Wed, 17 Nov 2021 16:24:53 +0000 (16:24 +0000)]
Set the default DLL chracteristics to 0 for Cygwin based targets.

* emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Set to 0 for
Cygwin targets.
* emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Likewise.

2 years agoFix the linker script parser so that it will recognise the PT_GNU_RELRO segment type...
Nick Clifton [Wed, 17 Nov 2021 15:59:16 +0000 (15:59 +0000)]
Fix the linker script parser so that it will recognise the PT_GNU_RELRO segment type, and the linker itself so that it will gracefully handle being unable to assign any sections to such a segment.

PR 28452
bfd * elf.c (assign_file_positions_for_non_load_sections): Replace
assertion with a warning message.

ld * ldgram.y: Add support for PT_GNU_RELRO and PT_GNU_PROPERTY.
* ldgram.c: Regenerate.

2 years ago[gdb/build, s390x] Fix build after gdbarch_tdep changes
Andreas Arnez [Wed, 17 Nov 2021 10:46:36 +0000 (11:46 +0100)]
[gdb/build, s390x] Fix build after gdbarch_tdep changes

Commit 345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") changes a
declaration in s390-tdep.h from

   struct gdbarch_tdep { ... };

to

   struct s390_gdbarch_tdep : gdbarch_tdep { ... };

and now requires that gdbarch_tdep has been declared before.  Which is
usually the case, except when compiling s390-linux-nat.c, where
s390-tdep.h is included before gdbarch.h.  Thus the s390x build errors out
with the compiler complaining about a missing class name after the colon.

Fix this in s390-linux-nat.c, by including gdbarch.h before s390-tdep.h.

2 years agoExpose the BTI BTYPE more explicitly in the registers
Luis Machado [Wed, 17 Nov 2021 13:02:44 +0000 (10:02 -0300)]
Expose the BTI BTYPE more explicitly in the registers

Augment the register description XML to expose the BTI BTYPE field contained
in the CPSR register. It will be displayed like so:

cpsr           0x60001000          [ EL=0 BTYPE=0 SSBS C Z ]

2 years agoelfedit: Add --output-abiversion option to update ABIVERSION
H.J. Lu [Tue, 16 Nov 2021 22:14:56 +0000 (14:14 -0800)]
elfedit: Add --output-abiversion option to update ABIVERSION

* NEWS: Mention --output-abiversion.
* elfedit.c (input_elf_abiversion): New.
(output_elf_abiversion): Likewise.
(update_elf_header): Update EI_ABIVERSION.
(command_line_switch): Add OPTION_INPUT_ABIVERSION and
OPTION_OUTPUT_ABIVERSION.
(options): Add --input-abiversion and --output-abiversion.
(usage): Likewise.
(main): Handle --input-abiversion and --output-abiversion.
* doc/binutils.texi: Document --input-abiversion and
--output-abiversion.
* testsuite/binutils-all/elfedit.exp: Run elfedit-6.
* testsuite/binutils-all/elfedit-6.d: New file.

2 years agoRISC-V: Support rvv extension with released version 1.0.
Nelson Chu [Wed, 17 Nov 2021 10:46:11 +0000 (18:46 +0800)]
RISC-V: Support rvv extension with released version 1.0.

2021-11-17  Jim Wilson  <jimw@sifive.com>
            Kito Cheng  <kito.cheng@sifive.com>
            Nelson Chu  <nelson.chu@sifive.com>

This patch is porting from the following riscv github,
https://github.com/riscv/riscv-binutils-gdb/tree/rvv-1.0.x

And here is the vector spec,
https://github.com/riscv/riscv-v-spec

bfd/
* elfxx-riscv.c (riscv_implicit_subsets): Added imply rules
of v, zve and zvl extensions.
(riscv_supported_std_ext): Updated verison of v to  1.0.
(riscv_supported_std_z_ext): Added zve and zvl extensions.
(riscv_parse_check_conflicts): The zvl extensions need to
enable either v or zve extension.
(riscv_multi_subset_supports): Check the subset list to know
if the INSN_CLASS_V and INSN_CLASS_ZVEF instructions are supported.
gas/
* config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_V.
(enum reg_class): Added RCLASS_VECR and RCLASS_VECM.
(validate_riscv_insn): Check whether the rvv operands are valid.
(md_begin): Initialize register hash for rvv registers.
(macro_build): Added rvv operands when expanding rvv pseudoes.
(vector_macro): Expand rvv macros into one or more instructions.
(macro): Likewise.
(my_getVsetvliExpression): Similar to my_getVsetvliExpression,
but used for parsing vsetvli operands.
(riscv_ip): Parse and encode rvv operands.  Besides, The rvv loads
and stores with EEW 64 cannot be used when zve32x is enabled.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated -march
to rv32ifv_zkr.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/priv-reg.s: Added rvv csr testcases.
* testsuite/gas/riscv/priv-reg-version-1p10.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/march-imply-v.d: New testcase.
* testsuite/gas/riscv/vector-insns-fail-zve32xf.d: Likewise.
* testsuite/gas/riscv/vector-insns-fail-zve32xf.l: Likewise.
* testsuite/gas/riscv/vector-insns-fail-zvl.d: Likewise.
* testsuite/gas/riscv/vector-insns-fail-zvl.l: Likewise.
* testsuite/gas/riscv/vector-insns-vmsgtvx.d: Likewise.
* testsuite/gas/riscv/vector-insns-vmsgtvx.s: Likewise.
* testsuite/gas/riscv/vector-insns-zero-imm.d: Likewise.
* testsuite/gas/riscv/vector-insns-zero-imm.s: Likewise.
* testsuite/gas/riscv/vector-insns.d: Likewise.
* testsuite/gas/riscv/vector-insns.s: Likewise.
include/
* opcode/riscv-opc.h: Defined mask/match encodings and csrs for rvv.
* opcode/riscv.h: Defined rvv immediate encodings and fields.
(enum riscv_insn_class): Added INSN_CLASS_V and INSN_CLASS_ZVEF.
(INSN_V_EEW64): Defined.
(M_VMSGE, M_VMSGEU): Added for the rvv pseudoes.
opcodes/
* riscv-dis.c (print_insn_args): Dump the rvv operands.
* riscv-opc.c (riscv_vecr_names_numeric): Defined rvv registers.
(riscv_vecm_names_numeric): Likewise.
(riscv_vsew): Likewise.
(riscv_vlmul): Likewise.
(riscv_vta): Likewise.
(riscv_vma): Likewise.
(match_vs1_eq_vs2): Added for rvv Vu operand.
(match_vd_eq_vs1_eq_vs2): Added for rvv Vv operand.
(riscv_opcodes): Added rvv v1.0 instructions.

2 years agogdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow)
Sergei Trofimovich [Sun, 14 Nov 2021 15:50:01 +0000 (15:50 +0000)]
gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow)

On gcc-12 build fails as:

    ../../gdbserver/../gdb/nat/linux-osdata.c: In function 'void linux_xfer_osdata_processes(buffer*)':
    ../../gdbserver/../gdb/nat/linux-osdata.c:330:39: error:
      '__builtin___sprintf_chk' may write a terminating nul past the end of the destination [-Werror=format-overflow=]
      330 |                 sprintf (core_str, "%d", i);
          |                                       ^

It's an off-by-one case in an infeasible scenario for negative
huge core count. The change switches to std::string for memory
handling.

Tested by running 'info os processes' and checking CPU cores column.

2 years agogdb: Add aliases for read_core_file_mappings callbacks
Aaron Merey [Tue, 9 Nov 2021 21:47:36 +0000 (16:47 -0500)]
gdb: Add aliases for read_core_file_mappings callbacks

Add aliases read_core_file_mappings_loop_ftype and
read_core_file_mappings_pre_loop_ftype.  Intended for use with
read_core_file_mappings.

Also add build_id parameter to read_core_file_mappings_loop_ftype.

2 years agosim: testsuite: add support for $pwd replacements
Mike Frysinger [Wed, 17 Nov 2021 01:21:59 +0000 (20:21 -0500)]
sim: testsuite: add support for $pwd replacements

Extend the common test framework to support $pwd replacements in
settings.  This allows replacing the custom cris @exedir@ with it.

2 years agosim: cris: replace @srcdir@ test extension with $srcdir/$subdir
Mike Frysinger [Wed, 17 Nov 2021 01:16:18 +0000 (20:16 -0500)]
sim: cris: replace @srcdir@ test extension with $srcdir/$subdir

The common framework supports $srcdir & $subdir replacements already,
so replace the custom @srcdir@ logic with those.  Since the replace
happens in slurp_options that cris already uses, we don't have any
logic to port over there.  We have to duplicate that into the cris
slurp_rv helper though.

2 years agosim: cris: drop custom "dynamic" test field
Mike Frysinger [Wed, 17 Nov 2021 00:40:00 +0000 (19:40 -0500)]
sim: cris: drop custom "dynamic" test field

This tag is used to force tests to be built dynamically (i.e. without
-static linking).  This is because cris-sim.exp in dejagnu turns on
static linking in ldflags.

The default configs and runtest flags shouldn't load these boards.
If these settings are still needed, we should figure out a different
way of suppressing the stock settings wholesale.  We want these to
all pass out of the box with little to no configuration so that they
can run in a multitarget build.

With dropping "dynamic", it'll be easier to merge the custom cris
test logic with the common sim test logic.

2 years agosim: testsuite: add more silent build rules
Mike Frysinger [Wed, 17 Nov 2021 00:23:58 +0000 (19:23 -0500)]
sim: testsuite: add more silent build rules

site.exp is still verbose, but that comes from automake, so have
to get it fixed upstream.

2 years agoAutomatic date update in version.in
GDB Administrator [Wed, 17 Nov 2021 00:00:05 +0000 (00:00 +0000)]
Automatic date update in version.in

2 years agosim: cr16: fix build on gcc-12 (NULL comparison)
Sergei Trofimovich [Sun, 14 Nov 2021 17:39:35 +0000 (17:39 +0000)]
sim: cr16: fix build on gcc-12 (NULL comparison)

On gcc-12 build fails as:

    sim/cr16/interp.c: In function 'lookup_hash':
    sim/cr16/interp.c:89:25: error:
      the comparison will always evaluate as 'true'
      for the address of 'mnimonic' will never be NULL [-Werror=address]
       89 |   if ((h->ops->mnimonic != NULL) &&
          |                         ^~

'mnimonic' is a sharr array within ops. It can never be NULL.

While at it renamed 'mnimonic' to 'mnemonic'.

2 years agogdb: fix length of array view returned by some value_contents functions
Simon Marchi [Mon, 8 Nov 2021 21:06:06 +0000 (16:06 -0500)]
gdb: fix length of array view returned by some value_contents functions

In commit 50888e42dcd3 ("gdb: change functions returning value contents
to use gdb::array_view"), I believe I made a mistake with the length of
the array views returned by some functions.  All functions return a view
of `TYPE_LENGTH (value_type (type))` length.  This is not correct when
the value's enclosing type is larger than the value's type.  In that
case, the value's contents buffer is of the size of the enclosing type,
and the value's actual contents is a slice of that (as returned by
value_contents).  So, functions value_contents_all_raw,
value_contents_for_printing and value_contents_for_printing_const are
not correct.  Since they are meant to return the value's contents buffer
as a whole, they should have the size of the enclosing type.

There is nothing that uses the returned array view size at the moment,
so this didn't cause a problem.  But it became apparent when trying to
adjust some callers.

Change-Id: Ib4e8837e1069111d2b2784d3253d5f3002419e68

2 years agoreadelf: Support SHT_RELR/DT_RELR for -r
Fangrui Song [Tue, 16 Nov 2021 21:03:57 +0000 (13:03 -0800)]
readelf: Support SHT_RELR/DT_RELR for -r

The -r output for SHT_RELR looks like:

Relocation section '.relr.dyn' at offset 0x530 contains 4 entries:
  7 offsets
00000000000028c0
00000000000028c8
0000000000003ad0
0000000000003ad8
0000000000003ae0
0000000000003ae8
0000000000003af0

For --use-dynamic, the header looks like

    'RELR' relocation section at offset 0x530 contains 32 bytes:

include/
    * elf/common.h (DT_ENCODING): Bump to 38.
    * elf/external.h (Elf32_External_Relr): New.
    (Elf64_External_Relr): New.
binutils/
    * readelf.c (enum relocation_type): New.
    (slurp_relr_relocs): New.
    (dump_relocations): Change is_rela to rel_type.
    Dump RELR.
    (dynamic_relocations): Add DT_RELR.
    (process_relocs): Check SHT_RELR and DT_RELR.
    (process_dynamic_section): Store into dynamic_info for
    DT_RELR/DT_RELRENT/DT_RELRSZ.

2 years agogdbsupport: remove FUNCTION_NAME
Simon Marchi [Sat, 13 Nov 2021 02:12:00 +0000 (21:12 -0500)]
gdbsupport: remove FUNCTION_NAME

__func__ is standard C++11:

    https://en.cppreference.com/w/cpp/language/function

Also, in C++11, __func__ expands to the demangled function name, so the
mention in the comment above FUNCTION_NAME doesn't apply anymore.
Finally, in places where FUNCTION_NAME is used, I think it's enough to
print the function name, no need to print the whole signature.
Therefore, I propose to just remove FUNCTION_NAME and update users to
use the standard __func__.

Change-Id: I778f28155422b044402442dc18d42d0cded1017d

3 years agogdb/gdbsupport: make xstrprintf and xstrvprintf return a unique_ptr
Andrew Burgess [Mon, 8 Nov 2021 14:58:46 +0000 (14:58 +0000)]
gdb/gdbsupport: make xstrprintf and xstrvprintf return a unique_ptr

The motivation is to reduce the number of places where unmanaged
pointers are returned from allocation type routines.  All of the
callers are updated.

There should be no user visible changes after this commit.

3 years agogdbsupport: move xfree into its own file
Andrew Burgess [Mon, 8 Nov 2021 15:17:16 +0000 (15:17 +0000)]
gdbsupport: move xfree into its own file

In the next commit I'd like to reference gdb_unique_ptr within the
common-utils.h file.  However, this requires that I include
gdb_unique_ptr.h, which requires that xfree be defined.

Interestingly, gdb_unique_ptr.h doesn't actually include anything that
defines xfree, but I was finding that when I added a gdb_unique_ptr.h
include to common-utils.h I was getting a dependency cycle; before my
change xfree was defined when gdb_unique_ptr.h was processed, while
after my change it was not, and this made g++ unhappy.

To break this cycle, I propose to move xfree into its own header file,
gdb-xfree.h, which I'll then include into gdb_unique_ptr.h and
common-utils.cc.

3 years agogdb: throw OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR
Andrew Burgess [Tue, 9 Nov 2021 13:22:05 +0000 (13:22 +0000)]
gdb: throw OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR

While reviewing this patch:

  https://sourceware.org/pipermail/gdb-patches/2021-November/183227.html

I spotted that the patch could be improved if we threw
OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR in a few places.

This commit updates error_value_optimized_out and
require_not_optimized_out to throw OPTIMIZED_OUT_ERROR.

I ran the testsuite and saw no regressions.  This doesn't really
surprise me, we don't usually write code like:

  catch (const gdb_exception_error &ex)
    {
      (if ex.error == GENERIC_ERROR)
        ...
      else
        ...
    }

There are a three places where we write something like:

  catch (const gdb_exception_error &ex)
    {
      (if ex.error == OPTIMIZED_OUT_ERROR)
        ...
    }

In frame.c:unwind_pc, stack.c:info_frame_command_core, and
value.c:value_optimized_out, but if we are hitting these cases then
it's not significantly changing GDB's behaviour.

3 years agoRemove config.cache in gdbserver's "distclean"
Tom Tromey [Tue, 16 Nov 2021 16:11:41 +0000 (09:11 -0700)]
Remove config.cache in gdbserver's "distclean"

PR gdb/28586 points out that "make distclean" fails to delete
config.cache from gdbserver/.  This patch fixes the bug, and removes a
duplicate "Makefile" deletion that was also pointed out in the PR.

3 years ago[gdb/testsuite] Remove inferior output in gdb.base/foll-vfork.exp
Tom de Vries [Tue, 16 Nov 2021 15:46:43 +0000 (16:46 +0100)]
[gdb/testsuite] Remove inferior output in gdb.base/foll-vfork.exp

Test-case gdb.base/foll-vfork.exp has inferior output that is not needed, but
which makes the regexp matching more difficult (see commit 1f28b70def1
"[gdb/testsuite] Fix regexp in gdb.base/foll-vfork.exp").

Remove the inferior output, and revert commit 1f28b70def1 to make the matching
more restrictive.

Tested on x86_64-linux.

3 years agox86: Don't allow KMOV in TLS code sequences
H.J. Lu [Tue, 16 Nov 2021 15:21:11 +0000 (07:21 -0800)]
x86: Don't allow KMOV in TLS code sequences

Don't allow KMOV in TLS code sequences which require integer MOV
instructions.

PR target/28595
* config/tc-i386.c (match_template): Don't allow KMOV in TLS
code sequences.
* testsuite/gas/i386/i386.exp: Run inval-tls and x86-64-inval-tls
tests.
* testsuite/gas/i386/inval-tls.l: New file.
* testsuite/gas/i386/inval-tls.s: Likewise.
* testsuite/gas/i386/x86-64-inval-tls.l: Likewise.
* testsuite/gas/i386/x86-64-inval-tls.s: Likewise.

3 years agosim: run: support concise env var settings
Mike Frysinger [Tue, 16 Nov 2021 08:16:09 +0000 (03:16 -0500)]
sim: run: support concise env var settings

Support the same syntax as other common utilities where env vars can
be specified before the program to be run without an explicit option.

This behavior can be suppressed by using the -- marker.

3 years agosim: nrun: add --env-{set,unset,clear} command line options
Mike Frysinger [Tue, 16 Nov 2021 07:54:44 +0000 (02:54 -0500)]
sim: nrun: add --env-{set,unset,clear} command line options

Provide explicit control over the program's environment with the
basic set/unset/clear options.  These are a bit clunky to use,
but they're functional.

The env set operation is split out into a separate function as it'll
be used in the next commit.

With these in place, we can adjust the custom cris testsuite to use
the now standard options and not its one-off hack.

3 years agosim: syscall: hoist argc/argn/argnlen to common code
Mike Frysinger [Tue, 16 Nov 2021 06:26:47 +0000 (01:26 -0500)]
sim: syscall: hoist argc/argn/argnlen to common code

Now that the callback framework supports argv & envp, we can move
the Blackfin implementation of these syscalls to the common code.

3 years agosim: syscall: fix argvlen & argv implementation
Mike Frysinger [Tue, 16 Nov 2021 05:03:50 +0000 (00:03 -0500)]
sim: syscall: fix argvlen & argv implementation

Now that we have access to the argv & envp strings, finish implementing
these syscalls.  Delete unused variables, fix tbuf by incrementing the
pointer instead of setting to the length, and make sure we don't write
more data than the bufsize says is available.

3 years agosim: callback: expose argv & environ
Mike Frysinger [Tue, 16 Nov 2021 04:04:10 +0000 (23:04 -0500)]
sim: callback: expose argv & environ

Pass the existing strings data to the callbacks so that common
libgloss syscalls can be implemented (which we'll do shortly).

3 years agosim: keep track of program environment strings
Mike Frysinger [Tue, 16 Nov 2021 04:00:04 +0000 (23:00 -0500)]
sim: keep track of program environment strings

We've been passing the environment strings to sim_create_inferior,
but most ports don't do anything with them.  A few will use ad-hoc
logic to stuff the stack for user-mode programs, but that's it.

Let's formalize this across the board by storing the strings in the
normal sim state.  This will allow (in future commits) supporting
more functionality in the run interface, and to unify some of the
libgloss syscalls.

3 years agosim: iq2000: fix some missing prototypes warnings
Mike Frysinger [Tue, 16 Nov 2021 05:44:35 +0000 (00:44 -0500)]
sim: iq2000: fix some missing prototypes warnings

Turns out some of these were hiding real bugs like not passing the
pc variable down.

3 years agoRISC-V: Scalar crypto instruction and entropy source CSR testcases.
jiawei [Mon, 15 Nov 2021 03:03:43 +0000 (11:03 +0800)]
RISC-V: Scalar crypto instruction and entropy source CSR testcases.

Add testcases for Scalar Crypto extension, with total testcase contain all
instructions in k-ext/k-ext-64 and sub-extension testcase for zbk* zk*. Also
add testcase for new CSR name 'seed' which is the Entropy Source in zkr.

In fact these whole testcases can be combined into one file, after we have
supported the .option arch +-= directives.

gas/
* testsuite/gas/riscv/k-ext-64.d: New testcase for crypto instructions.
* testsuite/gas/riscv/k-ext-64.s: Likewise.
* testsuite/gas/riscv/k-ext.d: Likewise.
* testsuite/gas/riscv/k-ext.s: Likewise.
* testsuite/gas/riscv/zbkb-32.d: Likewise.
* testsuite/gas/riscv/zbkb-32.s: Likewise.
* testsuite/gas/riscv/zbkb-64.d: Likewise.
* testsuite/gas/riscv/zbkb-64.s: Likewise.
* testsuite/gas/riscv/zbkc-32.d: Likewise.
* testsuite/gas/riscv/zbkc-64.d: Likewise.
* testsuite/gas/riscv/zbkc.s: Likewise.
* testsuite/gas/riscv/zbkx-32.d: Likewise.
* testsuite/gas/riscv/zbkx-64.d: Likewise.
* testsuite/gas/riscv/zbkx.s: Likewise.
* testsuite/gas/riscv/zknd-32.d: Likewise.
* testsuite/gas/riscv/zknd-32.s: Likewise.
* testsuite/gas/riscv/zknd-64.d: Likewise.
* testsuite/gas/riscv/zknd-64.s: Likewise.
* testsuite/gas/riscv/zkne-32.d: Likewise.
* testsuite/gas/riscv/zkne-32.s: Likewise.
* testsuite/gas/riscv/zkne-64.d: Likewise.
* testsuite/gas/riscv/zkne-64.s: Likewise.
* testsuite/gas/riscv/zknh-32.d: Likewise.
* testsuite/gas/riscv/zknh-32.s: Likewise.
* testsuite/gas/riscv/zknh-64.d: Likewise.
* testsuite/gas/riscv/zknh-64.s: Likewise.
* testsuite/gas/riscv/zksed-32.d: Likewise.
* testsuite/gas/riscv/zksed-64.d: Likewise.
* testsuite/gas/riscv/zksed.s: Likewise.
* testsuite/gas/riscv/zksh-32.d: Likewise.
* testsuite/gas/riscv/zksh-64.d: Likewise.
* testsuite/gas/riscv/zksh.s: Likewise.
* testsuite/gas/riscv/priv-reg-fail-zkr.d: New testcase for zkr
csr check.
* testsuite/gas/riscv/priv-reg-fail-zkr.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated march to
rv32if_zkr.
* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p10.d: Added Crypto seed csr.
* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/priv-reg.s: Likewise.

3 years agoRISC-V: Scalar crypto instructions and operand set.
jiawei [Mon, 15 Nov 2021 03:03:42 +0000 (11:03 +0800)]
RISC-V: Scalar crypto instructions and operand set.

Add instructions in k-ext, some instruction in zbkb, zbkc is reuse from
zbb,zbc, we just change the class attribute to make them both support.
The 'aes64ks1i' and 'aes64ks2' instructions are present in both the Zknd
and Zkne extensions on rv64.  Add new operand letter 'y' to present 'bs'
symbol and 'Y' to present 'rnum' symbolc  for zkn instructions.  Also add
a new Entropy Source CSR define 'seed' located at address 0x015.

bfd/
* elfxx-riscv.c (riscv_multi_subset_supports): Added support for
crypto extension.
gas/
*config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_ZKR.
(riscv_csr_address): Checked for CSR_CLASS_ZKR.
(validate_riscv_insn): Added y and Y for bs and rnum operands.
(riscv_ip): Handle y and Y operands.
include/
* opcode/riscv-opc.h: Added encodings of crypto instructions.
Also defined new csr seed, which address is 0x15.
* opcode/riscv.h: Defined OP_* and INSN_CLASS_* for crypto.
opcodes/
* riscv-dis.c (print_insn_args): Recognized new y and Y operands.
* riscv-opc.c (riscv_opcodes): Added crypto instructions.

3 years agoRISC-V: Minimal support of scalar crypto extension.
jiawei [Mon, 15 Nov 2021 03:03:41 +0000 (11:03 +0800)]
RISC-V: Minimal support of scalar crypto extension.

Minimal support of scalar crypto extension, add "k" in the
riscv_supported_std_ext, to make the order check right with
"zk" behind "zb".

bfd/
* elfxx-riscv.c (riscv_implicit_subsets): Added implicit
rules for zk* extensions.
(riscv_supported_std_ext): Added entry for k.
(riscv_supported_std_z_ext): Added entries for zk*.

3 years agogdb: rework "set debuginfod" commands
Simon Marchi [Tue, 2 Nov 2021 16:21:31 +0000 (12:21 -0400)]
gdb: rework "set debuginfod" commands

As discussed here [1], do some re-work in the "set debuginfod commands".

First, use "set debuginfod enabled on/off/ask" instead of "set
debuginfod on/off/ask".  This is more MI-friendly, and it gives an
output that makes more sense in "info set", for example.

Then, make the show commands not call "error" when debuginfod support is
not compiled in.  This makes the commands "show" and "show debuginfod"
stop early, breaking gdb.base/default.exp:

    Running /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.base/default.exp ...
    FAIL: gdb.base/default.exp: info set
    FAIL: gdb.base/default.exp: show

 - Make the "debuginfod enabled" setting default to "off" when debuginfod
   support is not compiled in, and "ask" otherwise.
 - Make the setter of "debuginfod enabled" error out when debuginfod
   support is not compiled in, so that "debuginfod enabled" will always
   remain "off" in that case.
 - Make the setter of "debuginfod verbose" work in any case.  I don't
   see the harm in letting the user change that setting, since the user will
   hit an error if they try to enable the use of debuginfod.
 - I would do the same for the "debuginfod urls" setter, but because
   this one needs to see the DEBUGINFOD_URLS_ENV_VAR macro, provided by
   libdebuginfod, I made that one error out as well if debuginfod
   support is not compiled it (otherwise, I would have left it like
   "debuginfod verbose".  Alternatively, we could hard-code
   "DEBUGINFOD_URLS" in the code (in fact, it was prior to this patch,
   but I think it was an oversight, as other spots use
   DEBUGINFOD_URLS_ENV_VAR), or use a dummy string to store the setting,
   but I don't really see the value in that.

Rename debuginfod_enable to debuginfod_enabled, just so it matches the
setting name.

[1] https://sourceware.org/pipermail/gdb-patches/2021-October/182937.html

Change-Id: I45fdb2993f668226a5639228951362b7800f09d5
Co-Authored-By: Aaron Merey <amerey@redhat.com>
3 years agogdb: adjust gdbarch_tdep calls in nat files
Simon Marchi [Mon, 15 Nov 2021 20:22:34 +0000 (15:22 -0500)]
gdb: adjust gdbarch_tdep calls in nat files

Commit 345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") forgot to
update the gdbarch_tdep calls in the native files other than x86-64
Linux.  This patch updates them all (to the best of my knowledge).
These are the files I was able to build-test:

  aarch64-linux-nat.c
  amd64-bsd-nat.c
  arm-linux-nat.c
  ppc-linux-nat.c
  windows-nat.c
  xtensa-linux-nat.c

And these are the ones I could not build-test:

  aix-thread.c
  arm-netbsd-nat.c
  ppc-fbsd-nat.c
  ppc-netbsd-nat.c
  ia64-tdep.c (the part that needs libunwind)
  ppc-obsd-nat.c
  rs6000-nat.c

If there are still some build problems related to gdbarch_tdep in them,
they should be pretty obvious to fix.

Change-Id: Iaa3d791a850e4432973757598e634e3da6061428

3 years agogdb: remove unused variables in xtensa-linux-nat.c
Simon Marchi [Tue, 16 Nov 2021 02:38:44 +0000 (21:38 -0500)]
gdb: remove unused variables in xtensa-linux-nat.c

While build-testing this file, the compiler complained about these two
unused variables, remove them.

Change-Id: I3c54f779f12c16ef6184af58aca75eaad042ce4e

3 years agogdb: add arc-newlib-tdep.c to ALL_TARGET_OBS
Simon Marchi [Tue, 16 Nov 2021 02:19:30 +0000 (21:19 -0500)]
gdb: add arc-newlib-tdep.c to ALL_TARGET_OBS

This file is currently not compiled in an --enable-targets=all build,
but it should be.  Add it to ALL_TARGET_OBS.

Update the gdbarch_tdep call that commit 345bd07cce33 ("gdb: fix
gdbarch_tdep ODR violation") forgot to update.

Change-Id: I86248a01493eea5e70186e9c46a298ad3994b034

3 years agoUpdate my email address.
Jim Wilson [Tue, 16 Nov 2021 00:51:05 +0000 (16:51 -0800)]
Update my email address.

I've left SiFive and have a new gmail account because it is convenient
to use with git send-email.  I'm planning to use this for my RISC-V
work.  My tuliptree address still works, it just isn't as convenient.

binutils:
* MAINTAINERS (RISC-V): Update my address.

3 years agoAutomatic date update in version.in
GDB Administrator [Tue, 16 Nov 2021 00:00:06 +0000 (00:00 +0000)]
Automatic date update in version.in

3 years ago[gdb] Don't use gdb_stdlog for inferior-events
Tom de Vries [Mon, 15 Nov 2021 21:55:02 +0000 (22:55 +0100)]
[gdb] Don't use gdb_stdlog for inferior-events

The test-case gdb.base/foll-vfork.exp contains:
...
if [gdb_debug_enabled] {
    untested "debug is enabled"
    return 0
}
...

To understand what it does, I disabled this bit and ran with GDB_DEBUG=infrun,
like so:
...
$ cd $build/gdb/testsuite
$ make check GDB_DEBUG=infrun RUNTESTFLAGS=gdb.base/foll-vfork.exp
...
and ran into:
...
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: set follow-fork parent
next^M
33        if (pid == 0) {^M
(gdb) FAIL: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: step
...

The problem is that the test-case expects:
...
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: set follow-fork parent
next^M
[Detaching after vfork from child process 28169]^M
33        if (pid == 0) {^M
(gdb) PASS: gdb.base/foll-vfork.exp: exec: \
  vfork parent follow, through step: step
...
but the "Detaching" line has been redirected to
$outputs/gdb.base/foll-vfork/gdb.debug.

I looked at the documentation of "set logging debugredirect [on|off]":
...
  By default, GDB debug output will go to both the terminal and the logfile.
  Set debugredirect if you want debug output to go only to the log file.
...
and my interpretation of it was that "debug output" did not match the
"messages" description of inferior-events:
...
The set print inferior-events command allows you to enable or disable printing
of messages when GDB notices that new inferiors have started or that inferiors
have exited or have been detached.
...

Fix the discrepancy by not using gdb_stdlog for inferior-events.

Update the gdb.base/foll-vfork.exp test-case to not require
gdb_debug_enabled == 0.

Tested on x86_64-linux.

Tested test-case gdb.base/foll-vfork.exp with and without GDB_DEBUG=infrun.

3 years agold: Fix testsuite failures under --enable-textrel-check=error
Roland McGrath [Mon, 15 Nov 2021 19:09:17 +0000 (11:09 -0800)]
ld: Fix testsuite failures under --enable-textrel-check=error

ld/
* testsuite/ld-aarch64/dt_textrel.d: Pass explicit -z notext in
case ld was configured with --enable-textrel-check=error.
* testsuite/ld-aarch64/pr22764.d: Likewise.
* testsuite/ld-aarch64/pr20402.d: Likewise.

3 years agoExtend the prologue analyzer to handle the bti instruction
Luis Machado [Thu, 11 Nov 2021 20:22:50 +0000 (17:22 -0300)]
Extend the prologue analyzer to handle the bti instruction

Handle the BTI instruction in the prologue analyzer. The patch handles all
the variations of the BTI instruction.

3 years agogdb: fix gdbarch_tdep ODR violation
Simon Marchi [Mon, 15 Nov 2021 16:29:39 +0000 (11:29 -0500)]
gdb: fix gdbarch_tdep ODR violation

I would like to be able to use non-trivial types in gdbarch_tdep types.
This is not possible at the moment (in theory), because of the one
definition rule.

To allow it, rename all gdbarch_tdep types to <arch>_gdbarch_tdep, and
make them inherit from a gdbarch_tdep base class.  The inheritance is
necessary to be able to pass pointers to all these <arch>_gdbarch_tdep
objects to gdbarch_alloc, which takes a pointer to gdbarch_tdep.

These objects are never deleted through a base class pointer, so I
didn't include a virtual destructor.  In the future, if gdbarch objects
deletable, I could imagine that the gdbarch_tdep objects could become
owned by the gdbarch objects, and then it would become useful to have a
virtual destructor (so that the gdbarch object can delete the owned
gdbarch_tdep object).  But that's not necessary right now.

It turns out that RISC-V already has a gdbarch_tdep that is
non-default-constructible, so that provides a good motivation for this
change.

Most changes are fairly straightforward, mostly needing to add some
casts all over the place.  There is however the xtensa architecture,
doing its own little weird thing to define its gdbarch_tdep.  I did my
best to adapt it, but I can't test those changes.

Change-Id: Ic001903f91ddd106bd6ca09a79dabe8df2d69f3b

3 years agoCOFF: avoid modifications over C_FILE filename aux entries.
Clément Chigot [Mon, 15 Nov 2021 09:37:36 +0000 (10:37 +0100)]
COFF: avoid modifications over C_FILE filename aux entries.

Commit e86fc4a5bc37 ("PR 28447: implement multiple parameters for .file
on XCOFF") introduces C_FILE entries which can store additional
information.
However, some modifications are needed by them but not by the original
C_FILE entries, usually representing the filename.
This patch ensures that filename entries are kept as is, in order to
protect targets not supporting the additional entries.

* coffgen.c (coff_write_symbol): Protect filename entries
(coff_write_symbols): Likewise.
(coff_print_symbol): Likewise.

3 years agoDeal with full path in .file 0 directive
Eric Botcazou [Mon, 15 Nov 2021 11:50:51 +0000 (12:50 +0100)]
Deal with full path in .file 0 directive

Gas uses the directory part, if present, of the .file 0 directive to set
entry 0 of the directory table in DWARF 5, which represents the "current
directory".

Now Gas also uses the file part of the same directive to set entry 0 of the
file table, which represents the "current compilation file".  But the latter
need not be located in the former so GCC will use a full path in the file
part when it is passed a full path:

gcc -c /full/path/test.c -save-temps

yields:

 .file 0 "/current/directory" "/full/path/test.c"

in the assembly file and:

 The Directory Table (offset 0x22, lines 2, columns 1):
  Entry Name
  0     (indirect line string, offset: 0x25): /current/directory
  1     (indirect line string, offset: 0x38): /full/path

 The File Name Table (offset 0x30, lines 2, columns 2):
  Entry Dir     Name
  0     0       (indirect line string, offset: 0x43): /full/path/test.c

in the object file.  Note the full path and the questionable Dir value in
the 0 entry of the file table.

3 years agosim: cris: make error message test a little more flexible
Mike Frysinger [Mon, 15 Nov 2021 08:34:36 +0000 (03:34 -0500)]
sim: cris: make error message test a little more flexible

The point of this test is to just make sure the usage text is shown,
not the exact details of the usage text.  So shorten the output test
to match the beginning.  This fixes breakage when the output changed
slightly to include [--].

3 years agosim: run: fix crash in argc==0 error situation
Mike Frysinger [Mon, 15 Nov 2021 08:32:26 +0000 (03:32 -0500)]
sim: run: fix crash in argc==0 error situation

The new argv processing code assumed that we were always passed a
command line.  If we weren't, make sure we don't crash before we
get a chance to output an error message about incorrect usage.

3 years agosim: cris: touch up rvdummy handling
Mike Frysinger [Mon, 15 Nov 2021 08:00:05 +0000 (03:00 -0500)]
sim: cris: touch up rvdummy handling

Add quiet build support and make sure it's removed with `make clean`.

3 years agosim: cris: replace custom "dest" test field with new --argv0
Mike Frysinger [Mon, 15 Nov 2021 07:44:30 +0000 (02:44 -0500)]
sim: cris: replace custom "dest" test field with new --argv0

The #dest field used in the cris testsuite is a bit of hack to set the
argv[0] for the tests to read out later on.  Now that the sim has an
option to set argv[0] explicitly, we don't need this custom field, so
let's drop it to harmonize the testsuites a little.

3 years agosim: run: add --argv0 option to control argv[0]
Mike Frysinger [Mon, 15 Nov 2021 07:36:29 +0000 (02:36 -0500)]
sim: run: add --argv0 option to control argv[0]

We default argv[0] to the program we run which is a standard *NIX
convention, but sometimes we want to be able to control the argv[0]
setting independently (especially for programs that inspect argv[0]
to change their behavior or output).  Add an option to control it.

3 years agosim: split program path out of argv vector
Mike Frysinger [Mon, 15 Nov 2021 07:32:06 +0000 (02:32 -0500)]
sim: split program path out of argv vector

We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program.  Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.

So let's split the path to the program to run out into a separate
field by itself.  This simplifies the various sim_open funcs too.

By itself, this code is more of a logical cleanup than something that
is super useful.  But it will open up customization of argv[0] in a
follow up commit.  Split the changes to make it easier to review.

3 years agosim: bfin: fix mach/xfail usage in tests
Mike Frysinger [Sun, 14 Nov 2021 18:43:46 +0000 (13:43 -0500)]
sim: bfin: fix mach/xfail usage in tests

Set the mach to the right value all the time, and update xfail to
say the test fails on all targets.  WIth multitarget testing, the
idea of target here doesn't make much sense.

3 years ago-Waddress fixes for gold testsuite
Alan Modra [Mon, 15 Nov 2021 02:32:26 +0000 (13:02 +1030)]
-Waddress fixes for gold testsuite

Current mainline gcc.
common_test_1.c: In function 'main':
common_test_1.c:56:14: error: comparison between two arrays [-Werror=array-compare]
   56 |   assert (c5 > c4);
      |              ^
common_test_1.c:56:14: note: use '&c5[0] > &c4[0]' to compare the addresses

* testsuite/common_test_1.c: Avoid -Waddress warnings.
* testsuite/common_test_1_v1.c: Likewise.
* testsuite/common_test_1_v2.c: Likewise.
* testsuite/script_test_2.cc: Likewise.

3 years agoPowerPC64 @notoc in non-power10 code
Alan Modra [Tue, 9 Nov 2021 22:19:05 +0000 (08:49 +1030)]
PowerPC64 @notoc in non-power10 code

R_PPC64_REL24_P9NOTOC is a variant of R_PPC64_REL24_NOTOC for use on
@notoc cals from non-power10 code in the rare case that using such a
construct is useful.  R_PPC64_REL24_P9NOTOC will be emitted by gas
rather than R_PPC64_REL24_NOTOC when @notoc is used in a branch
instruction if power10 instructions are not enabled at that point.
The new relocation tells the linker to not use power10 instructions on
any stub emitted for that branch, unless overridden by
--power10-stubs=yes.

The current linker heuristic of only generating power10 instructions
for stubs if power10-only relocations are detected, continues to be
used.

include/
* elf/ppc64.h (R_PPC64_REL24_P9NOTOC): Define.
bfd/
* reloc.c (BFD_RELOC_PPC64_REL24_P9NOTOC): Define.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entry for new reloc.
(ppc64_elf_reloc_type_lookup): Handle it.
(enum ppc_stub_type): Delete.
(enum ppc_stub_main_type, ppc_stub_sub_type): New.
(struct ppc_stub_type): New.
(struct ppc_stub_hash_entry): Use the above new type.
(struct ppc_link_hash_table): Update stub_count.
(is_branch_reloc, ppc64_elf_check_relocs),
(toc_adjusting_stub_needed): Handle new reloc.
(stub_hash_newfunc, select_alt_stub, ppc_merge_stub),
(ppc_type_of_stub, plt_stub_size, build_plt_stub),
(build_tls_get_addr_head, build_tls_get_addr_tail),
(ppc_build_one_stub, ppc_size_one_stub, ppc64_elf_size_stubs),
(ppc64_elf_build_stubs, ppc64_elf_relocate_section): Handle new
reloc.  Modify stub handling to suit new scheme.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): When power10 is not enabled
return BFD_RELOC_PPC64_REL24_P9NOTOC for @notoc.
(fixup_size, ppc_force_relocation, ppc_fix_adjustable): Handle
BFD_RELOC_PPC64_REL24_P9NOTOC.
ld/
* testsuite/ld-powerpc/callstub-2.s: Add .machine power10.

3 years agoRegenerate a couple of files
Alan Modra [Sun, 14 Nov 2021 23:19:54 +0000 (09:49 +1030)]
Regenerate a couple of files

A couple of files changed on my latest --enable-maintainer-mode
build.  ld/Makefile.in had a missing dependency but better sorting of
the loongson entries.

intl/
* configure: Regenerate.
ld/
* Makefile.am: Sort loongson entries.
* Makefile.in: Regenerate.

3 years agoFix build with current GCC: EL_EXPLICIT(location) always non-NULL
Pedro Alves [Tue, 9 Nov 2021 17:33:41 +0000 (17:33 +0000)]
Fix build with current GCC: EL_EXPLICIT(location) always non-NULL

Compiling GDB with current GCC (1b4a63593b) runs into this:

  src/gdb/location.c: In function 'int event_location_empty_p(const event_location*)':
  src/gdb/location.c:963:38: error: the address of 'event_location::<unnamed union>::explicit_loc' will never be NULL [-Werror=address]
    963 |       return (EL_EXPLICIT (location) == NULL
|                                      ^
  src/gdb/location.c:57:30: note: 'event_location::<unnamed union>::explicit_loc' declared here
     57 |     struct explicit_location explicit_loc;
|                              ^~~~~~~~~~~~

GCC is right, EL_EXPLICIT is defined as returning the address of an
union field:

      /* An explicit location.  */
      struct explicit_location explicit_loc;
  #define EL_EXPLICIT(P) (&((P)->u.explicit_loc))

and thus must always be non-NULL.

Change-Id: Ie74fee7834495a93affcefce03c06e4d83ad8191