Christoph Bumiller [Thu, 20 Oct 2011 20:42:59 +0000 (22:42 +0200)]
nouveau,nvc0: fix/improve handling of multiple constant buffers
Christoph Bumiller [Tue, 18 Oct 2011 10:08:19 +0000 (12:08 +0200)]
nvc0: add support for linear and buffer textures and RTs
Christoph Bumiller [Tue, 18 Oct 2011 10:07:01 +0000 (12:07 +0200)]
nvc0: add support for clip distance shader outputs
Christoph Bumiller [Fri, 21 Oct 2011 20:58:18 +0000 (22:58 +0200)]
nvc0: handle more query types
Christoph Bumiller [Sat, 15 Oct 2011 09:49:55 +0000 (11:49 +0200)]
nvc0: fix location of the PrimitiveID output
Christoph Bumiller [Mon, 17 Oct 2011 21:26:57 +0000 (23:26 +0200)]
nvc0: prevent VERTEXID/INSTANCEID from consuming input slots
Christoph Bumiller [Mon, 17 Oct 2011 21:30:02 +0000 (23:30 +0200)]
nvc0: fixes for program tessellation parameters
Christoph Bumiller [Sat, 15 Oct 2011 10:03:03 +0000 (12:03 +0200)]
nv50,nvc0: reset per-instance state for inactive vertex elements
Christoph Bumiller [Fri, 14 Oct 2011 20:22:04 +0000 (22:22 +0200)]
nv50,nvc0: reset base element in draw_arrays
It affects VERTEX_BUFFER_FIRST,COUNT submission, too.
Christoph Bumiller [Tue, 11 Oct 2011 09:41:47 +0000 (11:41 +0200)]
nvc0: apply first_layer offset to all resources with array_size
Makes CUBE arrays work with d3d1x.
Christoph Bumiller [Fri, 14 Oct 2011 20:19:01 +0000 (22:19 +0200)]
nvc0: emit state to allow GP to select the RT layer
Christoph Bumiller [Fri, 14 Oct 2011 20:16:48 +0000 (22:16 +0200)]
nvc0: validate GP samplers, textures
Christoph Bumiller [Fri, 14 Oct 2011 20:12:42 +0000 (22:12 +0200)]
nvc0: fix clear_render_target/depth_stencil region
In all 3 dimensions (now clearing all layers too).
Christoph Bumiller [Sun, 25 Sep 2011 16:00:07 +0000 (18:00 +0200)]
nvc0: fix assertion that immediate array buffer fits
Christoph Bumiller [Mon, 17 Oct 2011 21:04:11 +0000 (23:04 +0200)]
nv50/ir: use RDSV to fetch FrontFacing before lowering
Christoph Bumiller [Tue, 11 Oct 2011 15:58:14 +0000 (17:58 +0200)]
nv50/ir: fix textureGrad with offsets and in non-FPs
Christoph Bumiller [Mon, 17 Oct 2011 21:02:16 +0000 (23:02 +0200)]
nv50/ir: add wrap mode for shift operations
D3D1x specifies that only the low 5 bit of the shift are used.
Christoph Bumiller [Thu, 6 Oct 2011 18:45:08 +0000 (20:45 +0200)]
nv50/ir: initialize RelocInfo to 0
Christoph Bumiller [Thu, 6 Oct 2011 12:32:58 +0000 (14:32 +0200)]
nvc0/ir: fix emission of cvt when register and type size differ
Christoph Bumiller [Fri, 14 Oct 2011 17:58:04 +0000 (19:58 +0200)]
nv50/ir: fix argument count for CUBE_ARRAY texture target
Christoph Bumiller [Mon, 17 Oct 2011 21:00:59 +0000 (23:00 +0200)]
nvc0/ir: GP emit address must end up in $r0
Christoph Bumiller [Fri, 14 Oct 2011 17:56:33 +0000 (19:56 +0200)]
nvc0/ir: TXQ requires different lowering from normal TEX
Christoph Bumiller [Fri, 14 Oct 2011 17:54:34 +0000 (19:54 +0200)]
nv50/ir: initialize default prog_info values for GP,TP
Christoph Bumiller [Fri, 14 Oct 2011 17:49:22 +0000 (19:49 +0200)]
nv50/ir: fix memory value equality check
Christoph Bumiller [Fri, 14 Oct 2011 17:47:45 +0000 (19:47 +0200)]
nv50/ir: fix leak in removal of graph root
Christoph Bumiller [Thu, 20 Oct 2011 18:43:11 +0000 (20:43 +0200)]
d3d1x: fix/improve OMSetRenderTargets
Don't count trailing NULL RTVs.
Don't skip update if only DSV has changed.
Christoph Bumiller [Thu, 13 Oct 2011 20:36:27 +0000 (22:36 +0200)]
d3d1x: avoid translating invalid blend, depth or stencil state
Christoph Bumiller [Thu, 13 Oct 2011 20:29:12 +0000 (22:29 +0200)]
d3d1x: add support for buffer views
Christoph Bumiller [Thu, 13 Oct 2011 20:27:40 +0000 (22:27 +0200)]
d3d1x: improve CreateInputLayout
Christoph Bumiller [Wed, 5 Oct 2011 14:56:24 +0000 (16:56 +0200)]
d3d1x/context: fix IASetVertexBuffers stride comparison
Christoph Bumiller [Thu, 13 Oct 2011 19:27:09 +0000 (21:27 +0200)]
d3d1x: use ZS formats for TYPELESS resources with DS binding
Christoph Bumiller [Mon, 17 Oct 2011 18:50:23 +0000 (20:50 +0200)]
d3d1x: use resource format if view format is UNKNOWN
Christoph Bumiller [Sun, 25 Sep 2011 17:03:44 +0000 (19:03 +0200)]
d3d1x: fix shadow comparison to gallium enum off by one
Christoph Bumiller [Mon, 17 Oct 2011 18:49:56 +0000 (20:49 +0200)]
d3d1x: improve CheckFormatSupport
Christoph Bumiller [Thu, 13 Oct 2011 17:31:51 +0000 (19:31 +0200)]
d3d1x: update format mapping table
Use the proper integer formats.
Fix mapping of some PIPE depth formats to DXGI.
Christoph Bumiller [Thu, 20 Oct 2011 18:12:51 +0000 (20:12 +0200)]
d3d1x: fix translation of subresource to layer
Christoph Bumiller [Thu, 13 Oct 2011 12:25:44 +0000 (14:25 +0200)]
d3d1x: fix initial data upload for 3D textures
Christoph Bumiller [Thu, 13 Oct 2011 12:22:37 +0000 (14:22 +0200)]
d3d1x: MipLevels -1 in resource view desc means all
Christoph Bumiller [Tue, 11 Oct 2011 12:22:32 +0000 (14:22 +0200)]
d3d1x/dxgi: fix initialization of pipe_box for Present copy
Christoph Bumiller [Thu, 13 Oct 2011 12:40:44 +0000 (14:40 +0200)]
d3d1x: implement array textures
Christoph Bumiller [Thu, 13 Oct 2011 11:53:39 +0000 (13:53 +0200)]
nvc0/ir: handle levelZero modifier in TEX emission
Christoph Bumiller [Fri, 23 Sep 2011 16:39:48 +0000 (18:39 +0200)]
nvc0/ir: fix lowering of DIV F32
Christoph Bumiller [Wed, 12 Oct 2011 19:08:40 +0000 (21:08 +0200)]
d3d1x: fix refcounting of GalliumD3D11DeviceChild objects
An external Release would have lowered the device reference count,
but an internal reference in the context does not raise it (by
design).
Christoph Bumiller [Wed, 12 Oct 2011 18:44:53 +0000 (20:44 +0200)]
nvc0/ir: fix xy confusion typo in readTessCoord
Christoph Bumiller [Wed, 12 Oct 2011 17:37:02 +0000 (19:37 +0200)]
d3d1x/sm4: save CUSTOMDATA
This is the data for the immediate constant buffer.
Christoph Bumiller [Wed, 12 Oct 2011 16:04:50 +0000 (18:04 +0200)]
d3d1x: add FORK/JOIN phase opcodes to declarations
The phase instance counts are not necessarily redeclared so with
the separation of declarations and instructions we wouldn't know
which instance count applies to which phase.
Christoph Bumiller [Thu, 20 Oct 2011 16:37:07 +0000 (18:37 +0200)]
d3d1x: add shader signature to sm4_program
Correct linkage requires examining the signature itself, it cannot
be reconstructed from declarations only since unused registers may
have been omitted from them.
Christoph Bumiller [Wed, 12 Oct 2011 15:35:30 +0000 (17:35 +0200)]
d3d1x: attempt to detect D3D10 feature level
Virtually all applications refuse to use the D3D10 backend if this
level is not supported, which makes testing annoying.
Christoph Bumiller [Thu, 20 Oct 2011 16:32:23 +0000 (18:32 +0200)]
d3d1x: switch to TGSI SAMPLE opcodes
We don't want to clutter the code or handicap new hardware for
the sake of ancient GPUs on which d3d1x won't ever be used,
much less be fully compliant, anyway.
Brian Paul [Fri, 21 Oct 2011 16:09:48 +0000 (10:09 -0600)]
st/mesa: fix a bug in and re-org setup_interleaved_attribs()
We were mis-computing the size of the user-space vertex buffer in
some circumstances. This led to a failed assertion at u_inlines.h:222
when using the VMware svga driver.
For example, if we had arrays such as:
array[0]: element_offset = 12, stride = 24
array[1]: element_offset = 0, stride = 24
We'd mistakenly compute 'bytes' to be 12 bytes too small.
I've reorganized the function too. By time it's called, we know that
we've got interleaved arrays either all in one VBO or all in user memory
and the stride is equal for all arrays.
Move the code that lived inside the attr==0 test after the loop.
In the loop we compute the true vertex size. That size factors into the
pipe->redefine_user_buffer() call later. Using the vertex size instead
of array[0]'s element_offset fixes the failed assertion.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Kenneth Graunke [Tue, 18 Oct 2011 22:04:37 +0000 (15:04 -0700)]
glsl: Short-circuit lower_if_to_cond_assign when MaxIfDepth is UINT_MAX.
Setting MaxIfDepth to UINT_MAX effectively means "don't lower anything."
Explicitly checking for this common case allows us to avoid walking the
IR, computing nesting levels, and so on.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Bryan Cain <bryancain3@gmail.com>
Kenneth Graunke [Tue, 20 Sep 2011 06:47:56 +0000 (23:47 -0700)]
i965: Set MaxIfDepth to UINT_MAX on Gen6+ and 16 on prior generations.
Commit
488fe51cf823ccd137c667f1e92dd86f8323b723 converted the EmitNoIfs
flag to MaxIfDepth, an unsigned integer saying "flatten if-statements
nested beyond this depth."
Unfortunately, i965 left this initialized to 0, which made ir_to_mesa
attempt to flatten all if-statements. We didn't notice right away
because we usually throw away ir_to_mesa's code in favor of the native
VS and FS backends...but this still creates a lot of unnecessary work.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Jeremy Huddleston [Fri, 21 Oct 2011 07:22:40 +0000 (00:22 -0700)]
apple: Use the correct (OpenGL.framework) glViewport and glScissor during init
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
Jeremy Huddleston [Fri, 21 Oct 2011 05:54:08 +0000 (22:54 -0700)]
apple: Silence some debug spew
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
Marek Olšák [Fri, 21 Oct 2011 00:00:40 +0000 (02:00 +0200)]
r600g: cleanup r600_reset_blittable_to_compressed
Vinson Lee [Thu, 20 Oct 2011 23:52:53 +0000 (16:52 -0700)]
st/mesa: Initialize variable.
ptr is uninitialized if ib is NULL.
Fixes Coverity uninitialized pointer read defect.
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Alan Coopersmith [Tue, 18 Oct 2011 21:04:15 +0000 (14:04 -0700)]
Add solaris detection for PIPE_ARCH_LITTLE_ENDIAN/PIPE_ARCH_BIG_ENDIAN
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Kenneth Graunke [Wed, 19 Oct 2011 00:05:30 +0000 (17:05 -0700)]
i965: Remove copy and pasted gen7_wm_constants state atom.
Now that this is identical to gen6_wm_constants, just use that instead.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 19 Oct 2011 00:05:29 +0000 (17:05 -0700)]
i965: Use AUB_TRACE_WM_CONSTANTS in gen7_prepare_wm_push_constants.
This makes it match gen6_prepare_wm_push_constants. For some reason, it
had been using AUB_TRACE_NO_TYPE.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 19 Oct 2011 00:05:28 +0000 (17:05 -0700)]
i965: Fix incorrect dirty bit in gen6_prepare_wm_push_constants.
We definitely want CACHE_NEW_WM_PROG, not CACHE_NEW_VS_PROG.
NOTE: This is a candidate for the 7.11 branch.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Thu, 20 Oct 2011 21:14:36 +0000 (23:14 +0200)]
r300g: don't return NULL in resource_from_handle if the resource is too small
The DDX may allocate a buffer with a too small size.
Instead of failing, let's pretend everything's alright.
Such bugs should be fixed in the DDX, of course.
NOTE: This is a candidate for the stable branches.
Brian Paul [Thu, 20 Oct 2011 21:13:17 +0000 (15:13 -0600)]
docs: document known issues with Viewperf 11
Eric Anholt [Mon, 3 Oct 2011 22:31:52 +0000 (15:31 -0700)]
i965/vs: Fix comparisons with uint negation.
The condmod instruction ends up generating garbage condition codes,
because apparently the comparison happens on the accumulator value (33
bits for UD), not the truncated value that would be written.
Fixes vs-op-neg-*
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 3 Oct 2011 22:12:10 +0000 (15:12 -0700)]
i965/fs: Fix comparisions with uint negation.
The condmod instruction ends up generating garbage condition codes,
because apparently the comparison happens on the accumulator value (33
bits for UD), not the truncated value that would be written.
Fixes fs-op-neg-*
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Christoph Bumiller [Sat, 15 Oct 2011 14:44:04 +0000 (16:44 +0200)]
d3d1x: make use of new query types
Christoph Bumiller [Sat, 15 Oct 2011 14:35:27 +0000 (16:35 +0200)]
softpipe: implement/fix TIMESTAMP queries
Christoph Bumiller [Thu, 20 Oct 2011 16:03:23 +0000 (18:03 +0200)]
gallium: add new query types and missing documentation
Eric Anholt [Tue, 18 Oct 2011 22:20:27 +0000 (15:20 -0700)]
mesa: Fix detection of whether an ARB_vp is enabled for two sided lighting.
When there is no ARB_vertex_program program enabled, the Current
pointer points at a default program, so we were always using
VERTEX_PROGRAM_TWO_SIDE, even for fixed function lighting.
Fixes piglit two-sided-lighting*
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Tue, 18 Oct 2011 18:52:39 +0000 (11:52 -0700)]
mesa: Round the argument to PixelStoref instead of truncating.
From the GL 2.1 specification, page 114 (page 128 of the PDF):
"The version of PixelStore that takes a floating-point value
may be used to set any type of parameter; if the parameter is
boolean, then it is set to FALSE if the passed value is 0.0
and TRUE otherwise, while if the parameter is an integer, then
the passed value is rounded to the nearest integer."
Fixes piglit roundmode-pixelstore.
Note: This is a candidate for the 7.11 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Yuanhan Liu [Wed, 19 Oct 2011 03:20:18 +0000 (11:20 +0800)]
mesa: handle PBO access error in display list mode
Simply generate GL_INVALID_OPERATION error at display list mode. As
explained by Brian, we are going to access PBO data at compile time.
No need to defer the error at execution time.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Sat, 15 Oct 2011 22:36:11 +0000 (16:36 -0600)]
i965: silence signed/unsigned comparison warning
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Brian Paul [Mon, 2 May 2011 19:19:09 +0000 (13:19 -0600)]
st/mesa: remove primitive restart assertion
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Jakob Bornecrantz [Wed, 20 Apr 2011 11:42:37 +0000 (12:42 +0100)]
st/mesa: Don't have indices buffers map when calling draw
Jakob Bornecrantz [Fri, 15 Apr 2011 20:13:04 +0000 (21:13 +0100)]
st/mesa: Implement primitive restart in software
Brian Paul [Wed, 19 Oct 2011 15:29:38 +0000 (09:29 -0600)]
swrast: fix float->uint conversion of gl_FragDepth
Using IROUND() to convert a float depth value to a 32-bit uint Z value.
didn't work (it returns a signed value). Just use a cast instead
Fixes piglit fbo-depth-array failure with swrast.
Note: this is a candidate for the 7.11 branch.
Brian Paul [Wed, 19 Oct 2011 15:20:47 +0000 (09:20 -0600)]
mesa: better debug messages in _mesa_test_texobj_completeness()
And use a gl_texture_image var to simplify the code a bit.
José Fonseca [Wed, 19 Oct 2011 14:45:58 +0000 (16:45 +0200)]
mesa/st: Backport WPOS adjustment fixes from st_mesa_to_tgsi.c to st_glsl_to_tgsi.cpp.
This is a trivial verbatim copy of the code from Christoph Bumiller's commit
f986a6560f3ee9a79b89e9409e3a9ac52b53315c.
Fixes fdo 39939 and 39942.
Thomas Hellstrom [Wed, 19 Oct 2011 11:49:09 +0000 (13:49 +0200)]
winsys/svga: Remove some unneeded debug code
This code isn't really relevant since the kernel takes care not
to destroy busy GMR buffers.
Also with the advent of fence objects, the code was incorrect since
it didn't refcount fence handles.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Vinson Lee [Wed, 19 Oct 2011 01:39:11 +0000 (18:39 -0700)]
scons: Add uniform_query.cpp to SConscript.
Yuanhan Liu [Sat, 15 Oct 2011 14:44:18 +0000 (22:44 +0800)]
mesa: handle the pbo case for save_Bitmap
Wrap _mesa_unpack_bitmap to handle the case that data is stored in pixel
buffer object.
This would make calling Bitmap with data stored in PBO by display list work.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Yuanhan Liu [Sun, 16 Oct 2011 01:35:33 +0000 (09:35 +0800)]
mesa: fix inverted pbo test error at _mesa_GetnCompressedTexImageARB
It seems like a typo.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Yuanhan Liu [Mon, 17 Oct 2011 01:57:36 +0000 (09:57 +0800)]
mesa: generate error if pbo offset is not aligned with the size of specified type
v2: quote the spec; explicitly exclude the GL_BITMAP case to make code
more readable. (comments from Ian)
v3: Cast the offset by GLintptr to remove the compile warning(comments
from Brian).
I also found that I should use _mesa_sizeof_packed_type() instead,
as it includes packed pixel type, like GL_UNSIGNED_SHORT_5_6_5.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Yuanhan Liu [Fri, 14 Oct 2011 05:47:10 +0000 (13:47 +0800)]
i965: setup address rounding enable bits
The patch(based on the reading of the emulator) came from while I was
trying to fix the oglc pbo texImage.1PBODefaults fail. This case
generates a texture with the width and height equal to window's width
and height respectively, then try to texture it on the whole window.
So, it's exactly one texel for one pixel. And, the min filter and mag
filter are GL_LINEAR. It runs with swrast OK, as expected. But it failed
with i965 driver.
Well, you can't tell the difference from the screen, as the error is
quite tiny. From my digging, it seems that there are some tiny error
happened while getting tex address. This will break the one texel for
one pixel rule in this case. Thus the linear result is taken, with tiny
error.
This patch would fix all oglc pbo subcase fail with the same issue on
both ILK, SNB and IVB.
v2: comments from Ian, make the address_round filed assignment consistent.
(the sampler is alread memset to 0 by the xxx_update_samper_state
caller, so need to assign 0 first)
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Brian Paul [Wed, 19 Oct 2011 01:11:29 +0000 (19:11 -0600)]
i915: make i830/i915_hiz_resolve_noop() static
Brian Paul [Wed, 19 Oct 2011 00:59:13 +0000 (18:59 -0600)]
mesa: use format string in _mesa_error() call to silence warning
Brian Paul [Wed, 19 Oct 2011 00:58:51 +0000 (18:58 -0600)]
i965: remove unused vars in brw_set_ff_sync_message()
Ian Romanick [Sun, 11 Sep 2011 21:17:21 +0000 (16:17 -0500)]
glsl_to_tgsi: Use _mesa_generate_parameters_list_for_uniforms
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Bryan Cain <bryancain3@gmail.com>
Ian Romanick [Sat, 10 Sep 2011 01:27:36 +0000 (18:27 -0700)]
ir_to_mesa: Generate gl_program_parameter list by walking the GLSL IR.
Generate the program parameters list by walking the IR instead of by
walking the list of linked uniforms. This simplifies the code quite a
bit, and is probably a bit more correct. The list of linked uniforms
should really only be used by the GL API to interact with the
application.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Bryan Cain <bryancain3@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Ian Romanick [Sun, 11 Sep 2011 21:10:33 +0000 (16:10 -0500)]
ir_to_mesa: Move some things outside the 'extern "C"' blocks
Having a few of these includes or forward declarations inside the
'extern "C"' block can cause problems later. Specifically, it
prevents C++ linkage functions from being added to ir_to_mesa.h and
makes G++ angry if 'struct foo' is seen both inside and outside an
'extern "C"'.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Wed, 7 Sep 2011 17:41:32 +0000 (10:41 -0700)]
mesa: Use glsl_type::gl_type in glGetActiveUniform
This has the same value has gl_program_parameter::DataType field.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Tue, 6 Sep 2011 22:30:54 +0000 (15:30 -0700)]
mesa: Move _mesa_GetActiveUniformARB to uniform_query.cpp
Fold _mesa_get_active_uniform into its only caller in the process.
More changes are coming soon.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Tue, 4 Oct 2011 23:58:21 +0000 (16:58 -0700)]
mesa: Simplify uniform debug logging logic
This simplificiation was enabled by the earlier refactors that
eliminated the references to the assembly shaders stored in the
gl_shader_program structure.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Oct 2011 08:31:11 +0000 (01:31 -0700)]
i965: Disassemble Ivybridge Data Port/Data Cache messages.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 8 Oct 2011 07:34:46 +0000 (00:34 -0700)]
i965: Document most of the brw_instruction message structs.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 8 Oct 2011 05:26:40 +0000 (22:26 -0700)]
i965: Rename pixel_scoreboard_clear to last_render_target for clarity.
Finding this bit in the documentation proved challenging. It wasn't in
the SEND instruction's message descriptor section, nor the data port
message descriptor section. It turns out to be part of the Render
Target Write message's control bits, and in the documentation is named
"Last Render Target Select".
Shaders that use Multiple Render Targets should set this bit on the last
RT write, but not on any prior ones.
The GPU does update the Pixel Scoreboard appropriately, but doesn't
document this bit as directly causing a scoreboard clear.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 8 Oct 2011 07:40:39 +0000 (00:40 -0700)]
i965: Remove duplicate copies of mlen & rlen from instruction decode.
After printing the details of a specific message, we always print out
the message length and response length with nice "mlen" and "rlen"
labels.
For Gen5+ URB writes, we were dumping mlen and rlen a second time:
urb 0 urb_write interleave used complete mlen 5, rlen 0 mlen 5 rlen 0
Also, for Gen6 data port messages, we were including mlen and rlen in
the tuple of undecipherable integers.
Both of these are completely redundant. So, remove them.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 8 Oct 2011 04:09:08 +0000 (21:09 -0700)]
i965: Factor out code for setting Message Descriptors.
Every brw_set_???_message function had duplicated code, per-generation,
to set the Message Descriptor and Extended Message Descriptor bits
(SFID, message length, response length, header present, end of thread).
However, these fields are actually specified as part of the SEND
instruction itself; individual types of messages don't even specify
them (except for header present, but that's in the same bit location).
Since these are exactly the same regardless of the message type, just
create a function to set them, using the generic message structs. This
not only shortens the code, but hides a lot of the per-generation
complexity (like the SFID being in destreg__conditionalmod) in one spot.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 8 Oct 2011 04:55:30 +0000 (21:55 -0700)]
i965: Remove EOT parameter from brw_SAMPLE and brw_set_sampler_message.
The existing code asserted that eot == 0, as it doesn't make sense for
a thread to sample a texture as the last thing it does.
It doesn't make much sense to pass around a dead parameter either.
Especially for a function which already has a long parameter list.
So, remove the parameter and just set EOT to 0.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 8 Oct 2011 04:27:24 +0000 (21:27 -0700)]
i965: Document the brw_instruction Message Descriptor structures.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 8 Oct 2011 03:55:35 +0000 (20:55 -0700)]
i965: Rename BRW_MESSAGE_TARGET_* to BRW_SFID_* and document them.
When reading the data port code, it was not clear to me what these
values meant, nor where I could find them in the documentation.
Especially since the latest BSpec and older PRMs document them in
radically different places...neither of which are near the descriptions
of individual messages.
Cite the documentation, and rename them to SFID to signify that these
are Shared Function IDs that one can read about in the GPU overview,
rather than arbitrary bitfields. While we're add it, make them an enum.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>