gem5.git
16 years agoSCons: Add check for SCons version since the latest are broken.
Ali Saidi [Tue, 8 Apr 2008 03:40:23 +0000 (23:40 -0400)]
SCons: Add check for SCons version since the latest are broken.

--HG--
extra : convert_revision : bb0ea1221214e4e34d4223e345956c3febce3dc9

16 years agoIGbE: Fix bug that limits wire performance a bit
Ali Saidi [Tue, 25 Mar 2008 19:58:54 +0000 (15:58 -0400)]
IGbE: Fix bug that limits wire performance a bit

--HG--
extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c

16 years agoAutomated merge with ssh://daystrom.m5sim.org//repo/m5
Steve Reinhardt [Tue, 25 Mar 2008 14:04:52 +0000 (10:04 -0400)]
Automated merge with ssh://daystrom.m5sim.org//repo/m5

--HG--
extra : convert_revision : 7922848bb1145bcb2ee07d672d21cfe2dd98fc03

16 years agoFix handling of writeback-induced writebacks in atomic mode.
Steve Reinhardt [Tue, 25 Mar 2008 14:01:21 +0000 (10:01 -0400)]
Fix handling of writeback-induced writebacks in atomic mode.

--HG--
extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c

16 years agoX86: Put an RTC into the CMOS part of the southbridge.
Gabe Black [Tue, 25 Mar 2008 06:15:23 +0000 (02:15 -0400)]
X86: Put an RTC into the CMOS part of the southbridge.

--HG--
extra : convert_revision : a614373236fe75db6e6181fc152a02b541a131f3

16 years agoDevices: Separate out the MC146818 RTC so both Alpha and X86 can use it.
Gabe Black [Tue, 25 Mar 2008 06:15:06 +0000 (02:15 -0400)]
Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.

--HG--
extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed

16 years agoX86: Turn #defines into consts.
Gabe Black [Tue, 25 Mar 2008 06:09:18 +0000 (02:09 -0400)]
X86: Turn #defines into consts.

--HG--
extra : convert_revision : c0416de5d88ca39f54494418768e68a93aa4f2aa

16 years agoX86: Start implementing the south bridge stuff.
Gabe Black [Tue, 25 Mar 2008 06:08:54 +0000 (02:08 -0400)]
X86: Start implementing the south bridge stuff.

--HG--
extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca

16 years agoX86: Change the Opteron platform to be the PC platform.
Gabe Black [Tue, 25 Mar 2008 06:06:53 +0000 (02:06 -0400)]
X86: Change the Opteron platform to be the PC platform.

--HG--
extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37

16 years agoDelete the Request for a no-response Packet
Steve Reinhardt [Mon, 24 Mar 2008 05:08:02 +0000 (01:08 -0400)]
Delete the Request for a no-response Packet
when the Packet is deleted, since the requester
can't possibly do it.

--HG--
extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d

16 years agoDon't FastAlloc MSHRs since we don't allocate them on the fly.
Steve Reinhardt [Mon, 24 Mar 2008 05:08:02 +0000 (01:08 -0400)]
Don't FastAlloc MSHRs since we don't allocate them on the fly.

--HG--
extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775

16 years agoAdd FAST_ALLOC_DEBUG and FAST_ALLOC_STATS as SConstruct options.
Steve Reinhardt [Mon, 24 Mar 2008 05:08:02 +0000 (01:08 -0400)]
Add FAST_ALLOC_DEBUG and FAST_ALLOC_STATS as SConstruct options.

--HG--
extra : convert_revision : 56a7f646f2ac87019c78ba7fa62c5f4bdc00ba44

16 years agoFix cache problem with writes to tempBlock
Steve Reinhardt [Sun, 23 Mar 2008 02:17:15 +0000 (22:17 -0400)]
Fix cache problem with writes to tempBlock
getting wrong writeback address.

--HG--
extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b

16 years agoMIPS: Check endianness of binaries in SE mode.
Gabe Black [Thu, 20 Mar 2008 06:10:21 +0000 (02:10 -0400)]
MIPS: Check endianness of binaries in SE mode.

--HG--
extra : convert_revision : e6c4bda6078eb68a26f8834411f744078c6bf5a9

16 years agoUpdate long regression stats for semi-recent cache changes.
Steve Reinhardt [Tue, 18 Mar 2008 03:07:22 +0000 (23:07 -0400)]
Update long regression stats for semi-recent cache changes.

--HG--
extra : convert_revision : 7fef1e4f684ced37479ed363ebbb3a7485bc0d52

16 years agoFix a few Packet memory leaks.
Steve Reinhardt [Mon, 17 Mar 2008 07:08:28 +0000 (03:08 -0400)]
Fix a few Packet memory leaks.

--HG--
extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a

16 years agoRestructure bus timing calcs to cope with pkt being deleted by target.
Steve Reinhardt [Mon, 17 Mar 2008 07:07:38 +0000 (03:07 -0400)]
Restructure bus timing calcs to cope with pkt being deleted by target.

--HG--
extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330

16 years agoFix subtle cache bug where read could return stale data
Steve Reinhardt [Sat, 15 Mar 2008 12:03:55 +0000 (05:03 -0700)]
Fix subtle cache bug where read could return stale data
if a prior write miss arrived while an even earlier
read miss was still outstanding.

--HG--
extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a

16 years agoSimpoints: Fix regression bug/Don't set process.simpoint, if simpoint doesn't exist
Ali Saidi [Sun, 16 Mar 2008 02:20:09 +0000 (22:20 -0400)]
Simpoints: Fix regression bug/Don't set process.simpoint, if simpoint doesn't exist

--HG--
extra : convert_revision : c156c49668815755c4c788f807e8eba32151aa24

16 years agoMerge
Gabe Black [Fri, 7 Mar 2008 02:09:15 +0000 (21:09 -0500)]
Merge

--HG--
extra : convert_revision : ec5f41b2007ade15f6f4c4a1533e50f9cba2798e

16 years agoX86: Refine the local APIC.
Gabe Black [Fri, 7 Mar 2008 01:37:28 +0000 (20:37 -0500)]
X86: Refine the local APIC.

--HG--
extra : convert_revision : 2789c54ed555fed2f2a333fcc7dc6454f294ebf2

16 years agoO3CPU: Don't call dumpInsts if DEBUG is not defined
Vilas Sridharan [Thu, 6 Mar 2008 05:27:09 +0000 (00:27 -0500)]
O3CPU: Don't call dumpInsts if DEBUG is not defined

--HG--
extra : convert_revision : 3194bde4c624d118969bfbf92282539963a72245

16 years agoX86: Don't map the local APIC into the physical address space in SE mode.
Gabe Black [Sat, 1 Mar 2008 05:05:12 +0000 (00:05 -0500)]
X86: Don't map the local APIC into the physical address space in SE mode.

--HG--
extra : convert_revision : b7103974b12130bbf43583c4cb5294b808add208

16 years agoAdded tag m5_2.0_beta4 for changeset cad8c2b5d2ec
Ali Saidi [Fri, 29 Feb 2008 23:08:49 +0000 (18:08 -0500)]
Added tag m5_2.0_beta4 for changeset cad8c2b5d2ec

--HG--
extra : convert_revision : 3012e3c0393b8fd2f83e3532172269a27c0bbb04

16 years agoAdded tag m5_2.0_beta5 for changeset fb826c79a385
Ali Saidi [Fri, 29 Feb 2008 22:59:45 +0000 (17:59 -0500)]
Added tag m5_2.0_beta5 for changeset fb826c79a385

--HG--
extra : convert_revision : 13e2a028aaf899e2f314e6053266168b274e20fd

16 years agoError out if -s is used without --caches (instead of saying you must specify a m5_2.0_beta5
Lisa Hsu [Fri, 29 Feb 2008 06:49:36 +0000 (01:49 -0500)]
Error out if -s is used without --caches (instead of saying you must specify a
CPU).

--HG--
extra : convert_revision : a3b2bfbe7e037146ac08dd08834bf255da692506

16 years agoConfigs: Make sure options don't conflict
Ali Saidi [Fri, 29 Feb 2008 06:23:18 +0000 (01:23 -0500)]
Configs: Make sure options don't conflict

--HG--
extra : convert_revision : dc9b91cf1d8e33c5e68d7faeb45dbe3e7038d14c

16 years agoConfigs: Fix some bugs we introduced in the simpoints code
Ali Saidi [Fri, 29 Feb 2008 01:39:01 +0000 (20:39 -0500)]
Configs: Fix some bugs we introduced in the simpoints code

--HG--
extra : convert_revision : ef22c11cb3242903a484fc05dc0f96d3e5f9af72

16 years agoAutomated merge with ssh://daystrom.m5sim.org//repo/m5
Steve Reinhardt [Wed, 27 Feb 2008 23:18:56 +0000 (18:18 -0500)]
Automated merge with ssh://daystrom.m5sim.org//repo/m5

--HG--
extra : convert_revision : f4bcd342e7abb86ca83840b723e6ab0b861ecf5b

16 years agoUpdate outputs for quick tests to reflect fixed cache stats.
Steve Reinhardt [Wed, 27 Feb 2008 23:17:37 +0000 (18:17 -0500)]
Update outputs for quick tests to reflect fixed cache stats.
Will update long tests later.

--HG--
extra : convert_revision : 79f66b5761a574f0c8049c1c771c353b42942993

16 years agoAdd comments in code to describe bug conditions.
Korey Sewell [Wed, 27 Feb 2008 22:50:29 +0000 (17:50 -0500)]
Add comments in code to describe bug conditions.
This should help if somebody gets to the bug
fix before me (or someone else)...

--HG--
extra : convert_revision : 0ae64c58ef4f7b02996f31e9e9e6bfad344719e2

16 years agoFix Load/Store Queue squashing after a SMT thread is removed but ensuring
Korey Sewell [Wed, 27 Feb 2008 21:53:08 +0000 (16:53 -0500)]
Fix Load/Store Queue squashing after a SMT thread is removed but ensuring
you are squashing from the current instruction # causing the thread exit.

--HG--
extra : convert_revision : ccbeece7dd1d5fee43f30ab19370908972113473

16 years agoFix offset in removeThread() function so that float registers start freeing up
Korey Sewell [Wed, 27 Feb 2008 21:48:33 +0000 (16:48 -0500)]
Fix offset in removeThread() function so that float registers start freeing up
from the right point (#32 usually) instead of restarting at 0 and double-freeing.

Commented out assert line in free_list.hh that will check for when double-free condition
goes bad.

--HG--
extra : convert_revision : 08d5f9b6a874736e487d101e85c22aaa67bf59ae

16 years agoRevamp cache timing access mshr check to make stats sane again.
Steve Reinhardt [Wed, 27 Feb 2008 06:03:28 +0000 (22:03 -0800)]
Revamp cache timing access mshr check to make stats sane again.

--HG--
extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea

16 years agoConfigs: Make using Simpoints easier with some config files that support them easily
Rick Strong [Wed, 27 Feb 2008 05:35:09 +0000 (00:35 -0500)]
Configs: Make using Simpoints easier with some config files that support them easily

--HG--
extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd

16 years agoX86: Put in initial implementation of the local APIC.
Gabe Black [Wed, 27 Feb 2008 04:39:53 +0000 (23:39 -0500)]
X86: Put in initial implementation of the local APIC.

--HG--
extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8

16 years agoX86: Implement the INVLPG instruction and the TIA microop.
Gabe Black [Wed, 27 Feb 2008 04:39:22 +0000 (23:39 -0500)]
X86: Implement the INVLPG instruction and the TIA microop.

--HG--
extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2

16 years agoTLB: Make a TLB base class and put a virtual demapPage function in it.
Gabe Black [Wed, 27 Feb 2008 04:38:51 +0000 (23:38 -0500)]
TLB: Make a TLB base class and put a virtual demapPage function in it.

--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f

16 years agoX86: Get PCI config space to work, and adjust address space prefix numbering scheme.
Gabe Black [Wed, 27 Feb 2008 04:38:01 +0000 (23:38 -0500)]
X86: Get PCI config space to work, and adjust address space prefix numbering scheme.

--HG--
extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6

16 years agoCache: better comments particularly regarding writeback situation.
Steve Reinhardt [Wed, 27 Feb 2008 04:17:26 +0000 (20:17 -0800)]
Cache: better comments particularly regarding writeback situation.

--HG--
extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362

16 years agoUpdate make release, README, and RELEASE_NOTES for b5
Ali Saidi [Tue, 26 Feb 2008 22:28:31 +0000 (17:28 -0500)]
Update make release, README, and RELEASE_NOTES for b5

--HG--
extra : convert_revision : a4958e934f599bff24b251507da7c266c89430fc

16 years agoBus: Update the stats for the recent bus fix.
Gabe Black [Tue, 26 Feb 2008 07:20:40 +0000 (02:20 -0500)]
Bus: Update the stats for the recent bus fix.

--HG--
extra : convert_revision : dc29f7b5e6fa30a50305193cb0e5aed942f7e407

16 years agoBus: Fix the bus timing to be more realistic.
Gabe Black [Tue, 26 Feb 2008 07:20:08 +0000 (02:20 -0500)]
Bus: Fix the bus timing to be more realistic.

--HG--
extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc

16 years agoadd instruction count fast forwaing and max instruction options
Vilas Sridharan [Fri, 22 Feb 2008 22:48:10 +0000 (17:48 -0500)]
add instruction count fast forwaing and max instruction options

--HG--
extra : convert_revision : 8fe45e512229cdc3e0dcd23e3e5c54516c445d0f

16 years agoAdded ARM_SE as a build option.
Stephen Hines [Tue, 19 Feb 2008 21:42:32 +0000 (16:42 -0500)]
Added ARM_SE as a build option.

--HG--
extra : convert_revision : 905e3acfa58bd14f8101e29dadc0de71d23a79cc

16 years agoUpdate stats for new writeback behavior.
Steve Reinhardt [Sat, 16 Feb 2008 19:58:37 +0000 (14:58 -0500)]
Update stats for new writeback behavior.

--HG--
extra : convert_revision : 3e932b5773f5fb9a119822d5bf497f61e9409c14

16 years agoMake L2+ caches allocate new block for writeback misses
Steve Reinhardt [Sat, 16 Feb 2008 19:58:03 +0000 (14:58 -0500)]
Make L2+ caches allocate new block for writeback misses
instead of forwarding down the line.

--HG--
extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba

16 years agoUpdate stats for some unknown minor x86 changes
Steve Reinhardt [Sat, 16 Feb 2008 18:53:12 +0000 (13:53 -0500)]
Update stats for some unknown minor x86 changes
(assuming someone just forgot to do this... tsk tsk).

--HG--
extra : convert_revision : 303d7bbf5e2c892d5f4498a9de2e2b82496ccd0e

16 years agoCPU: move the PC Events code to a place where the code won't be executed multiple...
Ali Saidi [Thu, 14 Feb 2008 21:14:35 +0000 (16:14 -0500)]
CPU: move the PC Events code to a place where the code won't be executed multiple times if an instruction faults.

--HG--
extra : convert_revision : 19c8e46a4eea206517be7ed4131ab9df0fe00e68

16 years agoConfigs: Change Simulation.py to return a subclass of the CPU models rather than...
Ali Saidi [Thu, 14 Feb 2008 21:13:50 +0000 (16:13 -0500)]
Configs: Change Simulation.py to return a subclass of the CPU models rather than the original class. Without this changes elsewhere in the config script (e.g. the DriveSys frequency can change the TestSys frequency.

--HG--
extra : convert_revision : f972207c616590a60a6e103daa5de469cf124b44

16 years agoUpdate copyright dates
Ali Saidi [Mon, 11 Feb 2008 17:35:28 +0000 (12:35 -0500)]
Update copyright dates

--HG--
extra : convert_revision : 547e7ddff6b8005a9eaad60970bc51984e84fcd1

16 years agoAutomated merge with file:/home/stever/hg/m5-orig
Steve Reinhardt [Mon, 11 Feb 2008 16:31:26 +0000 (08:31 -0800)]
Automated merge with file:/home/stever/hg/m5-orig

--HG--
extra : convert_revision : 86a55cd98a9704f756a70aa0cbd2820cf92c821d

16 years agoEXTRAS now points to src instead of needing 'src' subdir.
Steve Reinhardt [Mon, 11 Feb 2008 16:04:01 +0000 (08:04 -0800)]
EXTRAS now points to src instead of needing 'src' subdir.

--HG--
extra : convert_revision : 8e7e4516ace8c7852eeea3c479bfd567839a8061

16 years agoWait to set BUILD_DIR until *after* env is copied.
Steve Reinhardt [Mon, 11 Feb 2008 15:47:44 +0000 (07:47 -0800)]
Wait to set BUILD_DIR until *after* env is copied.

--HG--
extra : convert_revision : 03153e7aaa1fb2a435900eab08a98ec1a6ce62db

16 years agoBus: Only update port cache when there is an item to update it with.
Nicolas Zea [Mon, 11 Feb 2008 00:41:03 +0000 (19:41 -0500)]
Bus: Only update port cache when there is an item to update it with.

--HG--
extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8

16 years agoIGbE: Fix a couple of bugs.
Ali Saidi [Mon, 11 Feb 2008 00:32:12 +0000 (19:32 -0500)]
IGbE: Fix a couple of bugs.

--HG--
extra : convert_revision : a1f16bd82b6fbd5b6b5dc0f08b9e69858bea86ca

16 years agoFix #include lines for renamed cache files.
Steve Reinhardt [Sun, 10 Feb 2008 22:45:25 +0000 (14:45 -0800)]
Fix #include lines for renamed cache files.

--HG--
extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5

16 years agoRename cache files for brevity and consistency with rest of tree.
Steve Reinhardt [Sun, 10 Feb 2008 22:15:42 +0000 (14:15 -0800)]
Rename cache files for brevity and consistency with rest of tree.

--HG--
rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc
rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh
rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc
rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh
rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc
rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc
rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh
rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc
rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh
rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc
rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh
rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc
rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh
rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc
rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh
rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc
rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh
rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc
rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh
rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py
rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc
rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh
rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh
extra : convert_revision : ff7a35cc155a8d80317563c45cebe405984eac62

16 years agoMake the Event::description() a const function
Stephen Hines [Wed, 6 Feb 2008 21:32:40 +0000 (16:32 -0500)]
Make the Event::description() a const function

--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0

16 years agoAdd base ARM code to M5
Stephen Hines [Wed, 6 Feb 2008 04:44:13 +0000 (23:44 -0500)]
Add base ARM code to M5

--HG--
extra : convert_revision : d811bf87d1a0bfc712942ecd3db1b48fc75257af

16 years agoCleaned up os.path imports a bit.
Steve Reinhardt [Wed, 6 Feb 2008 01:43:45 +0000 (17:43 -0800)]
Cleaned up os.path imports a bit.

--HG--
extra : convert_revision : ee75bf9abd249ab053e804739cc50972475cd5b6

16 years agoMake EXTRAS work for SConsopts too.
Steve Reinhardt [Wed, 6 Feb 2008 01:40:08 +0000 (17:40 -0800)]
Make EXTRAS work for SConsopts too.
Requires pushing source files down into 'src' subdir relative
to directory listed in EXTRAS.

--HG--
extra : convert_revision : ca04adc3e24c60bd3e7b63ca5770b31333d76729

16 years agoX86: Put an SMBios/DMI table in memory.
Gabe Black [Wed, 23 Jan 2008 20:28:54 +0000 (15:28 -0500)]
X86: Put an SMBios/DMI table in memory.
This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.

--HG--
extra : convert_revision : c1610c0dfa211b7e0d091a04133695d84f500a1c

16 years agoX86: Optomize the bit scanning instruction microassembly a little. More can be done.
Gabe Black [Wed, 23 Jan 2008 13:18:27 +0000 (08:18 -0500)]
X86: Optomize the bit scanning instruction microassembly a little. More can be done.

--HG--
extra : convert_revision : 3cf6e972f0e41e3529a633ecbb31289e1bd17f0f

16 years agoX86: Implement and attach the BSR and BSF instructions.
Gabe Black [Tue, 22 Jan 2008 05:10:33 +0000 (00:10 -0500)]
X86: Implement and attach the BSR and BSF instructions.

--HG--
extra : convert_revision : be7e11980092e5d1baff0e05d4ec910305966908

16 years agoX86: Fill out group17 in the decoder.
Gabe Black [Mon, 21 Jan 2008 21:27:40 +0000 (16:27 -0500)]
X86: Fill out group17 in the decoder.

--HG--
extra : convert_revision : 66ab9c0fc3086f66e3d6d82d47964ecf406c3a8a

16 years agoX86: Use the existing boot_osflags instead of duplicating it.
Gabe Black [Mon, 21 Jan 2008 09:32:34 +0000 (04:32 -0500)]
X86: Use the existing boot_osflags instead of duplicating it.

--HG--
extra : convert_revision : e04e438d7d261a61c52b946c23cd126ed648814a

16 years agoUpdate long o3 regressions for o3 change in previous changeset
Ali Saidi [Wed, 16 Jan 2008 16:11:55 +0000 (11:11 -0500)]
Update long o3 regressions for o3 change in previous changeset

--HG--
extra : convert_revision : 00242105076eb4466cce21038858f2b9d20b2fe2

16 years agoUpdate O3 ref outputs: very minor stats change due to previous cset.
Steve Reinhardt [Tue, 15 Jan 2008 18:13:08 +0000 (13:13 -0500)]
Update O3 ref outputs: very minor stats change due to previous cset.
(from Steve on behalf of m5test).

--HG--
extra : convert_revision : 696efdaa3dd7680dfc9c797a6a46a5053238c7d2

16 years agoThe reason is that the event is supposed to put the instructions ready to execute...
Ke Meng [Mon, 14 Jan 2008 16:47:32 +0000 (11:47 -0500)]
The reason is that the event is supposed to put the instructions ready to execute for next cycle. And the FUCompletion event has a lower priority than CPU tick event. It is called after the iew->tick() for current cycle has already been executed and the issueToExecuteQueue has already advanced this time. And assume the issueToExecuteLatency is 1, to catch up, the increasement should be made at access(-1) instead of access(0). Otherwise I found it could increase the actual op_latency of the instructions to execute by 1 cycle and potentially put the simulated CPU into a permanent idle state.

Signed-off by: Ali Saidi <saidi@eecs.umich.edu>

--HG--
extra : convert_revision : dafc16814383e8e8f8320845edf6ab2bcfed1e1d

16 years agoX86: Redo the bit test instructions.
Gabe Black [Sat, 12 Jan 2008 11:41:32 +0000 (06:41 -0500)]
X86: Redo the bit test instructions.

--HG--
extra : convert_revision : 433c2a9f3675ed02f3be5ce759a440f2686d2ccd

16 years agoX86: Fix the wrmsr instruction.
Gabe Black [Sat, 12 Jan 2008 11:40:55 +0000 (06:40 -0500)]
X86: Fix the wrmsr instruction.

--HG--
extra : convert_revision : 12bc7e71226ebafb8eedadf6a3db82929e15e722

16 years agoX86: Make the effective segment base shadow the regular one, not the selector.
Gabe Black [Sat, 12 Jan 2008 11:40:10 +0000 (06:40 -0500)]
X86: Make the effective segment base shadow the regular one, not the selector.

--HG--
extra : convert_revision : 498c7c16d664c784b196885b1f35c3c6386c9cfc

16 years agoX86: Make the IO ports work using extra physical address lines. Add a serial port.
Gabe Black [Sat, 12 Jan 2008 11:39:15 +0000 (06:39 -0500)]
X86: Make the IO ports work using extra physical address lines. Add a serial port.

--HG--
extra : convert_revision : a14cb4fc9afedfc0ff58b11a7f8fb5516d462cc6

16 years agoX86: Fix the general IO instructions dataSize.
Gabe Black [Sat, 12 Jan 2008 11:37:35 +0000 (06:37 -0500)]
X86: Fix the general IO instructions dataSize.

--HG--
extra : convert_revision : 9774a52cb6a8e7632d1b1dc0706e5791cc18d238

16 years agoTemporary fix for ll/sc bug see flyspray task for more info:
Geoffrey Blake [Sun, 6 Jan 2008 05:19:45 +0000 (00:19 -0500)]
Temporary fix for ll/sc bug see flyspray task for more info:
http://www.m5sim.org/flyspray/task/197

Signed-off by: Ali Saidi <saidi@eecs.umich.edu>

--HG--
extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81

16 years agoVery minor memtest regression stats changes from recent coherence bug fixes.
Steve Reinhardt [Wed, 2 Jan 2008 23:35:09 +0000 (15:35 -0800)]
Very minor memtest regression stats changes from recent coherence bug fixes.

--HG--
extra : convert_revision : 5e7f8ce91ea8f98e6503ac9e10aae68c62f9e510

16 years agoAdd ReadRespWithInvalidate to handle multi-level coherence situation
Steve Reinhardt [Wed, 2 Jan 2008 23:22:38 +0000 (15:22 -0800)]
Add ReadRespWithInvalidate to handle multi-level coherence situation
where we defer a response to a read from a far-away cache A, then later
defer a ReadExcl from a cache B on the same bus as us.  We'll assert
MemInhibit in both cases, but in the latter case MemInhibit will keep
the invalidation from reaching cache A.  This special response tells
cache A that it gets the block to satisfy its read, but must immediately
invalidate it.

--HG--
extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b

16 years agoMark cache-to-cache MSHRs as downstreamPending when necessary.
Steve Reinhardt [Wed, 2 Jan 2008 23:18:33 +0000 (15:18 -0800)]
Mark cache-to-cache MSHRs as downstreamPending when necessary.
Don't mark upstream MSHR as pending if downstream MSHR is already in service.

--HG--
extra : convert_revision : e1c135ff00217291db58ce8a06ccde34c403d37f

16 years agoDon't DPRINTF in the middle of a PrintReq.
Steve Reinhardt [Wed, 2 Jan 2008 22:42:42 +0000 (14:42 -0800)]
Don't DPRINTF in the middle of a PrintReq.

--HG--
extra : convert_revision : 6358c014d14a19a34111c39827b05987507544bb

16 years agoBug fix: functional cache port now needs otherPort set.
Steve Reinhardt [Wed, 2 Jan 2008 22:42:24 +0000 (14:42 -0800)]
Bug fix: functional cache port now needs otherPort set.

--HG--
extra : convert_revision : fb007df73a77535a5dba19341f7b0b32e8c99548

16 years agoAdditional comments and helper functions for PrintReq.
Steve Reinhardt [Wed, 2 Jan 2008 21:46:22 +0000 (13:46 -0800)]
Additional comments and helper functions for PrintReq.

--HG--
extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4

16 years agoAdd functional PrintReq command for memory-system debugging.
Steve Reinhardt [Wed, 2 Jan 2008 20:20:15 +0000 (12:20 -0800)]
Add functional PrintReq command for memory-system debugging.

--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7

16 years agoFix formatting and comments in cache_impl.hh
Steve Reinhardt [Wed, 2 Jan 2008 20:15:48 +0000 (12:15 -0800)]
Fix formatting and comments in cache_impl.hh

--HG--
extra : convert_revision : 26d71cca5420ad03e16bf174e15dabe7f902da41

16 years agoSPARC: Fix a bug where the TLB would match against the wrong entries.
Gabe Black [Tue, 1 Jan 2008 23:20:08 +0000 (18:20 -0500)]
SPARC: Fix a bug where the TLB would match against the wrong entries.

--HG--
extra : convert_revision : 631b3b6a1416121b54bd9717ca1cdccdd5b8a1eb

17 years agoCheckpointing: Fix a bug in the simulation script when restoring without standard...
Ali Saidi [Tue, 18 Dec 2007 06:52:57 +0000 (01:52 -0500)]
Checkpointing: Fix a bug in the simulation script when restoring without standard switch and change some ifs to work with the default port since every port is now connected to something.

--HG--
extra : convert_revision : 72507cf13e58465291b0dce6322e853bee5a2b89

17 years agoCPU: Update where the simple cpus read their cpu id from the thread context to init...
Ali Saidi [Sun, 16 Dec 2007 08:48:13 +0000 (03:48 -0500)]
CPU: Update where the simple cpus read their cpu id from the thread context to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations.

--HG--
extra : convert_revision : 4f2801967a271b43817d88e147c2f80c4480b2c3

17 years agoFix minor bug in util/style.py
Steve Reinhardt [Tue, 11 Dec 2007 18:41:30 +0000 (10:41 -0800)]
Fix minor bug in util/style.py

--HG--
extra : convert_revision : d37accc884c2967d87dd267debab5afeb8b6ed85

17 years agoX86: Update the parser reference output which has mysteriously changed again?
Gabe Black [Mon, 3 Dec 2007 22:33:33 +0000 (14:33 -0800)]
X86: Update the parser reference output which has mysteriously changed again?

--HG--
extra : convert_revision : 9b1439096509633d6e9b5bc0c661608f40a63c5f

17 years agoX86: Please excuse my dear Aunt Sally. (precedence bug)
Gabe Black [Mon, 3 Dec 2007 22:32:56 +0000 (14:32 -0800)]
X86: Please excuse my dear Aunt Sally. (precedence bug)

--HG--
extra : convert_revision : 9ad4f31e7a962c3177896bcbfb93e2e54720d117

17 years agoX86: Make sure the memory index is calculated using the address size for bit test...
Gabe Black [Sun, 2 Dec 2007 09:46:38 +0000 (01:46 -0800)]
X86: Make sure the memory index is calculated using the address size for bit test instructions.

--HG--
extra : convert_revision : 9634675857dae53b5e79e49267c864a0265afde1

17 years agoX86: Fix a copy/paste mistake where the bit test instructions were using an immediate...
Gabe Black [Sun, 2 Dec 2007 09:46:29 +0000 (01:46 -0800)]
X86: Fix a copy/paste mistake where the bit test instructions were using an immediate where they should use a register.

--HG--
extra : convert_revision : b0ee80e4c7fdb58a1eb85b3bcc82a0cdaa93330a

17 years agoX86: Make the page not present panic more descriptive.
Gabe Black [Sun, 2 Dec 2007 09:46:14 +0000 (01:46 -0800)]
X86: Make the page not present panic more descriptive.

--HG--
extra : convert_revision : 9360e47adb61e164ac218f2ea231eaa60bf3229d

17 years agoX86: Start setting up the real mode data structure.
Gabe Black [Sun, 2 Dec 2007 08:04:31 +0000 (00:04 -0800)]
X86: Start setting up the real mode data structure.

--HG--
extra : convert_revision : ba6d4939d4d58da5586655c83f1617f47dc7e359

17 years agoX86: Make the 0xA0-0xA3 versions of mov use the right sized immediates.
Gabe Black [Sun, 2 Dec 2007 08:02:51 +0000 (00:02 -0800)]
X86: Make the 0xA0-0xA3 versions of mov use the right sized immediates.

--HG--
extra : convert_revision : a702403de29772618abb5bd5c5555279d91bdd59

17 years agoX86: Add in a missing "break".
Gabe Black [Sun, 2 Dec 2007 07:11:23 +0000 (23:11 -0800)]
X86: Add in a missing "break".

--HG--
extra : convert_revision : 2e48d8b0292bc3b78e4caa27dec20113d40e7d74

17 years agoX86: Actually do something for the MiscRegFile clear function.
Gabe Black [Sun, 2 Dec 2007 07:10:42 +0000 (23:10 -0800)]
X86: Actually do something for the MiscRegFile clear function.

--HG--
extra : convert_revision : 36f8abaa9d09700d8ba9e09b4a10fa4dce580f36

17 years agoX86: Move startup code to the system object to initialize a Linux system.
Gabe Black [Sun, 2 Dec 2007 07:09:56 +0000 (23:09 -0800)]
X86: Move startup code to the system object to initialize a Linux system.

--HG--
extra : convert_revision : a4796c79f41aa8b8f38bf2f628bee8f1b3af64be

17 years agoX86: Add a missing microcode file to the sconscript.
Gabe Black [Sun, 2 Dec 2007 07:07:41 +0000 (23:07 -0800)]
X86: Add a missing microcode file to the sconscript.

--HG--
extra : convert_revision : 6da8a67e07bada169abf7f10aded8a90d4e63eae

17 years agoX86: Fix a copy paste error in the bts microcode.
Gabe Black [Sun, 2 Dec 2007 07:06:52 +0000 (23:06 -0800)]
X86: Fix a copy paste error in the bts microcode.

--HG--
extra : convert_revision : c4ac007d35ac13211f9816f1104c84f2b447ddba