PR testsuite/88098 - FAIL: gcc.dg/Wbuiltin-declaration-mismatch-4.c

gcc/c/ChangeLog:

PR testsuite/88098
* c-typeck.c (convert_arguments): Call builtin_decl_explicit instead.
(maybe_warn_builtin_no_proto_arg): Handle short enum to int promotion.

gcc/testsuite/ChangeLog:

PR testsuite/88098
* gcc.dg/Wbuiltin-declaration-mismatch-4.c: Adjust.
* gcc.dg/Wbuiltin-declaration-mismatch-5.c: New test.
* gcc.dg/torture/pr67222.c: Adjust.

From-SVN: r266417

Implement P0415 More constexpr for std::complex.

2018-11-23  Edward Smith-Rowland  <3dw4rd@verizon.net>

Implement P0415 More constexpr for std::complex.
* include/std/complex (conj(complex<Tp>), norm(complex<Tp>)): Constexpr;
(real(Tp), imag(Tp)): Constexpr;
(operator@=(Tp), operator@=(complex<Tp>)): Constexpr;
(operator@(Tp,complex<Tp>), operator@(complex<Tp>,Tp)
operator@(complex<Tp>,complex<Tp>)): Constexpr.
* testsuite/26_numerics/complex/comparison_operators/
more_constexpr.cc: New test.
* testsuite/26_numerics/complex/operators/more_constexpr.cc: New test.
* testsuite/26_numerics/complex/requirements/
more_constexpr.cc: New test.
* testsuite/26_numerics/complex/value_operations/
more_constexpr.cc: New test.
* testsuite/26_numerics/headers/complex/synopsis.cc:
Add _GLIBCXX20_CONSTEXPR to applicable operators; Add missing proj().
* testsuite/26_numerics/headers/complex/synopsis.cc:
Add _GLIBCXX20_CONSTEXPR to relevant decls.

From-SVN: r266416

[aarch64] Add CPU support for Ampere Computing's eMAG.

2018-11-23  Christoph Muellner <christoph.muellner@theobroma-system.com>

* config/aarch64/aarch64-cores.def: Define emag.
* config/aarch64/aarch64-tune.md: Regenerated with emag.
* config/aarch64/aarch64.c (emag_tunings): New struct.
* doc/invoke.texi: Document mtune value.

From-SVN: r266415

[aarch64] Update xgene1 tuning struct.

2018-11-23  Christoph Muellner  <christoph.muellner@theobroma-systems.com>
    Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

* config/aarch64/aarch64.c (xgene1_tunings): Optimize Xgene1 tunings
for GCC 9.

Co-Authored-By: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
From-SVN: r266414

[aarch64] Add xgene1 prefetch tunings.

2018-11-23  Christoph Muellner  <christoph.muellner@theobroma-systems.com>
            Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

* config/aarch64/aarch64.c (xgene1_tunings): Add Xgene1 specific
prefetch tunings.

Co-Authored-By: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
From-SVN: r266413

[aarch64] Update xgene1_addrcost_table.

2018-11-23  Christoph Muellner  <christoph.muellner@theobroma-systems.com>
            Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

* config/aarch64/aarch64.c (xgene1_addrcost_table): Correct the post modify
costs.

Co-Authored-By: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
From-SVN: r266412

[aarch64/arm] Updating the cost table for xgene1.

2018-11-23  Christoph Muellner <christoph.muellner@theobroma-system.com>

* config/arm/aarch-cost-tables.h (xgene1_extra_costs): Update the cost table
for Xgene1.

From-SVN: r266411

PR libstdc++/65229 fix pretty printer for std::bitset<0>

2018-11-23  Martin Sebor  <msebor@redhat.com>
    Jonathan Wakely  <jwakely@redhat.com>

PR libstdc++/65229
* python/libstdcxx/v6/printers.py (StdBitsetPrinter): Handle
exception thrown for std::bitset<0>.
* testsuite/libstdc++-prettyprinters/simple.cc: Test std::bitset<0>.

Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r266409

PR libstdc++/87308 adjust regex used in std::any pretty printer

The pretty printer for std::any fails when the contained value is a
locally-defined type, because the name in the debuginfo has
cv-qualifiers and ptr-declarators in different positions. The unexpected
format confuses the printer. This makes the printer's regex handle
either format.

This isn't a complete fix because looking up the contained type fails
when there are two types with the same name (defined in different local
scopes). This applies to all closure types defined in a given function,
as they all appear as "func()::lambda" in the debuginfo names.

PR libstdc++/87308 (partial)
* python/libstdcxx/v6/printers.py (StdExpAnyPrinter): Adjust regex to
work around PR 88166.
* testsuite/libstdc++-prettyprinters/cxx17.cc: Test std::any
containing a local type.

From-SVN: r266408

re PR tree-optimization/88149 (ICE in vect_transform_stmt since r265959)

2018-11-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88149
* tree-vect-slp.c (vect_slp_analyze_node_operations): Detect
the case where there are two different def types for the
same operand at different operand position in the same stmt.

* g++.dg/torture/pr88149.C: New testcase.

From-SVN: r266406

[PATCH, ARM] Clean up arm backend using the @ construct for MD patterns

This patch removes some of the machine mode checks from the arm backend when
emitting instructions by using the '@' construct (Parameterized Names[2]). It
is based on the previous AArch64 patch[1].

[1] https://gcc.gnu.org/ml/gcc-patches/2018-07/msg00673.html
[2] https://gcc.gnu.org/onlinedocs/gccint/Parameterized-Names.html#Parameterized-Names

2018-23-11  Mihail Ionescu  <mihail.ionescu@arm.com>

* config/arm/arm.c (arm_expand_compare_and_swap): Simplify and call
gen_atomic_compare_swap_1.
(arm_evpc_neon_vuzp): Likewise gen_neon_vuzp_internal.
(arm_evpc_neon_vtrn): Likewise gen_neon_vtrn_internal.
(arm_evpc_neon_vext): Likewise gen_neon_vext_internal.
(arm_evpc_neon_vzip): Likewise gen_neon_vzip_internal.
(arm_evpc_neon_vrev): Replace the function pointer and simplify the mode
checks.
* config/arm/arm.md (neon_vext<mode>),
(neon_vrev64<mode>, neon_vrev32<mode>),
(neon_vrev16<mode>, neon_vtrn<mode>_internal),
(neon_vzip<mode>_internal, neon_vuzp<mode>_internal): Add an '@'character
before the pattern name.
* config/arm/sync.md:
(atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1),
(atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise.

From-SVN: r266404

re PR tree-optimization/86614 (duplicate -Warray-bounds for a strncpy  call with out-of-bounds offset)

PR tree-optimization/86614
* gimple-ssa-warn-restrict.c (maybe_diag_offset_bounds): Return early
if TREE_NO_WARNING is set on ref.ref.

* c-c++-common/Warray-bounds-2.c (wrap_strncpy_dstarray_diff_neg,
call_strncpy_dstarray_diff_neg): Don't expect late -Warray-bounds
warnings, just early ones from FE.  Remove dg-prune-output.
* c-c++-common/Warray-bounds-6.c: New test.

From-SVN: r266403

re PR c/53608 (Documentation could be clearer about designated initializers of unions)

2018-11-22  Sandra Loosemore  <sandra@codesourcery.com>
    Alan Coopersmith  <alan.coopersmith@oracle.com>

PR c/53608

gcc/
* doc/extend.texi (Designated Inits): Clarify handling of multiple
initializers for unions.

Co-Authored-By: Alan Coopersmith <alan.coopersmith@oracle.com>
From-SVN: r266402

Daily bump.

From-SVN: r266400

lang.opt (fpad-source): New option.

* lang.opt (fpad-source): New option.
* scanner.c (load_line): Don't pad fixed form lines if
!flag_pad_source.
* invoke.texi (-fno-pad-source): Document.

* gfortran.dg/pad_source_1.f: New test.
* gfortran.dg/pad_source_2.f: New test.
* gfortran.dg/pad_source_3.f: New test.
* gfortran.dg/pad_source_4.f: New test.
* gfortran.dg/pad_source_5.f: New test.

From-SVN: r266397

re PR lto/88142 (ICE in lto_warn at ipa-devirt.c:1020 since r265519)

PR lto/88142
* ipa-devirt.c (type_variants_equivalent_p): Drop warn and warned
parameters; do not warn here.
(odr_subtypes_equivalent_p): Likewise.
(warn_odr): Fix typo.
(warn_types_mismatch): Do not output confused warnings on integer types.
(odr_types_equivalent_p): Update.

* g++.dg/lto/odr-5_0.C: New testcase.
* g++.dg/lto/odr-5_1.C: New testcase.

From-SVN: r266396

lto.c (cmp_type_location): Remove.

* lto.c (cmp_type_location): Remove.
(lto_read_decls): Do not allocate odr_types.

From-SVN: r266395

i386.c (ix86_option_override_internal, [...]): Formatting fixes.

* config/i386/i386.c (ix86_option_override_internal,
ix86_can_inline_p, classify_argument, construct_container,
ix86_expand_prologue, ix86_expand_split_stack_prologue,
ix86_expand_carry_flag_compare, expand_set_or_movmem_via_loop,
expand_setmem_epilogue_via_loop, promote_duplicated_reg,
ix86_expand_set_or_movmem, ix86_init_builtins_va_builtins_abi):
Formatting fixes.

From-SVN: r266391

i386.c (ix86_option_override_internal): For stack_protector_guard related options...

* config/i386/i386.c (ix86_option_override_internal): For
stack_protector_guard related options, use opts_set->x_ instead
of global_options_set. and prefix options with opts->x_ .  Move
defaults for offset and reg into else block.

From-SVN: r266390

i386.c (ix86_check_avx_upper_register): Return true for all SSE registers with mode bitsize > 128.

* config/i386/i386.c (ix86_check_avx_upper_register):
Return true for all SSE registers with mode bitsize > 128.

From-SVN: r266389

odr-2_0.C: Drop dg-lto-options.

* g++.dg/lto/odr-2_0.C: Drop dg-lto-options.
* g++.dg/lto/odr-3_0.C: Likewise; harden for optimizing compilatoin.

From-SVN: r266388

re PR tree-optimization/85794 ([AArch64] ICE in expand_vector_condition in GIMPLE pass: veclower2)

PR tree-optimization/85794
* gcc.dg/vect/O3-pr85794.c: New test.

From-SVN: r266387

Improve relocation

2018-11-22  Marc Glisse  <marc.glisse@inria.fr>

PR libstdc++/87106
* include/bits/stl_algobase.h: Include <type_traits>.
(__niter_base): Add noexcept specification.
* include/bits/stl_deque.h: Include <bits/stl_uninitialized.h>.
(__is_trivially_relocatable): Specialize for deque.
* include/bits/stl_iterator.h: Include <type_traits>.
(__niter_base): Add noexcept specification.
* include/bits/stl_uninitialized.h (__is_trivially_relocatable):
Add parameter for meta-programming.
(__relocate_a_1, __relocate_a): Add noexcept specification.
* include/bits/stl_vector.h (__use_relocate): Test __relocate_a.

From-SVN: r266386

re PR rtl-optimization/87718 (FAIL: gcc.target/i386/avx512dq-concatv2si-1.c)

2018-11-22  Vladimir Makarov  <vmakarov@redhat.com>

PR rtl-optimization/87718
* ira-costs.c: Remove trailing white-spaces.
(record_operand_costs): Add a special treatment for moves
involving a hard register.

2018-11-22  Vladimir Makarov  <vmakarov@redhat.com>

PR rtl-optimization/87718
* gcc.target/i386/pr82361-1.c: Check only the first operand of
moves.

From-SVN: r266385

i386.c (ix86_avx_emit_vzeroupper): Remove.

* config/i386/i386.c (ix86_avx_emit_vzeroupper): Remove.
(ix86_emit_mode_set) <case AVX_U128>: Emit vzeroupper here.

From-SVN: r266382

Fix option values for -march.

2018-11-22  Martin Liska  <mliska@suse.cz>

* common/config/i386/i386-common.c (processor_names): Add
static assert and add missing "znver2".
(ix86_get_valid_option_values): Add checking assert for null
values and add "native" value if feasible.
* config/i386/i386.h: Do not declare size of processor_names.
* common/config/i386/i386-common.c:
* config/i386/i386.c: Add static assert for size
of processor_cost_table.

From-SVN: r266381

PR85434: Prevent spilling of stack protector guard's address on ARM

In case of high register pressure in PIC mode, address of the stack
protector's guard can be spilled on ARM targets as shown in PR85434,
thus allowing an attacker to control what the canary would be compared
against. ARM does lack stack_protect_set and stack_protect_test insn
patterns, defining them does not help as the address is expanded
regularly and the patterns only deal with the copy and test of the
guard with the canary.

This problem does not occur for x86 targets because the PIC access and
the test can be done in the same instruction. Aarch64 is exempt too
because PIC access insn pattern are mov of UNSPEC which prevents it from
the second access in the epilogue being CSEd in cse_local pass with the
first access in the prologue.

The approach followed here is to create new "combined" set and test
standard pattern names that take the unexpanded guard and do the set or
test. This allows the target to use an opaque pattern (eg. using UNSPEC)
to hide the individual instructions being generated to the compiler and
split the pattern into generic load, compare and branch instruction
after register allocator, therefore avoiding any spilling. This is here
implemented for the ARM targets. For targets not implementing these new
standard pattern names, the existing stack_protect_set and
stack_protect_test pattern names are used.

To be able to split PIC access after register allocation, the functions
had to be augmented to force a new PIC register load and to control
which register it loads into. This is because sharing the PIC register
between prologue and epilogue could lead to spilling due to CSE again
which an attacker could use to control what the canary gets compared
against.

2018-11-22  Thomas Preud'homme  <thomas.preudhomme@linaro.org>

    gcc/
    PR target/85434
    * target-insns.def (stack_protect_combined_set): Define new standard
    pattern name.
    (stack_protect_combined_test): Likewise.
    * cfgexpand.c (stack_protect_prologue): Try new
    stack_protect_combined_set pattern first.
    * function.c (stack_protect_epilogue): Try new
    stack_protect_combined_test pattern first.
    * config/arm/arm.c (require_pic_register): Add pic_reg and compute_now
    parameters to control which register to use as PIC register and force
    reloading PIC register respectively.  Insert in the stream of insns if
    possible.
    (legitimize_pic_address): Expose above new parameters in prototype and
    adapt recursive calls accordingly.  Use pic_reg if non null instead of
    cached one.
    (arm_load_pic_register): Add pic_reg parameter and use it if non null.
    (arm_legitimize_address): Adapt to new legitimize_pic_address
    prototype.
    (thumb_legitimize_address): Likewise.
    (arm_emit_call_insn): Adapt to require_pic_register prototype change.
    (arm_expand_prologue): Adapt to arm_load_pic_register prototype change.
    (thumb1_expand_prologue): Likewise.
    * config/arm/arm-protos.h (legitimize_pic_address): Adapt to prototype
    change.
    (arm_load_pic_register): Likewise.
    * config/arm/predicated.md (guard_addr_operand): New predicate.
    (guard_operand): New predicate.
    * config/arm/arm.md (movsi expander): Adapt to legitimize_pic_address
    prototype change.
    (builtin_setjmp_receiver expander): Adapt to thumb1_expand_prologue
    prototype change.
    (stack_protect_combined_set): New expander..
    (stack_protect_combined_set_insn): New insn_and_split pattern.
    (stack_protect_set_insn): New insn pattern.
    (stack_protect_combined_test): New expander.
    (stack_protect_combined_test_insn): New insn_and_split pattern.
    (arm_stack_protect_test_insn): New insn pattern.
    * config/arm/thumb1.md (thumb1_stack_protect_test_insn): New insn pattern.
    * config/arm/unspecs.md (UNSPEC_SP_SET): New unspec.
    (UNSPEC_SP_TEST): Likewise.
    * doc/md.texi (stack_protect_combined_set): Document new standard
    pattern name.
    (stack_protect_set): Clarify that the operand for guard's address is
    legal.
    (stack_protect_combined_test): Document new standard pattern name.
    (stack_protect_test): Clarify that the operand for guard's address is
    legal.

    gcc/testsuite/
    PR target/85434
    * gcc.target/arm/pr85434.c: New test.

From-SVN: r266379

re PR tree-optimization/88148 (ICE in tree_nop_conversion_p at gcc/tree.c:12550 since r264273)

2018-11-22  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88148
* tree-ssa-loop-niter.c (simplify_replace_tree): Get optional
valueization callback parameter and handle it.
* tree-ssa-loop-niter.h (simplify_replace_tree): Export.
* tree-ssa-sccvn.c (process_bb): Eliminate in loop niter trees.

* gfortran.dg/pr88148.f90: New testcase.

From-SVN: r266378

Add new maintainer script for PRs that can be closed.

2018-11-22  Martin Liska  <mliska@suse.cz>

* bugzilla-close-candidate.py: New file.

From-SVN: r266377

PR libstdc++/87520 Always pass type-punned type_info reference

The implementations of std::make_shared for -frtti and -fno-rtti are not
compatible, because they pass different arguments to
_Sp_counted_ptr_inplace::_M_get_deleter and so can't interoperate.
Either the argument doesn't match the expected value, and so the
shared_ptr::_M_ptr member is never set, or the type-punned reference is
treated as a real std::type_info object and gets dereferenced.

This patch removes the differences between -frtti and -fno-rtti, so that
typeid is never used, and the type-punned reference is used in both
cases. For backwards compatibility with existing code that passes
typeid(_Sp_make_shared_tag) that still needs to be handled, but only
after checking that the argument is not the type-punned reference (so
it's safe to treat as a real std::type_info object). The reference is
bound to an object of literal type, so that it doesn't need a guard
variable to make its initialization thread-safe.

This patch also fixes 87520 by ensuring that the type-punned reference
is bound to "a region of storage of suitable size and alignment to
contain an object of the reference's type" (as per the proposed
resolution of Core DR 453).

If all objects are built with the fixed version of GCC then -frtti and
-fno-rtti can be mixed freely and std::make_shared will work correctly.
If some objects are built with unfixed GCC versions then problems can
still arise, depending on which template instantiations are kept by the
linker.

PR libstdc++/85930
PR libstdc++/87520
* include/bits/shared_ptr_base.h (_Sp_make_shared_tag::_S_ti)
[__cpp_rtti]: Define even when RTTI is enabled. Use array of
sizeof(type_info) so that type-punned reference binds to an object
of the correct size as well as correct alignment.
(_Sp_counted_ptr_inplace::_M_get_deleter) [__cpp_rtti]: Check for
_S_ti() reference even when RTTI is enabled.
(__shared_ptr(_Sp_make_shared_tag, const _Alloc&, _Args&&...))
[__cpp_rtti]: Pass _S_ti() instead of typeid(_Sp_make_shared_tag).

From-SVN: r266376

Update changelog entry.

From-SVN: r266374

* g++.dg/lto/odr-2_0.C: Remove extra brace

From-SVN: r266373

re PR c++/87229 (ICE: tree code 'call_expr' is not supported in LTO streams)

2018-11-22  Richard Biener  <rguenther@suse.de>

PR lto/87229
PR lto/88112
* lto-streamer-out.c (lto_is_streamable): Allow CALL_EXPRs
which can appear in size expressions.
* tree-streamer-in.c (unpack_ts_base_value_fields): Stream
CALL_EXPR_BY_DESCRIPTOR.
(streamer_read_tree_bitfields): Stream CALL_EXPR_IFN.
* tree-streamer-out.c (pack_ts_base_value_fields): Stream
CALL_EXPR_BY_DESCRIPTOR.
(streamer_write_tree_bitfields): Stream CALL_EXPR_IFN.

Revert
PR lto/87229
* tree.c (free_lang_data_in_one_sizepos): Free non-gimple-val
sizepos values.

From-SVN: r266372

re PR tree-optimization/88069 (ICE in check_loop_closed_ssa_def, at tree-ssa-loop-manip.c:709)

2018-11-22  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88069
* tree-ssa-sccvn.c (visit_phi): Tweak previous fix to not
apply to default defs.

From-SVN: r266371

re PR target/85644 (-fstack-protector generates invalid read to %fs:0x0 on mac)

PR target/85644
PR target/86832
* config/i386/i386.c (ix86_option_override_internal): Default
ix86_stack_protector_guard to SSP_TLS only if TARGET_THREAD_SSP_OFFSET
is defined.
* config/i386/i386.md (stack_protect_set, stack_protect_set_<mode>,
stack_protect_test, stack_protect_test_<mode>): Use empty condition
instead of TARGET_SSP_TLS_GUARD.

From-SVN: r266370

re PR c++/87386 (Error message for static_assert show wrong range)

PR c++/87386
* parser.c (cp_parser_operator): Use str.get_value () instead of just
str in USERDEF_LITERAL_VALUE and USERDEF_LITERAL_SUFFIX_ID arguments.

From-SVN: r266369

Do not mix -fsanitize=thread and -mabi=ms (PR sanitizer/88017).

2018-11-22  Martin Liska  <mliska@suse.cz>

PR sanitizer/88017
* config/i386/i386.c (ix86_option_override_internal):
2018-11-22  Martin Liska  <mliska@suse.cz>

PR sanitizer/88017
* gcc.dg/tsan/pr88017.c: New test.

From-SVN: r266368

Replace sync builtins with atomic builtins

The old __sync builtins have been deprecated for a long time now in
favor of the __atomic builtins following the C++11/C11 memory model.
This patch converts libgfortran to use the modern __atomic builtins.

At the same time I weakened the consistency to relaxed for
incrementing and decrementing the counter, and acquire-release when
decrementing to check whether the counter is 0 and the unit can be
freed.  This is similar to e.g. std::shared_ptr in C++.

Regtested on x86_64-pc-linux-gnu.

libgfortran/ChangeLog:

2018-11-22  Janne Blomqvist  <jb@gcc.gnu.org>

* acinclude.m4 (LIBGFOR_CHECK_ATOMIC_FETCH_ADD): Rename and test
presence of atomic builtins instead of sync builtins.
* configure.ac (LIBGFOR_CHECK_ATOMIC_FETCH_ADD): Call new test.
* io/io.h (inc_waiting_locked): Use __atomic_fetch_add.
(predec_waiting_locked): Use __atomic_add_fetch.
(dec_waiting_unlocked): Use __atomic_fetch_add.
* config.h.in: Regenerated.
* configure: Regenerated.
        * Makefile.in: Regenerated.

From-SVN: r266367

re PR d/87824 (x86_64-linux multilib issues)

libphobos/ChangeLog:

2018-11-22  Johannes Pfau  <johannespfau@gmail.com>

PR d/87824
* testsuite/libphobos.shared/shared.exp: Set proper path to phobos
library for multilib builds.

From-SVN: r266366

Daily bump.

From-SVN: r266364

[libbacktrace] Factor out read_initial_length

Factor out new function read_initial_length in dwarf.c.

Bootstrapped and reg-tested on x86_64.

2018-11-22  Tom de Vries  <tdevries@suse.de>

* dwarf.c (read_initial_length): Factor out of ...
(build_address_map, read_line_info): ... here.

From-SVN: r266361

re PR c++/88122 (g++ ICE: internal compiler error: Segmentation fault)

PR c++/88122
* method.c (maybe_explain_implicit_delete): If
FUNCTION_FIRST_USER_PARMTYPE (decl) is NULL, set const_p to false
instead of ICEing.

* g++.dg/cpp0x/implicit15.C: New test.

From-SVN: r266360

re PR c++/87386 (Error message for static_assert show wrong range)

PR c++/87386
* parser.c (cp_parser_primary_expression): Use
id_expression.get_location () instead of id_expr_token->location.
Adjust the range from id_expr_token->location to
id_expressio.get_finish ().
(cp_parser_operator_function_id): Pass location of the operator
token down to cp_parser_operator.
(cp_parser_operator): Add start_loc argument, always construct a
location with caret at start_loc and range from start_loc to the
finish of the last token.
gcc/testsuite/
* g++.dg/diagnostic/pr87386.C: New test.
* g++.dg/parse/error17.C: Adjust expected diagnostics.
libstdc++-v3/
* testsuite/20_util/scoped_allocator/69293_neg.cc: Adjust expected
line.
* testsuite/20_util/uses_allocator/cons_neg.cc: Likewise.
* testsuite/20_util/uses_allocator/69293_neg.cc: Likewise.
* testsuite/experimental/propagate_const/requirements2.cc: Likewise.
* testsuite/experimental/propagate_const/requirements3.cc: Likewise.
* testsuite/experimental/propagate_const/requirements4.cc: Likewise.
* testsuite/experimental/propagate_const/requirements5.cc: Likewise.

From-SVN: r266359

Revert the revert:

2013-10-26  Vladimir Makarov  <vmakarov@redhat.com>

Revert:
2013-10-25  Vladimir Makarov  <vmakarov@redhat.com>

* lra-spills.c (lra_final_code_change): Remove useless move insns.

From-SVN: r266358

re PR rtl-optimization/85925 (compilation of masking with 257 goes wrong in combine at -02)

PR rtl-optimization/85925
* gcc.c-torture/execute/20181120-1.c: Require effective target
int32plus.
(u): New variable.
(main): Compare d against u.f1 rather than 0x101.  Use 0x4030201
instead of 0x10101.

From-SVN: r266357

re PR middle-end/88129 (Two blockage insns are emited in the function epilogue)

PR middle-end/88129
* function.c (expand_function_end): Do not emit extra blockage insn.

From-SVN: r266356

re PR target/85667 (ms_abi rules aren't followed when returning short structs with float values)

PR target/85667
* config/i386/i386.c (function_value_ms_64): Return AX_REG instead
of FIRST_SSE_REG for 4 or 8 byte modes.

testsuite/ChangeLog:

PR target/85667
* gcc.target/pr85667-1.c: New testcase.
* gcc.target/pr85667-2.c: New testcase.
* gcc.target/pr85667-3.c: New testcase.
* gcc.target/pr85667-4.c: New testcase.

From-SVN: r266355

* invoke.texi (-fdec-include): Document.

From-SVN: r266354

PR libstdc++/88111 Make maximum block size depend on size_t width

PR libstdc++/88111
* include/std/memory_resource (pool_options): Add Doxygen comments.
* src/c++17/memory_resource.cc (pool_sizes): Only use suitable values
on targets with 16-bit or 20-bit size_t type.
(munge_options): Make default values depend on width of size_t type.

From-SVN: r266353

PR libstdc++/88113 use size_type consistently instead of size_t

On 16-bit msp430-elf size_t is either 16 bits or 20 bits, and so can't
represent all values of the uint32_t type used for bitset::size_type.
Using the smaller of size_t and uint32_t for size_type ensures it fits
in size_t.

PR libstdc++/88113
* src/c++17/memory_resource.cc (bitset::size_type): Use the smaller
of uint32_t and size_t.
(bitset::size(), bitset::free(), bitset::update_next_word())
(bitset::max_blocks_per_chunk(), bitset::max_word_index()): Use
size_type consistently instead of size_t.
(chunk): Adjust static_assert checking sizeof(chunk).

From-SVN: r266352

re PR ipa/87957 (ICE tree check: expected tree that contains ‘decl minimal’ structure, have ‘identifier_node’ in warn_odr, at ipa-devirt.c:1051 since r265519)

PR lto/87957
* g++.dg/lto/odr-1_0.C: Extend by mismatched enum.
* g++.dg/lto/odr-1_1.C: Extend by mismatched enum.
* g++.dg/lto/odr-2_0.C: New.
* g++.dg/lto/odr-2_0.C: New.
* g++.dg/lto/odr-3_1.C: New.
* g++.dg/lto/odr-3_1.C: New.

From-SVN: r266351

re PR ipa/87957 (ICE tree check: expected tree that contains ‘decl minimal’ structure, have ‘identifier_node’ in warn_odr, at ipa-devirt.c:1051 since r265519)

PR lto/87957
* tree.c (fld_decl_context): Break out from ...
(free_lang_data_in_decl): ... here; free TREE_PUBLIC, TREE_PRIVATE
DECL_ARTIFICIAL of TYPE_DECL; do not free TREE_TYPE of TYPE_DECL.
(fld_incomplete_type_of): Build copy of TYP_DECL.
* ipa-devirt.c (free_enum_values): Rename to ...
(free_odr_warning_data): ... this one; free also duplicated TYPE_DECLs
and TREE_TYPEs of TYPE_DECLs.
(get_odr_type): Initialize odr_vtable_hash if needed.

From-SVN: r266350

compute discriminator info for overrides

In some cases of overriding or resetting locations, we might retain
discriminator info from earlier locations, when we should take
discriminator information from the overriding location or reset it.

for  gcc/ChangeLog

* final.c (compute_discriminator): Declare.  Renamed from...
(maybe_set_discriminator): ... this.  Set and return a local.
(override_discriminator): New.
(final_scan_insn_1): Set it.
(notice_source_line): Adjust.  Always set discriminator.

From-SVN: r266349

re PR c++/87393 (gcc/cp/parser.c:13967:37:Unused Entity Issue: expression result unused: -Wunused-value since r251026)

PR c++/87393
* parser.c (cp_parser_linkage_specification): Remove useless
dereference of the consume_open method result.

From-SVN: r266347

re PR target/87839 (ICE in final_scan_insn_1, at final.c:3070)

PR target/87839
* config/aarch64/atomics.md (@aarch64_compare_and_swap<mode>): Use
rIJ constraint for aarch64_plus_operand rather than rn.

* gcc.target/aarch64/pr87839.c: New test.

From-SVN: r266346

[PATCH][PR84877]Dynamically align the address for local parameter copy on the stack when required alignment is larger than MAX_SUPPORTED_STACK_ALIGNMENT

As described in PR84877. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84877
The local copy of parameter on stack is not aligned.

For BLKmode paramters, a local copy on the stack will be saved.
There are three cases:
1) arguments passed partially on the stack, partially via registers.
2) arguments passed fully on the stack.
3) arguments passed via registers.

After the change here, in all three cases, the stack slot for the local
parameter copy is aligned by the data type.
The stack slot is the DECL_RTL of the parameter. All the references thereafter
in the function will refer to this RTL.

To populate the local copy on the stack,
For case 1) and 2), there are operations to move data from the caller's stack
(from incoming rtl) into callee's stack.
For case 3), the registers are directly saved into the stack slot.

In all cases, the destination address is properly aligned.
But for case 1) and case 2), the source address is not aligned by the type.
It is defined by the PCS how the arguments are prepared.
The block move operation is fulfilled by emit_block_move (). As far as I can see,
it will use the smaller alignment of source and destination.
This looks fine as long as we don't use instructions which requires a strict
larger alignment than the address actually has.

Here, it only changes receiving parameters.
The function assign_stack_local_1 will be called in various places.
Usually, the caller will constraint the ALIGN parameter.
For example via STACK_SLOT_ALIGNMENT macro.
assign_parm_setup_block will call assign_stack_local () with alignment from the
parameter type which in this case could be
larger than MAX_SUPPORTED_STACK_ALIGNMENT.

The alignment operation for parameter copy on the stack is similar to stack vars.
First, enough space is reserved on the stack. The size is fixed at compile time.
Instructions are emitted to dynamically get an aligned address at runtime
within this piece of memory.

This will unavoidably increase the usage of stack. However, it really depends on
how many over-aligned parameters are passed by value.

gcc/

2018-11-21  Renlin Li  <renlin.li@arm.com>

PR middle-end/84877
* explow.h (get_dynamic_stack_size): Declare it as external.
* explow.c (record_new_stack_level): Remove function static attribute.
* function.c (assign_stack_local_1): Dynamically align the stack slot
addr for parameter copy on the stack.

gcc/testsuite/

2018-11-21  Renlin Li  <renlin.li@arm.com>

PR middle-end/84877
* gcc.dg/pr84877.c: New.

From-SVN: r266345

re PR bootstrap/88133 (Build fails with host GCC < 4.3)

2018-11-21  Richard Biener  <rguenther@suse.de>

PR bootstrap/88133
* bitmap.c (bitmap_last_set_bit): Refactor to avoid warning.
* Makefile.in (bitmap.o-warn): Remove again.

From-SVN: r266344

re PR tree-optimization/88069 (ICE in check_loop_closed_ssa_def, at tree-ssa-loop-manip.c:709)

2018-11-20  Jeff Law  <law@redhat.com>

PR tree-optimization/88069
* tree-ssa-dom.c (record_equivalences_from_phis): Propagate away
degenerate virtual PHIs.

From-SVN: r266343

x86: Add pmovzx/pmovsx patterns with memory operands

Many x86 pmovzx/pmovsx instructions with memory operands are modeled in
a wrong way.  For example:

(define_insn "sse4_1_<code>v8qiv8hi2<mask_name>"
  [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,v")
    (any_extend:V8HI
      (vec_select:V8QI
        (match_operand:V16QI 1 "nonimmediate_operand" "Yrm,*xm,vm")
        (parallel [(const_int 0) (const_int 1)
               (const_int 2) (const_int 3)
               (const_int 4) (const_int 5)
               (const_int 6) (const_int 7)]))))]

should be defind for memory operands as:

(define_insn "sse4_1_<code>v8qiv8hi2<mask_name>"
  [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,v")
    (any_extend:V8HI
      (match_operand:V8QI "memory_operand" "m,m,m")))]

This patch updates them to

(define_insn "sse4_1_<code>v8qiv8hi2<mask_name>"
  [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,v")
(any_extend:V8HI
  (vec_select:V8QI
    (match_operand:V16QI 1 "register_operand" "Yr,*x,v")
    (parallel [(const_int 0) (const_int 1)
       (const_int 2) (const_int 3)
       (const_int 4) (const_int 5)
       (const_int 6) (const_int 7)]))))]

(define_insn "*sse4_1_<code>v8qiv8hi2<mask_name>_1"
  [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,v")
(any_extend:V8HI
  (match_operand:V8QI "subreg_memory_operand" "m,m,m")))]

with a splitter:

(define_insn_and_split "*sse4_1_<code>v8qiv8hi2<mask_name>_2"
  [(set (match_operand:V8HI 0 "register_operand")
        (any_extend:V8HI
          (vec_select:V8QI
            (subreg:V16QI
              (vec_concat:V2DI
                (match_operand:DI 1 "memory_operand")
                (const_int 0)) 0)
            (parallel [(const_int 0) (const_int 1)
                       (const_int 2) (const_int 3)
                       (const_int 4) (const_int 5)
                       (const_int 6) (const_int 7)]))))]
  "TARGET_SSE4_1
   && <mask_avx512bw_condition>
   && <mask_avx512vl_condition>
  "&& can_create_pseudo_p ()"
  "#"
  "&& 1"
  [(set (match_dup 0)
        (any_extend:V8HI (match_dup 1)))]
  "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")

This patch requires updating apply_subst_iterator to handle
define_insn_and_split.

gcc/

PR target/87317
* config/i386/sse.md (sse4_1_<code>v8qiv8hi2<mask_name>): Replace
nonimmediate_operand with register_operand.
(avx2_<code>v8qiv8si2<mask_name>): Likewise.
(sse4_1_<code>v4qiv4si2<mask_name>): Likewise.
(sse4_1_<code>v4hiv4si2<mask_name>): Likewise.
(sse4_1_<code>v2qiv2di2<mask_name>): Likewise.
(avx512f_<code>v8qiv8di2<mask_name>): Likewise.
(avx2_<code>v4qiv4di2<mask_name>): Likewise.
(avx2_<code>v4hiv4di2<mask_name>): Likewise.
(sse4_1_<code>v2hiv2di2<mask_name>): Likewise.
(sse4_1_<code>v2siv2di2<mask_name>): Likewise.
(*sse4_1_<code>v8qiv8hi2<mask_name>_1): New pattern.
(*sse4_1_<code>v8qiv8hi2<mask_name>_2): Likewise.
(*avx2_<code>v8qiv8si2<mask_name>_1): Likewise.
(*avx2_<code>v8qiv8si2<mask_name>_2): Likewise.
(*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
(*sse4_1_<code>v4qiv4si2<mask_name>_2): Likewise.
(*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
(*sse4_1_<code>v4hiv4si2<mask_name>_2): Likewise.
(*avx512f_<code>v8qiv8di2<mask_name>_1): Likewise.
(*avx512f_<code>v8qiv8di2<mask_name>_2): Likewise.
(*avx2_<code>v4qiv4di2<mask_name>_1): Likewise.
(*avx2_<code>v4qiv4di2<mask_name>_2): Likewise.
(*avx2_<code>v4hiv4di2<mask_name>_1): Likewise.
(*avx2_<code>v4hiv4di2<mask_name>_2): Likewise.
(*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
(*sse4_1_<code>v2hiv2di2<mask_name>_2): Likewise.
(*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
(*sse4_1_<code>v2siv2di2<mask_name>_2): Likewise.

gcc/testsuite/

PR target/87317
* gcc.target/i386/pr87317-1.c: New file.
* gcc.target/i386/pr87317-2.c: Likewise.
* gcc.target/i386/pr87317-3.c: Likewise.
* gcc.target/i386/pr87317-4.c: Likewise.
* gcc.target/i386/pr87317-5.c: Likewise.
* gcc.target/i386/pr87317-6.c: Likewise.
* gcc.target/i386/pr87317-7.c: Likewise.
* gcc.target/i386/pr87317-8.c: Likewise.
* gcc.target/i386/pr87317-9.c: Likewise.
* gcc.target/i386/pr87317-10.c: Likewise.
* gcc.target/i386/pr87317-11.c: Likewise.
* gcc.target/i386/pr87317-12.c: Likewise.
* gcc.target/i386/pr87317-13.c: Likewise.

From-SVN: r266342

apply_subst_iterator: Handle define_split/define_insn_and_split

* read-rtl.c (apply_subst_iterator): Handle define_split and
define_insn_and_split.

From-SVN: r266341

re PR rtl-optimization/87817 (gcc.target/i386/bmi2-bzhi-2.c execution test)

PR rtl-optimization/87817
* config/i386/i386.md (bmi2_bzhi_<mode>3, *bmi2_bzhi_<mode>3,
*bmi2_bzhi_<mode>3_1, *bmi2_bzhi_<mode>3_1_ccz): Use IF_THEN_ELSE
in the pattern to avoid triggering UB when operands[2] is zero.
(tbm_bextri_<mode>): New expander.  Renamed the old define_insn to ...
(*tbm_bextri_<mode>): ... this.

From-SVN: r266340

[libbacktrace] Factor out read_string

Factor out new function read_string in dwarf.c.

Bootstrapped and reg-tested on x86_64.

2018-11-21  Tom de Vries  <tdevries@suse.de>

* dwarf.c (read_string): Factor out of ...
(read_attribute, read_line_header, read_line_program): ... here.

From-SVN: r266339

[driver] Ensure --help=params lines end with period

Ensure that gcc --help=params lines end with a period by:
- fixing the help message of param HOT_BB_COUNT_FRACTION, and
- adding a test-case.

Build and tested on x86_64.

2018-11-21  Tom de Vries  <tdevries@suse.de>

PR driver/79855
* params.def (HOT_BB_COUNT_FRACTION): Terminate help message with
period.

* lib/options.exp (check_for_options_with_filter): New proc.
* gcc.misc-tests/help.exp: Check that --help=params lines end with
period.

From-SVN: r266338

lang.opt (fdec-include): New option.

* lang.opt (fdec-include): New option.
* options.c (set_dec_flags): Set also flag_dec_include.
* scanner.c (include_line): Change return type from bool to int.
In fixed form allow spaces in between include keyword letters.
For -fdec-include, allow in fixed form 0 in column 6.  With
-fdec-include return -1 if the parsed line is not full include
statement and it could be successfully completed on continuation
lines.
(include_stmt): New function.
(load_file): Adjust include_line caller.  If it returns -1, keep
trying include_stmt until it stops returning -1 whenever adding
further line of input.

* gfortran.dg/include_10.f: New test.
* gfortran.dg/include_10.inc: New file.
* gfortran.dg/include_11.f: New test.
* gfortran.dg/include_12.f: New test.
* gfortran.dg/include_13.f90: New test.
* gfortran.dg/gomp/include_1.f: New test.
* gfortran.dg/gomp/include_1.inc: New file.
* gfortran.dg/gomp/include_2.f90: New test.

Co-Authored-By: Mark Eggleston <mark.eggleston@codethink.com>
From-SVN: r266337

S/390: Support vector load/store alignment hints

The IBM z14 POP adds an optional alignment operand to the vl, vst,
vlm, and vstm instruction (vector loads and stores). Vectors residing
on 8 or 16 byte boundaries might get loaded or stored faster on some
models given the instruction uses the proper hint operand.  A wrong
hint will hurt performance though.

The attached testcase align-1 currently fails due to:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88085

gcc/ChangeLog:

2018-11-21  Andreas Krebbel  <krebbel@linux.ibm.com>

* configure.ac: Add check for Binutils to determine whether vector
load/store alignments hints are being supported.
* config.in: Regenerate.
* configure: Regenerate.
* config/s390/s390.c (print_operand): Support new output
modifier A.
* config/s390/s390.md ("movti"): Append alignment hint output
using the new output modifier 'A'.
* config/s390/vector.md ("mov<mode>", "*vec_tf_to_v1tf")
("*vec_ti_to_v1ti"): Likewise.

gcc/testsuite/ChangeLog:

2018-11-21  Andreas Krebbel  <krebbel@linux.ibm.com>

* gcc.target/s390/vector/align-1.c: New test.
* gcc.target/s390/vector/align-2.c: New test.

From-SVN: r266336

c-parser.c (c_parser_has_attribute_expression): New function.

gcc/c/ChangeLog:

* c-parser.c (c_parser_has_attribute_expression): New function.
(c_parser_attribute): New function.
(c_parser_attributes): Move code into c_parser_attribute.
(c_parser_unary_expression): Handle RID_HAS_ATTRIBUTE_EXPRESSION.

gcc/c-family/ChangeLog:

* c-attribs.c (type_for_vector_size): New function.
(type_valid_for_vector_size): Same.
(handle_vector_size_attribute): Move code to the functions above
and call them.
(validate_attribute, has_attribute): New functions.
* c-common.h (has_attribute): Declare.
(rid): Add RID_HAS_ATTRIBUTE_EXPRESSION.
* c-common.c (c_common_resword): Same.

gcc/cp/ChangeLog:

* cp-tree.h (cp_check_const_attributes): Declare.
* decl2.c (cp_check_const_attributes): Declare extern.
* parser.c (cp_parser_has_attribute_expression): New function.
(cp_parser_unary_expression): Handle RID_HAS_ATTRIBUTE_EXPRESSION.
(cp_parser_gnu_attribute_list): Add argument.

gcc/ChangeLog:

* doc/extend.texi (Other Builtins): Add __builtin_has_attribute.

gcc/testsuite/ChangeLog:

* c-c++-common/builtin-has-attribute-2.c: New test.
* c-c++-common/builtin-has-attribute-3.c: New test.
* c-c++-common/builtin-has-attribute-4.c: New test.
* c-c++-common/builtin-has-attribute.c: New test.
* gcc.dg/builtin-has-attribute.c: New test.
* gcc/testsuite/gcc.target/i386/builtin-has-attribute.c: New test.

From-SVN: r266335

re PR lto/84044 (Spurious -Wodr warning with -flto)

PR lto/84044
* ipa-devirt.c (odr_types_equivalent_p): Use operand_equal_p to
compare ENUM values.
* g++.dg/lto/odr-4_0.C: New testcase.
* g++.dg/lto/odr-4_1.C: New testcase.

From-SVN: r266334

re PR go/88060 (../../../gcc-8.2.0/libgo/go/syscall/libcall_linux_utimesnano.go:17:18: error: reference to undefined name ‘_AT_FDCWD’)

PR go/88060
    syscall: always define _AT_FDCWD and IPv6MTUInfo

    They aren't defined by old versions of glibc, but are required by the
    code in syscall_linux.go.

    Reviewed-on: https://go-review.googlesource.com/c/150697

From-SVN: r266333

Daily bump.

From-SVN: r266332

re PR c++/88110 (ICE (segfault) with -std=C++2a in cxx_eval_constant_expression when trying to evaluate nonoverridden "virtual ... = 0" function of a base class)

PR c++/88110
* constexpr.c (cxx_eval_constant_expression) <case OBJ_TYPE_REF>: Punt
if get_base_address of ADDR_EXPR operand is not a DECL_P.

* g++.dg/cpp2a/constexpr-virtual13.C: New test.

From-SVN: r266329

re PR tree-optimization/87895 (ICE in purge_dead_edges, at cfgrtl.c:3246)

PR tree-optimization/87895
* omp-simd-clone.c (ipa_simd_modify_function_body): When removing
or replacing GIMPLE_RETURN, set EDGE_FALLTHRU on the edge to EXIT.
(simd_clone_adjust): Don't set EDGE_FALLTHRU here. In a loop that
redirects edges to EXIT to edges to incr_bb, iterate while EXIT
has any preds and always use EDGE_PRED (, 0).

* gcc.dg/gomp/pr87895-1.c: New test.
* gcc.dg/gomp/pr87895-2.c: New test.
* gcc.dg/gomp/pr87895-3.c: New test.

From-SVN: r266328

re PR target/88070 (ICE in create_pre_exit, at mode-switching.c:438)

PR target/88070
* mode-switching.c (create_pre_exit): After reload, always split the
fallthrough edge to the exit block.

testsuite/ChangeLog:

PR target/88070
* gcc.target/i386/pr88070.c: New test.

From-SVN: r266326

ipa-devirt.c (add_type_duplicate): Do not ICE on incomplete enums.

* ipa-devirt.c (add_type_duplicate): Do not ICE on incomplete enums.
* tree.c (build_array_type_1): Forward declare.
(fld_type_variant_equal_p): Add INNER_TYPE parameter.
(fld_type_variant): Likewise.
(fld_simplified_types): New hash.
(fld_process_array_type): New function.
(fld_incomplete_type_of): Handle array and enumeration types.
(fld_simplified_type): Handle simplification of arrays.
(free_lang_data): Allocate and free simplified types hash.

From-SVN: r266325

Fix missing commit log.

From-SVN: r266323

re PR ipa/87957 (ICE tree check: expected tree that contains ‘decl minimal’ structure, have ‘identifier_node’ in warn_odr, at ipa-devirt.c:1051 since r265519)

PR lto/87957
* ipa-devirt.c (odr_subtypes_equivalent_p): Report ODR violation
when sybtype already violates ODR.
(get_odr_type): Do not ICE when insert is false and type duplicate
is not registered yet.
(register_odr_type): Be sure to register subtypes first.

From-SVN: r266322

S/390: Fix flogr RTX.

The flogr instruction uses a 64 bit register pair target operand.  In
the RTX we model this as a write to a TImode register.  Unfortunately
the RTX's being assigned to the two parts of the target operand were
swapped.  This is no problem if in the end the flogr instruction will
be emitted since the instruction still does what the clzdi expander
expects.  However, a problem arises when the RTX is used to optimize
CLZ for a constant input operand.  Even then it matters only if the
expression couldn't be folded on tree level already.

In the testcase this happened thanks to loop unrolling on RTL level.
The iteration variable is used as an argument to the clz
builtin. Due to the loop unrolling it becomes a constant and after
folding the broken RTX leads to a wrong assumption.

gcc/ChangeLog:

2018-11-20  Andreas Krebbel  <krebbel@linux.ibm.com>

* config/s390/s390.md ("clztidi2"): Swap the RTX's written to the
DImode parts of the target operand.

gcc/testsuite/ChangeLog:

2018-11-20  Andreas Krebbel  <krebbel@linux.ibm.com>

* gcc.target/s390/flogr-1.c: New test.

From-SVN: r266321

re PR ipa/87706 (Inlined functions trigger invalid -Wmissing-profile warning)

PR ipa/87706
* ipa-fnsummary.c (pass_ipa_fnsummary): Do not remove functions
* ipa.c (possible_inline_candidate_p): Break out from ..
(process_references): ... here ; drop before_inlining_p;
cleanup handling of alises.
(walk_polymorphic_call_targets): Likewise.
(symbol_table::remove_unreachable_nodes): Likewise.
* passes.c (pass_data_ipa_remove_symbols): New structure.
(pass_ipa_remove_symbols): New pass.
(make_pass_ipa_remove_symbols): New function.
* tree-pass.h (make_pass_ipa_remove_symbols): Declare.
* passes.def (pass_ipa_remove_symbols): Schedule after early passes.

From-SVN: r266320

re PR tree-optimization/87926 (bad array-index warning breaks --disable-checking bootstrap)

PR 87926
* Makefile.in (bitmap.o-warn): Use -Wno-error=array-bounds.

From-SVN: r266319

re PR lto/87997 (ICE in cp_var_mod_type_p at gcc/cp/cp-objcp-common.c:107 since r265870)

PR lto/87997
* tree.c (free_lang_data_in_cgraph): Add argument fld; break out
type checking to...
(free_lang_data) ... here; update call of free_lang_data_in_cgraph.

From-SVN: r266316

re PR ipa/87706 (Inlined functions trigger invalid -Wmissing-profile warning)

PR ipa/87706
* ipa-fnsummary.c (pass_ipa_fnsummary): Do not remove functions
* ipa.c (possible_inline_candidate_p): Break out from ..
(process_references): ... here ; drop before_inlining_p;
cleanup handling of alises.
(walk_polymorphic_call_targets): Likewise.
(symbol_table::remove_unreachable_nodes): Likewise.
* passes.c (pass_data_ipa_remove_symbols): New structure.
(pass_ipa_remove_symbols): New pass.
(make_pass_ipa_remove_symbols): New functoin.
* passes.def (pass_ipa_remove_symbols): Schedule after early passes.

From-SVN: r266315

tree-vect-stmts.c (vectorizable_condition): Do not get at else_clause vect def for EXTRACT_LAST_REDUCTION.

2018-11-20  Richard Biener  <rguenther@suse.de>

* tree-vect-stmts.c (vectorizable_condition): Do not get
at else_clause vect def for EXTRACT_LAST_REDUCTION.  Remove
pointless vect_is_simple_use calls.

From-SVN: r266314

re PR tree-optimization/88074 (g++ hangs on math expression)

2018-11-20  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88074
* tree-ssa-dom.c (pass_dominator::execute): Do not walk
backedges.

* gcc.dg/pr88074.c: New testcase.

From-SVN: r266313

Move some i386 C++ tests into g++.target/i386.

2018-11-20  Martin Liska  <mliska@suse.cz>

* pr57362.C: Move to g++.target/i386 folder.
* pr57548.C: Likewise.
* pr59492.C: Likewise.
* pr82625.C: Likewise.
* pr85329-2.C: Likewise.
* pr85329.C: Likewise.

From-SVN: r266312

Housekeeping for the effective targets of optional's tests.

* testsuite/20_util/optional/77288.cc: Adjust.
* testsuite/20_util/optional/84601.cc: Likewise.
* testsuite/20_util/optional/assignment/1.cc: Likewise.
* testsuite/20_util/optional/assignment/2.cc: Likewise.
* testsuite/20_util/optional/assignment/3.cc: Likewise.
* testsuite/20_util/optional/assignment/4.cc: Likewise.
* testsuite/20_util/optional/assignment/5.cc: Likewise.
* testsuite/20_util/optional/assignment/6.cc: Likewise.
* testsuite/20_util/optional/assignment/7.cc: Likewise.
* testsuite/20_util/optional/assignment/8.cc: Likewise.
* testsuite/20_util/optional/cons/77727.cc: Likewise.
* testsuite/20_util/optional/cons/copy.cc: Likewise.
* testsuite/20_util/optional/cons/deduction.cc: Likewise.
* testsuite/20_util/optional/cons/default.cc: Likewise.
* testsuite/20_util/optional/cons/move.cc: Likewise.
* testsuite/20_util/optional/cons/trivial.cc: Likewise.
* testsuite/20_util/optional/cons/value.cc: Likewise.
* testsuite/20_util/optional/cons/value_neg.cc: Likewise.
* testsuite/20_util/optional/constexpr/cons/default.cc: Likewise.
* testsuite/20_util/optional/constexpr/cons/value.cc: Likewise.
* testsuite/20_util/optional/constexpr/in_place.cc: Likewise.
* testsuite/20_util/optional/constexpr/nullopt.cc: Likewise.
* testsuite/20_util/optional/constexpr/observers/1.cc: Likewise.
* testsuite/20_util/optional/constexpr/observers/4.cc: Likewise.
* testsuite/20_util/optional/constexpr/observers/5.cc: Likewise.
* testsuite/20_util/optional/constexpr/relops/1.cc: Likewise.
* testsuite/20_util/optional/constexpr/relops/2.cc: Likewise.
* testsuite/20_util/optional/constexpr/relops/3.cc: Likewise.
* testsuite/20_util/optional/constexpr/relops/4.cc: Likewise.
* testsuite/20_util/optional/constexpr/relops/5.cc: Likewise.
* testsuite/20_util/optional/constexpr/relops/6.cc: Likewise.
* testsuite/20_util/optional/in_place.cc: Likewise.
* testsuite/20_util/optional/make_optional.cc: Likewise.
* testsuite/20_util/optional/nullopt.cc: Likewise.
* testsuite/20_util/optional/observers/1.cc: Likewise.
* testsuite/20_util/optional/observers/2.cc: Likewise.
* testsuite/20_util/optional/observers/3.cc: Likewise.
* testsuite/20_util/optional/observers/4.cc: Likewise.
* testsuite/20_util/optional/observers/5.cc: Likewise.
* testsuite/20_util/optional/observers/6.cc: Likewise.
* testsuite/20_util/optional/relops/1.cc: Likewise.
* testsuite/20_util/optional/relops/2.cc: Likewise.
* testsuite/20_util/optional/relops/3.cc: Likewise.
* testsuite/20_util/optional/relops/4.cc: Likewise.
* testsuite/20_util/optional/relops/5.cc: Likewise.
* testsuite/20_util/optional/relops/6.cc: Likewise.
* testsuite/20_util/optional/relops/7.cc: Likewise.
* testsuite/20_util/optional/requirements.cc: Likewise.
* testsuite/20_util/optional/swap/1.cc: Likewise.
* testsuite/20_util/optional/swap/2.cc: Likewise.
* testsuite/20_util/optional/typedefs.cc: Likewise.

From-SVN: r266310

re PR bootstrap/88106 (Bootstrap failure on mingw32)

PR bootstrap/88106
* config/mingw32/affinity-fmt.c: New file.

From-SVN: r266309

re PR tree-optimization/88069 (ICE in check_loop_closed_ssa_def, at tree-ssa-loop-manip.c:709)

2018-11-20  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88069
* tree-ssa-sccvn.c (visit_phi): Do not value-number to unvisited
virtual PHI arguments.

* gcc.dg/pr88069.c: New testcase.

From-SVN: r266308

Add -fomit-frame-pointer to a test-case (PR ipa/88093).

2018-11-20  Martin Liska  <mliska@suse.cz>

PR ipa/88093
* gcc.target/i386/ipa-stack-alignment.c: Add
-fomit-frame-pointer.

From-SVN: r266307

S/390: Skip LT(G) peephole when literal pool is involved

By the time peephole optimizations run, we've already made up our mind
whether to use base-register or relative addressing for literal pool
entries.  LT(G) supports only base-register addressing, and so it is
too late to convert L(G)RL + compare to LT(G).  This change should not
make the code worse unless building with e.g. -fno-dce, since comparing
literal pool entries to zero should be optimized away during earlier
passes.

gcc/ChangeLog:

2018-11-20  Ilya Leoshkevich  <iii@linux.ibm.com>

PR target/88083
* config/s390/s390.md: Skip LT(G) peephole when literal pool is
involved.
* rtl.h (contains_constant_pool_address_p): New function.
* rtlanal.c (contains_constant_pool_address_p): Likewise.

gcc/testsuite/ChangeLog:

2018-11-20  Ilya Leoshkevich  <iii@linux.ibm.com>

PR target/88083
* gcc.target/s390/pr88083.c: New test.

From-SVN: r266306

re PR middle-end/83215 (C++: struct with char-array assumed to alias with everything)

2018-11-20  Richard Biener  <rguenther@suse.de>

PR middle-end/83215
* alias.c (component_uses_parent_alias_set_from): Remove
alias-set zero and TYPE_TYPELESS_STORAGE case both already
handled in other ways.

* g++.dg/tree-ssa/pr83215.C: New testcase.

From-SVN: r266305

re PR rtl-optimization/85925 (compilation of masking with 257 goes wrong in combine at -02)

PR rtl-optimization/85925
* rtl.h (word_register_operation_p): New predicate.
* combine.c (record_dead_and_set_regs_1): Only apply specific handling
for WORD_REGISTER_OPERATIONS targets to word_register_operation_p RTX.
* rtlanal.c (nonzero_bits1): Likewise.  Adjust couple of comments.
(num_sign_bit_copies1): Likewise.

From-SVN: r266302

re PR lto/88087 (ICE in execute at tree-ssa-pre.c:4220 since r266183)

2018-11-20  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88087
* tree-ssa-pre.c (create_expression_by_pieces): Re-materialize
call fntype.
* tree-ssa-sccvn.c (copy_reference_ops_from_call): Remember
call fntype.

* gcc.dg/tree-ssa/pr88087.c: New testcase.

From-SVN: r266301

re PR bootstrap/88089 (build failure with GCC 4.9 on SPARC/Solaris)

2018-11-20  Richard Biener  <rguenther@suse.de>

PR middle-end/88089
* tree-data-ref.c (lambda_matrix_right_hermite): Use abs_hwi.

From-SVN: r266300

align-3.c: Skip if pdp11.

    * gcc.c-torture/execute/align-3.c: Skip if pdp11.
    * gcc.c-torture/execute/pr23467.c: Ditto.
    * gcc.c-torture/execute/pr36093.c: Ditto.
    * gcc.c-torture/execute/pr43783.c: Ditto.
    * gcc.dg/const-elim-2.c: Xfail if pdp11.
    * gcc.dg/torture/pr36400.c: Ditto.
    * gcc.dg/tree-ssa/loop-1.c: Xfail for pdp11.  Add pdp11 to check
    for jsr.

From-SVN: r266299

target-supports.exp (check_weak_available): Return "no" for pdp11.

* lib/target-supports.exp (check_weak_available): Return "no" for
pdp11.

From-SVN: r266297

Daily bump.

From-SVN: r266293

PR81878: fix --disable-bootstrap --enable-languages=ada

gnattools build machinery uses just-build xgcc and xg++ as $(CC) and
$(CXX) in native builds.  However, if C and C++ languages are not
enabled, it won't find them.  So, enable C and C++ if Ada is enabled.
Most of the time, this is probably no big deal: C is always enabled
anyway, and C++ is already enabled for bootstraps.

We need not enable those for cross builds, however.  At first I just
took the logic from gnattools/configure, but found it to be lacking:
it would use the just-built tools even in cross-back settings, whose
tools just built for the host would not run on the build machine.  So
I've narrowed down the test to rely on autoconf-detected cross-ness
(build->host only), but also to ensure that host matches build, and
that target matches host.

I've considered sourcing ada/config-lang.in from within
gnattools/configure, and testing lang_requires as set by it, so as to
avoid a duplication of tests that ought to remain in sync, but decided
it would be too fragile, as ada/config-lang.in does not expect srcdir
to refer to gnattools.

for  gcc/ada/ChangeLog

PR ada/81878
* gcc-interface/config-lang.in (lang_requires): Set to "c c++"
when gnattools wants it.

for  gnattools/ChangeLog

PR ada/81878
* configure.ac (default_gnattools_target): Do not mistake
just-built host tools as native in cross-back toolchains.
* configure: Rebuilt.

From-SVN: r266290

re PR ipa/87957 (ICE tree check: expected tree that contains ‘decl minimal’ structure, have ‘identifier_node’ in warn_odr, at ipa-devirt.c:1051 since r265519)

PR lto/87957
* ipa-devirt.c (free_enum_values): Do not ICE on ODR vilations.

From-SVN: r266289

re PR driver/50250 (Driver documentation on -l does not mention shared libraries)

2018-11-19  Sandra Loosemore  <sandra@codesourcery.com>

PR driver/50250

gcc/
* doc/invoke.texi (Link Options): Mention shared libraries
in documentation for the -l option.  Simplify discussion and
point to the system linker documentation for details.

From-SVN: r266287

PR c++/87781 - detect invalid elaborated-type-specifier.

* parser.c (cp_parser_elaborated_type_specifier): Ensure that
typename follows a nested-name-specifier.

* g++.dg/parse/elab3.C: New test.
* g++.dg/template/crash115.C: Adjust dg-error.

From-SVN: r266285

2018-11-19  François Dumont  <fdumont@gcc.gnu.org>

* include/ext/throw_allocator.h
(annotate_base::insert(void*, size_t)): Use insert result to check for
double insert attempt.
(annotate_base::insert_construct(void*)): Likewise.
(annotate_base::check_allocated(void*, size_t)): Return found iterator.
(annotate_base::erase(void*, size_t)): Use latter method returned
iterator.
(annotate_base::check_constructed(void*, size_t)): Return found iterator.
(annotate_base::erase_construct(void*)): Use latter method returned
iterator.

From-SVN: r266284