git.libre-soc.org Git

Optimize vec_extract of vectors in memory with a PC-relative address.

2020-02-03 Michael Meissner <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
function to adjust PC-relative vector addresses.
(rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
handle vectors with PC-relative addresses.

Rewrite convulated code to avoid adding r0.

2020-02-03 Michael Meissner <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
reference.
(hard_reg_and_mode_to_addr_mask): Delete.
(rs6000_adjust_vec_address): If the original vector address
was REG+REG or REG+OFFSET and the element is not zero, do the add
of the elements in the original address before adding the offset
for the vector element. Use address_to_insn_form to validate the
address using the register being loaded, rather than guessing
whether the address is a DS-FORM or DQ-FORM address.

Adjust how variable vector extraction is done.

2020-02-03 Michael Meissner <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (get_vector_offset): New helper function
to calculate the offset in memory from the start of a vector of a
particular element. Add code to keep the element number in
bounds if the element number is variable.
(rs6000_adjust_vec_address): Move calculation of offset of the
vector element to get_vector_offset.
(rs6000_split_vec_extract_var): Do not do the initial AND of
element here, move the code to get_vector_offset.

c++: Fix constexpr vs. reference parameter.

[expr.const] specifically rules out mentioning a reference even if its
address is never used, because it implies indirection that is similarly
non-constant for a pointer variable.

PR c++/66477
* constexpr.c (cxx_eval_constant_expression) [PARM_DECL]: Don't
defer loading the value of a reference.

c++: Allow parm of empty class type in constexpr.

Since copying a class object is defined in terms of the copy constructor,
copying an empty class is OK even if it would otherwise not be usable in a
constant expression. Relatedly, using a parameter as an lvalue is no more
problematic than a local variable, and calling a member function uses the
object as an lvalue.

PR c++/91953
* constexpr.c (potential_constant_expression_1) [PARM_DECL]: Allow
empty class type.
[COMPONENT_REF]: A member function reference doesn't use the object
as an rvalue.

Add some gcc_asserts for vector extract processing.

2020-02-03 Michael Meissner <meissner@linux.ibm.com>

* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
gcc_asserts.

coroutines: Fix ICE on invalid (PR93458).

Since coroutine-ness is discovered lazily, we encounter the diagnostics
during each keyword parse. We were not handling the case where a user code
failed to include fundamental information (e.g. the traits) in a graceful
manner.

Once we've emitted an error for this level of fail, then we suppress
additional copies (otherwise the same thing will be reported for every
coroutine keyword seen).

gcc/cp/ChangeLog:

2020-02-03 Iain Sandoe <iain@sandoe.co.uk>

* coroutines.cc (struct coroutine_info): Add a bool flag to note
that we emitted an error for a bad function return type.
(get_coroutine_info): Tolerate an unset info table in case of
missing traits.
(find_coro_traits_template_decl): In case of error or if we didn't
find a type template, note we emitted the error and suppress
duplicates.
(find_coro_handle_template_decl): Likewise.
(instantiate_coro_traits): Only check for error_mark_node in the
return from lookup_qualified_name.
(coro_promise_type_found_p): Reorder initialization so that we check
for the traits and their usability before allocation of the info
table. Check for a suitable return type and emit a diagnostic for
here instead of relying on the lookup machinery. This allows the
error to have a better location, and means we can suppress multiple
copies.
(coro_function_valid_p): Re-check for a valid promise (and thus the
traits) before proceeding. Tolerate missing info as a fatal error.

gcc/testsuite/ChangeLog:

2020-02-03 Iain Sandoe <iain@sandoe.co.uk>

* g++.dg/coroutines/pr93458-1-missing-traits.C: New test.
* g++.dg/coroutines/pr93458-2-bad-traits.C: New test.
* g++.dg/coroutines/pr93458-3-missing-handle.C: New test.
* g++.dg/coroutines/pr93458-4-bad-coro-handle.C: New test.
* g++.dg/coroutines/pr93458-5-bad-coro-type.C: New test.

analyzer: avoid use of fold_build2

Various places in the analyzer use fold_build2, test the result, then
discard it. It's more efficient to use fold_binary, which avoids
building and GC-ing a redundant tree for the cases where folding fails.

gcc/analyzer/ChangeLog:
* constraint-manager.cc (range::constrained_to_single_element):
Replace fold_build2 with fold_binary. Remove unnecessary newline.
(constraint_manager::get_or_add_equiv_class): Replace fold_build2
with fold_binary in two places, and remove out-of-date comment.
(constraint_manager::eval_condition): Replace fold_build2 with
fold_binary.
* region-model.cc (constant_svalue::eval_condition): Likewise.
(region_model::on_assignment): Likewise.

analyzer: detect zero-assignment in phis (PR 93544)

PR analyzer/93544 reports an ICE when attempting to report a double-free
within diagnostic_manager::prune_for_sm_diagnostic, in which the
variable of interest has become an INTEGER_CST. Additionally, it picks
a nonsensical path through the function in which the pointer being
double-freed is known to be NULL, which we shouldn't complain about.

The dump shows that it picks the INTEGER_CST when updating var at a phi
node:
 considering event 4, with var: ‘iftmp.0_2’, state: ‘start’
 updating from ‘iftmp.0_2’ to ‘0B’ based on phi node
 phi: iftmp.0_2 = PHI <iftmp.0_6(3), 0B(2)>
 considering event 3, with var: ‘0B’, state: ‘start’
and that it has picked the shortest path through the exploded graph,
and on this path the pointer has been assigned NULL.

The root cause is that the state machine's on_stmt isn't called for phi
nodes (and wouldn't make much sense, as we wouldn't know which arg to
choose). malloc state machine::on_stmt "sees" a GIMPLE_ASSIGN to NULL
and handles it by transitioning the lhs to the "null" state, but never
"sees" GIMPLE_PHI nodes.

This patch fixes the ICE by wiring up phi-handling with state machines,
so that state machines have an on_phi vfunc. It updates the only current
user of "is_zero_assignment" (the malloc sm) to implement equivalent
logic for phi nodes. Doing so ensures that the pointer is in a separate
sm-state for the NULL vs non-NULL cases, and so gets separate exploded
nodes, and hence the path-finding logic chooses the correct path, and
the correct non-NULL phi argument.

The patch also adds some bulletproofing to prune_for_sm_diagnostic to
avoid crashing in the event of a bad path.

gcc/analyzer/ChangeLog:
PR analyzer/93544
* diagnostic-manager.cc
(diagnostic_manager::prune_for_sm_diagnostic): Bulletproof
against bad choices due to bad paths.
* engine.cc (impl_region_model_context::on_phi): New.
* exploded-graph.h (impl_region_model_context::on_phi): New decl.
* region-model.cc (region_model::on_longjmp): Likewise.
(region_model::handle_phi): Add phi param. Call the ctxt's on_phi
vfunc.
(region_model::update_for_phis): Pass phi to handle_phi.
* region-model.h (region_model::handle_phi): Add phi param.
(region_model_context::on_phi): New vfunc.
(test_region_model_context::on_phi): New.
* sm-malloc.cc (malloc_state_machine::on_phi): New.
(malloc_state_machine::on_zero_assignment): New.
* sm.h (state_machine::on_phi): New vfunc.

gcc/testsuite/ChangeLog:
PR analyzer/93544
* gcc.dg/analyzer/torture/pr93544.c: New test.

analyzer: show BBs in .dot dumps

gcc/analyzer/ChangeLog:
* engine.cc (supernode_cluster::dump_dot): Show BB index as
well as SN index.
* supergraph.cc (supernode::dump_dot): Likewise.

analyzer: fix ICE merging models containing label pointers (PR 93546)

PR analyzer/93546 reports an ICE within region_model::add_region_for_type
when merging two region_models each containing a label pointer. The
two labels are stored as pointers to symbolic_regions, but these regions
were created with NULL type, leading to an assertion failure when a
merged copy is created.

The labels themselves have void (but not NULL) type.

This patch updates make_region_for_type to use the type of the decl when
creating such regions, rather than implicitly setting the region's type
to NULL, fixing the ICE.

gcc/analyzer/ChangeLog:
PR analyzer/93546
* region-model.cc (region_model::on_call_pre): Update for new
param of symbolic_region ctor.
(region_model::deref_rvalue): Likewise.
(region_model::add_new_malloc_region): Likewise.
(make_region_for_type): Likewise, preserving type.
* region-model.h (symbolic_region::symbolic_region): Add "type"
param and pass it to base class ctor.

gcc/testsuite/ChangeLog:
PR analyzer/93546
* gcc.dg/analyzer/pr93546.c: New test.

analyzer: fix ICE due to comparing int and real constants (PR 93547)

gcc/analyzer/ChangeLog:
PR analyzer/93547
* constraint-manager.cc
(constraint_manager::get_or_add_equiv_class): Ensure types are
compatible before comparing constants.

gcc/testsuite/ChangeLog:
PR analyzer/93547
* gcc.dg/analyzer/pr93547.c: New test.

rs6000: Update constraint documentation

This un-documents constraints that cannot (or should not) be used in
inline assembler. It also improves markup, and presentation in general.

More work is needed, but gradual improvement is easier to do.

* config/rs6000/constraints.md: Improve documentation.
/
* doc/md.texi (PowerPC and IBM RS6000): Improve documentation.

arm: Use move-if-change for updating regenerated files [PR93548]

The t-arm make fragment currently uses 'mv' to update some files that
are automatically regenerated, but this causes problems on read-only
filesystems if the date stamps are incorrect and the files have not
really changed. So use move-if-change instead.

PR target/93548
* config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md,
$(srcdir)/config/arm/arm-tables.opt): Use move-if-change.

Remove gfx801 "carrizo" support

2020-02-03 Andrew Stubbs <ams@codesourcery.com>

gcc/
* config.gcc: Remove "carrizo" support.
* config/gcn/gcn-opts.h (processor_type): Likewise.
* config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
* config/gcn/gcn.opt (gpu_type): Likewise.
* config/gcn/t-omp-device: Likewise.

libgomp/
* plugin/plugin-gcn.c (EF_AMDGPU_MACH_AMDGCN_GFX801): Remove.
(gcn_gfx801_s): Remove.
(isa_hsa_name): Remove gfx801.
(isa_gcc_name): Remove gfx801/carizzo.
(isa_code): Remove gfx801.

c++: Fix cast to pointer to VLA.

The C front-end fixed this issue in r257620 by adding a DECL_EXPR from
grokdeclarator. We don't have an easy way to do that in the C++ front-end,
but it works fine to create and prepend a DECL_EXPR when we are genericizing
the NOP_EXPR for the cast.

The C patch wraps the DECL_EXPR in a BIND_EXPR, but that seems unnecessary
in C++; this is just a hook to run gimplify_type_sizes, we aren't actually
declaring anything that we need to worry about scoping for.

PR c++/88256
* cp-gimplify.c (predeclare_vla): New.
(cp_genericize_r) [NOP_EXPR]: Call it.

This patch is for PR target/91816

This is a patch for an issue where the compiler was generating a conditional
branch in Thumb2, which was too far for b{cond} to handle.

This was originally reported at binutils:
https://sourceware.org/bugzilla/show_bug.cgi?id=24991

And then raised for GCC:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91816

As can be seen here:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Cihfddaf.html

the range of a 32-bit Thumb B{cond} is +/-1MB.

This is now checked for in arm.md and an unconditional branch is generated if
the jump would be greater than 1MB.

gcc/ChangeLog

2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>

PR target/91816
* config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
* config/arm/arm.c (arm_gen_far_branch): New function
arm_gen_far_branch.
* config/arm/arm.md: Update b<cond> for Thumb2 range checks.

gcc/testsuite/ChangeLog

2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>

PR target/91816
* gcc.target/arm/pr91816.c: New test.

[OpenACC] bump version for 2.6 plus libgomp.texi update

2020-02-03 Julian Brown <julian@codesourcery.com>
Tobias Burnus <tobias@codesourcery.com>

gcc/c-family/
* c-cppbuiltin.c (c_cpp_builtins): Update _OPENACC define to 201711.

gcc/
* doc/invoke.texi: Update mention of OpenACC version to 2.6.

gcc/fortran/
* cpp.c (cpp_define_builtins): Update _OPENACC define to 201711.
* intrinsic.texi: Update mentions of OpenACC version to 2.6.
* gfortran.texi: Likewise. Remove experimental disclamer for OpenACC.
* invoke.texi: Remove experimental disclamer for OpenACC.

gcc/testsuite/
* c-c++-common/cpp/openacc-define-3.c: Update expected value for
_OPENACC define.
* gfortran.dg/openacc-define-3.f90: Likewise.

libgomp/
* libgomp.texi (OpenACC Runtime Library Routines): Document *_async
and *_finalize variants; document acc_attach and acc_detach; update
references from OpenACC 2.0 to 2.6.
* openacc.f90 (openacc_version): Update to 201711.
* openacc_lib.h (openacc_version): Update to 201711.
* testsuite/libgomp.oacc-fortran/openacc_version-1.f: Update expected
openacc_version to 201711.
* testsuite/libgomp.oacc-fortran/openacc_version-2.f90: Likewise.

[OpenMP] Add missing parameters to omp_lib documentation (PR fortran/93541)

PR fortran/93541
* intrinisic.texi (OpenMP Modules OMP_LIB and OMP_LIB_KINDS):
Add undocumented parameters from omp_lib.f90.in.

[Fortran] Fix to strict associate check (PR93427)

        PR fortran/93427
        * resolve.c (resolve_assoc_var): Remove too strict check.
        * gfortran.dg/associate_51.f90: Update test case.

        PR fortran/93427
        * gfortran.dg/associate_52.f90: New.

s390x: Fix popcounthi2_z196 expander [PR93533]

The following testcase started to ICE when .POPCOUNT matching has been added
to match.pd; we had __builtin_popcount*, but nothing would use the
popcounthi2 expander before.

The problem is that the popcounthi2_z196 expander doesn't emit valid RTL:
error: unrecognizable insn:
(insn 138 137 139 27 (set (reg:SI 190)
 (ashift:SI (reg:HI 95 [ _105 ])
 (const_int 8 [0x8]))) -1
 (nil))
during RTL pass: vregs
The following patch is an attempt to fix that, furthermore I've tried to
slightly simplify it as well, it makes no sense to me to perform
(x + (x << 8)) >> 8 when we need to either zero extend or mask the result
at the end in order to avoid bits from above HImode to affect it, when we
can do
(x + (x >> 8)) & 0xff (or zero extension).

2020-02-03 Jakub Jelinek <jakub@redhat.com>

PR target/93533
* config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
valid RTL to sum up the lowest and second lowest bytes of the popcnt
result.

* gcc.c-torture/compile/pr93533.c: New test.
* gcc.target/s390/pr93533.c: New test.

coroutines: Bind label_decl of original function to actor function

gcc/cp
    * coroutines.cc (transform_await_wrapper): Set actor funcion as
    new context of label_decl.
    (build_actor_fn): Fill new field of await_xform_data.

gcc/testsuite
    * g++.dg/coroutines/co-await-04-control-flow.C: Add label.

Daily bump.

c++: Fix ICE on invalid alignas in a template [PR93530]

This fixes an ICE taking place in cp_default_conversion because we got
a SCOPE_REF that doesn't have a type and so checking
INTEGRAL_OR_UNSCOPED_ENUMERATION_TYPE_P (TREE_TYPE (exp)) will crash.
This happens since the recent Joseph's change in decl_attributes whereby
we don't skip C++11 attributes on types.

[dcl.align] is clear that alignas applied to a function is ill-formed.
That should be fixed, and we have PR90847 for that. But I think a more
appropriate fix at this stage would be the following: in a template we
want to splice dependent attributes and save them for later, and by
doing so avoid this crash.

PR c++/93530 - ICE on invalid alignas in a template.
* decl.c (grokdeclarator): Call cplus_decl_attributes instead of
decl_attributes.

* g++.dg/cpp0x/alignas18.C: New test.

testsuite,Darwin,PPC: Adjust darwin-abi-12.c for common section use.

This test explicitly tests for code generation that expects a
common section.

gcc/testsuite/ChangeLog:

2020-02-02 Iain Sandoe <iain@sandoe.co.uk>

* gcc.target/powerpc/darwin-abi-12.c: Add '-fcommon' to the
options.

One more fix for PR 91333 - suboptimal register allocation for inline asm

2020-02-02 Vladimir Makarov <vmakarov@redhat.com>

PR rtl-optimization/91333
* ira-color.c (struct allocno_color_data): Add member
hard_reg_prefs.
(init_allocno_threads): Set the member up.
(bucket_allocno_compare_func): Add compare hard reg
prefs.

2020-02-02 Vladimir Makarov <vmakarov@redhat.com>

PR rtl-optimization/91333
* gcc.target/i386/pr91333.c: Add vmovsd to regexp. Set up count
to 3.

Daily bump.

fortran: Fix up TYPE_ARG_TYPES of procs with scalar VALUE optional args [PR92305]

The following patch fixes
-FAIL: libgomp.fortran/use_device_addr-1.f90 -O0 execution test
-FAIL: libgomp.fortran/use_device_addr-2.f90 -O0 execution test
that has been FAILing for several months on powerpc64le-linux.
The problem is in the Fortran FE, which adds the artificial arguments
for scalar VALUE OPTIONAL dummy args only to DECL_ARGUMENTS where the
current function can see them, but not to TYPE_ARG_TYPES; if those functions
aren't varargs, this confuses calls.c to pass the remaining arguments
(which aren't named (== not covered by TYPE_ARG_TYPES) and aren't varargs
either) in a different spot from what the callee (which has proper
DECL_ARGUMENTS for all args) expects. For the artificial length arguments
for character dummy args we already put them in both DECL_ARGUMENTS and
TYPE_ARG_TYPES.

2020-02-01 Jakub Jelinek <jakub@redhat.com>

PR fortran/92305
* trans-types.c (gfc_get_function_type): Also push boolean_type_node
types for non-character scalar VALUE optional dummy arguments.
* trans-decl.c (create_function_arglist): Skip those in
hidden_typelist. Formatting fix.

nios2: Support for GOT-relative DW_EH_PE_datarel encoding.

On nios2-linux-gnu, there has been a long-standing bug in C++ exception
handling that sometimes resulted in link errors like

../nios2-linux-gnu/bin/ld: FDE encoding in /tmp/cccfpQ2l.o(.eh_frame) prevents .eh_frame_hdr table being created

when building some shared libraries or PIE executables. The root of
the problem is that GCC was incorrectly emitting an absolute encoding
in EH tables for PIC. This patch changes it to use either
DW_EH_PE_indirect (for global) or DW_EH_PE_datarel (for local), and
fixes libgcc so it can find the address of the GOT as the base address
for DW_EH_PE_datarel.

Complicating matters somewhat, GAS was missing support for
%gotoff(symbol) relocation syntax. I have just pushed a fix for that,
but I've added a configure check to test for presence of the binutils
support and fall back to the current absolute encoding (which works
most of the time) if it is not available. Once the fix makes it into
an official binutils release it might be appropriate to make this
error out instead.

Since this is a wrong-code bug and affects only nios2 target, I think
this is appropriate for Stage 4. I regression-tested on both
nios2-linux-gnu and nios2-elf, with and without the binutils support
present, before committing this.

2020-01-31 Sandra Loosemore <sandra@codesourcery.com>

gcc/
* configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
* config.in: Regenerated.
* configure: Regenerated.
* config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
(ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.

gcc/testsuite/
* g++.target/nios2/hello-pie.C: New.
* g++.target/nios2/nios2.exp: New.

libgcc/
* config.host [nios2-*-linux*] (tmake_file, tm_file): Adjust.
* config/nios2-elf-lib.h: New.
* unwind-dw2-fde-dip.c (_Unwind_IteratePhdrCallback): Use existing
code for finding GOT base for nios2.

Fixes after recent configure changes relating to static libraries

This commit:

  commit e7c26e04b2dd6266d62d5a5825ff7eb44d1cf14e (tjteru/master)
  Date:   Wed Jan 22 14:54:26 2020 +0000

      gcc: Add new configure options to allow static libraries to be selected

contains a couple of issues.  First I failed to correctly regenerate
all of the configure files it should have done.  Second, there was a
mistake in lib-link.m4, one of the conditions didn't use pure sh
syntax, I wrote this:

  if x$lib_type = xauto || x$lib_type = xshared; then

When I should have written this:

  if test "x$lib_type" = "xauto" || test "x$lib_type" = "xshared"; then

These issues were raised on the mailing list in these messages:

  https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01827.html
  https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01921.html

config/ChangeLog:

* lib-link.m4 (AC_LIB_LINKFLAGS_BODY): Update shell syntax.

gcc/ChangeLog:

* configure: Regenerate.

intl/ChangeLog:

* configure: Regenerate.

libcpp/ChangeLog:

* configure: Regenerate.

libstdc++-v3/ChangeLog:

* configure: Regenerate.

Daily bump.

c++: Fix sizeof VLA lambda capture.

sizeof a VLA type is not a constant in C or the GNU C++ extension, so we
need to capture the VLA even in unevaluated context. For PR60855 we stopped
looking through a previous capture, but we also need to capture the first
time the variable is mentioned.

PR c++/86216
* semantics.c (process_outer_var_ref): Capture VLAs even in
unevaluated context.

c++: Reduce memory consumption for arrays of non-aggregate type.

The remaining low-hanging fruit for improvement on memory consumption in the
14179 testcase was the duplication of the CONSTRUCTOR for the array by
reshape_init. This patch changes reshape_init to reuse a single constructor
for an array of non-aggregate type such as the one in the testcase.

PR c++/14179
* decl.c (reshape_init_array_1): Reuse a single CONSTRUCTOR with
non-aggregate elements.
(reshape_init_array): Add first_initializer_p parm.
(reshape_init_r): Change first_initializer_p from bool to tree.
(reshape_init): Pass init to it.

c++: Reduce memory consumption for large static arrays.

PR14179 and the C counterpart PR12245 are about memory consumption of very
large file-scope arrays. Recently, location wrappers increased memory
consumption significantly: in an array of integer constants, each one will
have a location wrapper, which added up to over 500MB in the 14179
testcase. For this kind of testcase tracking these locations isn't worth
the cost, so this patch turns the wrappers off after 256 elements; any array
that size or larger isn't likely to be interested in the location of
individual integer constants.

PR c++/14179
* parser.c (cp_parser_initializer_list): Suppress location wrappers
after 256 elements.

analyzer: fix ICE with 'const void *' (PR 93457)

gcc/analyzer/ChangeLog:
PR analyzer/93457
* region-model.cc (make_region_for_type): Use VOID_TYPE_P rather
than checking against void_type_node.

gcc/testsuite/ChangeLog:
PR analyzer/93457
* gcc.dg/analyzer/pr93457.c: New test.

analyzer: fix ICE handling void-type (PR 93373)

gcc/analyzer/ChangeLog:
PR analyzer/93373
* region-model.cc (ASSERT_COMPAT_TYPES): Convert to...
(assert_compat_types): ...this, and bail when either type is NULL,
or when VOID_TYPE_P (dst_type).
(region_model::get_lvalue): Update for above conversion.
(region_model::get_rvalue): Likewise.

gcc/testsuite/ChangeLog:
PR analyzer/93373
* gcc.dg/analyzer/torture/pr93373.c: New test.

Fix for PR 91333 - suboptimal register allocation for inline asm

 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>

 PR rtl-optimization/91333
 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
 reg preferences comparison up.

 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>

 PR rtl-optimization/91333
 * gcc.target/i386/pr91333.c: New.

analyzer: fix ICE getting void return value (PR 93379)

PR analyzer/93379 reports an ICE within
region_model::update_for_return_superedge when writing the
returned svalue_id to the lhs of the call_stmt

The root cause is that this analyzer code assumed that for any call
with a non-NULL gimple_call_lhs, the called fndecl would have non-void
return type, and thus that a non-null svalue_id would be returned from
region_model::pop_frame. This isn't the case e.g. for a call with
conflicting types where the callee returns void but the caller assumes
int.

This patch fixes the ICE by moving the check for null result so that
it also guards setting the lhs.

gcc/analyzer/ChangeLog:
PR analyzer/93379
* region-model.cc (region_model::update_for_return_superedge):
Move check for null result so that it also guards setting the
lhs.

gcc/testsuite/ChangeLog:
PR analyzer/93379
* gcc.dg/analyzer/torture/pr93379-2.c: New test.
* gcc.dg/analyzer/torture/pr93379.c: New test.

analyzer: fix ICE with pointers between stack frames (PR 93438)

PR analyzer/93438 reports an ICE when merging two region_models
in which an older stack frame has a local pointing to a local in
a more recent stack frame.

 stack
 older frame
 int *: "ow" --+
 |
 newer frame |
 int: "pk" <---+

The root cause is that the state-merging code assumes that all frame
regions in the merged model have already been created.
stack_region::can_merge_p iterates through the frames, creating
and populating each merged frame in turn, so when it attempts to
populate the older frame, it attempts to reference the newer frame in
the merged model, which doesn't exist yet.

This patch reworks stack_region::can_merge_p to use a two-pass approach
in which all frames in the merged model are created first, and then
are all populated, fixing the bug.

gcc/analyzer/ChangeLog:
PR analyzer/93438
* region-model.cc (stack_region::can_merge_p): Split into a two
pass approach, creating all stack regions first, then populating
them.
(selftest::test_state_merging): Add test coverage for (a) the case
of self-merging a model in which a local in an older stack frame
points to a local in a more recent stack frame (which previously
would ICE), and (b) the case of self-merging a model in which a
local points to a global (which previously worked OK).

gcc/testsuite/ChangeLog:
PR analyzer/93438
* gcc.dg/analyzer/torture/pr93438.c: New test.
* gcc.dg/analyzer/torture/pr93438-2.c: New test.

testsuite: Fix up pr91838.C test [PR91838]

The test FAILs on i686-linux with:
FAIL: g++.dg/pr91838.C (test for excess errors)
Excess errors:
/home/jakub/src/gcc/gcc/testsuite/g++.dg/pr91838.C:7:8: warning: MMX vector return without MMX enabled changes the ABI [-Wpsabi]
/home/jakub/src/gcc/gcc/testsuite/g++.dg/pr91838.C:7:3: warning: MMX vector argument without MMX enabled changes the ABI [-Wpsabi]
and on x86_64-linux with -m32 testing with failure to match the
expected pattern in there (or both with e.g. -m32/-mno-mmx/-mno-sse testing).
The test is also in a wrong directory, has non-standard specification that
it requires c++11 or later.

2020-01-31 Jakub Jelinek <jakub@redhat.com>

PR rtl-optimization/91838
* g++.dg/pr91838.C: Moved to ...
* g++.dg/opt/pr91838.C: ... here. Require c++11 target instead of
dg-skip-if for c++98. Pass -Wno-psabi -w to avoid psabi style
warnings on vector arg passing or return. Add -masm=att on i?86/x86_64.
Only check for pxor %xmm0, %xmm0 on lp64 i?86/x86_64.

aarch64: Add Armv8.6 SVE bfloat16 support

This patch adds support for the SVE intrinsics that map to Armv8.6
bfloat16 instructions. This means that svcvtnt is now a base SVE
function for one type suffix combination; the others are still
SVE2-specific.

This relies on a binutils fix:

 https://sourceware.org/ml/binutils/2020-01/msg00450.html

so anyone testing older binutils 2.34 or binutils master sources will
need to upgrade to get clean test results. (At the time of writing,
no released version of binutils has this bug.)

2020-01-31 Richard Sandiford <richard.sandiford@arm.com>

gcc/
* config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
* config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
aarch64-sve-builtins-base.h.
* config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
aarch64-sve-builtins-base.cc.
* config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
(svcvtnt): Declare.
* config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
(svcvtnt): New functions.
* config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
(svcvtnt): New functions.
(svcvt): Add a form that converts f32 to bf16.
* config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
(ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
Declare.
* config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
Treat B as bfloat16_t.
(ternary_bfloat_lane_base): New class.
(ternary_bfloat_def): Likewise.
(ternary_bfloat): New shape.
(ternary_bfloat_lane_def): New class.
(ternary_bfloat_lane): New shape.
(ternary_bfloat_lanex2_def): New class.
(ternary_bfloat_lanex2): New shape.
(ternary_bfloat_opt_n_def): New class.
(ternary_bfloat_opt_n): New shape.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
* config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
(@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
(@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
(@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
(*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
(@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
* config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
the pattern off the narrow mode instead of the wider one.
* config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
(UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
(sve_fp_op): Handle them.
(SVE_BFLOAT_TERNARY_LONG): New int itertor.
(SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_aarch64_asm_bf16_ok):
New proc.
* gcc.target/aarch64/sve/acle/asm/bfdot_f32.c: New test.
* gcc.target/aarch64/sve/acle/asm/bfdot_lane_f32.c: Likweise.
* gcc.target/aarch64/sve/acle/asm/bfmlalb_f32.c: Likweise.
* gcc.target/aarch64/sve/acle/asm/bfmlalb_lane_f32.c: Likweise.
* gcc.target/aarch64/sve/acle/asm/bfmlalt_f32.c: Likweise.
* gcc.target/aarch64/sve/acle/asm/bfmlalt_lane_f32.c: Likweise.
* gcc.target/aarch64/sve/acle/asm/bfmmla_f32.c: Likweise.
* gcc.target/aarch64/sve/acle/asm/cvt_bf16.c: Likweise.
* gcc.target/aarch64/sve/acle/asm/cvtnt_bf16.c: Likweise.
* gcc.target/aarch64/sve/acle/general-c/ternary_bfloat16_1.c: Likweise.
* gcc.target/aarch64/sve/acle/general-c/ternary_bfloat16_lane_1.c:
Likweise.
* gcc.target/aarch64/sve/acle/general-c/ternary_bfloat16_lanex2_1.c:
Likweise.
* gcc.target/aarch64/sve/acle/general-c/ternary_bfloat16_opt_n_1.c:
Likweise.

aarch64: Add svbfloat16_t support to arm_sve.h

This patch adds support for the bfloat16-related vectors to
arm_sve.h. It also adds support for functions that just treat
bfloat16_t as a bag of 16 bits; these functions are available
for bf16 whenever they're available for other 16-bit types.

Previously "all_data" was used for both data movement and for arithmetic
that happened to be defined for all data types. Adding bf16 means we
need to distinguish between the two cases.

The patch also reorders the mode definitions in aarch64-modes.def,
which means we no longer need separate VECTOR_MODE entries for BF
vectors.

2020-01-31 Richard Sandiford <richard.sandiford@arm.com>

gcc/
* config/aarch64/arm_sve.h: Include arm_bf16.h.
* config/aarch64/aarch64-modes.def (BF): Move definition before
VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
(SVE_MODES): Handle BF modes.
* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
BF modes.
(aarch64_full_sve_mode): Likewise.
* config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
and VNx32BF.
(SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
(Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
(V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
(insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
new SVE BF modes.
* config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
type_class_index.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
(TYPES_all_data): Add bf16.
(TYPES_reinterpret1, TYPES_reinterpret): Likewise.
(register_tuple_type): Increase buffer size.
* config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
(bf16): New type suffix.
* config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
(svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
(svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
Change type from all_data to all_arith.
* config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
(svminp): Likewise.

gcc/testsuite/
* g++.target/aarch64/sve/acle/general-c++/mangle_1.C: Test mangling
of svbfloat16_t.
* g++.target/aarch64/sve/acle/general-c++/mangle_2.C: Likewise for
__SVBfloat16_t.
* gcc.target/aarch64/sve/acle/asm/clasta_bf16.c: New test.
* gcc.target/aarch64/sve/acle/asm/clastb_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/cnt_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/create2_1.c (create_bf16): Likewise.
* gcc.target/aarch64/sve/acle/asm/create3_1.c (create_bf16): Likewise.
* gcc.target/aarch64/sve/acle/asm/create4_1.c (create_bf16): Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dup_lane_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/dupq_lane_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ext_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/get2_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/get3_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/get4_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/insr_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/lasta_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/lastb_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1rq_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld2_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld3_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld4_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldff1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnf1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ldnt1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/len_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_f16.c
(reinterpret_f16_bf16_tied1, reinterpret_f16_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_f32.c
(reinterpret_f32_bf16_tied1, reinterpret_f32_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_f64.c
(reinterpret_f64_bf16_tied1, reinterpret_f64_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_s16.c
(reinterpret_s16_bf16_tied1, reinterpret_s16_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_s32.c
(reinterpret_s32_bf16_tied1, reinterpret_s32_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_s64.c
(reinterpret_s64_bf16_tied1, reinterpret_s64_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_s8.c
(reinterpret_s8_bf16_tied1, reinterpret_s8_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_u16.c
(reinterpret_u16_bf16_tied1, reinterpret_u16_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_u32.c
(reinterpret_u32_bf16_tied1, reinterpret_u32_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_u64.c
(reinterpret_u64_bf16_tied1, reinterpret_u64_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/reinterpret_u8.c
(reinterpret_u8_bf16_tied1, reinterpret_u8_bf16_untied): Likewise.
* gcc.target/aarch64/sve/acle/asm/rev_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/sel_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/set2_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/set3_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/set4_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/splice_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st2_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st3_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/st4_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/stnt1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/tbl_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/undef2_1.c (bfloat16_t): Likewise.
* gcc.target/aarch64/sve/acle/asm/undef3_1.c (bfloat16_t): Likewise.
* gcc.target/aarch64/sve/acle/asm/undef4_1.c (bfloat16_t): Likewise.
* gcc.target/aarch64/sve/acle/asm/undef_1.c (bfloat16_t): Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2_bf16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/annotate_1.c (ret_bf16, ret_bf16x2)
(ret_bf16x3, ret_bf16x4): Likewise.
* gcc.target/aarch64/sve/pcs/annotate_2.c (fn_bf16, fn_bf16x2)
(fn_bf16x3, fn_bf16x4): Likewise.
* gcc.target/aarch64/sve/pcs/annotate_3.c (fn_bf16, fn_bf16x2)
(fn_bf16x3, fn_bf16x4): Likewise.
* gcc.target/aarch64/sve/pcs/annotate_4.c (fn_bf16, fn_bf16x2)
(fn_bf16x3, fn_bf16x4): Likewise.
* gcc.target/aarch64/sve/pcs/annotate_5.c (fn_bf16, fn_bf16x2)
(fn_bf16x3, fn_bf16x4): Likewise.
* gcc.target/aarch64/sve/pcs/annotate_6.c (fn_bf16, fn_bf16x2)
(fn_bf16x3, fn_bf16x4): Likewise.
* gcc.target/aarch64/sve/pcs/annotate_7.c (fn_bf16, fn_bf16x2)
(fn_bf16x3, fn_bf16x4): Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_bf16.c: Likewise.
* gcc.target/aarch64/sve/pcs/gnu_vectors_1.c (bfloat16x16_t): New
typedef.
(bfloat16_callee, bfloat16_caller): New tests.
* gcc.target/aarch64/sve/pcs/gnu_vectors_2.c (bfloat16x16_t): New
typedef.
(bfloat16_callee, bfloat16_caller): New tests.
* gcc.target/aarch64/sve/pcs/return_4.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_4_128.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_4_256.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_4_512.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_4_1024.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_4_2048.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_5.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_5_128.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_5_256.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_5_512.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_5_1024.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_5_2048.c (CALLER_BF16): New macro.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_6.c (bfloat16_t): New typedef.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_6_128.c (bfloat16_t): New typedef.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_6_256.c (bfloat16_t): New typedef.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_6_512.c (bfloat16_t): New typedef.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_6_1024.c (bfloat16_t): New typedef.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_6_2048.c (bfloat16_t): New typedef.
(callee_bf16, caller_bf16): New tests.
* gcc.target/aarch64/sve/pcs/return_7.c (callee_bf16): Likewise
(caller_bf16): Likewise.
* gcc.target/aarch64/sve/pcs/return_8.c (callee_bf16): Likewise
(caller_bf16): Likewise.
* gcc.target/aarch64/sve/pcs/return_9.c (callee_bf16): Likewise
(caller_bf16): Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbl2_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/tbx_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilerw_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/whilewr_bf16.c: Likewise.

aarch64: Add Armv8.6 SVE matrix multiply support

This mostly follows existing practice. Perhaps the only noteworthy
thing is that svmmla is split across three extensions (i8mm, f32mm
and f64mm), any of which can be enabled independently. The easiest
way of coping with this seemed to be to add a fourth svmmla entry
for base SVE, but with no type suffixes. This means that the
overloaded function is always available for C, but never successfully
resolves without the appropriate target feature.

2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
 Matthew Malcomson <matthew.malcomson@arm.com>
 Richard Sandiford <richard.sandiford@arm.com>

gcc/
* doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
__ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
__ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
__ARM_FEATURE_MATMUL_FP64.
* config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
(sve): Add AARCH64_FL_F32MM to the list of extensions that should
be disabled at the same time.
(f32mm): New extension.
* config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
(AARCH64_FL_F64MM): Bump to the next bit up.
(AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
(TARGET_SVE_F64MM): New macros.
* config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
(UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
(UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
(UNSPEC_ZIP2Q): New unspeccs.
(DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
(optab, sur, perm_insn): Handle the new unspecs.
(sve_fp_op): Handle UNSPEC_FMMLA. Resort.
* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
TARGET_SVE_F64MM instead of separate tests.
(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
(@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
(@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
(@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
(TYPES_s_signed): New macro.
(TYPES_s_integer): Use it.
(TYPES_d_float): New macro.
(TYPES_d_data): Use it.
* config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
(ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
(ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
(svmmla): New shape.
(ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
template parameters.
(ternary_resize2_lane_base): Likewise.
(ternary_resize2_base): New class.
(ternary_qq_lane_base): Likewise.
(ternary_intq_uintq_lane_def): Likewise.
(ternary_intq_uintq_lane): New shape.
(ternary_intq_uintq_opt_n_def): New class
(ternary_intq_uintq_opt_n): New shape.
(ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
(ternary_uintq_intq_def): New class.
(ternary_uintq_intq): New shape.
(ternary_uintq_intq_lane_def): New class.
(ternary_uintq_intq_lane): New shape.
(ternary_uintq_intq_opt_n_def): New class.
(ternary_uintq_intq_opt_n): New shape.
* config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
(svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
(svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
* config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
Generalize to...
(svdotprod_lane_impl): ...this new class.
(svmmla_impl, svusdot_impl): New classes.
(svdot_lane): Update to use svdotprod_lane_impl.
(svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
(svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
functions.
* config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
function, with no types defined.
(svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
AARCH64_FL_I8MM functions.
(svmmla): New AARCH64_FL_F32MM function.
(svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
(svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
AARCH64_FL_F64MM function.
(REQUIRED_EXTENSIONS):

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_aarch64_asm_i8mm_ok)
(check_effective_target_aarch64_asm_f32mm_ok): New target selectors.
* gcc.target/aarch64/pragma_cpp_predefs_2.c: Test handling of
__ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
__ARM_FEATURE_SVE_MATMUL_FP64.
* gcc.target/aarch64/sve/acle/asm/test_sve_acle.h (TEST_TRIPLE_Z):
(TEST_TRIPLE_Z_REV2, TEST_TRIPLE_Z_REV, TEST_TRIPLE_LANE_REG)
(TEST_TRIPLE_ZX): New macros.
* gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c: Remove +sve and
rely on +f64mm to enable it.
* gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/mmla_f32.c: New test.
* gcc.target/aarch64/sve/acle/asm/mmla_f64.c: Likewise,
* gcc.target/aarch64/sve/acle/asm/mmla_s32.c: Likewise,
* gcc.target/aarch64/sve/acle/asm/mmla_u32.c: Likewise,
* gcc.target/aarch64/sve/acle/asm/sudot_lane_s32.c: Likewise,
* gcc.target/aarch64/sve/acle/asm/sudot_s32.c: Likewise,
* gcc.target/aarch64/sve/acle/asm/trn1q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn1q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/trn2q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/usdot_lane_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/usdot_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/usmmla_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip1q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_f16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_f64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_s8.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u16.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u64.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/zip2q_u8.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/mmla_1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/mmla_2.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/mmla_3.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/mmla_4.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/mmla_5.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/mmla_6.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/mmla_7.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_intq_uintq_lane_1.c:
Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_intq_uintq_opt_n_1.c:
Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_uintq_intq_1.c:
Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_uintq_intq_lane_1.c:
Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_uintq_intq_opt_n_1.c:
Likewise.

aarch64: Fix SVE PCS failures for BE & ILP32

This patch should (finally!) give clean test results for
aarch64-sve-pcs.exp for all {be,le}{lp64,ilp32} combinations.

The *_128.c tests require aarch64_little_endian because they test for
fixed-length 128-bit code, whereas -msve-vector-bits=128 still generates
VLA code for big-endian.

Some tests require lp64 because they match (64-bit) pointer loads and
stores. Others require it because ilp32 adds extra zero extensions.

We still have a non-trivial amount of coverage for -mbig-endian -mabi=ilp32:

# of expected passes 663
# of unsupported tests 59

2020-01-31 Richard Sandiford <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.target/aarch64/sve/pcs/args_1.c: Require lp64 for
check-function-bodies tests.
* gcc.target/aarch64/sve/pcs/args_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_2.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_5_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_256.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_512.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_1024.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_6_2048.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_be_nowrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_be_wrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_le_nowrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_2_le_wrap.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_3.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_4_be.c: Likewise.
* gcc.target/aarch64/sve/pcs/saves_4_le.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_1.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/varargs_2_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f16.c: Require lp64.
* gcc.target/aarch64/sve/pcs/args_5_be_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_be_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_5_le_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_be_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_f64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_s8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u16.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u32.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u64.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_6_le_u8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_7.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_8.c: Likewise.
* gcc.target/aarch64/sve/pcs/args_9.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_4_128.c: Require lp64 and
aarch64_little_endian for check-function-bodies tests.
* gcc.target/aarch64/sve/pcs/return_5_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/stack_clash_2_128.c: Likewise.
* gcc.target/aarch64/sve/pcs/return_1_128.c: Likewise. Remove
target selector from dg-compile.
* gcc.target/aarch64/sve/pcs/return_6_128.c: Likewise.

libstdc++: Always return a sentinel from __gnu_test::test_range::end()

It seems that in practice std::sentinel_for<I, I> is always true, and so the
test_range container doesn't help us detect bugs in ranges code in which we
wrongly assume that a sentinel can be manipulated like an iterator. Make the
test_range range more strict by having end() unconditionally return a
sentinel, and adjust some tests accordingly.

libstdc++-v3/ChangeLog:

* testsuite/24_iterators/range_operations/distance.cc: Do not assume
test_range::end() returns the same type as test_range::begin().
* testsuite/24_iterators/range_operations/next.cc: Likewise.
* testsuite/24_iterators/range_operations/prev.cc: Likewise.
* testsuite/util/testsuite_iterators.h (__gnu_test::test_range::end):
Always return a sentinel.

Fix conditional add LRA failure for amdgcn

Fix ICE in testcase gfortran.dg/assumed_rank_bounds_3.f90.

2020-01-31 Andrew Stubbs <ams@codesourcery.com>

gcc/
* config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
alternative only.

Fix TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.

The reason for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL on AMD target is
only insn size, as advised in e.g. Software Optimization Guide for the
AMD Family 15h Processors [1], section 7.1.2, where it is said:

--quote--
7.1.2 Reduce Instruction SizeOptimization

Reduce the size of instructions when possible.

Rationale

Using smaller instruction sizes improves instruction fetch throughput.
Specific examples include the following:

*In SIMD code, use the single-precision (PS) form of instructions
instead of the double-precision (PD) form. For example, for register
to register moves, MOVAPS achieves the same result as MOVAPD, but uses
one less byte to encode the instruction and has no prefix byte. Other
examples in which single-precision forms can be substituted for
double-precision forms include MOVUPS, MOVNTPS, XORPS, ORPS, ANDPS,
and SHUFPS.
...
--/quote--

Please note that this optimization applies only to non-AVX forms, as
demonstrated by:

   0:   0f 28 c8                movaps %xmm0,%xmm1
   3:   66 0f 28 c8             movapd %xmm0,%xmm1
   7:   c5 f8 28 d1             vmovaps %xmm1,%xmm2
   b:   c5 f9 28 d1             vmovapd %xmm1,%xmm2

Also note that MOVDQA is missing in the above optimization. It is
harmful to substitute MOVDQA with MOVAPS, as it can (and does)
introduce +1 cycle forwarding penalty between FLT (FPA/FPM) and INT
(VALU) FP clusters.

[1] https://www.amd.com/system/files/TechDocs/47414_15h_sw_opt_guide.pdf

[amdgcn] Scale number of threads/workers with VGPR usage

2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>

gcc/
* config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
to definition of hsa_kernel_description. Parse assembly to find SGPR
and VGPR count of kernel and store in hsa_kernel_description.

libgomp/
* plugin/plugin-gcn.c (struct hsa_kernel_description): Add sgpr_count
and vgpr_count fields.
(struct kernel_info): Add a field for a hsa_kernel_description.
(run_kernel): Reduce the number of threads/workers if the requested
number would require too many VGPRs.
(init_basic_kernel_info): Initialize description field with
the hsa_kernel_description entry for the kernel.

[Fortran] Disable front-end optimization for OpenACC atomic (PR93462)

        PR fortran/93462
        * frontend-passes.c (gfc_code_walker): For EXEC_OACC_ATOMIC, set
        in_omp_atomic to true prevent front-end optimization.

        PR fortran/93462
        * gfortran.dg/goacc/atomic-1.f90: New.

middle-end: Fix logical shift truncation (PR rtl-optimization/91838)

This fixes a fall-out from a patch I had submitted two years ago which started
allowing simplify-rtx to fold logical right shifts by offsets a followed by b
into >> (a + b).

However this can generate inefficient code when the resulting shift count ends
up being the same as the size of the shift mode.  This will create some
undefined behavior on most platforms.

This patch changes to code to truncate to 0 if the shift amount goes out of
range.  Before my older patch this used to happen in combine when it saw the
two shifts.  However since we combine them here combine never gets a chance to
truncate them.

The issue mostly affects GCC 8 and 9 since on 10 the back-end knows how to deal
with this shift constant but it's better to do the right thing in simplify-rtx.

Note that this doesn't take care of the Arithmetic shift where you could replace
the constant with MODE_BITS (mode) - 1, but that's not a regression so punting it.

gcc/ChangeLog:

PR rtl-optimization/91838
* simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
to truncate if allowed or reject combination.

gcc/testsuite/ChangeLog:

PR rtl-optimization/91838
* g++.dg/pr91838.C: New test.

Fix fast-math-pr55281.c ICE

2020-01-31 Andrew Stubbs <ams@codesourcery.com>

gcc/
* tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
(find_inv_vars_cb): Likewise.

calls.c: refactor special_function_p for use by analyzer (v2)

This patch refactors some code in special_function_p that checks for
the function being sane to match by name, splitting it out into a new
maybe_special_function_p, and using it it two places in the analyzer.

gcc/analyzer/ChangeLog:
* analyzer.cc (is_named_call_p): Replace tests for fndecl being
extern at file scope and having a non-NULL DECL_NAME with a call
to maybe_special_function_p.
* function-set.cc (function_set::contains_decl_p): Add call to
maybe_special_function_p.

gcc/ChangeLog:
* calls.c (special_function_p): Split out the check for DECL_NAME
being non-NULL and fndecl being extern at file scope into a
new maybe_special_function_p and call it. Drop check for fndecl
being non-NULL that was after a usage of DECL_NAME (fndecl).
* tree.h (maybe_special_function_p): New inline function.

analyzer: further fixes for comparisons between uncomparable types (PR 93450)

gcc/analyzer/ChangeLog:
PR analyzer/93450
* constraint-manager.cc
(constraint_manager::get_or_add_equiv_class): Only compare constants
if their types are compatible.
* region-model.cc (constant_svalue::eval_condition): Replace check
for identical types with call to types_compatible_p.

Zero-initialise masked load destinations

Fixes an execution failure in testcase gfortran.dg/assumed_rank_1.f90.

2020-01-30 Andrew Stubbs <ams@codesourcery.com>

gcc/
* config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
(mask_gather_load<mode>): ... here, and zero-initialize the
destination.
(maskload<mode>di): Zero-initialize the destination.
* config/gcn/gcn.c:

analyzer: add extrinsic_state::dump

gcc/analyzer/ChangeLog:
* program-state.cc (extrinsic_state::dump_to_pp): New.
(extrinsic_state::dump_to_file): New.
(extrinsic_state::dump): New.
* program-state.h (extrinsic_state::dump_to_pp): New decl.
(extrinsic_state::dump_to_file): New decl.
(extrinsic_state::dump): New decl.
* sm.cc: Include "pretty-print.h".
(state_machine::dump_to_pp): New.
* sm.h (state_machine::dump_to_pp): New decl.

analyzer: make extrinsic_state field private

gcc/analyzer/ChangeLog:
* diagnostic-manager.cc (for_each_state_change): Use
extrinsic_state::get_num_checkers rather than accessing m_checkers
directly.
* program-state.cc (program_state::program_state): Likewise.
* program-state.h (extrinsic_state::m_checkers): Make private.

Daily bump.

analyzer: avoid using <string.h> in malloc-1.c

This test assumes that memset and strlen have been marked with
__attribute__((nonnull)), which isn't necessarily the case for an
arbitrary <string.h>. This likely explains these failures:
 FAIL: gcc.dg/analyzer/malloc-1.c (test for warnings, line 417)
 FAIL: gcc.dg/analyzer/malloc-1.c (test for warnings, line 418)
 FAIL: gcc.dg/analyzer/malloc-1.c (test for warnings, line 425)
 FAIL: gcc.dg/analyzer/malloc-1.c (test for warnings, line 429)
seen in https://gcc.gnu.org/ml/gcc-testresults/2020-01/msg01608.html
on x86_64-apple-darwin18.

Fix it by using the __builtin_ forms.

gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/malloc-1.c: Remove include of <string.h>.
Use __builtin_ forms of memset and strlen throughout.

analyzer: convert conditionals-2.c to a torture test

gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/conditionals-2.c: Move to...
* gcc.dg/analyzer/torture/conditionals-2.c: ...here, converting
to a torture test. Remove redundant include.

analyzer: fix ICE in __builtin_isnan (PR 93356)

PR analyzer/93356 reports an ICE handling __builtin_isnan due to a
failing assertion:
  674     gcc_assert (lhs_ec_id != rhs_ec_id);
with op=UNORDERED_EXPR.
when attempting to add an UNORDERED_EXPR constraint.

This is an overzealous assertion, but underlying it are various forms of
sloppiness regarding NaN within the analyzer:

  (a) the assumption in the constraint_manager that equivalence classes
  are reflexive (X == X), which isn't the case for NaN.

  (b) Hardcoding the "honor_nans" param to false when calling
  invert_tree_comparison throughout the analyzer.

  (c) Ignoring ORDERED_EXPR, UNORDERED_EXPR, and the UN-prefixed
  comparison codes.

I wrote a patch for this which tracks the NaN-ness of floating-point
values and uses this to address all of the above.

However, to minimize changes in gcc 10 stage 4, here's a simpler patch
which rejects attempts to query or add constraints on floating-point
values, instead treating any floating-point comparison as "unknown", and
silently dropping the constraints at edges.

gcc/analyzer/ChangeLog:
PR analyzer/93356
* region-model.cc (region_model::eval_condition): In both
overloads, bail out immediately on floating-point types.
(region_model::eval_condition_without_cm): Likewise.
(region_model::add_constraint): Likewise.

gcc/testsuite/ChangeLog:
PR analyzer/93356
* gcc.dg/analyzer/conditionals-notrans.c (test_float_selfcmp):
Add.
* gcc.dg/analyzer/conditionals-trans.c: Mark floating point
comparison test as failing.
(test_float_selfcmp): Add.
* gcc.dg/analyzer/data-model-1.c: Mark floating point comparison
tests as failing.
* gcc.dg/analyzer/torture/pr93356.c: New test.

gcc/ChangeLog:
PR analyzer/93356
* doc/analyzer.texi (Limitations): Note that constraints on
floating-point values are currently ignored.

Mark switch expression as used to avoid bogus warning

        PR c/88660
        * c-parser.c (c_parser_switch_statement): Make sure to request
        marking the switch expr as used.

        PR c/88660
        * gcc.dg/pr88660.c: New test.

cgraph: Avoid creating multiple *.localalias aliases with the same name [PR93384]

The following testcase FAILs on powerpc64le-linux with assembler errors, as we
emit a call to bar.localalias, then .set bar.localalias, bar twice and then
another call to bar.localalias. The problem is that bar.localalias can be created
at various stages and e.g. ipa-pure-const can slightly adjust the original decl,
so that the existing bar.localalias isn't considered usable (different
flags_from_decl_or_type). In that case, we'd create another bar.localalias, which
clashes with the existing name.

Fixed by retrying with another name if it is already present. The various localalias
aliases shouldn't be that many, from different partitions they would be lto_priv
suffixed and in most cases they would already have the same type/flags/attributes.

2020-01-30 Jakub Jelinek <jakub@redhat.com>

PR lto/93384
* symtab.c (symtab_node::noninterposable_alias): If localalias
already exists, but is not usable, append numbers after it until
a unique name is found. Formatting fix.

* gcc.dg/lto/pr93384_0.c: New test.
* gcc.dg/lto/pr93384_1.c: New file.

combine: Punt on out of range rotate counts [PR93505]

What happens on this testcase is with the out of bounds rotate we get:
Trying 13 -> 16:
 13: r129:SI=r132:DI#0<-<0x20
 REG_DEAD r132:DI
 16: r123:DI=r129:SI<0
 REG_DEAD r129:SI
Successfully matched this instruction:
(set (reg/v:DI 123 [ <retval> ])
 (const_int 0 [0]))
during combine. So, perhaps we could also change simplify-rtx.c to punt
if it is out of bounds rather than trying to optimize anything.
Or, but probably GCC11 material, if we decide that ROTATE/ROTATERT doesn't
have out of bounds counts or introduce targetm.rotate_truncation_mask,
we should truncate the argument instead of punting.
Punting is better for backports though.

2020-01-30 Jakub Jelinek <jakub@redhat.com>

PR middle-end/93505
* combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
rotate counts.

* gcc.c-torture/compile/pr93505.c: New test.

c++: Fix -Wtype-limits in templates.

When instantiating a template tsubst_copy_and_build suppresses -Wtype-limits
warnings about e.g. == always being false because it might not always be
false for an instantiation with other template arguments. But we should
warn if the operands don't depend on template arguments.

PR c++/82521
* pt.c (tsubst_copy_and_build) [EQ_EXPR]: Only suppress warnings if
the expression was dependent before substitution.

Remove check for maximum symbol name length.

        PR fortran/87103
        * expr.c (gfc_check_conformance): Check vsnprintf for truncation.
        * iresolve.c (gfc_get_string): Likewise.
        * symbol.c (gfc_new_symbol): Remove check for maximum symbol
        name length.  Remove redundant 0 setting of new calloc()ed
        gfc_symbol.

Add LTGT operator support for amdgcn

Fixes ICE in testcase gcc.dg/pr81228.c

2020-01-30 Andrew Stubbs <ams@codesourcery.com>

gcc/
* config/gcn/gcn.c (print_operand): Handle LTGT.
* config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.

Fix "regression" reported by c6x testing.

* gcc.dg/tree-ssa/ssa-dse-26.c: Make existing dg-final scan
conditional on !c6x. Add dg-final scan pattern for c6x.

PR middle-end/92323 - bogus -Warray-bounds after unrolling despite __builtin_unreachable

gcc/testsuite/ChangeLog:
* gcc.dg/Warray-bounds-57.c: New test.

dump CTORs properly wrapped with _Literal with -gimple

This wraps { ... } in _Literal (type) for consumption by the GIMPLE FE.

2020-01-30 Richard Biener <rguenther@suse.de>

* tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.

analyzer: avoid comparisons between uncomparable types (PR 93450)

PR analyzer/93450 reports an ICE trying to fold an EQ_EXPR comparison
of (int)0 with (float)Inf.

Most comparisons inside the analyzer come from gimple conditions, for
which the necessary casts have already been added.

This one is done inside constant_svalue::eval_condition as part of
purging sm-state for an unknown function call, and fails to check
the types being compared, leading to the ICE.

sm_state_map::set_state calls region_model::eval_condition_without_cm in
order to handle pointer equality (so that e.g. (void *)&r and (foo *)&r
transition together), which leads to this code generating a bogus query
to see if the two constants are equal.

This patch fixes the ICE in two ways:

- It avoids generating comparisons within
  constant_svalue::eval_condition unless the types are equal (thus for
  constants, but not for pointer values, which are handled by
  region_svalue).

- It updates sm_state_map::set_state to bail immediately if the new
  state is the same as the old one, thus avoiding the above for the
  common case where an svalue_id has no sm-state (such as for the int
  and float constants in the reproducer), for which the above becomes a
  no-op.

gcc/analyzer/ChangeLog:
PR analyzer/93450
* program-state.cc (sm_state_map::set_state): For the overload
taking an svalue_id, bail out if the set_state on the ec does
nothing.  Convert the latter's return type from void to bool,
returning true if anything changed.
(sm_state_map::impl_set_state): Convert the return type from void
to bool, returning true if the state changed.
* program-state.h (sm_state_map::set_state): Convert return type
from void to bool.
(sm_state_map::impl_set_state): Likewise.
* region-model.cc (constant_svalue::eval_condition): Only call
fold_build2 if the types are the same.

gcc/testsuite/ChangeLog:
PR analyzer/93450
* gcc.dg/analyzer/torture/pr93450.c: New test.

Fix ICE in pa_elf_select_rtx_section.

2020-01-30 John David Anglin <danglin@gcc.gnu.org>

* config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
without a DECL in .data.rel.ro.local.

arm: Fix uaddvdi4 expander [PR93494]

uaddvdi4 expander has an optimization for the low 32-bits of the 2nd input
operand known to be 0. Unfortunately, in that case it only emits copying of
the low 32 bits to the low 32 bits of the destination, but doesn't emit the
addition with overflow detection for the high 64 bits.
Well, to be precise, it emits it, but into an RTL sequence returned by
gen_uaddvsi4, but that sequence isn't emitted anywhere.

2020-01-30 Jakub Jelinek <jakub@redhat.com>

PR target/93494
* config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
returned.

* gcc.c-torture/execute/pr93494.c: New test.

Skip plugin-{gcn,hsa} for (-m)x32 (PR bootstrap/93409)

        PR bootstrap/93409
        * plugin/configfrag.ac (enable_offload_targets): Skip
        HSA and GCN plugin besides -m32 also for -mx32.
        * configure: Regenerate.

Add testcase of PR c++/90338, already fixed in trunk.

PR c++/90338
* g++.dg/pr90338.C: New.

i386: Optimize {,v}{,p}movmsk{b,ps,pd} followed by sign extension [PR91824]

Some time ago, patterns were added to optimize move mask followed by zero
extension from 32 bits to 64 bit. As the testcase shows, the intrinsics
actually return int, not unsigned int, so it will happen quite often that
one actually needs sign extension instead of zero extension. Except for
vpmovmskb with 256-bit operand, sign vs. zero extension doesn't make a
difference, as we know the bit 31 will not be set (the source will have 2 or
4 doubles, 4 or 8 floats or 16 or 32 chars).
So, for the floating point patterns, this patch just uses a code iterator
so that we handle both zero extend and sign extend, and for the byte one
adds a separate pattern for the 128-bit operand.

2020-01-30 Jakub Jelinek <jakub@redhat.com>

PR target/91824
* config/i386/sse.md
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_ext): ... this. Use
any_extend code iterator instead of always zero_extend.
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_ext_lt): ... this.
Use any_extend code iterator instead of always zero_extend.
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_ext_shift): ... this.
Use any_extend code iterator instead of always zero_extend.
(*sse2_pmovmskb_ext): New define_insn.
(*sse2_pmovmskb_ext_lt): New define_insn_and_split.

* gcc.target/i386/pr91824-2.c: New test.

i386: Optimize popcnt followed by zero/sign extension [PR91824]

Like any other instruction with 32-bit GPR destination operand in 64-bit
mode, popcntl also clears the upper 32 bits of the register (and other bits
too, it can return only 0 to 32 inclusive).

During combine, the zero or sign extensions of it show up as paradoxical
subreg of the popcount & 63, there 63 is the smallest power of two - 1 mask
that can represent all the 0 to 32 inclusive values.

2020-01-30 Jakub Jelinek <jakub@redhat.com>

PR target/91824
* config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
(*popcountsi2_zext_falsedep): New define_insn.

* gcc.target/i386/pr91824-1.c: New test.

fortran: Fix up ISO_Fortran_binding_15.f90 failures [PR92123]

This is something that has been discussed already a few months ago, but
seems to have stalled. Here is Paul's patch from the PR except for the
TREE_STATIC hunk which is wrong, and does the most conservative fn spec
tweak for the problematic two builtins we are aware of (to repeat what is in
the PR, both .wR and .ww are wrong for these builtins that transform one
layout of an descriptor to another one; while the first pointer is properly
marked that we only store to what it points to, from the second pointer
we copy and reshuffle the content and store into the first one; if there
wouldn't be any pointers, ".wr" would be just fine, but as there is a
pointer and that pointer is copied to the area pointed by first argument,
the pointer effectively leaks that way, so we e.g. can't optimize stores
into what the data pointer in the descriptor points to). I haven't
analyzed other fn spec attributes in the FE, but think it is better to
fix at least this one we have analyzed.

2020-01-30 Paul Thomas <pault@gcc.gnu.org>
 Jakub Jelinek <jakub@redhat.com>

PR fortran/92123
* trans-decl.c (gfc_get_symbol_decl): Call gfc_defer_symbol_init for
CFI descs.
(gfc_build_builtin_function_decls): Use ".w." instead of ".ww" or ".wR"
for gfor_fndecl_{cfi_to_gfc,gfc_to_cfi}.
(convert_CFI_desc): Handle references to CFI descriptors.

Co-authored-by: Paul Thomas <pault@gcc.gnu.org>

Regenerate configure for 54b3d52

Commit 54b3d52 ("Emit .note.GNU-stack for hard-float linux targets.")
was missing generated files. Add them now.

gcc/ChangeLog:

2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>

* config.in: Regenerated.
* configure: Regenerated.

Use promise in coroutine frame in actor function.

By standard, coroutine body should be encapsulated in try-catch block
as following:
  try {
    // coroutine body
  } catch(...) {
    promise.unhandled_exception();
  }
Given above try-catch block is implemented in the coroutine actor
function called by coroutine ramp function, so the promise should
be accessed via actor function's coroutine frame pointer argument,
rather than the ramp function's coroutine frame variable.

This patch cleans code a bit to make fix easy.

gcc/cp
    * coroutines.cc (act_des_fn): New.
    (morph_fn_to_coro): Call act_des_fn to build actor/destroy decls.
    Access promise via actor function's frame pointer argument.
    (build_actor_fn, build_destroy_fn): Use frame pointer argument.

Handle CO_AWAIT_EXPR in conversion in co_await_expander.

Function co_await_expander expands CO_AWAIT_EXPR and inserts expanded
code before result of co_await is used, however, it doesn't cover the
type conversion case and leads to gimplify ICE.  This patch fixes it.

gcc/cp
    * coroutines.cc (co_await_expander): Handle type conversion case.

gcc/testsuite
    * g++.dg/coroutines/co-await-syntax-09-convert.C: New test.

runtime, syscall: add a couple of hurd build tags

Patch by Svante Signell.

Updates PR go/93468

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/216959

runtime: update netpoll_hurd.go for go1.14beta1 changes

Patch from Svante Signell.

Updates PR go/93468

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/216958

c++: Drop alignas restriction for stack variables.

Since expand_stack_vars and such know how to deal with variables aligned
beyond MAX_SUPPORTED_STACK_ALIGNMENT, we shouldn't reject alignas of large
alignments. And if we don't do that, there's no point in having
check_cxx_fundamental_alignment_constraints at all, since
check_user_alignment already enforces MAX_OFILE_ALIGNMENT.

PR c++/89357
* c-attribs.c (check_cxx_fundamental_alignment_constraints): Remove.

Daily bump.

testsuite: Fix up tree-ssa/pr92706-1.c on 32-bit targets.

The test uses __int128_t, so won't work on targets that don't support it.

2020-01-30 Jakub Jelinek <jakub@redhat.com>

PR tree-optimization/92706
* gcc.dg/tree-ssa/pr92706-1.c: Require int128 effective target.

c++: Fix attributes with lambda and trailing return type.

My fix for 60503 fixed handling of C++11 attributes following the
lambda-declarator.  My patch for 89640 re-added support for GNU attributes,
but attributes after the trailing return type were parsed as applying to the
return type rather than to the function.  This patch adjusts parsing of a
trailing-return-type to ignore GNU attributes at the end of the declaration
so that they will be applied to the declaration as a whole.

I also considered parsing the attributes between the closing paren and the
trailing-return-type, and tried a variety of approaches to implementing
that, but I think it's better to stick with the documented rule that "An
attribute specifier list may appear immediately before the comma, '=' or
semicolon terminating the declaration of an identifier...."  Anyone
disagree?

Meanwhile, C++ committee discussion about the lack of any way to apply
attributes to a lambda op() seems to have concluded that they should go
between the introducer and declarator, so I've implemented that as well.

PR c++/90333
PR c++/89640
PR c++/60503
* parser.c (cp_parser_type_specifier_seq): Don't parse attributes in
a trailing return type.
(cp_parser_lambda_declarator_opt): Parse C++11 attributes before
parens.

GCN – call assembler with -mattr=-code-object-v3 (PR93409)

        PR bootstrap/93409
        * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
        LLVM's assembler changed the default in version 9.

c++: Add new test [PR88092]

This test got fixed by r10-1976-gdaaa6fcc70ffe66bd56f5819ad4ee78fecd54bb6
so let's add it to the testsuite.

PR c++/88092
* g++.dg/cpp2a/nontype-class31.C: New test.

Improve DSE which in turn eliminates the need for jump threading and block duplication for the original testcase in pr89689 which in turn eliminates the false positive -Warray-bounds warning for the original testcase.

PR tree-optimization/89689
* builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.

PR tree-optimization/89689
* gcc.dg/pr89689.c: New test.

Revert g-465c7c89e92a6d6d582173e505cb16dcb9873034

The patch caused regressions in gcc.target/sh/pr64345-1.c on
sh3-linux-gnu and gcc.target/m68k/pr39726.c on m68k-linux-gnu.
It didn't look like they would be fixable in an acceptably
non-invasive and unhacky way, so punting till future releases.

2020-01-29 Richard Sandiford <richard.sandiford@arm.com>

gcc/
Revert:

2020-01-28 Richard Sandiford <richard.sandiford@arm.com>

PR rtl-optimization/87763
* simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
simplification to handle subregs as well as bare regs.
* config/i386/i386.md (*testqi_ext_3): Match QI extracts too.

c++: Fix template arguments comparison with class NTTP [PR91754]

Here we fail to compile the attached test, stating that the use of
T<s> in T<s>::T() {} is "invalid use of incomplete type". It is a
function definition so grokdeclarator checks that the qualifying type
is complete.

When we parsed the class T, finish_struct gave the class a non-null
TYPE_SIZE, making it COMPLETE_TYPE_P. But then we're parsing T<s>,
a TEMPLATE_ID, in

 T<s>::T() {}

so try to lookup_template_class T. This failed because we couldn't
find such a class: comp_template_args told us that the argument lists
don't match, because one of the args was wrapped in a VIEW_CONVERT_EXPR
to make it look const. It seems to me that we should see through
these artificial wrappers and consider the args same.

2020-01-29 Marek Polacek <polacek@redhat.com>

PR c++/91754 - Fix template arguments comparison with class NTTP.
* pt.c (class_nttp_const_wrapper_p): New.
(template_args_equal): See through class_nttp_const_wrapper_p
arguments.

* g++.dg/cpp2a/nontype-class30.C: New test.

c++: Fix class NTTP with template arguments [PR92948]

This PR points out an ICE with an alias template and class NTTP, but I
found that there are more issues. Trouble arise when we use a
(non-type) template parameter as an argument to the template arg list of
a template that accepts a class NTTP and a conversion to a class is
involved, e.g.

 struct A { A(int) { } };
 template<A a> struct B { };

 template<int X> void fn () {
 B<X> b;
 }

Normally for such a conversion we create a TARGET_EXPR with an
AGGR_INIT_EXPR that calls a __ct_comp with some arguments, but not in
this case: when converting X to type A in convert_nontype_argument we
are in a template and the template parameter 'X' is value-dependent, and
AGGR_INIT_EXPR don't work in templates. So it just creates a TARGET_EXPR
that contains "A::A(*this, X)", but with that overload resolution fails:
 error: no matching function for call to 'A::A(A*, int)'
That happens because finish_call_expr for a BASELINK creates a dummy
object, so we have 'this' twice. I thought for the value-dependent case
we could use IMPLICIT_CONV_EXPR, as in the patch below. Note that I
only do this when we convert to a different type than the type of the
expr. The point is to avoid the call to a converting ctor.

The second issue was an ICE in tsubst_copy: when there's a conversion
like the above involved then
/* Wrapper to make a C++20 template parameter object const. */
 op = tsubst_copy (op, args, complain, in_decl);
might not produce a _ZT... VAR_DECL with const type, so the assert
 gcc_assert (CP_TYPE_CONST_P (TREE_TYPE (op)));
fails. Allowing IMPLICIT_CONV_EXPR there probably makes sense.

And since convert_nontype_argument uses value_dependent_expression_p
a lot, I used a dedicated bool to speed things up.

2020-01-29 Marek Polacek <polacek@redhat.com>

PR c++/92948 - Fix class NTTP with template arguments.
* pt.c (convert_nontype_argument): Use IMPLICIT_CONV_EXPR when
converting a value-dependent expression to a class type.
(tsubst_copy) <case VIEW_CONVERT_EXPR>: Allow IMPLICIT_CONV_EXPR
as the result of the tsubst_copy call.

* g++.dg/cpp2a/nontype-class28.C: New test.
* g++.dg/cpp2a/nontype-class29.C: New test.

libstdc++: Fix conformance issues in <stop_token> (PR92895)

Fix synchronization issues in <stop_token>. Replace shared_ptr with
_Stop_state_ref and a reference count embedded in the shared state.
Replace std::mutex with spinlock using one bit of a std::atomic<> that
also tracks whether a stop request has been made and how many
stop_source objects share ownership of the state.

PR libstdc++/92895
* include/std/stop_token (stop_token::stop_possible()): Call new
_M_stop_possible() function.
(stop_token::stop_requested()): Do not use stop_possible().
(stop_token::binary_semaphore): New class, as temporary stand-in for
std::binary_semaphore.
(stop_token::_Stop_cb::_M_callback): Add noexcept to type.
(stop_token::_Stop_cb::_M_destroyed, stop_token::_Stop_cb::_M_done):
New data members for symchronization with stop_callback destruction.
(stop_token::_Stop_cb::_Stop_cb): Make non-template.
(stop_token::_Stop_cb::_M_linked, stop_token::_Stop_cb::_S_execute):
Remove.
(stop_token::_Stop_cb::_M_run): New member function.
(stop_token::_Stop_state::_M_stopped, stop_token::_Stop_state::_M_mtx):
Remove.
(stop_token::_Stop_state::_M_owners): New data member to track
reference count for ownership.
(stop_token::_Stop_state::_M_value): New data member combining a
spinlock, the stop requested flag, and the reference count for
associated stop_source objects.
(stop_token::_Stop_state::_M_requester): New data member for
synchronization with stop_callback destruction.
(stop_token::_Stop_state::_M_stop_possible()): New member function.
(stop_token::_Stop_state::_M_stop_requested()): Inspect relevant bit
of _M_value.
(stop_token::_Stop_state::_M_add_owner)
(stop_token::_Stop_state::_M_release_ownership)
(stop_token::_Stop_state::_M_add_ssrc)
(stop_token::_Stop_state::_M_sub_ssrc): New member functions for
updating reference counts.
(stop_token::_Stop_state::_M_lock, stop_token::_Stop_state::_M_unlock)
(stop_token::_Stop_state::_M_lock, stop_token::_Stop_state::_M_unlock)
(stop_token::_Stop_state::_M_try_lock)
(stop_token::_Stop_state::_M_try_lock_and_stop)
(stop_token::_Stop_state::_M_do_try_lock): New member functions for
managing spinlock.
(stop_token::_Stop_state::_M_request_stop): Use atomic operations to
read and update state. Release lock while running callbacks. Use new
data members to synchronize with callback destruction.
(stop_token::_Stop_state::_M_remove_callback): Likewise.
(stop_token::_Stop_state::_M_register_callback): Use atomic operations
to read and update state.
(stop_token::_Stop_state_ref): Handle type to manage _Stop_state,
replacing shared_ptr.
(stop_source::stop_source(const stop_source&)): Update reference count.
(stop_source::operator=(const stop_source&)): Likewise.
(stop_source::~stop_source()): Likewise.
(stop_source::stop_source(stop_source&&)): Define as defaulted.
(stop_source::operator=(stop_source&&)): Establish postcondition on
parameter.
(stop_callback): Enforce preconditions on template parameter. Replace
base class with data member of new _Cb_impl type.
(stop_callback::stop_callback(const stop_token&, Cb&&))
(stop_callback::stop_callback(stop_token&&, Cb&&)): Fix TOCTTOU race.
(stop_callback::_Cb_impl): New type wrapping _Callback member and
defining the _S_execute member function.
* testsuite/30_threads/stop_token/stop_callback/deadlock-mt.cc: New
test.
* testsuite/30_threads/stop_token/stop_callback/deadlock.cc: New test.
* testsuite/30_threads/stop_token/stop_callback/destroy.cc: New test.
* testsuite/30_threads/stop_token/stop_callback/destructible_neg.cc:
New test.
* testsuite/30_threads/stop_token/stop_callback/invocable_neg.cc: New
test.
* testsuite/30_threads/stop_token/stop_callback/invoke.cc: New test.
* testsuite/30_threads/stop_token/stop_source/assign.cc: New test.
* testsuite/30_threads/stop_token/stop_token/stop_possible.cc: New
test.

Add acc_device_radeon to name_of_acc_device_t function

libgomp/
* oacc-init.c (name_of_acc_device_t): Handle acc_device_radeon.

Reviewed-by: Thomas Schwinge <thomas@codesourcery.com>

IRA: Revert 11b8091fb to fix PR 93221

A previous change to simplify LRA introduced in 11b809 (From-SVN: r279550)
disabled hard register splitting for -O0. This causes a problem on aarch64 in
cases where parameters are passed in multiple registers (in the bug report an OI
passed in 2 V4SI registers). This is mandated by the AAPCS.

gcc/ChangeLog:
2020-01-29 Joel Hutton <Joel.Hutton@arm.com>

PR target/93221
* ira.c (ira): Revert use of simplified LRA algorithm.

gcc/testsuite/ChangeLog:
2020-01-29 Joel Hutton <Joel.Hutton@arm.com>

PR target/93221
* gcc.target/aarch64/pr93221.c: New test.

libstdc++: Simplify constraints on std::compare_three_way

The __3way_builtin_ptr_cmp concept can use three_way_comparable_with to
check whether <=> is valid. Doing that makes it obvious that the
disjunction on compare_three_way::operator() is redundant, because
the second constraint subsumes the first.

The workaround for PR c++/91073 can also be removed as that bug is fixed
now.

* libsupc++/compare (__detail::__3way_builtin_ptr_cmp): Use
three_way_comparable_with.
(__detail::__3way_cmp_with): Remove workaround for fixed bug.
(compare_three_way::operator()): Remove redundant constraint from
requires-clause.
(__detail::_Synth3way::operator()): Use three_way_comparable_with
instead of workaround.
* testsuite/18_support/comparisons/object/93479.cc: Prune extra
output due to simplified constraints on compare_three_way::operator().

libstdc++: Make std::compare_three_way check if <=> is valid (PR 93479)

Currently types that cannot be compared using <=> but which are
convertible to pointers will be compared by converting to pointers
first. They should not be comparable.

PR libstdc++/93479
* libsupc++/compare (__3way_builtin_ptr_cmp): Require <=> to be valid.
* testsuite/18_support/comparisons/object/93479.cc: New test.

libstdc++: Make tests for std::ranges access functions more robust

* testsuite/std/ranges/access/end.cc: Do not assume test_range::end()
returns the same type as test_range::begin(). Add comments.
* testsuite/std/ranges/access/rbegin.cc: Likewise.
* testsuite/std/ranges/access/rend.cc: Likewise.
* testsuite/std/ranges/range.cc: Do not assume the sentinel for
test_range is the same as its iterator type.
* testsuite/util/testsuite_iterators.h (test_range::sentinel): Add
operator- overloads to satisfy sized_sentinel_for when the iterator
satisfies random_access_iterator.

SRA: Also propagate accesses from LHS to RHS [PR92706]

2020-01-29 Martin Jambor <mjambor@suse.cz>

PR tree-optimization/92706
* tree-sra.c (struct access): Fields first_link, last_link,
next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
next_rhs_queued and grp_rhs_queued respectively, new fields
first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
(struct assign_link): Field next renamed to next_rhs, new field
next_lhs. Updated comment.
(work_queue_head): Renamed to rhs_work_queue_head.
(lhs_work_queue_head): New variable.
(add_link_to_lhs): New function.
(relink_to_new_repr): Also relink LHS lists.
(add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
(add_access_to_lhs_work_queue): New function.
(pop_access_from_work_queue): Renamed to
pop_access_from_rhs_work_queue.
(pop_access_from_lhs_work_queue): New function.
(build_accesses_from_assign): Also add links to LHS lists and to LHS
work_queue.
(child_would_conflict_in_lacc): Renamed to
child_would_conflict_in_acc. Adjusted parameter names.
(create_artificial_child_access): New parameter set_grp_read, use it.
(subtree_mark_written_and_enqueue): Renamed to
subtree_mark_written_and_rhs_enqueue.
(propagate_subaccesses_across_link): Renamed to
propagate_subaccesses_from_rhs.
(propagate_subaccesses_from_lhs): New function.
(propagate_all_subaccesses): Also propagate subaccesses from LHSs to
RHSs.

testsuite/
* gcc.dg/tree-ssa/pr92706-1.c: New test.

SRA: Total scalarization after access propagation [PR92706]

2020-01-29 Martin Jambor <mjambor@suse.cz>

PR tree-optimization/92706
* tree-sra.c (struct access): Adjust comment of
grp_total_scalarization.
(find_access_in_subtree): Look for single children spanning an entire
access.
(scalarizable_type_p): Allow register accesses, adjust callers.
(completely_scalarize): Remove function.
(scalarize_elem): Likewise.
(create_total_scalarization_access): Likewise.
(sort_and_splice_var_accesses): Do not track total scalarization
flags.
(analyze_access_subtree): New parameter totally, adjust to new meaning
of grp_total_scalarization.
(analyze_access_trees): Pass new parameter to analyze_access_subtree.
(can_totally_scalarize_forest_p): New function.
(create_total_scalarization_access): Likewise.
(create_total_access_and_reshape): Likewise.
(total_should_skip_creating_access): Likewise.
(totally_scalarize_subtree): Likewise.
(analyze_all_variable_accesses): Perform total scalarization after
subaccess propagation using the new functions above.
(initialize_constant_pool_replacements): Output initializers by
traversing the access tree.

testsuite/
* gcc.dg/tree-ssa/pr92706-2.c: New test.
* gcc.dg/guality/pr59776.c: Xfail tests for s2.g.