Sebastien Bourdeauducq [Mon, 19 Oct 2015 11:18:17 +0000 (19:18 +0800)]
sim: accept iterables as generator list
Sebastien Bourdeauducq [Mon, 19 Oct 2015 11:17:26 +0000 (19:17 +0800)]
verilog, sim: accept iterables in FHDL statements
Sebastien Bourdeauducq [Mon, 19 Oct 2015 11:03:43 +0000 (19:03 +0800)]
genlib/fsm: fix return value of _get_register_control
Sebastien Bourdeauducq [Mon, 19 Oct 2015 08:30:41 +0000 (16:30 +0800)]
MANIFEST.in: fix lm32 data directory
Sebastien Bourdeauducq [Mon, 19 Oct 2015 08:08:42 +0000 (16:08 +0800)]
Revert "sim/core: fix Cat bitshift"
This reverts commit
6d6f91a02b6ff4b5459fe91fcae5b97ce915f7dd.
Sebastien Bourdeauducq [Mon, 19 Oct 2015 08:07:45 +0000 (16:07 +0800)]
sim/core: fix Cat bitshift
Sebastien Bourdeauducq [Mon, 19 Oct 2015 07:58:21 +0000 (15:58 +0800)]
sim/core: truncate evaluated values before test in If
Sebastien Bourdeauducq [Mon, 19 Oct 2015 03:33:21 +0000 (11:33 +0800)]
software: do not build libdyld and libunwind for lm32. Closes #22
Sebastien Bourdeauducq [Mon, 19 Oct 2015 01:40:44 +0000 (09:40 +0800)]
build/vivado: quote paths in Tcl (prevents problems with \ on Windows)
Sebastien Bourdeauducq [Thu, 15 Oct 2015 05:53:04 +0000 (13:53 +0800)]
sim: support execution of nested statement lists (typo)
Sebastien Bourdeauducq [Thu, 15 Oct 2015 05:52:24 +0000 (13:52 +0800)]
sim: support execution of nested statement lists
Sebastien Bourdeauducq [Wed, 14 Oct 2015 13:45:36 +0000 (21:45 +0800)]
integration/builder: escape backslash in makefile defines
Sebastien Bourdeauducq [Wed, 14 Oct 2015 13:36:44 +0000 (21:36 +0800)]
genlib/fifo: width_or_layout -> width
Sebastien Bourdeauducq [Wed, 14 Oct 2015 03:11:06 +0000 (11:11 +0800)]
Merge branch 'new' of github.com:m-labs/misoc into new
Sebastien Bourdeauducq [Wed, 14 Oct 2015 03:09:53 +0000 (11:09 +0800)]
integration/builder: fix building for SoCSDRAM-based targets when SDRAM is disabled
Reported by Florent Kermarrec
Florent Kermarrec [Tue, 13 Oct 2015 16:13:00 +0000 (18:13 +0200)]
software/bios: move romboot after serialboot and netboot
On designs using romboot (firmware embedded in ram blocks), we generally upload new firmwares with serialboot and netboot for prototyping.
Moving romboot after serialboot and netboot avoid manual interrupts of the boot sequence.
Florent Kermarrec [Tue, 13 Oct 2015 15:49:29 +0000 (17:49 +0200)]
software/bios: move romboot after serialboot and netboot
On designs using romboot (firmware embedded in ram blocks), we generally upload new firmwares with serialboot and netboot for prototyping.
Moving romboot after serialboot and netboot avoid manual interrupts of the boot sequence.
Sebastien Bourdeauducq [Tue, 13 Oct 2015 10:39:41 +0000 (18:39 +0800)]
test/divider: subtests
Yann Sionneau [Mon, 12 Oct 2015 18:06:29 +0000 (20:06 +0200)]
vivado progammer: allow to specify flash chip
Sebastien Bourdeauducq [Mon, 5 Oct 2015 04:24:32 +0000 (12:24 +0800)]
sim: make sure replaced memory signals are always in VCD signal set
Sebastien Bourdeauducq [Mon, 5 Oct 2015 04:07:55 +0000 (12:07 +0800)]
setup: include software and Verilog files
Broken on Python 3.5
error: can't copy 'misoc/software': doesn't exist or not a regular file
Florent Kermarrec [Sun, 4 Oct 2015 22:10:55 +0000 (00:10 +0200)]
interconnect/stream: add missing part of Demultiplexer
Sebastien Bourdeauducq [Sun, 4 Oct 2015 16:45:02 +0000 (00:45 +0800)]
setup: add entry points
Sebastien Bourdeauducq [Sun, 4 Oct 2015 16:44:50 +0000 (00:44 +0800)]
setup: fix readme
Sebastien Bourdeauducq [Sun, 4 Oct 2015 16:10:04 +0000 (00:10 +0800)]
travis/conda: build for python 3.5
Sebastien Bourdeauducq [Sun, 4 Oct 2015 16:10:04 +0000 (00:10 +0800)]
travis/conda: build for python 3.5
Sebastien Bourdeauducq [Sun, 4 Oct 2015 15:11:16 +0000 (23:11 +0800)]
travis: activate py35
Sebastien Bourdeauducq [Sun, 4 Oct 2015 15:11:16 +0000 (23:11 +0800)]
travis: activate py35
Sebastien Bourdeauducq [Sun, 4 Oct 2015 15:08:14 +0000 (23:08 +0800)]
travis: python 3.5
Sebastien Bourdeauducq [Sun, 4 Oct 2015 15:08:14 +0000 (23:08 +0800)]
travis: python 3.5
Sebastien Bourdeauducq [Fri, 2 Oct 2015 03:17:47 +0000 (11:17 +0800)]
sdram: cleanup
Sebastien Bourdeauducq [Wed, 30 Sep 2015 12:17:37 +0000 (20:17 +0800)]
liteeth_mini: fix imports, replace Counter and FlipFlop
Sebastien Bourdeauducq [Wed, 30 Sep 2015 11:43:14 +0000 (19:43 +0800)]
interconnect/stream: add multiplexer and demultiplexer
Sebastien Bourdeauducq [Wed, 30 Sep 2015 10:58:46 +0000 (18:58 +0800)]
genlib/fifo: add missing imports
Sebastien Bourdeauducq [Wed, 30 Sep 2015 09:06:31 +0000 (17:06 +0800)]
test/fifo: do not use Record
Sebastien Bourdeauducq [Wed, 30 Sep 2015 08:40:34 +0000 (16:40 +0800)]
interconnect/stream: remove param, do not depend on FIFO Record support
Sebastien Bourdeauducq [Wed, 30 Sep 2015 08:40:04 +0000 (16:40 +0800)]
lasmicon: do not depend on FIFO Record support
Sebastien Bourdeauducq [Wed, 30 Sep 2015 08:39:33 +0000 (16:39 +0800)]
genlib/fifo: remove Record support
Sebastien Bourdeauducq [Tue, 29 Sep 2015 10:14:54 +0000 (18:14 +0800)]
command line options support, CSR CSV, all targets building
Sebastien Bourdeauducq [Tue, 29 Sep 2015 10:14:19 +0000 (18:14 +0800)]
flterm: cleanup
Sebastien Bourdeauducq [Tue, 29 Sep 2015 10:13:59 +0000 (18:13 +0800)]
cores/gpio: fix import
Sebastien Bourdeauducq [Tue, 29 Sep 2015 07:53:18 +0000 (15:53 +0800)]
build: stop at the first failed Quartus command
Sebastien Bourdeauducq [Tue, 29 Sep 2015 07:44:57 +0000 (15:44 +0800)]
build: add missing import for Lattice Diamond
Sebastien Bourdeauducq [Tue, 29 Sep 2015 05:12:27 +0000 (13:12 +0800)]
fhdl/FullMemoryWE: fix clocking
Sebastien Bourdeauducq [Tue, 29 Sep 2015 05:11:40 +0000 (13:11 +0800)]
fhdl: typecheck ClockSignal and ResetSignal arguments
Sebastien Bourdeauducq [Tue, 29 Sep 2015 02:19:42 +0000 (10:19 +0800)]
soc_core: simplify settings (assume CPU and CSR present)
Sebastien Bourdeauducq [Tue, 29 Sep 2015 02:19:00 +0000 (10:19 +0800)]
minor fixes
Sebastien Bourdeauducq [Mon, 28 Sep 2015 12:40:37 +0000 (20:40 +0800)]
Merge branch 'master' of github.com:m-labs/misoc
Sebastien Bourdeauducq [Mon, 28 Sep 2015 12:40:31 +0000 (20:40 +0800)]
Revert "Sort constants in csr generation."
This reverts commit
d628c147ecb92c871cc68e2f29511c600861fcb9.
Sebastien Bourdeauducq [Mon, 28 Sep 2015 12:34:35 +0000 (20:34 +0800)]
build: cleanup
Sebastien Bourdeauducq [Mon, 28 Sep 2015 12:33:37 +0000 (20:33 +0800)]
basic out-of-tree build support (OK on PPro)
whitequark [Mon, 28 Sep 2015 09:37:55 +0000 (12:37 +0300)]
Fix typo.
Sebastien Bourdeauducq [Mon, 28 Sep 2015 05:02:13 +0000 (13:02 +0800)]
move software into misoc
Tim 'mithro' Ansell [Sat, 26 Sep 2015 07:57:43 +0000 (17:57 +1000)]
Sort constants in csr generation.
Previously the order of constant output depended on Python's hashing order
which changes every run. This caused the file to change every run.
With this change the csr.h file will always be the same. This can be verified
this with the following;
```bash
CSR=software/include/generated/csr.h
for i in 1 2 3 4 5 6; do
rm -f $CSR; python make.py build-headers
cp $CSR $CSR.$i
done
md5sum $CSR.*
```
Tim 'mithro' Ansell [Sat, 26 Sep 2015 07:57:43 +0000 (17:57 +1000)]
Sort constants in csr generation.
Previously the order of constant output depended on Python's hashing order
which changes every run. This caused the file to change every run.
With this change the csr.h file will always be the same. This can be verified
this with the following;
```bash
CSR=software/include/generated/csr.h
for i in 1 2 3 4 5 6; do
rm -f $CSR; python make.py build-headers
cp $CSR $CSR.$i
done
md5sum $CSR.*
```
Sebastien Bourdeauducq [Sat, 26 Sep 2015 13:55:11 +0000 (21:55 +0800)]
Revert "Use shutil rather then rm -rf command."
This reverts commit
d8fd4fe7257eea9efe252376305b716b2f51840f.
Sebastien Bourdeauducq [Sat, 26 Sep 2015 13:54:19 +0000 (21:54 +0800)]
Revert "Use shutil rather then rm -rf command."
This reverts commit
d8fd4fe7257eea9efe252376305b716b2f51840f.
Sebastien Bourdeauducq [Sat, 26 Sep 2015 13:51:22 +0000 (21:51 +0800)]
sdram working on PPro
Sebastien Bourdeauducq [Sat, 26 Sep 2015 13:49:12 +0000 (21:49 +0800)]
fhdl/specials/Tristate: handle i=None
Sebastien Bourdeauducq [Sat, 26 Sep 2015 13:47:33 +0000 (21:47 +0800)]
fhdl/structure: relax type requirements for Array elements
Sebastien Bourdeauducq [Sat, 26 Sep 2015 10:50:11 +0000 (18:50 +0800)]
replace flen with len
Sebastien Bourdeauducq [Sat, 26 Sep 2015 10:45:10 +0000 (18:45 +0800)]
fhdl: replace flen with len
Sebastien Bourdeauducq [Sat, 26 Sep 2015 08:45:13 +0000 (16:45 +0800)]
wrap expressions in Specials
Sebastien Bourdeauducq [Sat, 26 Sep 2015 08:44:06 +0000 (16:44 +0800)]
add stream, fix CPUs and more imports. simple target boots on ppro.
Sebastien Bourdeauducq [Sat, 26 Sep 2015 07:36:28 +0000 (15:36 +0800)]
fhdl: introduce wrap function
Sebastien Bourdeauducq [Sat, 26 Sep 2015 05:46:57 +0000 (13:46 +0800)]
fhdl: export DUID
Sebastien Bourdeauducq [Fri, 25 Sep 2015 10:43:20 +0000 (18:43 +0800)]
fix most imports
Sebastien Bourdeauducq [Thu, 24 Sep 2015 12:48:18 +0000 (20:48 +0800)]
interconnect: add bus/bank components from Migen
Sebastien Bourdeauducq [Thu, 24 Sep 2015 08:08:39 +0000 (16:08 +0800)]
setup: simpler version check, beta status
Sebastien Bourdeauducq [Thu, 24 Sep 2015 08:01:08 +0000 (16:01 +0800)]
lasmicon: enable refresh at all times
Sebastien Bourdeauducq [Thu, 24 Sep 2015 07:59:55 +0000 (15:59 +0800)]
break down sdram, improve consistency of core names
Sebastien Bourdeauducq [Thu, 24 Sep 2015 01:05:10 +0000 (09:05 +0800)]
cores directory
Sebastien Bourdeauducq [Wed, 23 Sep 2015 16:18:27 +0000 (00:18 +0800)]
reorganization WIP: flatten core structure (SDRAM still needs to be done)
Sebastien Bourdeauducq [Wed, 23 Sep 2015 14:38:10 +0000 (22:38 +0800)]
fsm: NextState and NextValue should derive from _Statement
Sebastien Bourdeauducq [Wed, 23 Sep 2015 01:52:24 +0000 (09:52 +0800)]
setup: remove unneeded import
Sebastien Bourdeauducq [Wed, 23 Sep 2015 01:52:12 +0000 (09:52 +0800)]
setup: cleanup
Sebastien Bourdeauducq [Wed, 23 Sep 2015 01:50:31 +0000 (09:50 +0800)]
setup: convert to unix eols
Sebastien Bourdeauducq [Tue, 22 Sep 2015 16:57:36 +0000 (00:57 +0800)]
CONTRIBUTING.md->rst
Sebastien Bourdeauducq [Tue, 22 Sep 2015 16:55:37 +0000 (00:55 +0800)]
README.md->rst
Sebastien Bourdeauducq [Tue, 22 Sep 2015 16:36:47 +0000 (00:36 +0800)]
migen.fhdl.std -> migen
Sebastien Bourdeauducq [Tue, 22 Sep 2015 16:35:02 +0000 (00:35 +0800)]
misoclib -> misoc
Sebastien Bourdeauducq [Tue, 22 Sep 2015 12:33:44 +0000 (20:33 +0800)]
sim: fix slice assign
Sebastien Bourdeauducq [Tue, 22 Sep 2015 09:27:44 +0000 (17:27 +0800)]
conda: use new branch (revert this after merge)
Sebastien Bourdeauducq [Tue, 22 Sep 2015 09:27:27 +0000 (17:27 +0800)]
setup.py: cleanup
Sebastien Bourdeauducq [Tue, 22 Sep 2015 08:55:24 +0000 (16:55 +0800)]
fsm: support complex targets in NextValue. Closes #27.
Sebastien Bourdeauducq [Tue, 22 Sep 2015 06:30:16 +0000 (14:30 +0800)]
fhdl/namer: support ClockSignal and ResetSignal. Closes #24
Rohit Kumar Singh [Mon, 21 Sep 2015 15:39:48 +0000 (21:09 +0530)]
Add init file in sdram/phy dir
Without __init__.py file, when using setup.py, setuptools' find_package() function does not find the files in sdram/phy package. Hence .egg file entirely misses sdram/phy directory
More info here: https://bitbucket.org/pypa/setuptools/issues/97
Sebastien Bourdeauducq [Mon, 21 Sep 2015 14:13:36 +0000 (22:13 +0800)]
sim: insert resets, support ClockSignal and ResetSignal
Sebastien Bourdeauducq [Mon, 21 Sep 2015 13:52:13 +0000 (21:52 +0800)]
sim: drive clock signals
Sebastien Bourdeauducq [Mon, 21 Sep 2015 13:20:31 +0000 (21:20 +0800)]
sim: VCD output support
Sebastien Bourdeauducq [Mon, 21 Sep 2015 13:19:58 +0000 (21:19 +0800)]
verilog: remove unneeded import
Sebastien Bourdeauducq [Mon, 21 Sep 2015 13:19:39 +0000 (21:19 +0800)]
doc: minor edits
Florent Kermarrec [Mon, 21 Sep 2015 07:04:59 +0000 (09:04 +0200)]
uart/software: remove litescope dependency
Tim 'mithro' Ansell [Sun, 20 Sep 2015 13:09:16 +0000 (23:09 +1000)]
Adding --help option to flterm.
Sebastien Bourdeauducq [Sun, 20 Sep 2015 08:13:08 +0000 (16:13 +0800)]
doc: remove spurious file
Sebastien Bourdeauducq [Sun, 20 Sep 2015 08:10:40 +0000 (16:10 +0800)]
doc: remove outdated or moved parts, cleanup
Sebastien Bourdeauducq [Sun, 20 Sep 2015 08:10:17 +0000 (16:10 +0800)]
fhdl/visit: support Constant
Sebastien Bourdeauducq [Sun, 20 Sep 2015 07:12:04 +0000 (15:12 +0800)]
travis: VPI is not there for now
Sebastien Bourdeauducq [Sun, 20 Sep 2015 07:04:15 +0000 (15:04 +0800)]
sim: support generators yielding statements
Sebastien Bourdeauducq [Sun, 20 Sep 2015 06:52:26 +0000 (14:52 +0800)]
sim: memory access from generators