Jason Merrill [Thu, 15 Mar 2018 03:49:07 +0000 (23:49 -0400)]
PR c++/84801 - ICE with unexpanded pack in lambda.
We avoid complaining about unexpanded packs when inside a lambda,
since the lambda as a whole could be part of a pack expansion.
But that can only be true if the lambda is in a template context.
* pt.c (check_for_bare_parameter_packs): Don't return early for a
lambda in non-template context.
From-SVN: r258548
Jason Merrill [Thu, 15 Mar 2018 03:08:24 +0000 (23:08 -0400)]
PR c++/81236 - auto variable and auto function
* pt.c (tsubst_baselink): Update the type of the BASELINK after
mark_used.
From-SVN: r258547
GCC Administrator [Thu, 15 Mar 2018 00:16:25 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r258546
John David Anglin [Wed, 14 Mar 2018 23:31:57 +0000 (23:31 +0000)]
re PR target/83451 (FAIL: gfortran.dg/matmul_10.f90 -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (ICE))
PR target/83451
* config/pa/pa.c (pa_emit_move_sequence): Always emit secondary reload
insn for floating-point loads and stores.
From-SVN: r258541
Jonathan Wakely [Wed, 14 Mar 2018 23:02:01 +0000 (23:02 +0000)]
PR libstdc++/78420 Make std::less etc. yield total order for pointers
In order for std::less<T*> etc. to meet the total order requirements of
[comparisons] p2 we need to cast unrelated pointers to uintptr_t before
comparing them. Those casts aren't allowed in constant expressions, so
only cast when __builtin_constant_p says the result of the comparison is
not a compile-time constant (because the arguments are not constants, or
the result of the comparison is unspecified). When the result is
constant just compare the pointers directly without casting.
This ensures that the function can be called in constant expressions
with suitable arguments, but still yields a total order even for
otherwise unspecified pointer comparisons.
For std::less<void> etc. add new overloads for pointers, which use
std::less<common_type_t<T*,U*>> directly. Also change the generic
overloads to detect when the comparison would call a built-in relational
operator with pointer operands, and dispatch that case to the
corresponding specialization for void pointers.
PR libstdc++/78420
* include/bits/stl_function.h (greater<_Tp*>, less<_Tp*>)
(greater_equal<_Tp*>, less_equal<_Tp>*): Add partial specializations
to ensure total order for pointers.
(greater<void>, less<void>, greater_equal<void>, less_equal<void>):
Add operator() overloads for pointer arguments and make generic
overloads dispatch to new _S_cmp functions when comparisons would
use built-in operators for pointers.
* testsuite/20_util/function_objects/comparisons_pointer.cc: New.
From-SVN: r258540
Carl Love [Wed, 14 Mar 2018 23:01:12 +0000 (23:01 +0000)]
re PR target/84422 (ICE on various builtin test functions when compiled with -mcpu=power7)
gcc/ChangeLog:
2018-03-14 Carl Love <cel@us.ibm.com>
PR target/84422
* config/rs6000/rs6000-builtin.def: Change expansion for
VMULESW to BU_P8V_AV_2.
Change expansion for VMULEUW to BU_P8V_AV_2.
* config/rs6000/rs6000.c: Change
ALTIVEC_BUILTIN_VMULESW to P8V_BUILTIN_VMULESW.
Change ALTIVEC_BUILTIN_VMULEUW to P8V_BUILTIN_VMULEUW.
Change ALTIVEC_BUILTIN_VMULOSW to P8V_BUILTIN_VMULOSW.
Change ALTIVEC_BUILTIN_VMULOUW to P8V_BUILTIN_VMULOUW.
* config/rs6000/rs6000-c.c: Change
ALTIVEC_BUILTIN_VMULESW to P8V_BUILTIN_VMULESW.
Change ALTIVEC_BUILTIN_VMULEUW to P8V_BUILTIN_VMULEUW.
Change ALTIVEC_BUILTIN_VMULOSW to P8V_BUILTIN_VMULOSW.
Change ALTIVEC_BUILTIN_VMULOUW to P8V_BUILTIN_VMULOUW.
From-SVN: r258539
Jason Merrill [Wed, 14 Mar 2018 19:17:03 +0000 (15:17 -0400)]
PR c++/83916 - ICE with template template parameters.
* pt.c (convert_template_argument): Don't substitute into type of
non-type parameter if we don't have enough arg levels.
(unify): Likewise.
From-SVN: r258533
Carl Love [Wed, 14 Mar 2018 17:38:15 +0000 (17:38 +0000)]
rs6000-c.c: Add macro definitions for ALTIVEC_BUILTIN_VEC_PERMXOR.
gcc/ChangeLog:
2018-03-14 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c: Add macro definitions for
ALTIVEC_BUILTIN_VEC_PERMXOR.
* config/rs6000/rs6000.h: Add #define for vec_permxor builtin.
* config/rs6000/rs6000-builtin.def: Add macro expansions for VPERMXOR.
* config/rs6000/altivec.md (altivec_vpermxor): New define expand.
* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Add case
UNSPEC_VPERMXOR.
* config/doc/extend.texi: Add prototypes for vec_permxor.
gcc/testsuite/ChangeLog:
2018-03-14 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-7-runnable.c: New test file.
From-SVN: r258530
Martin Liska [Wed, 14 Mar 2018 17:26:38 +0000 (18:26 +0100)]
Add test-case (PR ipa/84805).
2018-03-14 Martin Liska <mliska@suse.cz>
PR ipa/8480
* g++.dg/lto/pr84805_0.C: New test.
* g++.dg/lto/pr84805_1.C: New test.
* g++.dg/lto/pr84805_2.C: New test.
From-SVN: r258529
David Malcolm [Wed, 14 Mar 2018 13:58:13 +0000 (13:58 +0000)]
Fix ICE for missing header fix-it hints with overlarge #line directives (PR c/84852)
PR c/84852 reports an ICE inside diagnostic_show_locus when printing
a diagnostic for a source file with a #line >= 2^31:
#line
7777777777
int foo (void) { return strlen(""); }
where we're attempting to print a fix-it hint at the top of the file
and underline the "strlen" (two "line spans").
The
#line
7777777777
won't fix within the 32-bit linenum_type, and is truncated from
0x1cf977871
to
0xcf977871
i.e.
3482810481 in decimal.
Such a #line is reported by -pedantic and -pedantic-errors, but we
shouldn't ICE.
The ICE is an assertion failure within layout::calculate_line_spans,
where the line spans have not been properly sorted.
The layout_ranges are stored as int, rather than linenum_type,
giving line -
812156815 for the error, and line 1 for the fix-it hint.
However, line_span uses linenum_type rather than int.
line_span::comparator compares these values as int, and hence
decides that (linenum_type)
3482810481 aka (int)-
812156815 is less
than line 1.
This leads to this assertion failing in layout::calculate_line_spans:
1105 gcc_assert (next->m_first_line >= current->m_first_line);
since it isn't the case that 1 >=
3482810481.
The underlying problem is the mix of types for storing line numbers:
in parts of libcpp and diagnostic-show-locus.c we use linenum_type;
in other places (including libcpp's expanded_location) we use int.
I looked at using linenum_type throughout, but doing so turned into
a large patch, so this patch fixes the ICE in a less invasive way
by merely using linenum_type more consistently just within
diagnostic-show-locus.c, and fixing line_span::comparator to properly
handle line numbers (and line number differences) >= 2^31, by using
a new helper function for linenum_type differences, computing the
difference using long long, and using the sign of the difference
(as the difference might not fit in the "int" return type imposed
by qsort).
gcc/ChangeLog:
PR c/84852
* diagnostic-show-locus.c (class layout_point): Convert m_line
from int to linenum_type.
(line_span::comparator): Use linenum "compare" function when
comparing line numbers.
(test_line_span): New function.
(layout_range::contains_point): Convert param "row" from int to
linenum_type.
(layout_range::intersects_line_p): Likewise.
(layout::will_show_line_p): Likewise.
(layout::print_source_line): Likewise.
(layout::should_print_annotation_line_p): Likewise.
(layout::print_annotation_line): Likewise.
(layout::print_leading_fixits): Likewise.
(layout::annotation_line_showed_range_p): Likewise.
(struct line_corrections): Likewise for field m_row.
(line_corrections::line_corrections): Likewise for param "row".
(layout::print_trailing_fixits): Likewise.
(layout::get_state_at_point): Likewise.
(layout::get_x_bound_for_row): Likewise.
(layout::print_line): Likewise.
(diagnostic_show_locus): Likewise for locals "last_line" and
"row".
(selftest::diagnostic_show_locus_c_tests): Call test_line_span.
* input.c (selftest::test_linenum_comparisons): New function.
(selftest::input_c_tests): Call it.
* selftest.c (selftest::test_assertions): Test ASSERT_GT,
ASSERT_GT_AT, ASSERT_LT, and ASSERT_LT_AT.
* selftest.h (ASSERT_GT): New macro.
(ASSERT_GT_AT): New macro.
(ASSERT_LT): New macro.
(ASSERT_LT_AT): New macro.
gcc/testsuite/ChangeLog:
PR c/84852
* gcc.dg/fixits-pr84852-1.c: New test.
* gcc.dg/fixits-pr84852-2.c: New test.
libcpp/ChangeLog:
* include/line-map.h (compare): New function on linenum_type.
From-SVN: r258526
Segher Boessenkool [Wed, 14 Mar 2018 13:46:03 +0000 (14:46 +0100)]
rs6000: Fix sanitizer frame unwind on 32-bit ABIs
This fixes more than half of our testcase failures on BE.
libsanitizer/
* sanitizer_common/sanitizer_stacktrace.cc
(BufferedStackTrace::FastUnwindStack): Use the correct frame offset
for PowerPC SYSV ABI.
From-SVN: r258525
Segher Boessenkool [Wed, 14 Mar 2018 12:24:21 +0000 (13:24 +0100)]
combine: Don't make log_links for pc_rtx (PR84780 #c10)
distribute_links tries to place a log_link for whatever the destination
of the modified instruction is. It shouldn't do that when that dest
is pc_rtx, which isn't actually a register.
* combine.c (distribute_links): Don't make a link based on pc_rtx.
From-SVN: r258523
Martin Liska [Wed, 14 Mar 2018 11:17:01 +0000 (12:17 +0100)]
Fix tree statistics with -fmem-report.
2018-03-14 Martin Liska <mliska@suse.cz>
* tree.c (record_node_allocation_statistics): Use
get_stats_node_kind.
(get_stats_node_kind): New function extracted from
record_node_allocation_statistics.
(free_node): Use get_stats_node_kind.
From-SVN: r258521
Richard Biener [Wed, 14 Mar 2018 10:55:45 +0000 (10:55 +0000)]
tree-ssa-pre.c (compute_antic_aux): Remove code that asserts that the value-set of ANTIC_IN doesn't grow.
2018-03-14 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c (compute_antic_aux): Remove code that asserts
that the value-set of ANTIC_IN doesn't grow.
Revert
* tree-ssa-pre.c (struct bb_bitmap_sets): Add visited_with_visited_succs
member.
(BB_VISITED_WITH_VISITED_SUCCS): New define.
(compute_antic): Initialize BB_VISITED_WITH_VISITED_SUCCS.
From-SVN: r258520
Thomas Preud'homme [Wed, 14 Mar 2018 10:47:32 +0000 (10:47 +0000)]
Fix FAIL display for some scan-*-times directives
scan-assembler-times and scan-tree-dump-times dejagnu directives show a
different output in the summary files depending on whether they PASS or
FAIL. This means that dg-cmp-results would not show a regression because
it would not see a connection between the two output.
The difference comes from the FAIL showing the number of actual times
the pattern was match, presumably to help debugging. This patch moves
the info regarding the actual number of times the pattern match in a
separate verbose message. This keeps the message unchanged but let
developers have the required debug message with -v.
2018-03-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* lib/scanasm.exp (scan-assembler-times): Move FAIL debug info into a
separate verbose message.
* lib/scandump.exp (scan-dump-times): Likewise.
From-SVN: r258519
Julia Koval [Wed, 14 Mar 2018 10:26:38 +0000 (11:26 +0100)]
Split-up -march=icelake on -march=icelake-server and -march=icelake-client
Split-up -march=icelake on -march=icelake-server and -march=icelake-client
gcc/
* config.gcc (icelake-client, icelake-server): New.
(icelake): Remove.
* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
(initial_ix86_arch_features): Ditto.
(PTA_SKYLAKE): Add SGX.
(PTA_ICELAKE): Remove.
(PTA_ICELAKE_CLIENT): New.
(PTA_ICELAKE_SERVER): New.
(ix86_option_override_internal): Split up icelake on icelake client and
icelake server.
(get_builtin_code_for_version): Ditto.
(fold_builtin_cpu): Ditto.
* config/i386/driver-i386.c (config/i386/driver-i386.c): Ditto.
* config/i386/i386-c.c (ix86_target_macros_internal): Ditto
* config/i386/i386.h (processor_type): Ditto.
* doc/invoke.texi: Ditto.
gcc/testsuite/
* g++.dg/ext/mv16.C: Split up icelake on icelake client and
icelake-server.
* gcc.target/i386/funcspec-56.inc: Ditto.
libgcc/
* config/i386/cpuinfo.h (processor_subtypes): Split up icelake on
icelake-client and icelake-server.
From-SVN: r258518
Richard Sandiford [Wed, 14 Mar 2018 09:12:55 +0000 (09:12 +0000)]
[AArch64] Fix mul_highpart_1_run.c markup
2018-03-14 Richard Sandiford <richard.sandiford@linaro.org>
gcc/testsuite/
* gcc.target/aarch64/sve/mul_highpart_1_run.c: Restrict to
aarch64_sve_hw.
From-SVN: r258517
Jakub Jelinek [Wed, 14 Mar 2018 08:50:23 +0000 (09:50 +0100)]
re PR sanitizer/83392 (FAIL: c-c++-common/ubsan/ptr-overflow-sanitization-1.c scan-tree-dump-times)
PR sanitizer/83392
* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Handle also
INTEGER_CST offset, add it together with bitpos / 8 and
sign extend based on POINTER_SIZE.
* c-c++-common/ubsan/ptr-overflow-sanitization-1.c: Adjust expected
check count from 17 to 14.
From-SVN: r258516
Jakub Jelinek [Wed, 14 Mar 2018 08:48:40 +0000 (09:48 +0100)]
re PR target/84844 (ICE in extract_constrain_insn_cached, at recog.c:2217 (error: insn does not satisfy its constraints))
PR target/84844
Revert
2017-04-20 Uros Bizjak <ubizjak@gmail.com>
PR target/78090
* config/i386/constraints.md (Yc): New register constraint.
* config/i386/i386.md (*float<SWI48:mode><MODEF:mode>2_mixed):
Use Yc constraint for alternative 2 of operand 0. Remove
preferred_for_speed attribute.
* gcc.target/i386/pr84844.c: New test.
From-SVN: r258515
Richard Biener [Wed, 14 Mar 2018 08:07:45 +0000 (08:07 +0000)]
re PR tree-optimization/84830 (ICE in compute_antic, at tree-ssa-pre.c:2388)
2018-03-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/84830
* tree-ssa-pre.c (compute_antic_aux): Intersect the new ANTIC_IN
with the old one to avoid oscillations.
* gcc.dg/torture/pr84830.c: New testcase.
From-SVN: r258514
Marek Polacek [Wed, 14 Mar 2018 06:14:57 +0000 (06:14 +0000)]
re PR c++/84596 (internal compiler error: unexpected expression '(bool)c' of kind implicit_conv_expr (cxx_eval_constant_expression))
PR c++/84596
* semantics.c (finish_static_assert): Check
instantiation_dependent_expression_p instead of
{type,value}_dependent_expression_p.
* g++.dg/cpp0x/static_assert15.C: New test.
From-SVN: r258513
Paolo Carlini [Wed, 14 Mar 2018 01:03:13 +0000 (01:03 +0000)]
PR c++/82336 - link error with list-init default argument.
* decl.c (check_default_argument): Unshare an initializer list.
Co-Authored-By: Jason Merrill <jason@redhat.com>
From-SVN: r258512
Steven G. Kargl [Wed, 14 Mar 2018 00:56:48 +0000 (00:56 +0000)]
check.c (gfc_check_kill_sub): Remove check for INTEGER(4) or (8).
2018-03-13 Steven G. Kargl <kargl@gcc.gnu.org>
* check.c (gfc_check_kill_sub): Remove check for INTEGER(4) or (8).
* intrinsic.c (add_functions): Remove reference to gfc_resolve_kill.
(add_subroutines): Remove reference to gfc_resolve_kill_sub.
* intrinsic.texi: Update documentation.
* iresolve.c (gfc_resolve_kill, gfc_resolve_kill_sub): Remove.
* trans-decl.c (gfc_build_intrinsic_function_decls): Add
gfor_fndecl_kill and gfor_fndecl_kill_sub
* trans-intrinsic.c (conv_intrinsic_kill, conv_intrinsic_kill_sub): new
functions.
(gfc_conv_intrinsic_function): Use conv_intrinsic_kill.
(gfc_conv_intrinsic_subroutine): Use conv_intrinsic_kill_sub.
* trans.h: Declare gfor_fndecl_kill and gfor_fndecl_kill_sub.
2018-03-13 Steven G. Kargl <kargl@gcc.gnu.org>
* libgfortran/gfortran.map: Remove _gfortran_kill_i4,
_gfortran_kill_i4_sub, _gfortran_kill_i8, and _gfortran_kill_i8_sub.
Add _gfortran_kill and _gfortran_kill_sub.
* libgfortran/intrinsics/kill.c: Eliminate _gfortran_kill_i4,
_gfortran_kill_i4_sub, _gfortran_kill_i8, and _gfortran_kill_i8_sub.
Add _gfortran_kill and _gfortran_kill_sub.
From-SVN: r258511
Steven G. Kargl [Wed, 14 Mar 2018 00:45:45 +0000 (00:45 +0000)]
re PR fortran/61775 (Allocatable array initialized by implied-do loop array constructor gives invalid memory reference)
2018-03-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/61775
* gfortran.dg/pr61775.f90: New test.
From-SVN: r258509
GCC Administrator [Wed, 14 Mar 2018 00:16:27 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r258508
Vladimir Makarov [Tue, 13 Mar 2018 20:42:49 +0000 (20:42 +0000)]
re PR target/83712 ("Unable to find a register to spill" when compiling for thumb1)
2018-03-13 Vladimir Makarov <vmakarov@redhat.com>
PR target/83712
* lra-assigns.c (find_all_spills_for): Ignore uninteresting
pseudos.
(assign_by_spills): Return a flag of reload assignment failure.
Do not process the reload assignment failures. Do not spill other
reload pseudos if they has the same reg class. Update n if
necessary.
(lra_assign): Add a return arg. Set up from the result of
assign_by_spills call.
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
usage_insns if it is not NULL.
(spill_hard_reg_in_range): New function.
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
function prototypes.
(lra_assign): Change prototype.
* lra.c (lra): Add code to deal with fails by splitting hard reg
live ranges.
From-SVN: r258504
Jakub Jelinek [Tue, 13 Mar 2018 20:32:54 +0000 (21:32 +0100)]
re PR c++/84843 (C++ ICE on builtin redefinition since r258391)
PR c++/84843
* decl.c (duplicate_decls): For redefinition of built-in, use error
and return error_mark_node. For redeclaration, return error_mark_node
rather than olddecl if !flag_permissive.
* g++.dg/ext/pr84843-1.C: New test.
* g++.dg/ext/pr84843-2.C: New test.
From-SVN: r258503
Jason Merrill [Tue, 13 Mar 2018 20:22:31 +0000 (16:22 -0400)]
PR c++/82565 - ICE with concepts and generic lambda.
* pt.c (instantiate_decl): Clear fn_context for lambdas.
From-SVN: r258502
Jason Merrill [Tue, 13 Mar 2018 18:58:15 +0000 (14:58 -0400)]
PR c++/84720 - ICE with rvalue ref non-type argument.
* pt.c (convert_nontype_argument): Handle rvalue references.
From-SVN: r258501
Jason Merrill [Tue, 13 Mar 2018 18:57:10 +0000 (14:57 -0400)]
PR c++/84839 - ICE with decltype of parameter pack.
* pt.c (tsubst_pack_expansion): Set cp_unevaluated_operand while
instantiating dummy parms.
From-SVN: r258500
Palmer Dabbelt [Tue, 13 Mar 2018 18:35:06 +0000 (18:35 +0000)]
RISC-V: Add and document the "-mno-relax" option
RISC-V relies on aggressive linker relaxation to get good code size. As
a result no text symbol addresses can be known until link time, which
means that alignment must be handled during the link. This alignment
pass is essentially just another linker relaxation, so this has the
unfortunate side effect that linker relaxation is required for
correctness on many RISC-V targets.
The RISC-V assembler has supported an ".option norelax" for a long time
because there are situations in which linker relaxation is a bad idea --
the canonical example is when trying to materialize the initial value of
the global pointer into a register, which would otherwise be relaxed to
a NOP. We've been relying on users who want to disable relaxation for
an entire link to pass "-Wl,--no-relax", but that still relies on the
linker relaxing R_RISCV_ALIGN to handle alignment despite it not being
strictly necessary.
This patch adds a GCC option, "-mno-relax", that disable linker
relaxation by adding ".option norelax" to the top of every generated
assembly file. The assembler is smart enough to handle alignment at
assemble time for files that have never emitted a relaxable relocation,
so this is sufficient to really disable all relaxations in the linker,
which results in significantly faster link times for large objects.
This also has the side effect of allowing toolchains that don't support
linker relaxation (LLVM and the Linux module loader) to function
correctly. Toolchains that don't support linker relaxation should
default to "-mno-relax" and error when presented with any R_RISCV_ALIGN
relocation as those need to be handled for correctness.
gcc/ChangeLog
2018-03-13 Palmer Dabbelt <palmer@sifive.com>
* config/riscv/riscv.opt (mrelax): New option.
* config/riscv/riscv.c (riscv_file_start): Emit ".option
"norelax" when riscv_mrelax is disabled.
* doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax".
From-SVN: r258499
David Pagan [Tue, 13 Mar 2018 18:10:09 +0000 (18:10 +0000)]
PR c/46921 Lost side effect when struct initializer expression uses comma operator
This patch fixes improper handling of comma operator expression in a
struct field initializer as described in:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46921
Currently, function output_init_element () does not evaluate the left
hand expression in a comma operator that's used for a struct
initializer field if the right hand side is zero-sized. However, the
left hand expression must be evaluated if it's found to have side
effects (for example, a function call).
Patch was successfully bootstrapped and tested on x86_64-linux.
gcc/c:
2018-03-13 David Pagan <dave.pagan@oracle.com>
PR c/46921
* c-typeck.c (output_init_element): Ensure field initializer
expression is always evaluated if there are side effects.
gcc/testsuite:
2018-03-13 David Pagan <dave.pagan@oracle.com>
PR c/46921
* gcc.dg/pr46921.c: New test.
From-SVN: r258497
Aaron Sawdey [Tue, 13 Mar 2018 16:28:09 +0000 (16:28 +0000)]
re PR target/84743 (default widths for parallel reassociation now hurt rather than help)
2018-03-13 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
PR target/84743
* config/rs6000/rs6000.c (rs6000_reassociation_width): Disable parallel
reassociation for int modes.
From-SVN: r258495
Jason Merrill [Tue, 13 Mar 2018 15:55:44 +0000 (11:55 -0400)]
Pedwarn about auto parameter even without -Wpedantic.
* parser.c (cp_parser_simple_type_specifier): Pedwarn about auto
parameter even without -Wpedantic.
From-SVN: r258494
Jason Merrill [Tue, 13 Mar 2018 15:55:07 +0000 (11:55 -0400)]
PR c++/84798 - ICE with auto in abstract function declarator.
* parser.c (cp_parser_parameter_declaration_clause): Check
parser->default_arg_ok_p.
From-SVN: r258493
Martin Sebor [Tue, 13 Mar 2018 15:33:16 +0000 (15:33 +0000)]
PR tree-optimization/84725 - enable attribute nonstring for all narrow character types
gcc/c-family/ChangeLog:
PR tree-optimization/84725
* c-attribs.c (handle_nonstring_attribute): Allow attribute nonstring
with all three narrow character types, including their qualified forms.
gcc/testsuite/ChangeLog:
PR tree-optimization/84725
* c-c++-common/Wstringop-truncation-4.c: New test.
* c-c++-common/attr-nonstring-5.c: New test.
From-SVN: r258492
Richard Sandiford [Tue, 13 Mar 2018 15:13:37 +0000 (15:13 +0000)]
[SLP/AArch64] Fix unpack handling for big-endian SVE
I hadn't realised that on big-endian targets, VEC_UNPACK*HI_EXPR unpacks
the low-numbered lanes and VEC_UNPACK*LO_EXPR unpacks the high-numbered
lanes. This meant that both the SVE patterns and the handling of
fully-masked loops were wrong.
The patch deals with that by making sure that all vec_unpack* optabs
are define_expands, using BYTES_BIG_ENDIAN to choose the appropriate
define_insn. This in turn meant that we can get rid of the duplication
between the signed and unsigned patterns for predicates. (We provide
implementations of both the signed and unsigned optabs because the sign
doesn't matter for predicates: every element contains only one
significant bit.)
Also, the float unpacks need to unpack one half of the input vector,
but the unpacked upper bits are "don't care". There are two obvious
ways of handling that: use an unpack (filling with zeros) or use a ZIP
(filling with a duplicate of the low bits). The code previously used
unpacks, but the sequence involved a subreg that is semantically an
element reverse on big-endian targets. Using the ZIP patterns avoids
that, and at the moment there's no reason to prefer one over the other
for performance reasons, so the patch switches to ZIP unconditionally.
As the comment says, it would be easy to optimise this later if UUNPK
turns out to be better for some implementations.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks):
Reverse the choice between VEC_UNPACK_LO_EXPR and VEC_UNPACK_HI_EXPR
for big-endian.
* config/aarch64/iterators.md (hi_lanes_optab): New int attribute.
* config/aarch64/aarch64-sve.md
(*aarch64_sve_<perm_insn><perm_hilo><mode>): Rename to...
(aarch64_sve_<perm_insn><perm_hilo><mode>): ...this.
(*extend<mode><Vwide>2): Rename to...
(aarch64_sve_extend<mode><Vwide>2): ...this.
(vec_unpack<su>_<perm_hilo>_<mode>): Turn into a define_expand,
renaming the old pattern to...
(aarch64_sve_punpk<perm_hilo>_<mode>): ...this. Only define
unsigned packs.
(vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>): Turn into a
define_expand, renaming the old pattern to...
(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): ...this.
(*vec_unpacku_<perm_hilo>_<mode>_no_convert): Delete.
(vec_unpacks_<perm_hilo>_<mode>): Take BYTES_BIG_ENDIAN into
account when deciding which SVE instruction the optab should use.
(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Expect zips rather
than unpacks.
* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_float_1.c: Likewise.
From-SVN: r258489
Richard Sandiford [Tue, 13 Mar 2018 15:12:59 +0000 (15:12 +0000)]
[AArch64] Add a tlsdesc call pattern for SVE
tlsdesc calls are guaranteed to preserve all Advanced SIMD registers,
but are not guaranteed to preserve the SVE extension of them.
The calls also don't preserve the SVE predicate registers.
The long-term plan for handling the SVE vector registers is CLOBBER_HIGH,
which adds a clobber equivalent of TARGET_HARD_REGNO_CALL_PART_CLOBBERED.
The pattern can then directly model the fact that the low 128 bits are
preserved and the upper bits are clobbered.
However, it's too late now for that to be included in GCC 8, so this
patch conservatively treats the whole vector register as being clobbered.
This has the obvious disadvantage that compiling for SVE can make NEON
code worse, but I don't think there's much we can do about that until
CLOBBER_HIGH is in.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/aarch64/aarch64.md (V4_REGNUM, V8_REGNUM, V12_REGNUM)
(V20_REGNUM, V24_REGNUM, V28_REGNUM, P1_REGNUM, P2_REGNUM, P3_REGNUM)
(P4_REGNUM, P5_REGNUM, P6_REGNUM, P8_REGNUM, P9_REGNUM, P10_REGNUM)
(P11_REGNUM, P12_REGNUM, P13_REGNUM, P14_REGNUM): New define_constants.
(tlsdesc_small_<mode>): Turn a define_expand and use
tlsdesc_small_sve_<mode> for SVE. Rename original define_insn to...
(tlsdesc_small_advsimd_<mode>): ...this.
(tlsdesc_small_sve_<mode>): New pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/tls_1.c: New test.
* gcc.target/aarch64/sve/tls_2.C: Likewise.
From-SVN: r258488
Richard Sandiford [Tue, 13 Mar 2018 15:12:14 +0000 (15:12 +0000)]
[AArch64] Add SVE mul_highpart patterns
One advantage of the new permute handling compared to the old way is
that we can now easily take advantage of the vectoriser's divmod patterns
for SVE.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART)
(UNSPEC_UMUL_HIGHPART): New constants.
(MUL_HIGHPART): New int iteraor.
(su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART.
* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New
define_expand.
(*<su>mul<mode>3_highpart): New define_insn.
gcc/testsuite/
* gcc.target/aarch64/sve/mul_highpart_1.c: New test.
* gcc.target/aarch64/sve/mul_highpart_1_run.c: Likewise.
From-SVN: r258487
Richard Sandiford [Tue, 13 Mar 2018 15:11:46 +0000 (15:11 +0000)]
MAINTAINERS: Add entry for SVE maintainership.
2018-03-13 Richard Sandiford <richard.sandiford@arm.com>
* MAINTAINERS: Add entry for SVE maintainership.
From-SVN: r258486
Eric Botcazou [Tue, 13 Mar 2018 10:04:51 +0000 (10:04 +0000)]
re PR lto/84805 (ICE in get_odr_type, at ipa-devirt.c:2096 since r258133)
PR lto/84805
* ipa-devirt.c (odr_subtypes_equivalent_p): Do not get the ODR type of
incomplete types.
From-SVN: r258481
Martin Liska [Tue, 13 Mar 2018 08:20:27 +0000 (09:20 +0100)]
Fix PTA info in IPA ICF (PR ipa/84658).
2018-03-13 Martin Liska <mliska@suse.cz>
PR ipa/84658.
* (sem_item_optimizer::sem_item_optimizer): Initialize new
vector.
(sem_item_optimizer::~sem_item_optimizer): Release it.
(sem_item_optimizer::merge_classes): Register variable aliases.
(sem_item_optimizer::fixup_pt_set): New function.
(sem_item_optimizer::fixup_points_to_sets): Likewise.
* ipa-icf.h: Declare new variables and functions.
2018-03-13 Martin Liska <mliska@suse.cz>
PR ipa/84658.
* g++.dg/ipa/pr84658.C: New test.
From-SVN: r258480
Jakub Jelinek [Tue, 13 Mar 2018 08:12:59 +0000 (09:12 +0100)]
re PR middle-end/84834 (ICE: tree check: expected integer_cst, have complex_cst in to_wide, at tree.h:5527)
PR middle-end/84834
* match.pd ((A & C) != 0 ? D : 0): Use INTEGER_CST@2 instead of
integer_pow2p@2 and test integer_pow2p in condition.
(A < 0 ? C : 0): Similarly for @1.
* gcc.dg/pr84834.c: New test.
From-SVN: r258479
Jakub Jelinek [Tue, 13 Mar 2018 08:12:07 +0000 (09:12 +0100)]
re PR middle-end/84831 (Invalid memory read in parse_output_constraint)
PR middle-end/84831
* stmt.c (parse_output_constraint): If the CONSTRAINT_LEN (*p, p)
characters starting at p contain '\0' character, don't look beyond
that.
From-SVN: r258478
Jakub Jelinek [Tue, 13 Mar 2018 08:05:58 +0000 (09:05 +0100)]
re PR target/84827 (ICE in extract_insn, at recog.c:2311)
PR target/84827
* config/i386/i386.md (round<mode>2): For 387 fancy math, disable
pattern if -ftrapping-math -fno-fp-int-builtin-inexact.
* gcc.target/i386/pr84827.c: New test.
From-SVN: r258477
Jakub Jelinek [Tue, 13 Mar 2018 08:04:54 +0000 (09:04 +0100)]
re PR target/84828 (ICE in verify_flow_info at gcc/cfghooks.c:265)
PR target/84828
* reg-stack.c (change_stack): Change update_end var from int to
rtx_insn *, if non-NULL don't update just BB_END (current_block), but
also call set_block_for_insn on the newly added insns and rescan.
* g++.dg/ext/pr84828.C: New test.
From-SVN: r258476
Jakub Jelinek [Tue, 13 Mar 2018 08:03:28 +0000 (09:03 +0100)]
re PR target/84786 ([miscompilation] vunpcklpd accessing xmm16-22 targeting KNL)
PR target/84786
* config/i386/sse.md (sse2_loadhpd): Use Yv constraint rather than v
on the last operand.
* gcc.target/i386/avx512f-pr84786-1.c: New test.
* gcc.target/i386/avx512f-pr84786-2.c: New test.
From-SVN: r258475
GCC Administrator [Tue, 13 Mar 2018 00:16:25 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r258474
Jakub Jelinek [Mon, 12 Mar 2018 23:40:20 +0000 (00:40 +0100)]
re PR c++/84808 (ICE with constexpr and array)
PR c++/84808
* constexpr.c (find_array_ctor_elt): Don't use elt reference after
first potential CONSTRUCTOR_ELTS reallocation. Convert dindex to
sizetype. Formatting fixes.
* g++.dg/cpp1y/constexpr-84808.C: New test.
From-SVN: r258471
Jakub Jelinek [Mon, 12 Mar 2018 23:39:21 +0000 (00:39 +0100)]
re PR c++/84704 (internal compiler error: gimplification failed)
PR c++/84704
* tree.c (stabilize_reference_1): Return save_expr (e) for
STATEMENT_LIST even if it doesn't have side-effects.
* g++.dg/debug/pr84704.C: New test.
From-SVN: r258470
Jonathan Wakely [Mon, 12 Mar 2018 22:52:16 +0000 (22:52 +0000)]
PR libstdc++/84773 use aligned alloc functions for FreeBSD and MinGW cross-compilers
PR libstdc++/84773
PR libstdc++/83662
* crossconfig.m4: Check for aligned_alloc etc. on freebsd and mingw32.
* configure: Regenerate.
* include/c_global/cstdlib [_GLIBCXX_HAVE_ALIGNED_ALLOC]
(aligned_alloc): Add using-declaration.
* testsuite/18_support/aligned_alloc/aligned_alloc.cc: New test.
From-SVN: r258468
Eric Botcazou [Mon, 12 Mar 2018 22:40:05 +0000 (22:40 +0000)]
re PR ada/82813 (warning: '.builtin_memcpy' writing between 2 and 6 bytes into a region of size 0 overflows the destination [-Wstringop-overflow=])
PR ada/82813
* gcc-interface/misc.c (gnat_post_options): Disable string overflow
warnings.
From-SVN: r258466
Jonathan Wakely [Mon, 12 Mar 2018 22:31:12 +0000 (22:31 +0000)]
Fix spelling of -mclflushopt in manual
* doc/invoke.texi (-mclflushopt): Fix spelling of option.
From-SVN: r258462
Renlin Li [Mon, 12 Mar 2018 19:49:24 +0000 (19:49 +0000)]
[PATCH][AARCH64]Fix immediate alternative of movhf_aarch64 pattern.
gcc/
2018-03-12 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
aarch64_output_scalar_simd_mov_immediate.
gcc/testsuite/
2018-03-12 Renlin Li <renlin.li@arm.com>
* gcc.target/aarch64/movi_hf.c: New.
* gcc.target/aarch64/f16_mov_immediate_1.c: Update.
* gcc.target/aarch64/f16_mov_immediate_2.c: Update.
From-SVN: r258459
Martin Sebor [Mon, 12 Mar 2018 18:04:16 +0000 (18:04 +0000)]
PR tree-optimization/83456 - -Wrestrict false positive on a non-overlapping memcpy in an inline function
gcc/ChangeLog:
PR tree-optimization/83456
* gimple-fold.c (gimple_fold_builtin_memory_op): Avoid warning
for perfectly overlapping calls to memcpy.
(gimple_fold_builtin_memory_chk): Same.
(gimple_fold_builtin_strcpy): Handle no-warning.
(gimple_fold_builtin_stxcpy_chk): Same.
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Handle no-warning.
gcc/c-family/ChangeLog:
PR tree-optimization/83456
* gcc/c-family/c-common.c (check_function_restrict): Return bool.
Restore checking of bounded built-in functions.
(check_function_arguments): Also return the result
of warn_for_restrict.
* gcc/c-family/c-common.c (check_function_restrict): Return bool.
* gcc/c-family/c-warn.c (warn_for_restrict): Return bool.
gcc/testsuite/ChangeLog:
PR tree-optimization/83456
* c-c++-common/Wrestrict-2.c: Remove test cases.
* c-c++-common/Wrestrict.c: Same.
* gcc.dg/Wrestrict-12.c: New test.
* gcc.dg/Wrestrict-14.c: New test.
From-SVN: r258455
Segher Boessenkool [Mon, 12 Mar 2018 17:37:39 +0000 (18:37 +0100)]
rs6000: sysv: Don't pass SFmode in varargs in FPRs
This makes the float32-basic.c testcase work on sysv (32-bit Linux).
"float" is promoted to "double" for varargs. The ABI also only defines
the use of double precision in varargs. But _Float32 is not promoted.
Since there is no way of passing single-precision float in FPRs we
should pass SFmode in GPRs (or memory) instead. This is similar to
the 64-bit ABI.
From-SVN: r258454
Joseph Myers [Mon, 12 Mar 2018 17:23:38 +0000 (17:23 +0000)]
* de.po, es.po, sv.po: Update.
From-SVN: r258453
Segher Boessenkool [Mon, 12 Mar 2018 15:26:16 +0000 (16:26 +0100)]
combine: Fix PR84780 (more LOG_LINKS trouble)
There still are situations where we have stale LOG_LINKS. This causes
combine to try two-insn combinations I2->I3 where the register set by
I2 is used before I3 as well. Not good.
This patch fixes it by checking for this situation in can_combine_p
(similar to what we already do for three and four insn combinations).
From-SVN: r258452
Jason Merrill [Mon, 12 Mar 2018 14:40:45 +0000 (10:40 -0400)]
PR c++/84355 - ICE with deduction for member class template.
* pt.c (tsubst) [TEMPLATE_TYPE_PARM]: Always substitute into
CLASS_PLACEHOLDER_TEMPLATE.
From-SVN: r258451
H.J. Lu [Mon, 12 Mar 2018 13:33:38 +0000 (13:33 +0000)]
Add a testcase for PR 84821
This was introduced by r258390 and fixed by r258415.
* g++.dg/pr84821.C: New test.
From-SVN: r258449
H.J. Lu [Mon, 12 Mar 2018 13:32:44 +0000 (13:32 +0000)]
Add a testcase for PR 84799
This was introduced by r258390 and fixed by r258415.
* gcc.dg/pr84799.c: New test.
From-SVN: r258448
Jason Merrill [Mon, 12 Mar 2018 12:58:38 +0000 (08:58 -0400)]
PR c++/84802 - ICE capturing uninstantiated class.
* lambda.c (build_capture_proxy): Call complete_type.
From-SVN: r258447
Richard Biener [Mon, 12 Mar 2018 12:32:28 +0000 (12:32 +0000)]
re PR tree-optimization/84803 (ICE from ifcvt_memrefs_wont_trap with -O3)
2018-03-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/84803
* tree-if-conv.c (ifcvt_memrefs_wont_trap): Don't do anything
for refs DR analysis didn't process.
* gcc.dg/torture/pr84803.c: New testcase.
From-SVN: r258446
Jakub Jelinek [Mon, 12 Mar 2018 09:02:36 +0000 (10:02 +0100)]
re PR c++/84813 (internal compiler error: Segmentation fault with lambdas and constexpr variables)
PR c++/84813
* g++.dg/debug/pr84813.C: New test.
From-SVN: r258445
Richard Biener [Mon, 12 Mar 2018 08:45:54 +0000 (08:45 +0000)]
re PR tree-optimization/84777 (-Os inhibits all vectorization)
2018-03-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/84777
* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): For
force-vectorize loops ignore whether we are optimizing for size.
From-SVN: r258444
Chung-Ju Wu [Mon, 12 Mar 2018 01:29:34 +0000 (01:29 +0000)]
[NDS32] Implement TARGET_MD_ASM_ADJUST hook.
gcc/
* config/nds32/nds32.c (nds32_md_asm_adjust): New function.
(TARGET_MD_ASM_ADJUST): Define.
From-SVN: r258443
Monk Chiang [Mon, 12 Mar 2018 01:21:57 +0000 (01:21 +0000)]
[NDS32] Refine prologue and epilogue code generation.
gcc/
* config/nds32/nds32.c (nds32_compute_stack_frame,
nds32_emit_stack_push_multiple, nds32_emit_stack_pop_multiple,
nds32_emit_stack_v3push, nds32_emit_stack_v3pop,
nds32_emit_adjust_frame, nds32_expand_prologue, nds32_expand_epilogue,
nds32_expand_prologue_v3push, nds32_expand_epilogue_v3pop): Refine.
* config/nds32/nds32.h (NDS32_FIRST_CALLEE_SAVE_GPR_REGNUM,
NDS32_LAST_CALLEE_SAVE_GPR_REGNUM, NDS32_V3PUSH_AVAILABLE_P): New.
* config/nds32/nds32.md (prologue, epilogue): Use macro
NDS32_V3PUSH_AVAILABLE_P to do checking.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r258442
GCC Administrator [Mon, 12 Mar 2018 00:16:14 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r258441
Paul Thomas [Sun, 11 Mar 2018 22:25:11 +0000 (22:25 +0000)]
re PR fortran/84546 (Bad sourced allocation of CLASS(*) with source with CLASS(*) component)
2018-03-11 Paul Thomas <pault@gcc.gnu.org>
PR fortran/84546
* trans-array.c (structure_alloc_comps): Make sure that the
vptr is copied and that the unlimited polymorphic _len is used
to compute the size to be allocated.
* trans-expr.c (gfc_get_class_array_ref): If unlimited, use the
unlimited polymorphic _len for the offset to the element.
(gfc_copy_class_to_class): Set the new 'unlimited' argument.
* trans.h : Add the boolean 'unlimited' to the prototype.
2018-03-11 Paul Thomas <pault@gcc.gnu.org>
PR fortran/84546
* gfortran.dg/unlimited_polymorphic_29.f90 : New test.
From-SVN: r258438
Steven G. Kargl [Sun, 11 Mar 2018 21:39:15 +0000 (21:39 +0000)]
re PR fortran/83939 (Constraint C1290 (elemental function cannot be allocatable) not enforced)
2018-03-11 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/83939
* resolve.c (resolve_fl_procedure): Enforce F2018:C15100.
2018-03-11 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/83939
* gfortran.dg/pr83939.f90
From-SVN: r258437
Steven G. Kargl [Sun, 11 Mar 2018 21:34:40 +0000 (21:34 +0000)]
check.c (gfc_check_kill): Check pid and sig are scalar.
2018-03-11 Steven G. Kargl <kargls@gcc.gnu.org>
* check.c (gfc_check_kill): Check pid and sig are scalar.
(gfc_check_kill_sub): Restrict kind to 4 and 8.
* intrinsic.c (add_function): Sort keyword list. Add pid and sig
keywords for KILL. Remove redundant *back="back" in favor of the
original *bck="back".
(add_subroutines): Sort keyword list. Add pid and sig keywords
for KILL.
* intrinsic.texi: Fix documentation to consistently use pid and sig.
* iresolve.c (gfc_resolve_kill): Kind can only be 4 or 8. Choose the
correct function.
(gfc_resolve_rename_sub): Add comment.
From-SVN: r258436
Thomas Koenig [Sun, 11 Mar 2018 20:28:00 +0000 (20:28 +0000)]
re PR fortran/66128 (ICE for some intrinsics with zero sized array parameter)
2018-03-11 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/66128
* simplify.c (simplify_transformation): Return default result for
empty array argument.
(gfc_simplify_all): Remove special-case handling for zerosize.
(gfc_simplify_any): Likewise.
(gfc_simplify_count): Likewise.
(gfc_simplify_iall): Likewise.
(gfc_simplify_iany): Likewise.
(gfc_simplify_iparity): Likewise.
(gfc_simplify_minval): Likewise.
(gfc_simplify_maxval): Likewise.
(gfc_simplify_norm2): Likewise.
(gfc_simplify_product): Likewise.
(gfc_simplify_sum): Likewise.
2018-03-11 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/66128
* gfortran.dg/zero_sized_9.f90: New test.
From-SVN: r258435
Jakub Jelinek [Sun, 11 Mar 2018 16:50:08 +0000 (17:50 +0100)]
re PR debug/58150 (debug info about definition of enum class not emitted if the declaration was already used in a class)
PR debug/58150
* dwarf2out.c (gen_enumeration_type_die): Don't guard adding
DW_AT_declaration for ENUM_IS_OPAQUE on -gdwarf-4 or -gno-strict-dwarf,
but on TYPE_SIZE. Don't do anything for ENUM_IS_OPAQUE if not creating
a new die. Don't set TREE_ASM_WRITTEN if ENUM_IS_OPAQUE. Guard
addition of most attributes on !orig_type_die or the attribute not
being present already. Assert TYPE_VALUES is NULL for ENUM_IS_OPAQUE.
* g++.dg/debug/dwarf2/enum2.C: New test.
From-SVN: r258434
Kito Cheng [Sun, 11 Mar 2018 12:21:23 +0000 (12:21 +0000)]
[NDS32] Add new option -mvh.
gcc/
* config/nds32/nds32.c (nds32_cpu_cpp_builtins): Modify to define
__NDS32_VH__ macro.
* config/nds32/nds32.opt (mvh): New option.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r258427
Kito Cheng [Sun, 11 Mar 2018 08:42:30 +0000 (08:42 +0000)]
[NDS32] Add new function nds32_cpu_cpp_builtins and use it for TARGET_CPU_CPP_BUILTINS.
gcc/
* config/nds32/nds32-protos.h (nds32_cpu_cpp_builtins): Declare
function.
* config/nds32/nds32.c (nds32_cpu_cpp_builtins): New function.
* config/nds32/nds32.h (TARGET_CPU_CPP_BUILTINS): Modify its
definition.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r258426
Kito Cheng [Sun, 11 Mar 2018 08:24:33 +0000 (08:24 +0000)]
[NDS32] Implement strlensi pattern.
gcc/
* config/nds32/nds32-memory-manipulation.c (nds32_expand_strlen): New
function.
* config/nds32/nds32-multiple.md (strlensi): New pattern.
* config/nds32/nds32-protos.h (nds32_expand_strlen): Declare function.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r258425
Monk Chiang [Sun, 11 Mar 2018 07:48:48 +0000 (07:48 +0000)]
[NDS32] Add intrinsic function for ffb, ffmism and flmism.
gcc/
* config/nds32/constants.md (unspec_element): Add UNSPEC_FFB,
UNSPEC_FFMISM and UNSPEC_FLMISM.
* config/nds32/nds32-intrinsic.c (bdesc_2arg): Add builtin description
for ffb, ffmism and flmism.
* config/nds32/nds32-intrinsic.md (unspec_ffb): Define new pattern.
(unspec_ffmism): Ditto.
(unspec_flmism): Ditto.
(nds32_expand_builtin_impl): Check if string extension is available.
* config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FFB,
NDS32_BUILTIN_FFMISM and NDS32_BUILTIN_FLMISM.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r258424
GCC Administrator [Sun, 11 Mar 2018 00:16:18 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r258423
Steven G. Kargl [Sat, 10 Mar 2018 18:34:12 +0000 (18:34 +0000)]
re PR fortran/84734 (Compiling codes with insane array dimensions gives an ICE after r257971)
2018-03-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/84734
* arith.c (check_result, eval_intrinsic): If result overflows, pass
the expression up the chain instead of a NULL pointer.
2018-03-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/84734
* gfortran.dg/pr84734.f90: New test.
From-SVN: r258416
Vladimir Makarov [Sat, 10 Mar 2018 16:32:21 +0000 (16:32 +0000)]
revert: re PR target/83712 ("Unable to find a register to spill" when compiling for thumb1)
2018-03-10 Vladimir Makarov <vmakarov@redhat.com>
Reverting patch:
2018-03-09 Vladimir Makarov <vmakarov@redhat.com>
PR target/83712
* lra-assigns.c (assign_by_spills): Return a flag of reload
assignment failure. Do not process the reload assignment
failures. Do not spill other reload pseudos if they has the same
reg class.
(lra_assign): Add a return arg. Set up from the result of
assign_by_spills call.
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
usage_insns if it is not NULL.
(spill_hard_reg_in_range): New function.
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
function prototypes.
(lra_assign): Change prototype.
* lra.c (lra): Add code to deal with fails by splitting hard reg
live ranges.
From-SVN: r258415
H.J. Lu [Sat, 10 Mar 2018 15:57:10 +0000 (15:57 +0000)]
i386: Fix a typo: Enforcment -> Enforcement
PR target/84807
* config/i386/i386.opt: Replace Enforcment with Enforcement.
From-SVN: r258414
Eric Botcazou [Sat, 10 Mar 2018 10:11:29 +0000 (10:11 +0000)]
trans.c (node_has_volatile_full_access): Consider only entities for objects.
* gcc-interface/trans.c (node_has_volatile_full_access) <N_Identifier>:
Consider only entities for objects.
From-SVN: r258412
Alexandre Oliva [Sat, 10 Mar 2018 06:42:40 +0000 (06:42 +0000)]
[IEPM] [PR debug/84620] use constant form for DW_AT_GNU_entry_view
When outputting entry views in symbolic mode, we used to use a lbl_id,
but that outputs the view as an addr, perhaps even in an indirect one,
which is all excessive and undesirable for a small assembler-computed
constant.
Introduce a new value class for symbolic views, so that we can output
the labels as constant data, using as narrow forms as possible, but
wide enough for any symbolic views output in the compilation. We
don't know exactly where the assembler will reset views, but we count
the symbolic views since known reset points and use that as an upper
bound for view numbers.
Ideally, we'd use uleb128, but then the compiler would have to defer
.debug_info offset computation to the assembler. I'm not going there
for now, so a symbolic uleb128 assembler constant in an attribute is
not something GCC can deal with ATM.
for gcc/ChangeLog
PR debug/84620
* dwarf2out.h (dw_val_class): Add dw_val_class_symview.
(dw_val_node): Add val_symbolic_view.
* dwarf2out.c (dw_line_info_table): Add symviews_since_reset.
(symview_upper_bound): New.
(new_line_info_table): Initialize symviews_since_reset.
(dwarf2out_source_line): Count symviews_since_reset and set
symview_upper_bound.
(dw_val_equal_p): Handle symview.
(add_AT_symview): New.
(print_dw_val): Handle symview.
(attr_checksum, attr_checksum_ordered): Likewise.
(same_dw_val_p, size_of_die): Likewise.
(value_format, output_die): Likewise.
(add_high_low_attributes): Use add_AT_symview for entry_view.
(dwarf2out_finish): Reset symview_upper_bound, clear
zero_view_p.
From-SVN: r258411
Jason Merrill [Sat, 10 Mar 2018 03:34:37 +0000 (22:34 -0500)]
PR c++/84770 - ICE with typedef and parameter pack.
* pt.c (verify_unstripped_args_1): Split out from
verify_unstripped_args.
From-SVN: r258408
Jason Merrill [Sat, 10 Mar 2018 03:34:29 +0000 (22:34 -0500)]
PR c++/84785 - ICE with alias template and default targs.
* pt.c (type_unification_real): Set processing_template_decl if
saw_undeduced == 1.
From-SVN: r258407
Jason Merrill [Sat, 10 Mar 2018 03:34:23 +0000 (22:34 -0500)]
PR c++/84752 - ICE with capture of constexpr array.
* call.c (standard_conversion): Set rvaluedness_matches_p on the
identity conversion under ck_lvalue.
From-SVN: r258406
GCC Administrator [Sat, 10 Mar 2018 00:16:13 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r258405
Paolo Carlini [Fri, 9 Mar 2018 23:05:51 +0000 (23:05 +0000)]
2018-03-09 Paolo Carlini <paolo.carlini@oracle.com>
* Fix wrong date in ChangeLog entry.
From-SVN: r258402
Jason Merrill [Fri, 9 Mar 2018 23:03:06 +0000 (18:03 -0500)]
re PR c++/71169 (ICE on invalid C++ code in pop_nested_class (cp/class.c:7785))
/cp
2018-03-09 Jason Merrill <jason@redhat.com>
Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71169
PR c++/71832
* pt.c (any_erroneous_template_args_p): New.
* cp-tree.h (any_erroneous_template_args_p): Declare it.
* parser.c (cp_parser_class_specifier_1): Use it.
/testsuite
2018-03-09 Jason Merrill <jason@redhat.com>
Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71169
PR c++/71832
* g++.dg/cpp0x/pr71169.C: New.
* g++.dg/cpp0x/pr71169-2.C: Likewise.
* g++.dg/cpp0x/pr71832.C: Likewise.
Co-Authored-By: Paolo Carlini <paolo.carlini@oracle.com>
From-SVN: r258401
Peter Bergner [Fri, 9 Mar 2018 22:43:59 +0000 (16:43 -0600)]
re PR target/83969 (ICE in final_scan_insn, at final.c:2997 (error: could not split insn) for powerpc targets)
gcc/
PR target/83969
* config/rs6000/rs6000.c (rs6000_offsettable_memref_p): New prototype.
Add strict argument and use it.
(rs6000_split_multireg_move): Update for new strict argument.
(mem_operand_gpr): Disallow all non-offsettable addresses.
* config/rs6000/rs6000.md (*movdi_internal64): Use YZ constraint.
gcc/testsuite/
PR target/83969
* gcc.target/powerpc/pr83969.c: New test.
From-SVN: r258400
Jakub Jelinek [Fri, 9 Mar 2018 22:23:14 +0000 (23:23 +0100)]
re PR target/84772 (powerpc-spe: Spurious "is used uninitialized" warning, or possibly incorrect codegen for va_arg(long double))
PR target/84772
* config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Mark va_arg_tmp
temporary TREE_ADDRESSABLE before gimplification of BUILT_IN_MEMCPY.
* config/powerpcspe/powerpcspe.c (rs6000_gimplify_va_arg): Likewise.
* gcc.dg/pr84772.c: New test.
From-SVN: r258399
Jason Merrill [Fri, 9 Mar 2018 21:40:55 +0000 (16:40 -0500)]
PR c++/84726 - unnecessary capture of constant vars.
* cp-tree.h (LAMBDA_CAPTURE_EXPLICIT_P)
(LAMBDA_EXPR_CAPTURE_OPTIMIZED): New.
* expr.c (mark_use): Set LAMBDA_EXPR_CAPTURE_OPTIMIZED.
* lambda.c (is_constant_capture_proxy)
(current_lambda_expr, var_to_maybe_prune, mark_const_cap_r)
(prune_lambda_captures): New.
(finish_lambda_function): Call prune_lambda_captures.
From-SVN: r258398
Jason Merrill [Fri, 9 Mar 2018 20:39:14 +0000 (21:39 +0100)]
re PR c++/84076 (Warning about objects through POD mistakenly claims the object is a pointer)
PR c++/84076
* call.c (convert_arg_to_ellipsis): Instead of cp_build_addr_expr
build ADDR_EXPR with REFERENCE_TYPE.
(build_over_call): For purposes of check_function_arguments, if
argarray[j] is ADDR_EXPR with REFERENCE_TYPE created above, use
its operand rather than the argument itself.
* g++.dg/warn/Wformat-2.C: New test.
From-SVN: r258397
Jakub Jelinek [Fri, 9 Mar 2018 19:12:29 +0000 (20:12 +0100)]
re PR c++/84767 (ICE with pointer to VLA)
PR c++/84767
* tree-inline.c (copy_tree_body_r): For INDIRECT_REF of a remapped
decl, use remap_type if we want to use the type.
* g++.dg/ext/vla18.C: New test.
From-SVN: r258395
Martin Sebor [Fri, 9 Mar 2018 19:06:26 +0000 (19:06 +0000)]
re PR tree-optimization/84526 (ICE in generic_overlap at gcc/gimple-ssa-warn-restrict.c:927 since r257860)
gcc/ChangeLog:
PR tree-optimization/84526
* gimple-ssa-warn-restrict.c (builtin_memref::set_base_and_offset):
Remove dead code.
(builtin_access::generic_overlap): Be prepared to handle non-array
base objects.
gcc/testsuite/ChangeLog:
PR tree-optimization/84526
* gcc.dg/Wrestrict-10.c: New test.
* gcc.dg/Wrestrict-11.c: New test.
From-SVN: r258394
Alexandre Oliva [Fri, 9 Mar 2018 18:50:56 +0000 (18:50 +0000)]
re PR rtl-optimization/84682 (internal compiler error: Segmentation fault (process_address_1))
PR rtl-optimization/84682
* lra-constraints.c (process_address_1): Check is_address flag
for address constraints.
(process_alt_operands): Likewise.
* lra.c (lra_set_insn_recog_data): Pass asm operand locs to
preprocess_constraints.
* recog.h (preprocess_constraints): Add oploc parameter.
Adjust callers.
PR rtl-optimization/84682
* gcc.dg/torture/pr84682-1.c: New.
* gcc.dg/torture/pr84682-2.c: New.
* gcc.dg/torture/pr84682-3.c: New.
From-SVN: r258393
Ian Lance Taylor [Fri, 9 Mar 2018 18:21:42 +0000 (18:21 +0000)]
commit
ce28919112dbb234366816ab39ce060ad45e8ca9
Makefile: add internal/trace to noinst_DATA
The internal/trace package is only imported by tests (specifically the
tests in runtime/trace) so it must be in noinst_DATA to ensure that it
is built before running the tests.
This was mostly working because internal/trace has tests itself, and
is listed in check-packages.txt before runtime/trace, so typical
invocations of make would build internal/trace for checking purposes
before checking runtime/trace. But we need this change to make that
reliable.
Reviewed-on: https://go-review.googlesource.com/99836
From-SVN: r258392
Jakub Jelinek [Fri, 9 Mar 2018 18:01:22 +0000 (19:01 +0100)]
re PR c++/84724 (internal compiler error: in single_succ_edge, at basic-block.h:339 with a declaration of __builtin_trap)
PR c++/84724
* decl.c (duplicate_decls): Don't override __* prefixed builtins
except for __[^b]*_chk, instead issue permerror and for -fpermissive
also a note and return olddecl.
* g++.dg/ext/pr84724.C: New test.
From-SVN: r258391
Vladimir Makarov [Fri, 9 Mar 2018 16:00:36 +0000 (16:00 +0000)]
re PR target/83712 ("Unable to find a register to spill" when compiling for thumb1)
2018-03-09 Vladimir Makarov <vmakarov@redhat.com>
PR target/83712
* lra-assigns.c (assign_by_spills): Return a flag of reload
assignment failure. Do not process the reload assignment
failures. Do not spill other reload pseudos if they has the same
reg class.
(lra_assign): Add a return arg. Set up from the result of
assign_by_spills call.
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
usage_insns if it is not NULL.
(spill_hard_reg_in_range): New function.
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
function prototypes.
(lra_assign): Change prototype.
* lra.c (lra): Add code to deal with fails by splitting hard reg
live ranges.
2018-03-09 Vladimir Makarov <vmakarov@redhat.com>
PR target/83712
* gcc.target/arm/pr83712.c: New.
From-SVN: r258390
Kyrylo Tkachov [Fri, 9 Mar 2018 15:42:10 +0000 (15:42 +0000)]
[arm] PR target/83193: Do not print arch/cpu hints twice on invalid -march/-mcpu
Currently when handling an invalid -march or -mcpu option on a toolchain without an explicit --with-mode configuration
and compiling without an explicit -mthumb or -marm the arm specs end up calling arm_target_thumb_only to determine
the "thumbness" of the target, which involves parsing the architecture or cpu name. But the functions doing that
parsing also emit error messages and hints on invalid arguments. Later when we parse the architecture or cpu string to
as part of the canonicalisation process (arm_canon_arch_option) we end up emitting the errors again.
The solution in this patch is to silence the errors during the arm_target_thumb_only processing so that they are not emitted
twice. arm_canon_arch_option is guaranteed to run as well, so it can emit the errors and hints that it needs.
Bootstrapped and tested on arm-none-linux-gnueabihf.
Checked that we emit the arch/cpu hints for invalid -march/-mcpu options only once when no "thumbness" options were specified
during configuration or invocation.
PR target/83193
* common/config/arm/arm-common.c (arm_parse_arch_option_name):
Accept complain bool parameter. Only emit errors if it is true.
(arm_parse_cpu_option_name): Likewise.
(arm_target_thumb_only): Adjust callers of the above.
* config/arm/arm-protos.h (arm_parse_cpu_option_name): Adjust
prototype to take a default true bool parameter.
(arm_parse_arch_option_name): Likewise.
From-SVN: r258389