klehman [Thu, 16 Sep 2021 22:08:36 +0000 (18:08 -0400)]
another yield excursion
klehman [Thu, 16 Sep 2021 19:23:23 +0000 (15:23 -0400)]
pep8 fix
Luke Kenneth Casson Leighton [Thu, 16 Sep 2021 18:48:32 +0000 (19:48 +0100)]
reduce code linecount slightly
klehman [Thu, 16 Sep 2021 17:43:19 +0000 (13:43 -0400)]
added defaults for expected state parameters
Luke Kenneth Casson Leighton [Thu, 16 Sep 2021 16:06:27 +0000 (17:06 +0100)]
moving teststate_check_regs written by klehman into openpower-isa
klehman [Thu, 16 Sep 2021 14:54:26 +0000 (10:54 -0400)]
shift__rot_caller change to use expected state
klehman [Wed, 15 Sep 2021 21:52:21 +0000 (17:52 -0400)]
revised state class for expected
klehman [Wed, 15 Sep 2021 19:42:57 +0000 (15:42 -0400)]
yield from in unit test
klehman [Wed, 15 Sep 2021 19:13:12 +0000 (15:13 -0400)]
expected class WIP
Luke Kenneth Casson Leighton [Tue, 14 Sep 2021 17:39:38 +0000 (18:39 +0100)]
change state_add to name, kls
Luke Kenneth Casson Leighton [Tue, 14 Sep 2021 16:52:52 +0000 (17:52 +0100)]
add copy of teststate.py written by klehman
Luke Kenneth Casson Leighton [Sun, 12 Sep 2021 13:37:10 +0000 (14:37 +0100)]
whitespace
klehman [Tue, 7 Sep 2021 15:47:32 +0000 (11:47 -0400)]
added assertion to regression_rlwnm
Dmitry Selyutin [Sat, 4 Sep 2021 19:38:56 +0000 (19:38 +0000)]
fixedtrap: switch tw to XLEN
Dmitry Selyutin [Sat, 4 Sep 2021 19:38:26 +0000 (19:38 +0000)]
fixedtrap: switch twi to XLEN
Jacob Lifshay [Tue, 7 Sep 2021 06:54:12 +0000 (23:54 -0700)]
XLEN-ify bcd instructions
Jacob Lifshay [Tue, 7 Sep 2021 05:10:22 +0000 (22:10 -0700)]
clean up test_caller_bcd.py
Jacob Lifshay [Tue, 7 Sep 2021 05:09:51 +0000 (22:09 -0700)]
add missing items to .gitignore
Luke Kenneth Casson Leighton [Tue, 7 Sep 2021 10:07:23 +0000 (11:07 +0100)]
removed duplicate function and unneeded modules
klehman [Tue, 7 Sep 2021 02:22:12 +0000 (22:22 -0400)]
Fixed typo for sraw test
klehman [Tue, 7 Sep 2021 01:02:50 +0000 (21:02 -0400)]
Initial commit for shift/rotate caller
Dmitry Selyutin [Sat, 4 Sep 2021 18:05:40 +0000 (18:05 +0000)]
comparefixed: switch cmpeqb to XLEN
Dmitry Selyutin [Sat, 4 Sep 2021 17:37:55 +0000 (17:37 +0000)]
comparefixed: switch cmprb to XLEN
Dmitry Selyutin [Sat, 4 Sep 2021 17:30:12 +0000 (17:30 +0000)]
comparefixed: switch cmpl to XLEN
Dmitry Selyutin [Sat, 4 Sep 2021 17:29:28 +0000 (17:29 +0000)]
comparefixed: switch cmpli to XLEN
Dmitry Selyutin [Sat, 4 Sep 2021 17:27:44 +0000 (17:27 +0000)]
comparefixed: switch cmp to XLEN
Dmitry Selyutin [Sat, 4 Sep 2021 17:27:20 +0000 (17:27 +0000)]
comparefixed: switch cmpi to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 20:31:34 +0000 (20:31 +0000)]
test_caller_bcd: switch to test_runner module
Dmitry Selyutin [Fri, 3 Sep 2021 20:29:00 +0000 (20:29 +0000)]
test_runner: support custom pdecode2 instances
Luke Kenneth Casson Leighton [Sat, 4 Sep 2021 13:11:47 +0000 (14:11 +0100)]
split out ISATestRunner to separate module
Luke Kenneth Casson Leighton [Sat, 4 Sep 2021 12:24:55 +0000 (13:24 +0100)]
redo SVP64 RM Decode to new CTR-Test Mode (svstep not included)
Dmitry Selyutin [Fri, 3 Sep 2021 17:52:12 +0000 (17:52 +0000)]
fixedstore: switch stwux to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:51:13 +0000 (17:51 +0000)]
fixedstore: switch stwu to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:50:49 +0000 (17:50 +0000)]
fixedstore: switch stwx to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:50:00 +0000 (17:50 +0000)]
fixedstore: switch stw to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:40:18 +0000 (17:40 +0000)]
fixedstore: switch sthux to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:39:33 +0000 (17:39 +0000)]
fixedstore: switch sthu to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:39:16 +0000 (17:39 +0000)]
fixedstore: switch sthx to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:38:37 +0000 (17:38 +0000)]
fixedstore: switch sth to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:32:32 +0000 (17:32 +0000)]
fixedstore: switch stbux to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:31:53 +0000 (17:31 +0000)]
fixedstore: switch stbu to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:31:23 +0000 (17:31 +0000)]
fixedstore: switch stbx to XLEN
Dmitry Selyutin [Fri, 3 Sep 2021 17:30:13 +0000 (17:30 +0000)]
fixedstore: switch stb to XLEN
Luke Kenneth Casson Leighton [Fri, 3 Sep 2021 07:49:13 +0000 (08:49 +0100)]
use brackets round (XLEN/2) in divw pseudocode
[0]*XLEN/2 was being interpreted as ([0]*XLEN)/2
Luke Kenneth Casson Leighton [Thu, 2 Sep 2021 20:48:35 +0000 (21:48 +0100)]
detect native ppc64le
Luke Kenneth Casson Leighton [Thu, 2 Sep 2021 20:47:37 +0000 (21:47 +0100)]
detect native ppc64le
Luke Kenneth Casson Leighton [Wed, 1 Sep 2021 19:29:24 +0000 (20:29 +0100)]
off-by-one in srad, same as sld and srd: XLEN-6:XLEN-1 not XLEN-5:XLEN-1
Dmitry Selyutin [Tue, 31 Aug 2021 20:28:26 +0000 (20:28 +0000)]
fixedshift: switch sradX to XLEN
Luke Kenneth Casson Leighton [Wed, 1 Sep 2021 19:26:33 +0000 (20:26 +0100)]
off-by-one in sld and srd, XLEN-6:XLEN-1 not XLEN-5:XLEN-1
Dmitry Selyutin [Tue, 31 Aug 2021 20:27:42 +0000 (20:27 +0000)]
fixedshift: switch srdX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:26:51 +0000 (20:26 +0000)]
fixedshift: switch sldX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:26:15 +0000 (20:26 +0000)]
fixedshift: switch srawX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:25:04 +0000 (20:25 +0000)]
fixedshift: switch srwX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:24:13 +0000 (20:24 +0000)]
fixedshift: switch slwX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:22:14 +0000 (20:22 +0000)]
fixedshift: switch rldcrX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:21:40 +0000 (20:21 +0000)]
fixedshift: switch rldclX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:21:26 +0000 (20:21 +0000)]
fixedshift: switch rlwnmX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:01:21 +0000 (20:01 +0000)]
fixedshift: switch extswsliX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:00:52 +0000 (20:00 +0000)]
fixedshift: switch sradiX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 20:00:08 +0000 (20:00 +0000)]
fixedshift: switch srawiX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 19:58:04 +0000 (19:58 +0000)]
fixedshift: switch rldiclX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 19:48:12 +0000 (19:48 +0000)]
fixedshift: switch rlwimiX to XLEN
Dmitry Selyutin [Tue, 31 Aug 2021 19:40:55 +0000 (19:40 +0000)]
fixedshift: switch rlwinmX to XLEN
Dmitry Selyutin [Sun, 29 Aug 2021 18:16:26 +0000 (18:16 +0000)]
fixedarith: switch divwX to XLEN
Dmitry Selyutin [Sun, 29 Aug 2021 18:22:22 +0000 (18:22 +0000)]
fixedarith: switch divweX to XLEN
Dmitry Selyutin [Sun, 29 Aug 2021 19:34:42 +0000 (19:34 +0000)]
fixedarith: switch divweuX to XLEN
Dmitry Selyutin [Sun, 29 Aug 2021 19:40:12 +0000 (19:40 +0000)]
fixedarith: switch divdX to XLEN
Dmitry Selyutin [Sun, 29 Aug 2021 19:44:52 +0000 (19:44 +0000)]
fixedarith: switch divdeX to XLEN
Dmitry Selyutin [Sun, 29 Aug 2021 19:46:51 +0000 (19:46 +0000)]
fixedarith: switch modsd to XLEN
Dmitry Selyutin [Sun, 29 Aug 2021 19:38:48 +0000 (19:38 +0000)]
fixedarith: switch modsw to XLEN
Luke Kenneth Casson Leighton [Tue, 31 Aug 2021 11:19:49 +0000 (12:19 +0100)]
adjusted popcntw to simplify by using temp vars
https://bugs.libre-soc.org/show_bug.cgi?id=671#c50
e <- (XLEN/2)-1
s <- i*XLEN/2
Dmitry Selyutin [Mon, 30 Aug 2021 08:41:16 +0000 (08:41 +0000)]
fixedload: switch lbz to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 08:41:49 +0000 (08:41 +0000)]
fixedload: switch lbzx to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 08:42:37 +0000 (08:42 +0000)]
fixedload: switch lbzu to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 08:42:51 +0000 (08:42 +0000)]
fixedload: switch lbzux to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 08:43:50 +0000 (08:43 +0000)]
fixedload: switch lhz to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 08:48:10 +0000 (08:48 +0000)]
fixedload: switch lhzx to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 08:48:37 +0000 (08:48 +0000)]
fixedload: switch lhzu to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 08:49:23 +0000 (08:49 +0000)]
fixedload: switch lhzux to XLEN
Dmitry Selyutin [Wed, 25 Aug 2021 15:09:14 +0000 (15:09 +0000)]
fixedlogical: switch cnttzd to XLEN
Dmitry Selyutin [Mon, 30 Aug 2021 19:49:48 +0000 (19:49 +0000)]
fixedlogical: bpermd fixup
Dmitry Selyutin [Wed, 25 Aug 2021 14:52:01 +0000 (14:52 +0000)]
fixedlogical: switch popcntw to XLEN
Dmitry Selyutin [Tue, 24 Aug 2021 12:01:25 +0000 (12:01 +0000)]
fixedarith: switch modud to XLEN
Dmitry Selyutin [Tue, 24 Aug 2021 11:59:10 +0000 (11:59 +0000)]
fixedarith: switch divdeuX to XLEN
Dmitry Selyutin [Mon, 23 Aug 2021 19:50:22 +0000 (19:50 +0000)]
fixedarith: switch moduw to XLEN
Dmitry Selyutin [Mon, 23 Aug 2021 19:04:28 +0000 (19:04 +0000)]
fixedarith: switch divwuX to XLEN
Dmitry Selyutin [Tue, 24 Aug 2021 11:51:55 +0000 (11:51 +0000)]
fixedarith: switch divduX to XLEN
Dmitry Selyutin [Tue, 24 Aug 2021 11:45:36 +0000 (11:45 +0000)]
fixedarith: switch maddhd to XLEN
Dmitry Selyutin [Tue, 24 Aug 2021 11:49:14 +0000 (11:49 +0000)]
fixedarith: switch maddld to XLEN
Dmitry Selyutin [Tue, 24 Aug 2021 11:48:17 +0000 (11:48 +0000)]
fixedarith: switch maddhdu to XLEN
Luke Kenneth Casson Leighton [Mon, 30 Aug 2021 16:24:56 +0000 (17:24 +0100)]
add short mulli random test
Dmitry Selyutin [Wed, 25 Aug 2021 09:06:13 +0000 (09:06 +0000)]
fixedarith: switch mulli to XLEN
Dmitry Selyutin [Tue, 24 Aug 2021 11:41:45 +0000 (11:41 +0000)]
fixedarith: switch mulhdu to XLEN
Luke Kenneth Casson Leighton [Mon, 30 Aug 2021 16:12:58 +0000 (17:12 +0100)]
add mulhdu random test
Dmitry Selyutin [Tue, 24 Aug 2021 11:41:02 +0000 (11:41 +0000)]
fixedarith: switch mulhd to XLEN
Dmitry Selyutin [Mon, 23 Aug 2021 19:51:28 +0000 (19:51 +0000)]
fixedarith: switch mulldX to XLEN
Dmitry Selyutin [Mon, 23 Aug 2021 18:56:30 +0000 (18:56 +0000)]
fixedarith: switch mulhwu to XLEN
Dmitry Selyutin [Mon, 23 Aug 2021 18:55:01 +0000 (18:55 +0000)]
fixedarith: switch mullwX to XLEN
Luke Kenneth Casson Leighton [Mon, 30 Aug 2021 15:03:07 +0000 (16:03 +0100)]
quite a big intrusive change in auto-assignment
variables that do not exist get auto-created based on the bit-width
at which they are first encountered
prod[0:31]
creates a variable with
prod = concat(0, repeat=32)
however this needs to be more complicated rather than just assume
it is a pair of constants
expressions can now be
prod[0:XLEN-1]
which gets an ast.BinOp expression created on the RHS.
therefore allow the assignment "var = concat(...., repeat=xxxx)"
to accept computed expressions by returning an ast.BinOp(UPPER, "-", LOWER)
so that the resultant python code performs the subtract calculation
Luke Kenneth Casson Leighton [Mon, 30 Aug 2021 14:39:12 +0000 (15:39 +0100)]
assignment test pattern-matching not adequate, adding quick test
projects / openpower-isa.git / log