radv/ac: port SI TC L1 write corruption fix.

This ports 72e46c988 to radv.
    radeonsi: apply a TC L1 write corruption workaround for SI

Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/winsys: fix padding command stream for SI

We were adding pad to size after creating the object, so we could
submit a CS bigger than the bo created for it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/ac: realign SI workaround with radeonsi.

This ports: da7453666ae
radeonsi: don't apply the Z export bug workaround to Hainan
to radv.

Just noticed in passing.

Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965/clear: Don't perform redundant depth clears

We already have this little optimization for color clears.  Now that
we're actually tracking whether or not a slice has any fast-clear
blocks, it's easy enough to add for depth clears too.

Improves performance of GFXBench 4 TRex at 1920x1080 by:
- Skylake GT4: 0.905932% +/- 0.0620197% (n = 30)
- Apollolake:  0.382434% +/- 0.1134730% (n = 25)

v2: (by Ken) Rebase and drop intel_mipmap_tree.c changes, as they're
    no longer necessary (other patches already landed to do that part)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Only do depth resolves prior to clearing when needed

When changing the clear value, we need to resolve any fast cleared data.

Previously, we were performing resolves on every slice with HiZ enabled.
We only need to resolve slices that a) have fast clear data, and b)
aren't about to be cleared to the new color.  In the latter case, we
were actually doing a resolve, and then a fast clear - when we could
skip both, causing the existing fast cleared area to be updated to the
new clear value for no additional work.

This patch stops using intel_miptree_prepare_access in favor of a more
optimal open coded loop that knows about our clear operation.

v2: (by Ken) Rebase on islification, write a real commit message.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

i965: Expose get_num_logical_layers outside of intel_mipmap_tree.c.

I want to use it in brw_clear.c.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

ac/surface: fix hybrid graphics where APU=GFX9, dGPU=older

v2: don't do it for compressed textures (bpp = 0)

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)

radeonsi: decrease the number of compiler threads

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: make S_FIXED function signed and move it to shared code

This fixes a bug uncovered by:
    2412c4c81ea0488df865817a0de91ec46e359b72
    util: Make CLAMP turn NaN into MIN.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: also clamp and quantize per-unit lod bias

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: fix unconditional return in st_framebuffer_iface_remove

Noticed by James Legg @ Feral.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

drirc: whitelist glthread for Mount and Blade Warband

From 25-26 min fps to 31, used the game in conjuction with a mod (full
invasion 2) beaumaris castle map and 200 bots.

egl: move KHR_no_error vs debug/robustness check further down

We'll fail to flag an error if the context flags appear after the
no-error attribute in the context attribute list.

Delay the check to after attribute parsing to fix this.

Fixes: 4909519a665 ("egl: Add EGL_KHR_create_context_no_error support")
Cc: mesa-stable@lists.freedesktop.org
[Emil Velikov: add fixes/stable tags, commit message polish]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

radv: rename physical_device->uuid[] to cache_uuid[]

We have a few UUIDs, so lets be more specific.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi/gfx9: reduce max threads per block to 1024 on gfx9+

The number of supported waves per thread group has been reduced to 16
with gfx9. Trying to use 32 waves causes hangs, and barriers might
not work correctly with > 16 waves.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: fix detection of DRAW_INDIRECT_MULTI on SI

The firmware version numbers for SI were wrong. The new numbers are probably
too conservative (we don't have a definitive answer by the firmware team),
but DRAW_INDIRECT_MULTI has been confirmed to work with these versions on
Tahiti (by Gustaw) and on Verde (by myself).

While this is technically adding a feature, it's a feature we thought we had
for a long time. The change is small enough and we're early enough in the 17.2
release cycle that it should still go in.

Reported-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

anv: only expose up to 28 vertex attributes

The EU limit of 128 GRFs should allow 32 vertex elements of 4 GRFs.
However, the maximum allowed value of "Vertex URB Entry Read Length"
in SIMD8 is 15. And 15 * 8 = 120 gives us a limit of 30 vertex elements.
Because we also need to reserve a vertex buffer to upload
VertexIndex/InstanceIndex and another to upload DrawID when needed,
we can only expose 28.

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv/cmd_buffer: fix off by one error in assertion

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

i965: Shut up Coverity warning about HiZ buffers.

Here the AUX_USAGE_* mode indicates that we have HiZ, so we will have
a HiZ buffer.  But Coverity doesn't know that, so it thinks it might
be NULL because we checked hiz_buf != NULL earlier.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Fix = vs == in MCS aux usage assert.

Caught by Coverity (CID 1415680).

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Fix offset addition in get_isl_surf.

Increase the value, not the pointer to the stack variable.

Caught by Coverity (CID 1415574).  Not shipped in a real release.

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

mesa/st: fix inconsistent indentation of st_cb_bufferobjects.c

No changes, just re-indent.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

compiler: move glsl_interface_packing enum to shader_enums.h

This allows us to drop the duplicate gl_uniform_block_packing enum.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa/st: fix unused variable warnings

Reviewed-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa/st: move st_pipe_format_to_mesa_format() call to where its used

Reviewed-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/util: fix unused variable warning

Reviewed-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: drop useless assert

NewBufferObj() is called when the shared state is allocated so we
wouldn't get this far if it was NULL.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: call binding functions directly from glDeleteBuffers

This avoids useless error checking.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: move static binding functions above _mesa_DeleteBuffers()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: don't try to re-generate the default buffer

It should have been created by this point.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

broadcom/vc4: Switch the V3D 2.1 XML over to restricted address fields.

This keeps the flags out of v3d_decode.c's output.  In the generated code,
only the unpack functions see any change (where they now get the
restricted start value), and vc4 doesn't use the unpack functions yet.

broadcom/genxml: Support address fields with <32 bits

I was writing the XML such that the address field overlapped various flags
in the alignment bits, which caused pain when trying to unpack for decode.
Instead, keep the XML matching the docs (address fields don't overlap),
and just infer the appropriate shift value during decode.

During pack, the address is just applied to the appropriate bits
already, ignoring the sub-byte start/end fields.

broadcom/vc4: Use the RA callback to improve register selection's choices.

We simply pick r4 if available (anything else would force a MOV), then
round-robin through accumulators (avoids physical regfile RAW delay
slots), then round-robin through the physical regfile.

The effect on instruction count is pretty impressive:

total instructions in shared programs: 76563 -> 74526 (-2.66%)
instructions in affected programs:     66463 -> 64426 (-3.06%)

and we could probably do better with a little heuristic of "if we're going
to choose a physical reg, and other operands of instructions using this as
a src have the same physical regfile, then use the other regfile".

ra: Add a callback for selecting a register from what's available.

VC4 has had a tension, similar to pre-Sandybridge Intel, where we want to
use low-numbered registers (more parallelism on Intel, fewer delay slots
on vc4), but in order to give instruction scheduling the most freedom to
avoid delays we want to round-robin between registers of the same cost.
Our two heuristics so far have chosen one end or the other of that
tradeoff.

The callback, instead, hands the driver the set of registers that are
available, and the driver gets to make its own choice.  This will be used
in vc4 to round-robin between registers of the same cost, and might be
used in the future for improving bank selection.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ra: Don't put a node in its own adjacency set.

All the paths looping over adjacency had guards against considering
themselves (the non-obvious one was ra_any_neighbors_conflict(), which has
in_stack set).

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ra: Pull the body of a loop out to a helper function.

I was going to indent this code another level, and decided it would be
easier to read as a helper.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

broadcom/vc4: Scissor blits performed using the rendering engine.

Without this, a BlitFramebuffer would mark the whole framebuffer as being
changed (so we emit loads/stores of all of it) rather than just the
modified subset.

broadcom/vc4: Prefer blit via rendering to the software fallback.

I don't know how I managed to leave this here for so long.  Found when
working on a 1:1 overlapping blit extension for X11.

Cc: mesa-stable@lists.freedesktop.org

broadcom/vc4: Switch the Viewport Center fields to a fixed-point representation.

This gets us automatic CL decoding to a floating-point value, and drops a
magic number from the emit code.  250x250 shader runner tests now say they
have a center of 125.0 instead of 2000.

broadcom/vc4: Use the XML decoder for CL dumping.

The VC4_DEBUG_CL output goes from:

0x00000010 0x00000010: 0x06 VC4_PACKET_START_TILE_BINNING
0x00000011 0x00000011: 0x38 VC4_PACKET_PRIMITIVE_LIST_FORMAT
0x00000012 0x00000012: 0x12
0x00000013 0x00000013: 0x66 VC4_PACKET_CLIP_WINDOW
0x00000014 0x00000014: 0x00
0x00000015 0x00000015: 0x00
0x00000016 0x00000016: 0x00
0x00000017 0x00000017: 0x00
0x00000018 0x00000018: 0xfa
0x00000019 0x00000019: 0x00
0x0000001a 0x0000001a: 0xfa
0x0000001b 0x0000001b: 0x00

to:

0x00000010 0x00000010: 0x06 Start Tile Binning
0x00000011 0x00000011: 0x38 Primitive List Format
    Data Type: 1 (16-bit index)
    Primitive Type: 2 (Triangles List)
0x00000013 0x00000013: 0x66 Clip Window
    Clip Window Height in pixels: 250
    Clip Window Width in pixels: 250
    Clip Window Bottom Pixel Coordinate: 0
    Clip Window Left Pixel Coordinate: 0

v2: Squash in robher's fixes for Android

broadcom/genxml: Introduce a V3D packet/struct decoder.

This is copied from Intel's XML decoder, modified to handle V3D's
byte-oriented packets.

v2: Squash in robher's fixes for Android

broadcom: add editorconfig

This is the same 8-space style used in the vc4 and vc5 gallium drivers.

intel/decoder: Reuse the gen_make_gen() helper.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/decoder: Reuse the MAX2 macro instead of defining another one.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

svga: implement MSAA alpha_to_one feature

The device doesn't directly support this feature so we implement it with
additional shader code which sets the color output(s) w component to
1.0 (or max_int or max_uint).

Fixes 16 Piglit ext_framebuffer_multisample/*alpha-to-one* tests.

v2: only support unorm/float buffers, not int/uint, per Roland.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: rework the FS white fragments code

When we forcibly write white to FS outputs (for XOR mode emulation)
we were using a temp register.  But that's not really necessary.
This also fixes the case of writing white to multiple color buffers.

Subsequent changes will build on this.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

gallium/util: s/unsigned/enum tgsi_texture_type/

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

drirc: whitelist glthread for Overlord 1+2, Oil Rush, War Thunder, Saints Row 2

Performance delta on Core i5-4570 + Radeon R9 270:
    Overlord: +20% in certain locations
    Overlord II: +20% in certain locations
    Oil Rush: +12% in most locations
    War Thunder: +4-9% in benchmarks
    Saints Row 2: +10-35% in certain locations

i965: perf: flush batchbuffers at the beginning of queries

As Chris commented, it makes more sense to have batch buffer flushes
before the query. Usually applications like frame_retrace do a series
of queries and in that case, with flushes at the end of the queries,
we might still have the first query contained in 2 different batchs.
More generally it would be quite usual to have the query contained in
2 batch buffers because we never now what's the fill rate of the
current batch buffer.

If we move the flushing at the beginning of the queries, it's pretty
much guaranteed that queries will be contained in a single batch
buffer (unless the amount of commands is huge, but then it's only fair
to include reloading request times in the measurements).

Fixes: adafe4b733c02 ("i965: perf: minimize the chances to spread queries across batchbuffers")
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

st/dri2: Return invalid modifier when no driver support

Always initialise whandle.modifier for DRIImage modifier queries, so if
the driver doesn't support it then we return false for the query.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes: d33fe8b84e45 ("st/dri: enable DRIimage modifier queries")

st/dri: Check get-handle return value in queryImage

In the DRIImage queryImage hook, check if resource_get_handle() failed
and return FALSE if so.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

r600: Add support for B5G5R5A1.

Fixes rendercheck errors when using glamor acceleration in X server.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

radeon/vcn: move message buffer to vram for now

To workaround an unknown bug.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

trace: Correct transfer box size calculation.

For textures we must not approximate the calculation with `stride *
height`, or `slice_stride * depth`, as that can easily lead to buffer
overflows, particularly for partial transfers.

This should address the issue that Bruce Cherniak found and diagnosed.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

mesa: add active_shader_program() helper

To reduce code duplication.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: add bind_program_pipeline() helper

To reduce code duplication.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

egl: fix whitespace issues from eglimage code

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

util: fix warning/error on 32bit build

Add uintptr_t cast to fix 'cast to pointer from integer of different size'
warning on 32bit build (build error on Android M).

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

r600g: constify some args at r600_asm.c

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: remove unused "bc" args, and one unneeded forward declaration

To ease review just highlight "bc," string.

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radv: only report external semaphore info for opaque fd.

Until we support sync fd, don't report the info.

Fixes CTS dEQP-VK.api.external.semaphore.sync_fd.* from crashing.

Fixes: eaa56eab6 (radv: initial support for shared semaphores (v2))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965: Simplify HiZ clears a bit

No need for all that switching when we can just assign a nice little
variable with the number of layers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Use {} to initialize GENX_* structs.

gen4 have commands which start with KernelStartPointer, which is a
struct, so if we initialize it struct = { 0 }, we get warnings on some
compilers:

"GCC (pre 4.9?) can throw a Wmissing-braces on[1] while clang
-Wmissing-field-initializers [2]." - Emil

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53119
[2] https://bugs.llvm.org/show_bug.cgi?id=21689

This change works around that and will silence such warnings. It is both
a GCC and a clang extension.

v2:
   - Use {} instead of memset macro (Matt)

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

st/mesa: create framebuffer iface hash table per st manager

With commit 5124bf98239, a framebuffer interface hash table is
created in st_gl_api_create(), which is called in
dri_init_screen_helper() for each screen. When the hash table is
overwritten with multiple calls to st_gl_api_create(), it can cause
race condition. This patch fixes the problem by creating a
framebuffer interface hash table per state tracker manager.

Fixes crash with steam.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101876
Fixes: 5124bf98239 ("st/mesa: add destroy_drawable interface")
Tested-by: Christoph Haag <haagch@frickel.club>
Reviewed-by: Brian Paul <brianp@vmware.com>

radv: fix buffer views on SI/CIK.

Fixes CTS dEQP-VK.memory.pipeline_barrier.host_write_uniform_texel_buffer.1024
on SI/CIK with radv.

Fixes: f4e499ec (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

egl/wayland: Ignore invalid modifiers

If the underlying driver does not support modifiers, dmabuf will still
advertise formats through the 'modifier' event, but send them with an
invalid modifier. Ignore them if this is the case, rather than passing
them through to the driver.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 02cc35937277 ("egl/wayland: Use linux-dmabuf interface for buffers")

mesa: return GL_OUT_OF_MEMORY if NewSamplerObject fails

This is similar to other functions that create objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: pass the 'caller' function to create_samplers()

To return GL_OUT_OF_MEMORY if NewSamplerObject fails.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add compressed_tex_sub_image_{error,no_error} helpers

To avoid inlining compressed_tex_sub_image() a bunch of times.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

intel/blorp: ship blorp_genX_exec.h within the tarball

Fixes: c9cb37b2a6c ("intel/blorp: Add a partial resolve pass for MCS")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: add 17.3.0-devel release notes template

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

mesa: bump version to 17.2.0-devel

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

egl: guard wayland header dep. tracking behind HAVE_PLATFORM_WAYLAND

Otherwise we'll attemt to generate the header even we don't need to.
In that case the dependencies may not be met, leading to build failure.

Fixes: 166852e "configure.ac: rework wayland-protocols handling"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

swrast: add dri2ConfigQueryExtension to the correct extension list

The extension should be in the list as returned by getExtensions().
Seems to have gone unnoticed since close to nobody wants to change the
vblank mode for the software driver.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

wayland-egl: update the SHA1 of the commit introducing v3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

wayland-egl: Update ABI checker

This change updates wayland-egl-abi-check.c with the latest changes to
wl_egl_window.

Signed-off-by: Miguel A. Vico <mvicomoya@nvidia.com>
Reviewed-by: James Jones <jajones@nvidia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

wayland-egl: Make wl_egl_window a versioned struct

We need wl_egl_window to be a versioned struct in order to keep track of
ABI changes.

This change makes the first member of wl_egl_window the version number.

An heuristic in the wayland driver is added so that we don't break
backwards compatibility:

 - If the first field (version) is an actual pointer, it is an old
   implementation of wl_egl_window, and version points to the wl_surface
   proxy.

 - Else, the first field is the version number, and we have
   wl_egl_window::surface pointing to the wl_surface proxy.

Signed-off-by: Miguel A. Vico <mvicomoya@nvidia.com>
Reviewed-by: James Jones <jajones@nvidia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl: Fix _eglPointerIsDereferencable() to ignore page residency

mincore() returns 0 on success, and -1 on failure.  The last parameter
is a vector of bytes with one entry for each page queried.  mincore
returns page residency information in the first bit of each byte in the
vector.

Residency doesn't actually matter when determining whether a pointer is
dereferenceable, so the output vector can be ignored.  What matters is
whether mincore succeeds. See:

  http://man7.org/linux/man-pages/man2/mincore.2.html

Signed-off-by: Miguel A. Vico <mvicomoya@nvidia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl: Move _eglPointerIsDereferencable() to eglglobals.[ch]

Move _eglPointerIsDereferencable() to eglglobals.[ch] and make it a
non-static function so it can be used out of egldisplay.c

Signed-off-by: Miguel A. Vico <mvicomoya@nvidia.com>
Reviewed-by: James Jones <jajones@nvidia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

wayland-egl: Add wl_egl_window ABI checker

Add a small ABI checker for wl_egl_window so that we can check for
backwards incompatible changes at 'make check' time.

Signed-off-by: Miguel A. Vico <mvicomoya@nvidia.com>
Reviewed-by: James Jones <jajones@nvidia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

swr: use the correct variable for no undefined symbols

The variable name was missing a leading LD_, which resulted in a missing
check for unresolved symbols in the backend binaries.

With the link addressed with earlier patches, we can correct the typo.

Thanks to Laurent for the help spotting this.

v2: Split from a larger patch.

Cc: mesa-stable@lists.freedesktop.org
Cc: Bruce Cherniak <bruce.cherniak@intel.com>
Cc: Tim Rowley <timothy.o.rowley@intel.com>
Cc: Laurent Carlier <lordheavym@gmail.com>
Fixes: 9475251145174882b532 "swr: standardize linkage and check for
                             unresolved symbols"
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reported-by: Laurent Carlier <lordheavym@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

swr: don't forget to link KNL/SKX against pthreads

Analogous to previous commit but for the KNL/SKX backends.

Cc: Bruce Cherniak <bruce.cherniak@intel.com>
Cc: Tim Rowley <timothy.o.rowley@intel.com>
Cc: Laurent Carlier <lordheavym@gmail.com>
Fixes: 1cb5a6061ce ("configure/swr: add KNL and SKX architecture targets")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

swr: don't forget to link AVX/AVX2 against pthreads

Seems like the backends have been using pthreads since day one, yet
we've been missing the link.

With later commit we'll fix a typo, hence the libraries will be build
with -Wl,no-undefined, aka failing the build on unresolved symbols.

v2: Split from a larger patch.

Cc: mesa-stable@lists.freedesktop.org
Cc: Bruce Cherniak <bruce.cherniak@intel.com>
Cc: Tim Rowley <timothy.o.rowley@intel.com>
Cc: Laurent Carlier <lordheavym@gmail.com>
Fixes: c6e67f5a9373e916a8d2 "gallium/swr: add OpenSWR rasterizer"
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

configure.ac: rework wayland-protocols handling

At dist/distcheck time we need to ensure that all the files and their
respective dependencies are handled.

At the moment we'll bail out as the linux-dmabuf rules are guarded in a
conditional. Move them outside of it and drop the sources from
BUILT_SOURCES.

Thus the files will be generated only as needed, which will happen only
after the wayland-protocols dependency is enforced in configure.ac.

v2: add dependency tracking for the header

Cc: Andres Gomez <agomez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>

radv: enable sample shading

This calculates ps_iter_samples from the minSampleShading input

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: don't set dedicated bit for buffer external memory.

This is an alternate fix for the buffer export dedicated interaction.

Fixes CTS dEQP-VK.api.external.memory.opaque_fd.dedicated.buffer.info

Fixes: b70829708a (radv: Implement VK_KHR_external_memory)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: fix non-0 based layer clears.

If the layer base was > 0, it wasn't getting passed as the start
instance or getting added in the shaders.

Fixes CTS dEQP-VK.api.image_clearing.core.clear_color_attachment.2d_r8_uint_multiple_layers

Fixes: 7e0382fb (radv: add support for layered clears (v2))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: check enabled device features.

The spec says we should return VK_ERROR_FEATURE_NOT_PRESENT.

Ported from anv.

Fixes CTS test dEQP-VK.api.device_init.create_device_unsupported_features

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: for external memory imports close the fd on import success

If we get an fd, we need to close it before returning.

Fixes CTS test dEQP-VK.api.external.memory.opaque_fd.dedicated.device_only.import_multiple_times

Fixes: b70829708a (radv: Implement VK_KHR_external_memory)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: Don't segfault when exporting an image which hasn't been bound yet.

The image is set on Memory allocation already, but the image doesn't
have to have the BindImageMemory called yet. Luckily, we know offset
within a BO has to be 0 for dedicated allocations, so we can just
use the dummy 0 in the address calaculations.

Fixes CTS test dEQP-VK.api.external.memory.opaque_fd.dedicated.image.export_bind_import_bind

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes: b70829708ac "radv: Implement VK_KHR_external_memory"
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Handle VK_ATTACHMENT_UNUSED in color attachments.

This just sets them to INVALID COLOR,  instead of shifting the
attachments together.

This also fixes a number of cases where we use it first and only
then check if it is VK_ATTACHMENT_UNUSED.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>

broadcom: correct header file in BROADCOM_FILES

This fixes `make distcheck`

> make[3]: *** No rule to make target 'common/v3d_devinfo.h', needed by 'distdir'.  Stop.
> make[3]: Leaving directory '/home/local/mesa/src/broadcom'
> Makefile:945: recipe for target 'distdir' failed
> make[2]: Leaving directory '/home/local/mesa/src'
> make[2]: *** [distdir] Error 1
> make[1]: *** [distdir] Error 1

Fixes: 427bbbb99c ("broadcom: Introduce a header for talking about chip revisions.")
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

etnaviv: Clear lbl_usage array correctly

Fill the entire array instead of just a quarter. This avoids
crashes with large shaders.
(currently this never causes a problem because shaders larger than 2048/4
instructions are not supported by this driver on any hardware, but it will
cause problems in the future)

Fixes: ec436051899 ("etnaviv: fix shader miscompilation with more than 16 labels")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

anv/image: zalloc image views

This allows us to avoid some extra zeroing.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv/image: Use vk_zalloc instead of an explicit memset

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Separate surface states by layout instead of aux_usage

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/isl: Add some sanity checks for compressed surfaces

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/isl: Add a helper to get a subimage surface

We already have a helper for doing this in BLORP, this just moves the
logic into ISL where we can share it with other components.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Get rid of some unused function declarations

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

i965: Enable regular fast-clears (CCS_D) on gen9+

The set of formats which supports CCS_E is actually fairly small on
gen9.  However, everything that supports fast-clears on gen8 also
supports fast-clears on gen9+.  The one very annoying exception is
that blending is broken for non-0/1 clear colors with sRGB formats.
In order to solve that problem, we do a resolve to get rid of the
clear color.  Another option would be to just not fast-clear with
non-0/1 clear colors however non-0/1 + blending + sRGB is uncommon
enough that this shouldn't be a significant performance problem.

This appears to help gl_manhattan31_off by about 2%.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>