Nathan Sidwell [Tue, 7 Aug 2018 21:28:51 +0000 (21:28 +0000)]
[PATCH] Line map table allocation
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg00434.html
* line-map.c: (linemap_init): Set default allocator here.
(new_linemap): Rather than here. Refactor allocation logic.
From-SVN: r263366
Jonathan Wakely [Tue, 7 Aug 2018 19:13:26 +0000 (20:13 +0100)]
PR libstdc++/86874 fix std::variant::swap regression
PR libstdc++/86874
* include/std/variant (_Copy_ctor_base::_M_destructive_move): Define
here instead of in _Move_assign_base.
(_Copy_ctor_base<true, _Types...>::_M_destructive_move): Define.
(_Copy_assign_base::operator=): Use _M_destructive_move when changing
the contained value to another alternative.
(_Move_assign_base::operator=): Likewise.
(_Move_assign_base::_M_destructive_move): Remove.
* testsuite/20_util/variant/86874.cc: New test.
From-SVN: r263365
Ian Lance Taylor [Tue, 7 Aug 2018 17:29:50 +0000 (17:29 +0000)]
runtime: use poll rather than pollset for netpoll on AIX
Updates golang/go#26634
Reviewed-on: https://go-review.googlesource.com/126857
From-SVN: r263364
Ian Lance Taylor [Tue, 7 Aug 2018 17:28:22 +0000 (17:28 +0000)]
libgo: uncomment trace.Stop() call in testing package
Fix up the testing package to insure that execution traces
work properly (e.g. "-test.trace=<XXX>" command line option). The
call to stop tracing and emit the output file was stubbed out.
Reviewed-on: https://go-review.googlesource.com/128275
From-SVN: r263363
Richard Sandiford [Tue, 7 Aug 2018 17:22:19 +0000 (17:22 +0000)]
[AArch64] Fix -mlow-precision-div (PR 86838)
The "@" handling broke -mlow-precision-div, because the scalar forms of
the instruction were provided by a pattern that also provided FRECPX
(and so were parameterised on an unspec code as well as a mode),
while the SIMD versions had a dedicated FRECPE pattern. This patch
moves the scalar FRECPE handling to the SIMD pattern too (as for FRECPS)
and uses a separate pattern for FRECPX.
The convention in aarch64-simd-builtins.def seemed to be to add
comments only if the mapping wasn't obvious (i.e. not just sticking
"aarch64_" on the beginning and "<mode>" on the end), so the patch
deletes the reference to the combined pattern instead of rewording it.
There didn't seem to be any coverage of -mlow-precision-div in the
testsuite, so the patch adds some tests for it.
2018-08-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR target/86838
* config/aarch64/iterators.md (FRECP, frecp_suffix): Delete.
* config/aarch64/aarch64-simd.md
(aarch64_frecp<FRECP:frecp_suffix><mode>): Fold FRECPE into...
(@aarch64_frecpe<mode>): ...here and the move FRECPX to...
(aarch64_frecpx<mode>): ...this new pattern.
* config/aarch64/aarch64-simd-builtins.def: Remove comment
about aarch64_frecp<FRECP:frecp_suffix><mode>.
gcc/testsuite/
PR target/86838
* gcc.target/aarch64/frecpe_1.c: New test.
* gcc.target/aarch64/frecpe_2.c: Likewise.
From-SVN: r263362
Paolo Carlini [Tue, 7 Aug 2018 16:40:18 +0000 (16:40 +0000)]
PR c++/59480, DR 136
/cp
2018-08-07 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/59480, DR 136
* decl.c (check_no_redeclaration_friend_default_args): New.
(duplicate_decls): Use the latter; also check that a friend
declaration specifying default arguments is a definition.
/testsuite
2018-08-07 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/59480, DR 136
* g++.dg/other/friend8.C: New.
* g++.dg/other/friend9.C: Likewise.
* g++.dg/other/friend10.C: Likewise.
* g++.dg/other/friend11.C: Likewise.
* g++.dg/other/friend12.C: Likewise.
* g++.dg/other/friend13.C: Likewise.
* g++.dg/other/friend14.C: Likewise.
* g++.dg/other/friend15.C: Likewise.
* g++.dg/parse/defarg4.C: Compile with -fpermissive -w.
* g++.dg/parse/defarg8.C: Likewise.
From-SVN: r263361
Jonathan Wakely [Tue, 7 Aug 2018 16:10:29 +0000 (17:10 +0100)]
PR libstdc++/86861 Meet precondition for Solaris memalign
Solaris memalign requires alignment to be at least sizeof(int), so
increase it as needed.
Also move the check for valid alignments from the fallback
implementation of aligned_alloc into operator new, as it's required for
all of aligned_alloc, memalign, posix_memalign and __aligned_malloc.
This adds a branch to check for undefined behaviour which we could just
ignore, so the check could just be removed. It should certainly be
removed if PR 86878 is implemented to issue a warning about calls with
invalid alignments.
PR libstdc++/86861
* libsupc++/new_opa.cc [_GLIBCXX_HAVE_MEMALIGN] (aligned_alloc):
Replace macro with inline function.
[__sun]: Increase alignment to meet memalign precondition.
[!HAVE__ALIGNED_MALLOC && !HAVE_POSIX_MEMALIGN && !HAVE_MEMALIGN]
(aligned_alloc): Move check for valid alignment to operator new.
Remove redundant check for non-zero size, it's enforced by the caller.
(operator new): Move check for valid alignment here. Use
__builtin_expect on check for zero size.
From-SVN: r263360
Richard Earnshaw [Tue, 7 Aug 2018 14:33:09 +0000 (14:33 +0000)]
Fix PR number for HPPA speculation patch: PR target/86807 -> PR target/86785
This just fixes the PR number in the ChangeLog. Nothing we can do
about the SVN history.
From-SVN: r263358
Ville Voutilainen [Tue, 7 Aug 2018 13:46:16 +0000 (16:46 +0300)]
re PR c++/79133 (lambda capture shadowing parameter & decltype confusion)
PR c++/79133
gcc/cp/
PR c++/79133
* name-lookup.c (check_local_shadow): Reject captures and parameters
with the same name.
testsuite/
PR c++/79133
* g++.dg/cpp0x/lambda/lambda-shadow3.C: New.
* g++.dg/cpp1y/lambda-generic-variadic18.C: Likewise.
From-SVN: r263357
Martin Liska [Tue, 7 Aug 2018 11:59:13 +0000 (13:59 +0200)]
Add malloc predictor (PR middle-end/83023).
2018-08-07 Martin Liska <mliska@suse.cz>
PR middle-end/83023
* predict.c (expr_expected_value_1): Handle DECL_IS_MALLOC,
BUILT_IN_REALLOC and DECL_IS_OPERATOR_NEW.
* predict.def (PRED_MALLOC_NONNULL): New predictor.
* doc/extend.texi: Document that malloc attribute adds
hit to compiler.
2018-08-07 Martin Liska <mliska@suse.cz>
PR middle-end/83023
* gcc.dg/predict-16.c: New test.
* g++.dg/predict-1.C: New test.
From-SVN: r263355
Jonathan Wakely [Tue, 7 Aug 2018 11:31:16 +0000 (12:31 +0100)]
Define monotonic_buffer_resource members out-of-line
Move the allocation logic into libstdc++.so so that it can be changed
without worrying about inlined code in existing binaries.
Leave do_allocate inline so that calls to it can be devirtualized, and
only the slow path needs to call into the library.
* config/abi/pre/gnu.ver: Export monotonic_buffer_resource members.
* include/std/memory_resource (monotonic_buffer_resource::release):
Call _M_release_buffers to free buffers.
(monotonic_buffer_resource::do_allocate): Call _M_new_buffer to
allocate a new buffer from upstream.
(monotonic_buffer_resource::_M_new_buffer): Declare.
(monotonic_buffer_resource::_M_release_buffers): Declare.
(monotonic_buffer_resource::_Chunk): Replace definition with
declaration as opaque type.
* src/c++17/memory_resource.cc (monotonic_buffer_resource::_Chunk):
Define.
(monotonic_buffer_resource::_M_new_buffer): Define.
(monotonic_buffer_resource::_M_release_buffers): Define.
From-SVN: r263354
Steve Ellcey [Tue, 7 Aug 2018 08:51:29 +0000 (08:51 +0000)]
Fix gcc.dg/vect/no-section-anchors-vect-69.c on SPARC etc. (PR tree-optimization/80925)
2018-08-07 Steve Ellcey <sellcey@cavium.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR tree-optimization/80925
* gcc.dg/vect/no-section-anchors-vect-69.c: Expect 3 loops
vectorized on !vect_hw_misalign targets.
Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
From-SVN: r263352
Alexandre Oliva [Tue, 7 Aug 2018 05:54:11 +0000 (05:54 +0000)]
Add missing gcc-interface/ to 2018-07-31 ChangeLog entry
From-SVN: r263351
GCC Administrator [Tue, 7 Aug 2018 00:16:33 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r263350
Tom de Vries [Mon, 6 Aug 2018 22:13:56 +0000 (22:13 +0000)]
[libgomp, nvptx] Handle CUDA_ONE_CALL_MAYBE_NULL
This patch adds handling of functions that may not be present in the cuda
driver.
Such a function can be declared using CUDA_ONE_CALL_MAYBE_NULL in cuda-lib.def,
it can be called with the usual convenience macros, but before calling its
presence needs to be tested using new macro CUDA_CALL_EXISTS.
When using the dlopen interface (PLUGIN_NVPTX_DYNAMIC == 1), we allow
non-present functions by allowing dlsym to return NULL. Otherwise
(PLUGIN_NVPTX_DYNAMIC == 0) we declare the non-present function to be weak.
Build and reg-tested libgomp on x86_64 with nvidia accelerator, with and without
--disable-cuda-driver, in combination with a trigger patch that adds a
non-existing function foo to cuda-lib.def:
...
CUDA_ONE_CALL_MAYBE_NULL (foo)
...
and declares it in plugin-nvptx.c:
...
CUresult foo (void);
...
and then uses it in nvptx_init after the init_cuda_lib call:
...
if (CUDA_CALL_EXISTS (foo))
CUDA_CALL (foo);
...
Also build and reg-tested on x86_64 with nvidia accelerator, with and without
--disable-cuda-driver, in combination with a trigger patch that replaces all
CUDA_ONE_CALLs in cuda-lib.def with CUDA_ONE_CALL_MAYBE_NULL, and guards two
CUDA_CALLs with CUDA_CALL_EXISTS, one for a regular fn, and one for a fn that is
a define in cuda/cuda.h.
2018-08-07 Tom de Vries <tdevries@suse.de>
* plugin/plugin-nvptx.c (DO_PRAGMA): Define.
(struct cuda_lib_s): Add def/undef of CUDA_ONE_CALL_MAYBE_NULL.
(init_cuda_lib): Add new param to CUDA_ONE_CALL_1. Add arg to
corresponding call in CUDA_ONE_CALL. Add def/undef of
CUDA_ONE_CALL_MAYBE_NULL.
(CUDA_CALL_EXISTS): Define.
From-SVN: r263346
Tom de Vries [Mon, 6 Aug 2018 22:13:46 +0000 (22:13 +0000)]
[libgomp, nvptx] Minimize lifetime of CUDA_ONE_CALL defines
This patch makes sure that the lifetimes of the CUDA_ONE_CALL macro (which is
defined twice in plugin-nvptx.c) are minimized, to make it obvious that the
definitions are used only in the lib-cuda.def include.
Build on x86_64 with nvptx accelerator and reg-tested libgomp.
2018-08-07 Tom de Vries <tdevries@suse.de>
* plugin/plugin-nvptx.c (struct cuda_lib_s, init_cuda_lib): Put
CUDA_ONE_CALL defines right before the cuda-lib.def include, and the
corresponding undefs right after.
From-SVN: r263345
John David Anglin [Mon, 6 Aug 2018 21:47:54 +0000 (21:47 +0000)]
re PR target/86807 (spu port needs updating for CVE-2017-5753)
PR target/86807
* config/pa/pa.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263344
Jeff Law [Mon, 6 Aug 2018 20:13:20 +0000 (14:13 -0600)]
tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Pass down the vr_values instance to cprop_into_stmt.
* tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Pass down
the vr_values instance to cprop_into_stmt.
(cprop_into_stmt): Pass vr_values instance down to cprop_operand.
(cprop_operand): Also query EVRP to determine if OP is a constant.
From-SVN: r263342
Nathan Sidwell [Mon, 6 Aug 2018 16:52:38 +0000 (16:52 +0000)]
[PATCH] Diagnostic included-from loop
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg00416.html
* diagnostic.c (diagnostic_report_current_module): Reroll
included-at loop. Translate text.
From-SVN: r263341
Marek Polacek [Mon, 6 Aug 2018 16:46:13 +0000 (16:46 +0000)]
re PR c++/86767 (continue statements in constexpr functions causes unbounded looping)
PR c++/86767
* constexpr.c (cxx_eval_statement_list): Handle continue.
* g++.dg/cpp1y/constexpr-86767.C: New test.
From-SVN: r263340
David Malcolm [Mon, 6 Aug 2018 16:25:27 +0000 (16:25 +0000)]
Fix memory leak in selftest::test_expansion_to_rtl
"make selftest-valgrind" shows:
187 bytes in 1 blocks are definitely lost in loss record 567 of 669
at 0x4A081D4: calloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x1F08260: xcalloc (xmalloc.c:162)
by 0xB24F32: init_emit() (emit-rtl.c:5843)
by 0xC10080: prepare_function_start() (function.c:4803)
by 0xC10254: init_function_start(tree_node*) (function.c:4877)
by 0x1CDF92A: selftest::test_expansion_to_rtl() (function-tests.c:595)
by 0x1CE007C: selftest::function_tests_c_tests() (function-tests.c:676)
by 0x1E010E7: selftest::run_tests() (selftest-run-tests.c:98)
by 0x1062D1E: toplev::run_self_tests() (toplev.c:2225)
by 0x1062F40: toplev::main(int, char**) (toplev.c:2303)
by 0x1E5B90A: main (main.c:39)
The allocation in question is:
crtl->emit.regno_pointer_align
= XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
This patch fixes this leak (and makes the output of
"make selftest-valgrind" clean) by calling free_after_compilation at the
end of the selftest in question.
gcc/ChangeLog:
* function-tests.c (selftest::test_expansion_to_rtl): Call
free_after_compilation.
From-SVN: r263339
Uros Bizjak [Mon, 6 Aug 2018 15:49:05 +0000 (17:49 +0200)]
pr86763.C (dg-additional-options): Add -lrt for target *-*-linux-gnu.
* g++.dg/torture/pr86763.C (dg-additional-options): Add -lrt
for target *-*-linux-gnu.
From-SVN: r263338
Alan Hayward [Mon, 6 Aug 2018 15:33:00 +0000 (15:33 +0000)]
Enable clobber high for tls descs on Aarch64
gcc/
* config/aarch64/aarch64.md: Add clobber highs to tls_desc.
gcc/testsuite/
* gcc.target/aarch64/sve/tls_preserve_1.c: New test.
* gcc.target/aarch64/sve/tls_preserve_2.c: New test.
* gcc.target/aarch64/sve/tls_preserve_3.c: New test.
From-SVN: r263337
Andreas Krebbel [Mon, 6 Aug 2018 15:01:00 +0000 (15:01 +0000)]
S/390: Don't unroll memory blk op loops
gcc/ChangeLog:
2018-08-06 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (s390_loop_unroll_adjust): Prevent small
loops with memory block operations from getting unrolled.
gcc/testsuite/ChangeLog:
2018-08-06 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/nomemloopunroll-1.c: New test.
From-SVN: r263336
Ulrich Weigand [Mon, 6 Aug 2018 14:40:56 +0000 (14:40 +0000)]
[spu, commit] Define TARGET_HAVE_SPECULATION_SAFE_VALUE
The SPU processor is not affected by speculation, so this macro can
safely be defined as speculation_safe_value_not_needed.
gcc/ChangeLog:
PR target/86807
* config/spu/spu.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263335
Jeff Law [Mon, 6 Aug 2018 13:49:10 +0000 (07:49 -0600)]
reload1.c (forget_old_reloads_1): Adjust CLOBBER_HIGH assert.
* reload1.c (forget_old_reloads_1): Adjust CLOBBER_HIGH
assert.
From-SVN: r263333
Jozef Lawrynowicz [Mon, 6 Aug 2018 10:29:17 +0000 (10:29 +0000)]
re PR target/86662 (msp430-elf segfault with -flto and -mlarge)
PR target/86662
* gcc/tree.c (build_common_tree_nodes): Initialize integer_types array
with all enabled __intN types.
* gcc/testsuite/gcc.target/msp430/pr86662.c: New test.
From-SVN: r263332
Alan Hayward [Mon, 6 Aug 2018 09:57:03 +0000 (09:57 +0000)]
Remaining support for clobber high
gcc/
* alias.c (record_set): Check for clobber high.
* cfgexpand.c (expand_gimple_stmt): Likewise.
* combine-stack-adj.c (single_set_for_csa): Likewise.
* combine.c (find_single_use_1): Likewise.
(set_nonzero_bits_and_sign_copies): Likewise.
(get_combine_src_dest): Likewise.
(is_parallel_of_n_reg_sets): Likewise.
(try_combine): Likewise.
(record_dead_and_set_regs_1): Likewise.
(reg_dead_at_p_1): Likewise.
(reg_dead_at_p): Likewise.
* dce.c (deletable_insn_p): Likewise.
(mark_nonreg_stores_1): Likewise.
(mark_nonreg_stores_2): Likewise.
* df-scan.c (df_find_hard_reg_defs): Likewise.
(df_uses_record): Likewise.
(df_get_call_refs): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* haifa-sched.c (haifa_classify_rtx): Likewise.
* ira-build.c (create_insn_allocnos): Likewise.
* ira-costs.c (scan_one_insn): Likewise.
* ira.c (equiv_init_movable_p): Likewise.
(rtx_moveable_p): Likewise.
(interesting_dest_for_shprep): Likewise.
* jump.c (mark_jump_label_1): Likewise.
* postreload-gcse.c (record_opr_changes): Likewise.
* postreload.c (reload_cse_simplify): Likewise.
(struct reg_use): Add source expr.
(reload_combine): Check for clobber high.
(reload_combine_note_use): Likewise.
(reload_cse_move2add): Likewise.
(move2add_note_store): Likewise.
* print-rtl.c (print_pattern): Likewise.
* recog.c (decode_asm_operands): Likewise.
(store_data_bypass_p): Likewise.
(if_test_bypass_p): Likewise.
* regcprop.c (kill_clobbered_value): Likewise.
(kill_set_value): Likewise.
* reginfo.c (reg_scan_mark_refs): Likewise.
* reload1.c (maybe_fix_stack_asms): Likewise.
(eliminate_regs_1): Likewise.
(elimination_effects): Likewise.
(mark_not_eliminable): Likewise.
(scan_paradoxical_subregs): Likewise.
(forget_old_reloads_1): Likewise.
* reorg.c (find_end_label): Likewise.
(try_merge_delay_insns): Likewise.
(redundant_insn): Likewise.
(own_thread_p): Likewise.
(fill_simple_delay_slots): Likewise.
(fill_slots_from_thread): Likewise.
(dbr_schedule): Likewise.
* resource.c (update_live_status): Likewise.
(mark_referenced_resources): Likewise.
(mark_set_resources): Likewise.
* rtl.c (copy_rtx): Likewise.
* rtlanal.c (reg_referenced_p): Likewise.
(single_set_2): Likewise.
(noop_move_p): Likewise.
(note_stores): Likewise.
* sched-deps.c (sched_analyze_reg): Likewise.
(sched_analyze_insn): Likewise.
From-SVN: r263331
Alan Hayward [Mon, 6 Aug 2018 09:54:28 +0000 (09:54 +0000)]
cse support for clobber_high
gcc/
* cse.c (invalidate_reg): New function extracted from...
(invalidate): ...here.
(canonicalize_insn): Check for clobber high.
(invalidate_from_clobbers): invalidate clobber highs.
(invalidate_from_sets_and_clobbers): Likewise.
(count_reg_usage): Check for clobber high.
(insn_live_p): Likewise.
* cselib.c (cselib_expand_value_rtx_1):Likewise.
(cselib_invalidate_regno): Check for clobber in setter.
(cselib_invalidate_rtx): Pass through setter.
(cselib_invalidate_rtx_note_stores):
(cselib_process_insn): Check for clobber high.
* cselib.h (cselib_invalidate_rtx): Add operand.
From-SVN: r263330
Alan Hayward [Mon, 6 Aug 2018 09:51:01 +0000 (09:51 +0000)]
lra support for clobber_high
gcc/
* lra-eliminations.c (lra_eliminate_regs_1): Check for clobber high.
(mark_not_eliminable): Likewise.
* lra-int.h (struct lra_insn_reg): Add clobber high marker.
* lra-lives.c (process_bb_lives): Check for clobber high.
* lra.c (new_insn_reg): Remember clobber highs.
(collect_non_operand_hard_regs): Check for clobber high.
(lra_set_insn_recog_data): Likewise.
(add_regs_to_insn_regno_info): Likewise.
(lra_update_insn_regno_info): Likewise.
From-SVN: r263329
Alan Hayward [Mon, 6 Aug 2018 09:38:29 +0000 (09:38 +0000)]
Add func to check if register is clobbered by clobber_high
gcc/
* rtl.h (reg_is_clobbered_by_clobber_high): Add declarations.
* rtlanal.c (reg_is_clobbered_by_clobber_high): Add function.
From-SVN: r263328
Alan Hayward [Mon, 6 Aug 2018 09:16:24 +0000 (09:16 +0000)]
Generation support for CLOBBER_HIGH
Ensure clobber high is a register expression.
Info is passed through for the error case.
gcc/
* emit-rtl.c (verify_rtx_sharing): Check for CLOBBER_HIGH.
(copy_insn_1): Likewise.
(gen_hard_reg_clobber_high): New gen function.
* genconfig.c (walk_insn_part): Check for CLOBBER_HIGH.
* genemit.c (gen_exp): Likewise.
(gen_emit_seq): Pass through info.
(gen_insn): Check for CLOBBER_HIGH.
(gen_expand): Pass through info.
(gen_split): Likewise.
(output_add_clobbers): Likewise.
* genrecog.c (validate_pattern): Check for CLOBBER_HIGH.
(remove_clobbers): Likewise.
* rtl.h (gen_hard_reg_clobber_high): New declaration.
From-SVN: r263327
Alan Hayward [Mon, 6 Aug 2018 09:07:57 +0000 (09:07 +0000)]
Add CLOBBER_HIGH expression
Includes documentation.
2018-08-06 Alan Hayward <alan.hayward@arm.com>
* doc/rtl.texi (clobber_high): Add.
(parallel): Add in clobber high
* rtl.c (rtl_check_failed_code3): Add function.
* rtl.def (CLOBBER_HIGH): Add expression.
* rtl.h (RTL_CHECKC3): Add macro.
(rtl_check_failed_code3): Add declaration.
(XC3EXP): Add macro.
From-SVN: r263326
Naveen H.S [Mon, 6 Aug 2018 07:22:57 +0000 (07:22 +0000)]
MAINTAINERS: Update my email address.
* MAINTAINERS: Update my email address.
From-SVN: r263325
GCC Administrator [Mon, 6 Aug 2018 00:16:32 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r263324
Iain Buclaw [Sun, 5 Aug 2018 20:24:59 +0000 (20:24 +0000)]
libbacktrace: Suppress the default action-if-found for AC_CHECK_LIBS.
Zlib is not a dependency of libbacktrace, and so it shouldn't be added
to LIBS.
libbacktrace/
* configure.ac: Move define of HAVE_ZLIB into check for -lz.
* Makefile.in: Regenerate.
* config.h.in: Likewise.
* configure: Likewise.
From-SVN: r263320
François Dumont [Sun, 5 Aug 2018 15:33:58 +0000 (15:33 +0000)]
stl_iterator.h: Fix comment.
2018-08-05 François Dumont <fdumont@gcc.gnu.org>
* include/bits/stl_iterator.h: Fix comment.
From-SVN: r263318
H.J. Lu [Sun, 5 Aug 2018 12:46:13 +0000 (12:46 +0000)]
i386: Set cfun->machine->max_used_stack_alignment if needed
cfun->machine->max_used_stack_alignment is used to decide how stack frame
should be aligned. This is independent of any psABIs nor 32-bit vs 64-bit.
It is always safe to compute max_used_stack_alignment. We compute it only
if 128-bit aligned load/store may be generated on misaligned stack slot
which will lead to segfault.
gcc/
PR target/86386
* config/i386/i386.c (ix86_finalize_stack_frame_flags): Set
cfun->machine->max_used_stack_alignment if needed.
gcc/testsuite/
PR target/86386
* gcc.target/i386/pr86386.c: New file.
From-SVN: r263317
GCC Administrator [Sun, 5 Aug 2018 00:16:33 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r263316
Martin Sebor [Sat, 4 Aug 2018 22:14:41 +0000 (22:14 +0000)]
PR tree-optimization/86571 - AIX NaNQ and NaNS output format conflicts with __builtin_sprintf
gcc/ChangeLog:
PR tree-optimization/86571
* gimple-ssa-sprintf.c (format_floating): Extend upper bound of
NaN output to 4.
From-SVN: r263312
Tom de Vries [Sat, 4 Aug 2018 21:42:53 +0000 (21:42 +0000)]
[testsuite, guality] Use absolute line number in pass/fail line
2018-08-04 Tom de Vries <tdevries@suse.de>
* lib/gcc-gdb-test.exp: Use absolute line number in pass/fail line.
From-SVN: r263311
Tom de Vries [Sat, 4 Aug 2018 20:07:22 +0000 (20:07 +0000)]
[libgomp, nvptx, --without-cuda-driver] Don't use system cuda driver
Using libgomp configure option --with-cuda-driver=<dir> we can indicate what
cuda driver to use to build the libgomp nvptx plugin. Without such an option,
the system cuda driver is used, if available. If not availabe, a dlopen
interface is used instead.
However, when we use --without-cuda-driver (or the equivalent
--with-cuda-driver=no) the system cuda driver is still used if available.
This patch fixes that, making sure that --without-cuda-driver selects the dlopen
interface.
Build on x86_64 with nvptx accelerator and tested libgomp testsuite, with and
without option --without-cuda-driver.
2018-08-04 Tom de Vries <tdevries@suse.de>
* plugin/configfrag.ac: For --without-cuda-driver, set
CUDA_DRIVER_INCLUDE and CUDA_DRIVER_LIB to no. Handle
CUDA_DRIVER_INCLUDE == no and CUDA_DRIVER_LIB == no.
* configure: Regenerate.
From-SVN: r263310
Andreas Schwab [Sat, 4 Aug 2018 16:50:02 +0000 (16:50 +0000)]
const-volatile.c: Remove duplicate test "type:cvip".
* gcc.dg/guality/const-volatile.c: Remove duplicate test
"type:cvip".
From-SVN: r263309
Janus Weil [Sat, 4 Aug 2018 15:37:23 +0000 (17:37 +0200)]
re PR fortran/45521 ([F08] GENERIC resolution with ALLOCATABLE/POINTER and PROCEDURE)
2018-08-04 Janus Weil <janus@gcc.gnu.org>
PR fortran/45521
* interface.c (gfc_compare_interfaces): Apply additional
distinguishability criteria of F08 to operator interfaces.
2018-08-04 Janus Weil <janus@gcc.gnu.org>
PR fortran/45521
* gfortran.dg/interface_assignment_6.f90: New test case.
From-SVN: r263308
Uros Bizjak [Sat, 4 Aug 2018 10:01:54 +0000 (12:01 +0200)]
re PR testsuite/86153 (test case g++.dg/pr83239.C fails starting with r261585)
PR testsuite/86153
* g++.dg/pr83239.C (dg-options): Add -finline-limit=500.
From-SVN: r263306
GCC Administrator [Sat, 4 Aug 2018 00:16:28 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r263305
Sandra Loosemore [Fri, 3 Aug 2018 22:40:08 +0000 (18:40 -0400)]
nios2.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define.
2018-08-03 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/nios2/nios2.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define.
From-SVN: r263301
Jeff Law [Fri, 3 Aug 2018 20:53:48 +0000 (14:53 -0600)]
Remove nfs bogon
From-SVN: r263300
Sergei Trofimovich [Fri, 3 Aug 2018 20:53:08 +0000 (20:53 +0000)]
sjlj.S: Adjust to use PIC vs normal code to avoid absolute relocation in a shared library.
* config/sh/sjlj.S: Adjust to use PIC vs normal code to avoid
absolute relocation in a shared library.
From-SVN: r263299
David Malcolm [Fri, 3 Aug 2018 18:38:13 +0000 (18:38 +0000)]
Add fix-it hint for missing return statement in assignment operators (PR c++/85523)
gcc/cp/ChangeLog:
PR c++/85523
* decl.c: Include "gcc-rich-location.h".
(add_return_star_this_fixit): New function.
(finish_function): When warning about missing return statements in
functions returning non-void, add a "return *this;" fix-it hint for
assignment operators.
gcc/testsuite/ChangeLog:
PR c++/85523
* g++.dg/pr85523.C: New test.
Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r263298
Jeff Law [Fri, 3 Aug 2018 17:39:00 +0000 (11:39 -0600)]
re PR target/86795 (mn10300 port needs updating for CVE-2017-5753)
PR target/86795
* config/mn10300/mn10300.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263296
David Malcolm [Fri, 3 Aug 2018 15:49:12 +0000 (15:49 +0000)]
docs: fix stray duplicated words
gcc/ChangeLog:
* doc/gcov.texi (-x): Remove duplicate "to".
* doc/invoke.texi (-Wnoexcept-type): Remove duplicate "calls".
(-Wif-not-aligned): Remove duplicate "is".
(-flto): Remove duplicate "the".
(MicroBlaze Options): In examples of "-mcpu=cpu-type", remove
duplicate "v5.00.b".
(MSP430 Options): Remove duplicate "and" from the description
of "-mgprel-sec=regexp".
(x86 Options): Remove duplicate copies of "vmldLog102" and
vmlsLog104 from description of "-mveclibabi=type".
From-SVN: r263295
Bogdan Harjoc [Fri, 3 Aug 2018 15:25:35 +0000 (15:25 +0000)]
Avoid infinite loop with duplicate anonymous union fields (PR c/86690).
If a struct contains an anonymous union and both have a field with the
same name, detect_field_duplicates_hash() will replace one of them
with NULL. If compilation doesn't stop immediately, it may later call
lookup_field() on the union, which falsely assumes the union's
LANG_SPECIFIC array is sorted, and may loop indefinitely because of
this.
2018-08-03 Bogdan Harjoc <harjoc@gmail.com>
PR c/86690
gcc/c:
* c-typeck.c (lookup_field): Do not use TYPE_LANG_SPECIFIC after
errors.
gcc/testsuite:
* gcc.dg/union-duplicate-field.c: New test.
From-SVN: r263294
Jason Merrill [Fri, 3 Aug 2018 15:10:32 +0000 (17:10 +0200)]
re PR c++/86706 (ICE in build_base_path, at cp/class.c:294)
PR c++/86706
* class.c (build_base_path): Use currently_open_class.
* g++.dg/template/pr86706.C: New test.
From-SVN: r263293
Uros Bizjak [Fri, 3 Aug 2018 13:55:31 +0000 (15:55 +0200)]
ChangeLog: Move entry ...
* ChangeLog: Move entry ...
* cp/ChangeLog: ... here.
From-SVN: r263292
Pierre-Marie de Rodat [Fri, 3 Aug 2018 13:22:38 +0000 (13:22 +0000)]
[Ada] Partially revert "Makefile patches from initial RISC-V cross/native build."
This partially reverts r262482, at it broke canadian builds.
2018-08-03 Pierre-Marie de Rodat <derodat@adacore.com>
gcc/ada/
Reverts
2018-07-06 Jim Wilson <jimw@sifive.com>
* Make-generated.in (treeprs.ads): Use $(GNATMAKE) instead of gnatmake.
(einfo.h, sinfo.h, stamp-snames, stamp-nmake): Likewise.
* gcc-interface/Makefile.in (xoscons): Likewise.
From-SVN: r263291
Richard Sandiford [Fri, 3 Aug 2018 12:56:55 +0000 (12:56 +0000)]
Handle SLP of call pattern statements
We couldn't vectorise:
for (int j = 0; j < n; ++j)
{
for (int i = 0; i < 16; ++i)
a[i] = (b[i] + c[i]) >> 1;
a += step;
b += step;
c += step;
}
at -O3 because cunrolli unrolled the inner loop and SLP couldn't handle
AVG_FLOOR patterns (see also PR86504). The problem was some overly
strict checking of pattern statements compared to normal statements
in vect_get_and_check_slp_defs:
switch (gimple_code (def_stmt))
{
case GIMPLE_PHI:
case GIMPLE_ASSIGN:
break;
default:
if (dump_enabled_p ())
dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
"unsupported defining stmt:\n");
return -1;
}
The easy fix would have been to add GIMPLE_CALL to the switch,
but I don't think the switch is doing anything useful. We only create
pattern statements that the rest of the vectoriser can handle, and the
other checks in this function and elsewhere check whether SLP is possible.
I'm also not sure why:
if (!first && !oprnd_info->first_pattern
/* Allow different pattern state for the defs of the
first stmt in reduction chains. */
&& (oprnd_info->first_dt != vect_reduction_def
is necessary. All that should matter is that the statements in the
node are "similar enough". It turned out to be quite hard to find a
convincing example that used a mixture of pattern and non-pattern
statements, so bb-slp-pow-1.c is the best I could come up with.
But it does show that the combination of "xi * xi" statements and
"pow (xj, 2) -> xj * xj" patterns are handled correctly.
The patch therefore just removes the whole if block.
The loop also needed commutative swapping to be extended to at least
AVG_FLOOR.
This gives +3.9% on 525.x264_r at -O3.
2018-08-03 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* internal-fn.h (first_commutative_argument): Declare.
* internal-fn.c (first_commutative_argument): New function.
* tree-vect-slp.c (vect_get_and_check_slp_defs): Remove extra
restrictions for pattern statements. Use first_commutative_argument
to look for commutative operands in calls to internal functions.
gcc/testsuite/
* gcc.dg/vect/bb-slp-over-widen-1.c: Expect AVG_FLOOR to be used
on vect_avg_qi targets.
* gcc.dg/vect/bb-slp-over-widen-2.c: Likewise.
* gcc.dg/vect/bb-slp-pow-1.c: New test.
* gcc.dg/vect/vect-avg-15.c: Likewise.
From-SVN: r263290
Jonathan Wakely [Fri, 3 Aug 2018 12:53:34 +0000 (13:53 +0100)]
Add workaround for non-unique errno values on AIX
* src/c++11/system_error.cc
(system_error_category::default_error_condition): Add workaround for
ENOTEMPTY and EEXIST having the same value on AIX.
* testsuite/19_diagnostics/error_category/system_category.cc: Add
extra testcases for EDOM, EILSEQ, ERANGE, EEXIST and ENOTEMPTY.
From-SVN: r263289
Aldy Hernandez [Fri, 3 Aug 2018 11:31:22 +0000 (11:31 +0000)]
Makefile.in (wide-int-range.o): New.
* Makefile.in (wide-int-range.o): New.
* tree-vrp.c: Move all the wide_int_* functions to...
* wide-int-range.cc: ...here.
* tree-vrp.h: Move all the wide_int_* prototypes to...
* wide-int-range.h: ...here.
From-SVN: r263288
Tom de Vries [Fri, 3 Aug 2018 11:21:09 +0000 (11:21 +0000)]
[c++] Don't emit exception tables for UI_NONE
If a target does not support exceptions, it can indicate this by returning
UI_NONE in TARGET_EXCEPT_UNWIND_INFO. Currently the compiler still emits
exception tables for such a target.
This patch makes sure that no exception tables are emitted if the target does
not support exceptions. This allows us to remove a workaround in
TARGET_ASM_BYTE_OP in the nvptx port.
Build on x86_64 with nvptx accelerator, and tested libgomp.
Build and reg-tested on x86_64.
2018-08-03 Tom de Vries <tdevries@suse.de>
* common/config/nvptx/nvptx-common.c (nvptx_except_unwind_info): Return
UI_NONE.
* config/nvptx/nvptx.c (TARGET_ASM_BYTE_OP): Remove define.
* except.c (output_function_exception_table): Do early exit if
targetm_common.except_unwind_info (&global_options) == UI_NONE.
From-SVN: r263287
Martin Liska [Fri, 3 Aug 2018 07:23:47 +0000 (07:23 +0000)]
Print heuristics probability fraction part with 2 digits.
2018-08-03 Martin Liska <mliska@suse.cz>
* predict.c (dump_prediction): Change to 2 digits
in fraction part.
2018-08-03 Martin Liska <mliska@suse.cz>
* gcc.dg/predict-1.c: Adjust scanned pattern to cover 2 digits.
* gcc.dg/predict-13.c:Likewise.
* gcc.dg/predict-3.c:Likewise.
* gcc.dg/predict-4.c:Likewise.
* gcc.dg/predict-5.c:Likewise.
* gcc.dg/predict-6.c:Likewise.
* gcc.dg/predict-9.c:Likewise.
* gfortran.dg/predict-1.f90:Likewise.
From-SVN: r263286
Siddhesh Poyarekar [Fri, 3 Aug 2018 01:51:42 +0000 (01:51 +0000)]
[aarch64] Fix falkor pipeline description for dup<q>
There was a typo in the pipeline description where DUP was assigned to
the vector pipes for quad mode ops when it really only uses the VTOG
pipes. Fixing this does not show any noticeable difference in
performance (there's a very small bump of 1.7% in x264 but that's
about it) in my tests but is the more precise description of operations
for falkor.
* config/aarch64/falkor.md (falkor_am_1_vxvy_vxvy): Move
neon_dup_q to...
(falkor_am_1_gtov_gtov): ... a new insn reservation.
From-SVN: r263285
GCC Administrator [Fri, 3 Aug 2018 00:16:17 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r263284
Ilya Leoshkevich [Thu, 2 Aug 2018 22:39:59 +0000 (22:39 +0000)]
nds32.c (nds32_hard_regno_mode_ok): Replace > with >=.
* config/nds32/nds32.c (nds32_hard_regno_mode_ok): Replace > with >=.
* df-problems.c (df_remove_dead_eq_notes): Replace > with >=.
* dwarf2out.c (mem_loc_descriptor): Replace > with >=.
* lra-constraints.c (spill_hard_reg_in_range): Replace <= with <.
* lra-remat.c (call_used_input_regno_present_p): Replace <= with <.
From-SVN: r263280
David Malcolm [Thu, 2 Aug 2018 20:07:28 +0000 (20:07 +0000)]
Fix memory leak of pretty_printer prefixes
We were rather sloppy about handling the ownership of prefixes for
pretty_printer, and this lead to a memory leak for any time a
diagnostic_show_locus call emits multiple line spans.
This showed up in "make selftest-valgrind" as:
3,976 bytes in 28 blocks are definitely lost in loss record 632 of 669
at 0x4A0645D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x1F08227: xmalloc (xmalloc.c:147)
by 0x1F083E6: xvasprintf (xvasprintf.c:58)
by 0x1E7EC7D: build_message_string(char const*, ...) (diagnostic.c:78)
by 0x1E7F438: diagnostic_get_location_text(diagnostic_context*, expanded_location) (diagnostic.c:328)
by 0x1E7FD54: default_diagnostic_start_span_fn(diagnostic_context*, expanded_location) (diagnostic.c:626)
by 0x1EB3508: selftest::test_diagnostic_context::start_span_cb(diagnostic_context*, expanded_location) (selftest-diagnostic.c:57)
by 0x1E89215: diagnostic_show_locus(diagnostic_context*, rich_location*, diagnostic_t) (diagnostic-show-locus.c:1992)
by 0x1E8ECAD: selftest::test_fixit_insert_containing_newline_2(selftest::line_table_case const&) (diagnostic-show-locus.c:3044)
by 0x1EB0606: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3525)
by 0x1E8F3F5: selftest::diagnostic_show_locus_c_tests() (diagnostic-show-locus.c:3164)
by 0x1E010BF: selftest::run_tests() (selftest-run-tests.c:88)
4,004 bytes in 28 blocks are definitely lost in loss record 633 of 669
at 0x4A0645D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x1F08227: xmalloc (xmalloc.c:147)
by 0x1F083E6: xvasprintf (xvasprintf.c:58)
by 0x1E7EC7D: build_message_string(char const*, ...) (diagnostic.c:78)
by 0x1E7F438: diagnostic_get_location_text(diagnostic_context*, expanded_location) (diagnostic.c:328)
by 0x1E7FD54: default_diagnostic_start_span_fn(diagnostic_context*, expanded_location) (diagnostic.c:626)
by 0x1EB3508: selftest::test_diagnostic_context::start_span_cb(diagnostic_context*, expanded_location) (selftest-diagnostic.c:57)
by 0x1E89215: diagnostic_show_locus(diagnostic_context*, rich_location*, diagnostic_t) (diagnostic-show-locus.c:1992)
by 0x1E8B373: selftest::test_diagnostic_show_locus_fixit_lines(selftest::line_table_case const&) (diagnostic-show-locus.c:2500)
by 0x1EB0606: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3525)
by 0x1E8F3B9: selftest::diagnostic_show_locus_c_tests() (diagnostic-show-locus.c:3159)
by 0x1E010BF: selftest::run_tests() (selftest-run-tests.c:88)
This patch fixes the leaks by ensuring that the pretty_printer "owns"
the prefix if it's non-NULL, freeing it in the dtor and in pp_set_prefix.
gcc/cp/ChangeLog:
* error.c (cxx_print_error_function): Duplicate "file" before
passing it to pp_set_prefix.
(cp_print_error_function): Use pp_take_prefix when saving the
existing prefix.
gcc/ChangeLog:
* diagnostic-show-locus.c (diagnostic_show_locus): Use
pp_take_prefix when saving the existing prefix.
* diagnostic.c (diagnostic_append_note): Likewise.
* langhooks.c (lhd_print_error_function): Likewise.
* pretty-print.c (pp_set_prefix): Drop the "const" from "prefix"
param's type. Free the existing prefix.
(pp_take_prefix): New function.
(pretty_printer::pretty_printer): Drop the prefix parameter.
Rename the length parameter to match the comment.
(pretty_printer::~pretty_printer): Free the prefix.
* pretty-print.h (pretty_printer::pretty_printer): Drop the prefix
parameter.
(struct pretty_printer): Drop the "const" from "prefix" field's
type and clarify memory management.
(pp_set_prefix): Drop the "const" from the 2nd param.
(pp_take_prefix): New decl.
From-SVN: r263275
Aaron Sawdey [Thu, 2 Aug 2018 18:11:54 +0000 (18:11 +0000)]
rs6000-string.c (select_block_compare_mode): Move test for word_mode_ok here instead of passing as argument.
2018-07-31 Aaron Sawdey <acsawdey@linux.ibm.com>
* config/rs6000/rs6000-string.c (select_block_compare_mode): Move test
for word_mode_ok here instead of passing as argument.
(expand_block_compare): Change select_block_compare_mode() call.
(expand_strncmp_gpr_sequence): New function.
(expand_strn_compare): Make use of expand_strncmp_gpr_sequence.
From-SVN: r263273
Jeff Law [Thu, 2 Aug 2018 17:50:16 +0000 (11:50 -0600)]
re PR target/86790 (m68k port needs updating for CVE-2017-5753)
PR target/86790
* config/m68k/m68k.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263272
Sudakshina Das [Thu, 2 Aug 2018 17:36:43 +0000 (17:36 +0000)]
[OBVIOUS] Correct name of file in ChangeLog
Committed on behalf of Matthew Malcomson.
From-SVN: r263271
Jeff Law [Thu, 2 Aug 2018 17:24:59 +0000 (11:24 -0600)]
re PR target/86784 (H8 port needs updating for CVE-2017-5753)
PR target/86784
* config/h8300/h8300.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263270
Nicolas Pitre [Thu, 2 Aug 2018 16:50:07 +0000 (16:50 +0000)]
arm - correctly handle denormal results during softfp subtraction
2018-08-02 Nicolas Pitre <nico@fluxnic.net>
PR libgcc/86512
* config/arm/ieee754-df.S (adddf3): Don't shortcut denormal handling
when exponent goes negative. Update my email address.
* config/arm/ieee754-sf.S (addsf3): Likewise.
From-SVN: r263267
Nick Clifton [Thu, 2 Aug 2018 16:13:32 +0000 (16:13 +0000)]
re PR target/86813 (xstormy16 port needs updating for CVE-2017-5753)
PR target/86813
* config/stormy16/stormy16.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263266
Tom de Vries [Thu, 2 Aug 2018 15:59:01 +0000 (15:59 +0000)]
[nvptx] Ignore c++ exceptions
The nvptx port can't support exceptions using sjlj, because ptx does not
support sjlj. However, default_except_unwind_info still returns UI_SJLJ, even
even if we configure with --disable-sjlj-exceptions, because UI_SJLJ is the
fallback option.
The reason default_except_unwind_info doesn't return UI_DWARF2 is because
DWARF2_UNWIND_INFO is not defined in defaults.h, because
INCOMING_RETURN_ADDR_RTX is not defined, because there's no ptx equivalent.
Testcase libgomp.c++/for-15.C currently doesn't compile unless fno-exceptions
is added because:
- it tries to generate sjlj exception handling code, and
- it tries to generate exception tables using label-addressed .byte sequence.
Ptx doesn't support generating random data at a label, nor being able to
load/write data relative to a label.
This patch fixes the first problem by using UI_TARGET for nvptx.
The second problem is worked around by generating all .byte sequences commented
out. It would be better to have a narrower workaround, and define
TARGET_ASM_BYTE_OP to "error: .byte unsupported " or some such.
This patch does not enable exceptions for nvptx, it merely allows c++ programs
to run correctly if they do no use exception handling.
Build and reg-tested on x86_64 with nvptx accelerator.
2018-08-02 Tom de Vries <tdevries@suse.de>
PR target/86660
* common/config/nvptx/nvptx-common.c (nvptx_except_unwind_info): New
function. Return UI_TARGET unconditionally.
(TARGET_EXCEPT_UNWIND_INFO): Redefine to nvptx_except_unwind_info.
* config/nvptx/nvptx.c (TARGET_ASM_BYTE_OP): Emit commented out '.byte'.
* testsuite/libgomp.oacc-c++/routine-1-auto.C: Remove -fno-exceptions.
* testsuite/libgomp.oacc-c++/routine-1-template-auto.C: Same.
* testsuite/libgomp.oacc-c++/routine-1-template-trailing-return-type.C:
Same.
* testsuite/libgomp.oacc-c++/routine-1-template.C: Same.
* testsuite/libgomp.oacc-c++/routine-1-trailing-return-type.C: Same.
* testsuite/libgomp.oacc-c-c++-common/routine-1.c: Same.
From-SVN: r263265
Nick Clifton [Thu, 2 Aug 2018 15:57:06 +0000 (15:57 +0000)]
re PR target/86810 (v850 port needs updating for CVE-2017-5753)
PR target/86810
* config/v850/v850.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263264
Nick Clifton [Thu, 2 Aug 2018 14:35:10 +0000 (14:35 +0000)]
re PR target/86803 (rx port needs updating for CVE-2017-5753)
PR target/86803
* config/rx/rx.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263263
Richard Sandiford [Thu, 2 Aug 2018 14:33:30 +0000 (14:33 +0000)]
Typo fix
Noticed by Tamar (thanks).
2018-08-02 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* genemit.c (print_overload_test): Fix typo.
From-SVN: r263262
Richard Biener [Thu, 2 Aug 2018 14:25:57 +0000 (14:25 +0000)]
re PR c++/86763 (Wrong code comparing member of copy of a 237 byte object with nontrivial default constructor on x86-64 arch)
2018-08-02 Richard Biener <rguenther@suse.de>
PR c++/86763
* class.c (layout_class_type): Copy TYPE_TYPELESS_STORAGE
to the CLASSTYPE_AS_BASE.
* g++.dg/torture/pr86763.C: New testcase.
From-SVN: r263261
Nick Clifton [Thu, 2 Aug 2018 14:02:32 +0000 (14:02 +0000)]
re PR target/86797 (msp430 port needs updating for CVE-2017-5753)
PR target/86797
* config/msp430/msp430.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263259
Nick Clifton [Thu, 2 Aug 2018 13:30:40 +0000 (13:30 +0000)]
re PR target/86791 (mcore port needs updating for CVE-2017-5753)
PR target/86791
* config/mcore/mcore.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263258
Richard Biener [Thu, 2 Aug 2018 13:19:50 +0000 (13:19 +0000)]
re PR tree-optimization/86816 (ICE: SIGSEGV in tree-ssa-pre / tail_merge_optimize)
2018-08-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/86816
* tree-ssa-tail-merge.c (tail_merge_valueize): New function
which checks for value availability before querying it.
(gvn_uses_equal): Use it.
(same_succ_hash): Likewise.
(gimple_equal_p): Likewise.
* g++.dg/torture/pr86816.C: New testcase.
From-SVN: r263257
Nick Clifton [Thu, 2 Aug 2018 12:31:29 +0000 (12:31 +0000)]
re PR target/86789 (m32r port needs updating for CVE-2017-5753)
PR target/86789
* config/m32r/m32r.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263256
Nick Clifton [Thu, 2 Aug 2018 12:14:52 +0000 (12:14 +0000)]
re PR target/86787 (iq2000 port needs updating for CVE-2017-5753)
PR target/86787
* config/iq2000/iq2000.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
Define to speculation_safe_value_not_needed.
From-SVN: r263255
Nick Clifton [Thu, 2 Aug 2018 11:46:06 +0000 (11:46 +0000)]
re PR target/86782 (frv port needs updating for CVE-2017-5753)
PR target/86782
* config/frv/frv.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to
speculation_safe_value_not_needed.
From-SVN: r263254
Nick Clifton [Thu, 2 Aug 2018 11:24:47 +0000 (11:24 +0000)]
re PR target/86781 (fr30 port needs updating for CVE-2017-5753)
PR target/86781
* config/fr30/fr30.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to
speculation_safe_value_not_needed.
From-SVN: r263253
Thomas Preud'homme [Thu, 2 Aug 2018 11:16:05 +0000 (11:16 +0000)]
Revert "[ARM] Fix PR85434: spilling of stack protector guard's address on ARM"
This reverts commit r263245.
From-SVN: r263252
Richard Sandiford [Thu, 2 Aug 2018 10:59:35 +0000 (10:59 +0000)]
[gen/AArch64] Generate helpers for substituting iterator values into pattern names
Given a pattern like:
(define_insn "aarch64_frecpe<mode>" ...)
the SVE ACLE implementation wants to generate the pattern for a
particular (non-constant) mode. This patch automatically generates
helpers to do that, specifically:
// Return CODE_FOR_nothing on failure.
insn_code maybe_code_for_aarch64_frecpe (machine_mode);
// Assert that the code exists.
insn_code code_for_aarch64_frecpe (machine_mode);
// Return NULL_RTX on failure.
rtx maybe_gen_aarch64_frecpe (machine_mode, rtx, rtx);
// Assert that generation succeeds.
rtx gen_aarch64_frecpe (machine_mode, rtx, rtx);
Many patterns don't have sensible names when all <...>s are removed.
E.g. "<optab><mode>2" would give a base name "2". The new functions
therefore require explicit opt-in, which should also help to reduce
code bloat.
The (arbitrary) opt-in syntax I went for was to prefix the pattern
name with '@', similarly to the existing '*' marker.
The patch also makes config/aarch64 use the new routines in cases where
they obviously apply. This was mostly straight-forward, but it seemed
odd that we defined:
aarch64_reload_movcp<...><P:mode>
but then only used it with DImode, never SImode. If we should be
using Pmode instead of DImode, then that's a simple change,
but should probably be a separate patch.
2018-08-02 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* doc/md.texi: Expand the documentation of instruction names
to mention port-local uses. Document '@' in pattern names.
* read-md.h (overloaded_instance, overloaded_name): New structs.
(mapping): Declare.
(md_reader::handle_overloaded_name): New member function.
(md_reader::get_overloads): Likewise.
(md_reader::m_first_overload): New member variable.
(md_reader::m_next_overload_ptr): Likewise.
(md_reader::m_overloads_htab): Likewise.
* read-md.c (md_reader::md_reader): Initialize m_first_overload,
m_next_overload_ptr and m_overloads_htab.
* read-rtl.c (iterator_group): Add "type" and "get_c_token" fields.
(get_mode_token, get_code_token, get_int_token): New functions.
(map_attr_string): Add an optional argument that passes back
the associated iterator.
(overloaded_name_hash, overloaded_name_eq_p, named_rtx_p):
(md_reader::handle_overloaded_name, add_overload_instance): New
functions.
(apply_iterators): Handle '@' names. Report an error if '@'
is used without iterators.
(initialize_iterators): Initialize the new iterator_group fields.
* genopinit.c (handle_overloaded_code_for)
(handle_overloaded_gen): New functions.
(main): Use them to print declarations of maybe_code_for_* and
maybe_gen_* functions, and inline definitions of code_for_* and gen_*.
* genemit.c (print_overload_arguments, print_overload_test)
(handle_overloaded_code_for, handle_overloaded_gen): New functions.
(main): Use it to print definitions of maybe_code_for_* and
maybe_gen_* functions.
* config/aarch64/aarch64.c (aarch64_split_128bit_move): Use
gen_aarch64_mov{low,high}_di and gen_aarch64_movdi_{low,high}
instead of explicit mode checks.
(aarch64_split_simd_combine): Likewise gen_aarch64_simd_combine.
(aarch64_split_simd_move): Likewise gen_aarch64_split_simd_mov.
(aarch64_emit_load_exclusive): Likewise gen_aarch64_load_exclusive.
(aarch64_emit_store_exclusive): Likewise gen_aarch64_store_exclusive.
(aarch64_expand_compare_and_swap): Likewise
gen_aarch64_compare_and_swap and gen_aarch64_compare_and_swap_lse
(aarch64_gen_atomic_cas): Likewise gen_aarch64_atomic_cas.
(aarch64_emit_atomic_swap): Likewise gen_aarch64_atomic_swp.
(aarch64_constant_pool_reload_icode): Delete.
(aarch64_secondary_reload): Use code_for_aarch64_reload_movcp
instead of aarch64_constant_pool_reload_icode. Use
code_for_aarch64_reload_mov instead of explicit mode checks.
(rsqrte_type, get_rsqrte_type, rsqrts_type, get_rsqrts_type): Delete.
(aarch64_emit_approx_sqrt): Use gen_aarch64_rsqrte instead of
get_rsqrte_type and gen_aarch64_rsqrts instead of gen_rqrts_type.
(recpe_type, get_recpe_type, recps_type, get_recps_type): Delete.
(aarch64_emit_approx_div): Use gen_aarch64_frecpe instead of
get_recpe_type and gen_aarch64_frecps instead of get_recps_type.
(aarch64_atomic_load_op_code): Delete.
(aarch64_emit_atomic_load_op): Likewise.
(aarch64_gen_atomic_ldop): Use UNSPECV_ATOMIC_* instead of
aarch64_atomic_load_op_code. Use gen_aarch64_atomic_load
instead of aarch64_emit_atomic_load_op.
* config/aarch64/aarch64.md (aarch64_reload_movcp<GPF_TF:mode><P:mode>)
(aarch64_reload_movcp<VALL:mode><P:mode>, aarch64_reload_mov<mode>)
(aarch64_movdi_<mode>low, aarch64_movdi_<mode>high)
(aarch64_mov<mode>high_di, aarch64_mov<mode>low_di): Add a '@'
character before the pattern name.
* config/aarch64/aarch64-simd.md (aarch64_split_simd_mov<mode>)
(aarch64_rsqrte<mode>, aarch64_rsqrts<mode>)
(aarch64_simd_combine<mode>, aarch64_frecpe<mode>)
(aarch64_frecps<mode>): Likewise.
* config/aarch64/atomics.md (atomic_compare_and_swap<mode>)
(aarch64_compare_and_swap<mode>, aarch64_compare_and_swap<mode>_lse)
(aarch64_load_exclusive<mode>, aarch64_store_exclusive<mode>)
(aarch64_atomic_swp<mode>, aarch64_atomic_cas<mode>)
(aarch64_atomic_load<atomic_ldop><mode>): Likewise.
From-SVN: r263251
Richard Sandiford [Thu, 2 Aug 2018 10:48:42 +0000 (10:48 +0000)]
[AArch64] Add support for 16-bit FMOV immediates
aarch64_float_const_representable_p was still returning false for
HFmode, so we wouldn't use 16-bit FMOV immediate. E.g. before the
patch:
__fp16 foo (void) { return 0x1.1p-3; }
gave:
mov w0, 12352
fmov h0, w0
with -march=armv8.2-a+fp16, whereas now it gives:
fmov h0, 1.
328125e-1
2018-08-02 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_float_const_representable_p):
Allow HFmode constants if TARGET_FP_F16INST.
gcc/testsuite/
* gcc.target/aarch64/f16_mov_immediate_1.c: Expect fmov immediate
to be used.
* gcc.target/aarch64/f16_mov_immediate_2.c: Likewise.
* gcc.target/aarch64/f16_mov_immediate_3.c: Force +nofp16.
* gcc.target/aarch64/sve/single_1.c: Except fmov immediate to be used
for .h.
* gcc.target/aarch64/sve/single_2.c: Likewise.
* gcc.target/aarch64/sve/single_3.c: Likewise.
* gcc.target/aarch64/sve/single_4.c: Likewise.
From-SVN: r263250
Jackson Woodruff [Thu, 2 Aug 2018 10:39:23 +0000 (10:39 +0000)]
re PR target/86014 ([AArch64] missed LDP optimization)
gcc/
2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com>
PR target/86014
* config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
No longer check last store for clobber of address register.
gcc/testsuite
2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com>
PR target/86014
* gcc.target/aarch64/ldp_stp_13.c: New test.
From-SVN: r263249
Martin Liska [Thu, 2 Aug 2018 10:17:34 +0000 (12:17 +0200)]
Fix gcov misleading error (PR gcov-profile/86817).
2018-08-02 Martin Liska <mliska@suse.cz>
PR gcov-profile/86817
* gcov.c (process_all_functions): New function.
(main): Call it.
(process_file): Move functions processing to
process_all_functions.
From-SVN: r263248
Martin Liska [Thu, 2 Aug 2018 09:32:58 +0000 (11:32 +0200)]
Cherry-pick compiler-rt revision 338606 (PR sanitizer/86022).
Fix sizeof(struct pthread) in glibc 2.14.
2018-08-02 Martin Liska <mliska@suse.cz>
PR sanitizer/86022
* sanitizer_common/sanitizer_linux_libcdep.cc (ThreadDescriptorSize):
Cherry-pick compiler-rt revision 338606.
From-SVN: r263246
Thomas Preud'homme [Thu, 2 Aug 2018 09:07:17 +0000 (09:07 +0000)]
[ARM] Fix PR85434: spilling of stack protector guard's address on ARM
In case of high register pressure in PIC mode, address of the stack
protector's guard can be spilled on ARM targets as shown in PR85434,
thus allowing an attacker to control what the canary would be compared
against. This is also known as CVE-2018-12886. ARM does lack
stack_protect_set and stack_protect_test insn patterns, defining them
does not help as the address is expanded regularly and the patterns
only deal with the copy and test of the guard with the canary.
This problem does not occur for x86 targets because the PIC access and
the test can be done in the same instruction. Aarch64 is exempt too
because PIC access insn pattern are mov of UNSPEC which prevents it from
the second access in the epilogue being CSEd in cse_local pass with the
first access in the prologue.
The approach followed here is to create new "combined" set and test
standard pattern names that take the unexpanded guard and do the set or
test. This allows the target to use an opaque pattern (eg. using UNSPEC)
to hide the individual instructions being generated to the compiler and
split the pattern into generic load, compare and branch instruction
after register allocator, therefore avoiding any spilling. This is here
implemented for the ARM targets. For targets not implementing these new
standard pattern names, the existing stack_protect_set and
stack_protect_test pattern names are used.
To be able to split PIC access after register allocation, the functions
had to be augmented to force a new PIC register load and to control
which register it loads into. This is because sharing the PIC register
between prologue and epilogue could lead to spilling due to CSE again
which an attacker could use to control what the canary gets compared
against.
2018-08-02 Thomas Preud'homme <thomas.preudhomme@linaro.org>
gcc/
PR target/85434
* target-insns.def (stack_protect_combined_set): Define new standard
pattern name.
(stack_protect_combined_test): Likewise.
* cfgexpand.c (stack_protect_prologue): Try new
stack_protect_combined_set pattern first.
* function.c (stack_protect_epilogue): Try new
stack_protect_combined_test pattern first.
* config/arm/arm.c (require_pic_register): Add pic_reg and compute_now
parameters to control which register to use as PIC register and force
reloading PIC register respectively. Insert in the stream of insns if
possible.
(legitimize_pic_address): Expose above new parameters in prototype and
adapt recursive calls accordingly.
(arm_legitimize_address): Adapt to new legitimize_pic_address
prototype.
(thumb_legitimize_address): Likewise.
(arm_emit_call_insn): Adapt to new require_pic_register prototype.
* config/arm/arm-protos.h (legitimize_pic_address): Adapt to prototype
change.
* config/arm/arm.md (movsi expander): Adapt to legitimize_pic_address
prototype change.
(stack_protect_combined_set): New insn_and_split pattern.
(stack_protect_set): New insn pattern.
(stack_protect_combined_test): New insn_and_split pattern.
(stack_protect_test): New insn pattern.
* config/arm/unspecs.md (UNSPEC_SP_SET): New unspec.
(UNSPEC_SP_TEST): Likewise.
* doc/md.texi (stack_protect_combined_set): Document new standard
pattern name.
(stack_protect_set): Clarify that the operand for guard's address is
legal.
(stack_protect_combined_test): Document new standard pattern name.
(stack_protect_test): Clarify that the operand for guard's address is
legal.
gcc/testsuite/
PR target/85434
* gcc.target/arm/pr85434.c: New test.
From-SVN: r263245
David Malcolm [Thu, 2 Aug 2018 08:33:47 +0000 (08:33 +0000)]
dumpfile.c/h: add "const" to dump location ctors
gcc/ChangeLog:
* dumpfile.c (dump_user_location_t::dump_user_location_t): Add
"const" to the "gimple *" and "rtx_insn *" parameters.
* dumpfile.h (dump_user_location_t::dump_user_location_t):
Likewise.
(dump_location_t::dump_location_t): Likewise.
From-SVN: r263244
GCC Administrator [Thu, 2 Aug 2018 00:16:48 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r263243
Martin Sebor [Wed, 1 Aug 2018 23:39:35 +0000 (23:39 +0000)]
PR tree-optimization/86650 - -Warray-bounds missing inlining context
gcc/c/ChangeLog:
PR tree-optimization/86650
* c-objc-common.c (c_tree_printer): Move usage of EXPR_LOCATION (t)
and TREE_BLOCK (t) from within percent_K_format to this callsite.
gcc/c-family/ChangeLog:
PR tree-optimization/86650
* c-family/c-format.c (gcc_tdiag_char_table): Update comment for "%G".
(gcc_cdiag_char_table, gcc_cxxdiag_char_table): Same.
(init_dynamic_diag_info): Update from "gcall *" to "gimple *".
* c-format.h (T89_G): Update to be "gimple *" rather than
"gcall *".
(local_gcall_ptr_node): Rename...
(local_gimple_ptr_node): ...to this.
gcc/cp/ChangeLog:
PR tree-optimization/86650
* error.c (cp_printer): Move usage of EXPR_LOCATION (t) and
TREE_BLOCK (t) from within percent_K_format to this callsite.
gcc/ChangeLog:
PR tree-optimization/86650
* gimple-pretty-print.c (percent_G_format): Accept a "gimple *"
rather than a "gcall *". Directly pass the data of interest
to percent_K_format, rather than building a temporary CALL_EXPR
to hold it.
* gimple-fold.c (gimple_fold_builtin_strncpy): Adjust.
(gimple_fold_builtin_strncat): Adjust.
* gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Replace
gcall* argument with gimple*.
* gimple-ssa-warn-restrict.c (check_call): Same.
(wrestrict_dom_walker::before_dom_children): Same.
(builtin_access::builtin_access): Same.
(check_bounds_or_overlap): Same
(maybe_diag_overlap): Same.
(maybe_diag_offset_bounds): Same.
* tree-diagnostic.c (default_tree_printer): Move usage of
EXPR_LOCATION (t) and TREE_BLOCK (t) from within percent_K_format
to this callsite.
* tree-pretty-print.c (percent_K_format): Add argument.
* tree-pretty-print.h: Add argument.
* tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust.
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Adjust.
(maybe_diag_stxncpy_trunc): Same.
(handle_builtin_stxncpy): Same.
(handle_builtin_strcat): Same.
gcc/testsuite/ChangeLog:
PR tree-optimization/86650
* gcc.dg/format/gcc_diag-10.c: Adjust.
From-SVN: r263239
Tony Reix [Wed, 1 Aug 2018 21:55:05 +0000 (21:55 +0000)]
xcoff.c (struct xcoff_line, [...]): Remove.
* xcoff.c (struct xcoff_line, struct xcoff_line_vector): Remove.
(struct xcoff_func, struct xcoff_func_vector): New structs.
(xcoff_syminfo): Drop leading dot from symbol name.
(xcoff_line_compare, xcoff_line_search): Remove.
(xcoff_func_compare, xcoff_func_search): New static functions.
(xcoff_lookup_pc): Search function table.
(xcoff_add_line, xcoff_process_linenos): Remove.
(xcoff_initialize_fileline): Build function table.
From-SVN: r263238
Cesar Philippidis [Wed, 1 Aug 2018 20:01:45 +0000 (13:01 -0700)]
[libgomp] Truncate config/nvptx/oacc-parallel.c
libgomp/
* config/nvptx/oacc-parallel.c: Truncate.
Co-Authored-By: James Norris <jnorris@codesourcery.com>
Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>
From-SVN: r263236
Jonathan Wakely [Wed, 1 Aug 2018 19:52:46 +0000 (20:52 +0100)]
Add -D_GLIBCXX_ASSERTIONS to DEBUG_FLAGS
Enable assertions in the extra debug library built when
--enable-libstdcxx-debug is used. Replace some Debug Mode assertions
in src/c++11/futex.cc with __glibcxx_assert, because the library will
never be built with Debug Mode.
* configure: Regenerate.
* configure.ac: Add -D_GLIBCXX_ASSERTIONS to default DEBUG_FLAGS.
* src/c++11/futex.cc: Use __glibcxx_assert instead of
_GLIBCXX_DEBUG_ASSERT.
From-SVN: r263235
Marek Polacek [Wed, 1 Aug 2018 17:17:29 +0000 (17:17 +0000)]
Cherry-pick compiler-rt revision 318044 and 319180.
[PowerPC][tsan] Update tsan to handle changed memory layouts in newer kernels
In more recent Linux kernels with 47 bit VMAs the layout of virtual memory
for powerpc64 changed causing the thread sanitizer to not work properly. This
patch adds support for 47 bit VMA kernels for powerpc64.
Tested on several 4.x and 3.x kernel releases.
Regtested/bootstrapped on ppc64le-linux with kernel 4.14; applying to
trunk/8.3.
2018-08-01 Marek Polacek <polacek@redhat.com>
PR sanitizer/86759
* tsan/tsan_platform.h: Cherry-pick compiler-rt revision 318044.
* tsan/tsan_platform_linux.cc: Cherry-pick compiler-rt revision
319180.
From-SVN: r263229
Richard Sandiford [Wed, 1 Aug 2018 16:03:13 +0000 (16:03 +0000)]
[AArch64] Update expected output for sve/var_stride_[24].c
After Segher's recent combine change, these tests now use a single
instruction to do the "and" and "lsl 10". This is a good thing,
so the patch updates the expected output accordingly.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
gcc/testsuite/
* gcc.target/aarch64/sve/var_stride_2.c: Update expected form
of range check.
* gcc.target/aarch64/sve/var_stride_4.c: Likewise.
From-SVN: r263228
Richard Sandiford [Wed, 1 Aug 2018 16:00:05 +0000 (16:00 +0000)]
[AArch64] XFAIL sve/vcond_[45].c tests
See PR 86753 for details.
2018-08-01 Richard Sandiford <richard.sandiford@arm.com>
gcc/testsuite/
PR target/86753
* gcc.target/aarch64/sve/vcond_4.c: XFAIL positive tests.
* gcc.target/aarch64/sve/vcond_5.c: Likewise.
From-SVN: r263227
Richard Sandiford [Wed, 1 Aug 2018 15:46:12 +0000 (15:46 +0000)]
Fold pointer range checks with equal spans
When checking whether vectorised accesses at A and B are independent,
the vectoriser falls back to tests of the form:
A + size <= B || B + size <= A
But in the common case that "size" is just the constant size of a vector
(or a small multiple), it would be more efficient to do:
(size_t) (A + (size - 1) - B) > (size - 1) * 2
This patch adds folds to do that. E.g. before the patch, the alias
checks for:
for (int j = 0; j < n; ++j)
{
for (int i = 0; i < 16; ++i)
a[i] = (b[i] + c[i]) >> 1;
a += step;
b += step;
c += step;
}
were:
add x7, x1, 15
add x5, x0, 15
cmp x0, x7
add x7, x2, 15
ccmp x1, x5, 2, ls
cset w8, hi
cmp x0, x7
ccmp x2, x5, 2, ls
cset w4, hi
tst w8, w4
while after the patch they're:
add x0, x0, 15
sub x6, x0, x1
sub x5, x0, x2
cmp x6, 30
ccmp x5, 30, 0, hi
The old scheme needs:
[A] one addition per vector pointer
[B] two comparisons and one IOR per range check
The new one needs:
[C] less than one addition per vector pointer
[C] one subtraction and one comparison per range check
The range checks are then ANDed together, with the same number of
ANDs either way.
With conditional comparisons (such as on AArch64), we're able to remove
the IOR between comparisons in the old scheme, but then need an explicit
AND or branch when combining the range checks, as the example above shows.
With the new scheme we can instead use conditional comparisons for
the AND chain.
So even with conditional comparisons, the new scheme should in practice
be a win in almost all cases. Without conditional comparisons, the new
scheme removes at least one operation from [A] and one operation per
range check from [B], so should always give fewer operations overall.
2018-07-20 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* match.pd: Optimise pointer range checks.
gcc/testsuite/
* gcc.dg/pointer-range-check-1.c: New test.
* gcc.dg/pointer-range-check-2.c: Likewise.
From-SVN: r263226
projects / gcc.git / log