George Kyriazis [Mon, 25 Sep 2017 17:58:18 +0000 (12:58 -0500)]
swr: Remove unneeeded comparison
No need to check if screen->pipe != pipe, so we can just assign it. Just do it.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Thu, 14 Sep 2017 02:06:44 +0000 (21:06 -0500)]
swr: Handle resource across context changes
Swr caches fb contents in tiles. Those tiles are stored on a per-context
basis.
When switching contexts that share resources we need to make sure that
the tiles of the old context are being stored and the tiles of the new
context are being invalidated (marked as invalid, hence contents need
to be reloaded).
The context does not get any dirty bits to identify this case. This has
to be, then, coordinated by the resources that are being shared between
the contexts.
Add a "curr_pipe" hook in swr_resource that will allow us to identify a
MakeCurrent of the above form during swr_update_derived(). At that time,
we invalidate the tiles of the new context. The old context, will need to
have already store its tiles by that time, which happens during glFlush().
glFlush() is being called at the beginning of MakeCurrent.
So, the sequence of operations is:
- At the beginning of glXMakeCurrent(), glFlush() will store the tiles
of all bound surfaces of the old context.
- After the store, a fence will guarantee that the all tile store make
it to the surface
- During swr_update_derived(), when we validate the new context, we check
all resources to see what changed, and if so, we invalidate the
current tiles.
Fixes rendering problems with CEI/Ensight.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Jason Ekstrand [Fri, 22 Sep 2017 19:44:36 +0000 (12:44 -0700)]
vulkan/wsi/wayland: Stop printing out the DRM device
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Sun, 24 Sep 2017 19:42:52 +0000 (12:42 -0700)]
i965: Support copy propagating of untyped atomic surface indexes.
In the vec4 backend, SHADER_OPCODE_UNTYPED_ATOMIC's src[1] is the
surface index. We want to copy propagate so we can use an immediate
message descriptor, rather than an indirect send.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Sun, 24 Sep 2017 21:24:53 +0000 (14:24 -0700)]
i965/vec4: Fix swizzles on atomic sources.
Atomic operation sources are scalar values, but we were failing to
select the .x component of the second operand. For example,
atomicCounterCompSwapARB(counter, 5u, 10u)
would generate
mov(8) vgrf4.x:D, 5D
mov(8) vgrf5.x:D, 10D
mov(8) vgrf9.x:UD, vgrf4.xyzw:D
mov(8) vgrf9.y:UD, vgrf5.xyzw:D
which wrongly selects the .y component of vgrf5, so the actual 10u value
would get dead code eliminated. The swizzle works for the other source,
but both of them ought to be .xxxx.
Fixes the compare and swap CTS tests in:
KHR-GL45.shader_atomic_counter_ops_tests.ShaderAtomicCounterOpsExchangeTestCase
Cc: "17.2 17.1 17.0 13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Sun, 24 Sep 2017 19:23:34 +0000 (12:23 -0700)]
i965/vec4: Actually handle atomic op intrinsics.
Embarassingly, someone enabled the ARB_shader_atomic_counter_ops
extension for Gen7+ but never added the intrinsics to the switch
statement in the vec4 backend, so they just hit an unreachable()
call and died.
Fixes: 40dd45d0c6aa4a9d (i965: Enable ARB_shader_atomic_counter_ops)
Cc: "17.2 17.1 17.0 13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Mon, 25 Sep 2017 02:59:41 +0000 (19:59 -0700)]
i965: Convert brw->*_program into a brw->programs[i] array.
This makes it easier to loop over programs.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Eric Anholt [Sun, 17 Sep 2017 19:14:20 +0000 (12:14 -0700)]
anv: Fix some comment typos.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Anholt [Sat, 21 Jan 2017 05:56:27 +0000 (16:56 +1100)]
gallium: Weaken assertion about u_mm's align2 field.
vc5 MMU mappings are access-controlled at a 128kb boundary, so the 4kb
here was too small for that purpose. Allowing any valid align2 value that
u_mm's 32-bit addressing can represent will still catch most cases of
people passing in a byte alignment.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Eric Anholt [Fri, 8 Sep 2017 22:30:00 +0000 (15:30 -0700)]
intel/genxml: Convert a not-present-or-"1" dict to a set.
I was implementing the same enum support in broadcom's gen_pack_header.py,
and did this same simplification there.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Boris Brezillon [Tue, 26 Sep 2017 07:48:37 +0000 (09:48 +0200)]
broadcom/vc4: Fix infinite retry in vc4_bo_alloc()
cleared_and_retried is always reset to false when jumping to the retry
label, thus leading to an infinite retry loop.
Fix that by moving the cleared_and_retried variable definitions at the
beginning of the function. While we're at it, move the create variable
with the other local variables and explicitly reset its content in the
retry path.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Fixes: 78087676c98aa8884ba92 "vc4: Restructure the simulator mode."
Eric Anholt [Fri, 28 Jul 2017 01:11:19 +0000 (18:11 -0700)]
broadcom/vc4: Keep pipe_sampler_view->texture matching the original texture.
I was overwriting view->texture with the shadow resource when we need to
do shadow copies (retiling or baselevel rebase), but that tripped up some
critical new sanity checking in state_tracker (making sure that stObj->pt
hasn't changed from view->texture through TexImage-related paths).
To avoid that, move the shadow resource to the vc4_sampler_view struct.
Fixes: f0ecd36ef8e1 ("st/mesa: add an entirely separate codepath for setting up buffer views")
Samuel Pitoiset [Tue, 26 Sep 2017 14:52:06 +0000 (16:52 +0200)]
radv: fix saved compute state when doing statistics/occlusion queries
We are pushing 16-bytes of constants, so we have to save/restore
the same amount of data to avoid data corruption.
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Daniel Stone [Fri, 22 Sep 2017 22:40:59 +0000 (15:40 -0700)]
Revert "wayland-drm: constify the callbacks struct"
The wayland-drm callback struct is referenced, rather than duplicated,
inside wayland-drm. Constifying this struct involved moving it on to the
stack; as a result, starting any EGL client on Wayland called into
random stack memory, and killed the compositor.
This reverts commit
1d0be5b3fe548ee33d4520092f583c76d42510a6 and
39d539e321c6c97433a15660c9d9a20ad8657ff0.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Krzysztof Sobiecki <sobkas@gmail.com>
Fixes: 1d0be5b3fe54 ("wayland-drm: constify the callbacks struct")
Brian Paul [Mon, 25 Sep 2017 20:10:53 +0000 (14:10 -0600)]
svga: silence unused var warning in optimized build with MAYBE_UNUSED
Trivial
Thomas Helland [Sat, 20 May 2017 22:21:54 +0000 (00:21 +0200)]
glcpp: Avoid unnecessary call to strlen
Length of the token was already calculated by flex and stored in yyleng,
no need to implicitly call strlen() via linear_strdup().
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
V2: Also convert this pattern in glsl_lexer.ll
V3: Remove a misplaced comment
V4: Use a temporary char to avoid type change
Remove bogus +1 on length check of identifier
Thomas Helland [Sat, 20 May 2017 20:50:09 +0000 (22:50 +0200)]
glcpp: Use string_buffer for line continuation removal
Migrate removal of line continuations to string_buffer. Before this
it used ralloc_strncat() to append strings, which internally
each time calculates strlen() of its argument. Its argument is
entire shader, so it multiple time scans the whole shader text.
Signed-off-by: Vladislav Egorov <vegorov180@gmail.com>
Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
V2: Adapt to different API of string buffer (Thomas Helland)
Thomas Helland [Fri, 19 May 2017 22:14:52 +0000 (00:14 +0200)]
glsl: Change the parser to use the string buffer
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
V2: Pointed out by Timothy
- Fix pp.c reralloc size issue and comment
V3 - Use vprintf instead of printf where we should
- Fixes failing make-check tests
V4 - Use buffer_append_char in a couple places
- Use append_char in even more places
Thomas Helland [Fri, 19 May 2017 20:07:17 +0000 (22:07 +0200)]
util: Add tests for the string buffer
More tests could probably be added, but this should cover
concatenation, resizing, clearing, formatted printing,
and checking the length, so it should be quite complete.
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
V2: Address review feedback from Timothy, plus fixes
- Use a large enough char array
- Actually test the formatted appending
- Test that clear function resets string length
V3: Port to gtest
V4: Fix test makefile
Fix copyright header
Fix missing extern C
Use more appropriate name for C-file
Add tests for append_char
Thomas Helland [Mon, 15 May 2017 19:36:52 +0000 (21:36 +0200)]
util: Add a string buffer implementation
Based on Vladislav Egorovs work on the preprocessor, but split
out to a util functionality that should be universal. Setup, teardown,
memory handling and general layout is modeled around the hash_table
and the set, to make it familiar for everyone.
A notable change is that this implementation is always null terminated.
The rationale is that it will be less error-prone, as one might
access the buffer directly, thereby reading a non-terminated string.
Also, vsnprintf and friends prints the null-terminator.
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
V2: Address review feedback from Timothy and Grazvydas
- Fix MINGW preprocessor check
- Changed len from uint to int
- Make string argument const in append function
- Move to header and inline append function
- Add crimp_to_fit function for resizing buffer
V3: Move include of ralloc to string_buffer.h
V4: Use u_string.h for a cross-platform working vsnprintf
V5: Remember to cast to char * in crimp function
V6: Address review feedback from Nicolai
- Handle !str->buf in buffer_create
- Ensure va_end is always called in buffer_append_all
- Add overflow check in buffer_append_len
- Do not expose buffer_space_left, just remove it
- Clarify why a loop is used in vprintf, change to for-loop
- Add a va_copy to buffer_vprintf to fix failure to append arguments
when having to resize the buffer for vsnprintf.
V7: Address more review feedback from Nicolai
- Add missing va_end corresponding to va_copy
- Error check failure to allocate in crimp_to_fit
Timothy Arceri [Thu, 7 Sep 2017 13:29:25 +0000 (23:29 +1000)]
i965: make use of nir linking
For now linking is just removing unused varyings between stages.
shader-db results BDW:
total instructions in shared programs:
13198288 ->
13191693 (-0.05%)
instructions in affected programs: 48325 -> 41730 (-13.65%)
helped: 473
HURT: 0
total cycles in shared programs:
541184926 ->
541159260 (-0.00%)
cycles in affected programs: 213238 -> 187572 (-12.04%)
helped: 435
HURT: 8
V2:
- lower indirects on demoted inputs as well as outputs.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Thu, 7 Sep 2017 03:42:17 +0000 (13:42 +1000)]
i965/nir: export nir_optimize
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Timothy Arceri [Tue, 12 Sep 2017 07:45:47 +0000 (17:45 +1000)]
i965: call brw_shader_gather_info() from the callers of brw_create_nir()
This will allow us to insert a nir linking step in brw_link_shader().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Timothy Arceri [Tue, 12 Sep 2017 07:30:53 +0000 (17:30 +1000)]
i965: create a brw_shader_gather_info() helper
This will help us call gather info at a later point and allow us
to do some linking in nir.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Timothy Arceri [Thu, 7 Sep 2017 13:27:59 +0000 (23:27 +1000)]
nir: add some helpers for doing linking
The initial helpers add support for removing unused varyings between
stages.
V2:
- Moved the io mask helper function into this file rather than
nir.h so it's not used elsewhere considering it doesn't handle
all corner cases.
- Use bitmask rather than hash table to handle tcs outputs (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Tue, 12 Sep 2017 03:18:29 +0000 (13:18 +1000)]
glsl: mark xfb varyings as always active
This will be used by the nir linking pass so that we don't remove
otherwise unused varyings.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Timothy Arceri [Mon, 11 Sep 2017 06:19:22 +0000 (16:19 +1000)]
nir: add always_active_io to nir variable
Will be used in nir link pass to decided if we can remove a varying
or not.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Marek Olšák [Wed, 13 Sep 2017 00:26:26 +0000 (02:26 +0200)]
r600: fork and import gallium/radeon
This marks the end of code sharing between r600 and radeonsi.
It's getting difficult to work on radeonsi without breaking r600.
A lot of functions had to be renamed to prevent linker conflicts.
There are also minor cleanups.
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Kenneth Graunke [Thu, 21 Sep 2017 20:30:47 +0000 (13:30 -0700)]
i965: Rename do_flush_locked to submit_batch().
do_flush_locked isn't a great name - especially given that there's no
locking going on in our code relating to execbuf.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 21 Sep 2017 20:45:27 +0000 (13:45 -0700)]
i965: Use atomic ops in get_new_program_id().
We have a nice utility function for this, which eliminates the need for
locking stuff. This isn't really performance critical, but it's less
code to use the atomic.
p_atomic_inc_return does pre-increment rather than post-increment, so we
change screen->program_id to be initialized to 0 instead of 1. At which
point, we can just delete the initialization because intel_screen is
rzalloc'd.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 21 Sep 2017 20:43:30 +0000 (13:43 -0700)]
i965: Convert brw_bufmgr to use C11 mutexes instead of pthreads.
There's no real advantage or disadvantage here, it's just for stylistic
consistency with the rest of the codebase.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Mon, 25 Sep 2017 02:20:43 +0000 (19:20 -0700)]
i965: Delete dead meta stencil blit program fields from brw_context.
These have been unused for a while now.
Tim Rowley [Wed, 20 Sep 2017 16:50:32 +0000 (11:50 -0500)]
swr/rast: Handle instanceID offset / Instance Stride enable
Supported in JitGatherVertices(); FetchJit::JitLoadVertices() may require
similar changes, will need address this if it is determined that this
path is still in use.
Handle Force Sequential Access in FetchJit::Create.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Tue, 19 Sep 2017 23:19:53 +0000 (18:19 -0500)]
swr/rast: Remove code supporting legacy llvm (<3.9)
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Fri, 15 Sep 2017 23:53:47 +0000 (18:53 -0500)]
swr/rast: Fix allocation of DS output data for USE_SIMD16_FRONTEND
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Thu, 14 Sep 2017 00:16:45 +0000 (19:16 -0500)]
swr/rast: Slightly more efficient blend jit
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Tue, 12 Sep 2017 20:11:07 +0000 (15:11 -0500)]
swr/rast: Properly sized null GS buffer
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Tue, 12 Sep 2017 19:37:36 +0000 (14:37 -0500)]
swr/rast: Move SWR_GS_CONTEXT from thread local storage to stack
Move structure, as the size is significantly reduced due to dynamic
allocation of the GS buffers.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Tue, 12 Sep 2017 18:38:31 +0000 (13:38 -0500)]
swr/rast: Fetch compile state changes
Add ForceSequentialAccessEnable and InstanceIDOffsetEnable bools to
FETCH_COMPILE_STATE.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Mon, 11 Sep 2017 22:29:12 +0000 (17:29 -0500)]
swr/rast: New GS state/context API
One piglit regression, which was a false pass:
spec@glsl-1.50@execution@geometry@dynamic_input_array_index
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Mon, 11 Sep 2017 21:07:32 +0000 (16:07 -0500)]
swr/rast: Add support for R10G10B10_FLOAT_A2_UNORM pixel format
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Samuel Pitoiset [Mon, 25 Sep 2017 12:02:49 +0000 (14:02 +0200)]
radv: save/restore all viewports/scissors for meta operations
This is needed since we don't update the number of viewports/scissors
when they are set dynamically (according to the spec). In the following
scenario:
* vkCmdSetViewport()
* vkCmdClearColorImage() (or any other meta operations)
The viewports/scissors weren't saved correctly because no pipeline
was bound before, and thus the number of viewports/scissors were 0.
This fixes a regression with:
dEQP-VK.draw.negative_viewport_height.front_ccw_cull_back
Fixes: 60878dd00c ("radv: do not update the number of viewports in vkCmdSetViewport()")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Juan A. Suarez Romero [Mon, 25 Sep 2017 17:08:10 +0000 (17:08 +0000)]
docs: update calendar, add news item and link release notes for 17.1.10
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Juan A. Suarez Romero [Mon, 25 Sep 2017 17:00:35 +0000 (17:00 +0000)]
docs: add sha256 checksums for 17.1.10
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
60df95c6bd8c8cc0d440f3940bbbe936d490c67d)
Juan A. Suarez Romero [Mon, 25 Sep 2017 15:18:24 +0000 (15:18 +0000)]
docs: add release notes for 17.1.10
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
834d6c60db266c7d7dfd973729f20379dd3da287)
Eric Engestrom [Wed, 2 Aug 2017 14:01:21 +0000 (15:01 +0100)]
git_sha1_gen: fix output on python3
String handling has changed on python3.
Before this patch, on python3:
#define MESA_GIT_SHA1 "git-b'
b99dcbfeb3'"
After:
#define MESA_GIT_SHA1 "git-
b99dcbfeb3"
(No change on python2, it always looked ok)
Cc: Jose Fonseca <jfonseca@vmware.com>
Fixes: b99dcbfeb344390fea99 "build: Convert git_sha1_gen script to Python."
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Leo Liu [Tue, 19 Sep 2017 17:06:38 +0000 (13:06 -0400)]
st/va/postproc: implement the DRM prime grabber
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Tue, 19 Sep 2017 16:27:19 +0000 (12:27 -0400)]
vl/compositor: convert RGB buffer to YUV with color conversion
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Wed, 20 Sep 2017 16:36:14 +0000 (12:36 -0400)]
vl/csc: add a RGB to YUV CSC matrix
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 18 Sep 2017 01:15:51 +0000 (21:15 -0400)]
vl/compositor: create RGB to YUV fragment shader
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Tue, 19 Sep 2017 17:00:15 +0000 (13:00 -0400)]
st/va/postproc: use progressive target buffer for scaling
Scaling between interlaced buffers, esp. for scale-up, because
blit will scale up top filed and bottom field separately. it'll
result in the weaving for these buffer with lack of accuracy.
So use shader deint for the case.
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Sat, 16 Sep 2017 02:23:03 +0000 (22:23 -0400)]
st/va: make internal func vlVaHandleSurfaceAllocate() call simpler
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 8 Sep 2017 16:44:47 +0000 (12:44 -0400)]
st/va/postproc: add a full NV12 deint support from buffer I to P
Before it's impossible to transcode an interlaced video, becasue if
in order for encoder to work, we have to force buffer to progessive,
but the deint with buffer from I to P is missing. Now along With
the new YUV deint full function, it works with weave and bob deint.
Also this will benefit transcoding video with scaling parameters.
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 15 Sep 2017 19:26:13 +0000 (15:26 -0400)]
vl/compositor: add Bob top and bottom to YUV deint function
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Tue, 19 Sep 2017 15:08:54 +0000 (11:08 -0400)]
vl/compositor: remove vl_compositor_yuv_deint() function
No longer used.
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 11 Sep 2017 16:57:22 +0000 (12:57 -0400)]
st/va: use new vl_compositor_yuv_deint_full() to deint
We also set src rectangle explicitly just in case of the mismatch
of size between interlaced buffer and progressive buffer
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Sun, 17 Sep 2017 14:27:59 +0000 (10:27 -0400)]
st/omx: use new vl_compositor_yuv_deint_full() to deint
v2: add dst rect to make sure no scale
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 15 Sep 2017 18:19:34 +0000 (14:19 -0400)]
vl/compositor: add a new function for YUV deint
It will replace previous deint function with abilities of
scaling and field deinterlacing
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 15 Sep 2017 18:08:23 +0000 (14:08 -0400)]
vl/compositor: extend YUV deint function to do field deint
It will add Bob deint ability to interlaced video for HW encoder
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 15 Sep 2017 17:45:45 +0000 (13:45 -0400)]
vl/compositor: separate YUV part from shader video buffer function
So that it can be re-used
Acked-by: Christian König <christian.koenig@amd.com>
Leo Liu [Tue, 19 Sep 2017 14:16:36 +0000 (10:16 -0400)]
st/va/postproc: use video original size for postprocessing
Otherwise the aligned size will make video scaled
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Bas Nieuwenhuizen [Mon, 25 Sep 2017 04:45:37 +0000 (06:45 +0200)]
radv: Fix VK_KHR_image_format_list.
Spec adding corner cases ...
Fixes: 969537d9358 "radv: Add support for more DCC compression with VK_KHR_image_format_list."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 25 Sep 2017 03:47:25 +0000 (05:47 +0200)]
Revert "Revert "radv: fallback to an in-memory cache when no pipline cache is provided""
I tested this 10 times with
./deqp-vk --deqp-case=dEQP-VK.texture.filtering.3d.formats.r4g4b4a4*
and one full run of CTS, seems the issue is gone.
Also reduces CTS runtime by 30% or so.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Eric Engestrom [Tue, 19 Sep 2017 13:09:01 +0000 (14:09 +0100)]
scons: use python3-compatible exceptions
These changes were generated using python's `2to3` tool.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Eric Engestrom [Tue, 19 Sep 2017 13:21:44 +0000 (14:21 +0100)]
scons: use python3-compatible generator
These changes were generated using python's `2to3` tool.
Suggested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Eric Engestrom [Tue, 19 Sep 2017 12:56:56 +0000 (13:56 +0100)]
scons: use python3-compatible lists
These changes were generated using python's `2to3` tool.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Eric Engestrom [Tue, 19 Sep 2017 13:09:43 +0000 (14:09 +0100)]
scons: use python3-compatible list-key check
These changes were generated using python's `2to3` tool.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Eric Engestrom [Tue, 19 Sep 2017 12:56:34 +0000 (13:56 +0100)]
scons: use python3-compatible print()
These changes were generated using python's `2to3` tool.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102852
Reported-by: Alex Granni <liviuprodea@yahoo.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Samuel Pitoiset [Fri, 22 Sep 2017 13:16:22 +0000 (15:16 +0200)]
radv: init the trace BO before compiling meta shaders
Otherwise, the disasm string is NULL for meta shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 22 Sep 2017 16:21:35 +0000 (18:21 +0200)]
radv: make radv_pipeline_init() static
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 22 Sep 2017 16:21:34 +0000 (18:21 +0200)]
radv: remove unused variable in radv_dump_annotated_shader()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 22 Sep 2017 16:21:33 +0000 (18:21 +0200)]
radv: make use of ATI_VENDOR_ID everywhere
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Iglesias Gonsálvez [Fri, 15 Sep 2017 08:05:03 +0000 (10:05 +0200)]
anv: fix viewport transformation for z component
In Vulkan, for 'z' (depth) component, the scale and translate values
for the viewport transformation are:
pz = maxDepth - minDepth
oz = minDepth
zf = pz × zd + oz
Being zd, the third component in vertex's normalized device coordinates.
Fixes: dEQP-VK.draw.inverted_depth_ranges.*
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
David Airlie [Tue, 15 Aug 2017 04:02:43 +0000 (14:02 +1000)]
radv: add gfx9 scissor workaround
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Adam Jackson [Thu, 21 Sep 2017 19:59:54 +0000 (15:59 -0400)]
glx: Sort the GLX extension bit enum and table
Not quite asciibetical: ARB, then EXT, then vendor, just like the GL
extension enum just below. No functional change, but it bothered me.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Wladimir J. van der Laan [Fri, 22 Sep 2017 13:52:46 +0000 (15:52 +0200)]
etnaviv: Add missing includes after
6ace0b8
Add missing includes after
6ace0b8 (etnaviv: don't enable RT
full-overwrite when logicop is enabled), otherwise the etnaviv driver
won't build because of missing macros.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Andres Gomez <agomez@igalia.com>
Lucas Stach [Fri, 22 Sep 2017 09:24:08 +0000 (11:24 +0200)]
etnaviv: fix 16bpp clears
util_pack_color may leave undefined values in the upper half of the packed
integer. As our hardware needs the upper 16 bits to mirror the lower 16bits,
this breaks clears of those formats if the undefined values aren't masked off.
I've only observed the issue with R5G6B5_UNORM surfaces, other 16bpp
formats seem to work fine.
Fixes: d6aa2ba2b2 (etnaviv: replace translate_clear_color with util_pack_color)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tim Rowley [Tue, 19 Sep 2017 19:04:20 +0000 (14:04 -0500)]
swr/rast: remove llvm fence/atomics from generated files
We currently don't use these instructions, and since their API
changed in llvm-5.0 having them in the autogen files broke the mesa
release tarballs which ship with generated autogen files.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102847
CC: mesa-stable@lists.freedesktop.org
Tested-by: Laurent Carlier <lordheavym@gmail.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Jason Ekstrand [Thu, 21 Sep 2017 15:20:55 +0000 (08:20 -0700)]
vulkan: enum generator: Generate entries for extended enums
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Jason Ekstrand [Thu, 21 Sep 2017 15:05:25 +0000 (08:05 -0700)]
vulkan: enum generator: Stop using iterparse
While using iterparse is potentially a little more efficient, the Vulkan
registry XML is not large and using regular element tree simplifies the
parsing logic substantially.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Lionel Landwerlin [Fri, 15 Sep 2017 14:10:57 +0000 (15:10 +0100)]
vulkan: enum generator: generate extension number defines
New extensions can introduce additional enums. Most of the new enums
will have disjoint numbers from the initial enums. For example new
formats introduced by VK_IMG_format_pvrtc :
VK_FORMAT_ASTC_10x8_UNORM_BLOCK = 177,
VK_FORMAT_ASTC_10x8_SRGB_BLOCK = 178,
VK_FORMAT_ASTC_10x10_UNORM_BLOCK = 179,
VK_FORMAT_ASTC_10x10_SRGB_BLOCK = 180,
VK_FORMAT_ASTC_12x10_UNORM_BLOCK = 181,
VK_FORMAT_ASTC_12x10_SRGB_BLOCK = 182,
VK_FORMAT_ASTC_12x12_UNORM_BLOCK = 183,
VK_FORMAT_ASTC_12x12_SRGB_BLOCK = 184,
VK_FORMAT_PVRTC1_2BPP_UNORM_BLOCK_IMG =
1000054000,
VK_FORMAT_PVRTC1_4BPP_UNORM_BLOCK_IMG =
1000054001,
VK_FORMAT_PVRTC2_2BPP_UNORM_BLOCK_IMG =
1000054002,
VK_FORMAT_PVRTC2_4BPP_UNORM_BLOCK_IMG =
1000054003,
VK_FORMAT_PVRTC1_2BPP_SRGB_BLOCK_IMG =
1000054004,
VK_FORMAT_PVRTC1_4BPP_SRGB_BLOCK_IMG =
1000054005,
VK_FORMAT_PVRTC2_2BPP_SRGB_BLOCK_IMG =
1000054006,
VK_FORMAT_PVRTC2_4BPP_SRGB_BLOCK_IMG =
1000054007,
It's obvious we can't have a single table for handling those anymore.
Fortunately the enum values actually contain the number of the
extension that introduced the new enums. So we can build an
indirection table off the extension number and then index by
subtracting the first enum of the the format enum value.
This change makes the extension number available in the generated enum
code.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Lionel Landwerlin [Fri, 15 Sep 2017 14:10:56 +0000 (15:10 +0100)]
vulkan: enum generator: make registry more flexible
It will be used to store extension numbers as well.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Lionel Landwerlin [Fri, 15 Sep 2017 14:10:55 +0000 (15:10 +0100)]
vulkan: enum generator: sort enums by names
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Lionel Landwerlin [Fri, 15 Sep 2017 14:10:54 +0000 (15:10 +0100)]
vulkan: enum generator: align function declarations/prototypes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Grazvydas Ignotas [Mon, 18 Sep 2017 19:24:34 +0000 (22:24 +0300)]
util/u_atomic: remove unnecessaty __atomic functions
They are now provided by -latomic, which should be linked as needed
since previous commit.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Grazvydas Ignotas [Mon, 18 Sep 2017 19:11:26 +0000 (22:11 +0300)]
configure: check if -latomic is needed for __atomic_*
On some platforms, gcc generates library calls when __atomic_* functions
are used, but does not link the required library (libatomic) automatically
(supposedly to allow the app to use some other atomics implementation?).
Detect this at configure time and add the library when needed. Tested
on armel (library was added) and on x86_64 (was not, as expected).
Some documentation on this is provided in GCC wiki:
https://gcc.gnu.org/wiki/Atomic/GCCMM
Fixes: 8915f0c0 "util: use GCC atomic intrinsics with explicit memory model"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102573
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lucas Stach [Wed, 12 Jul 2017 20:49:09 +0000 (22:49 +0200)]
etnaviv: don't enable RT full-overwrite when logicop is enabled
Logicop is a form of blending with the framebuffer, so we must allow
framebuffer reads when logicop is enabled.
Fixes: piglit gl-1.0-logicop on GC3000, which has logicop support
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Anuj Phogat [Wed, 20 Sep 2017 19:16:35 +0000 (12:16 -0700)]
Revert "intel: Remove unused Kabylake pci ids
drm-intel is in favor of keeping the unused pci-id's which
are still listed in the h/w specs. To keep it uniform
across multiple gfx stack components, I'm reverting below
Mesa patches:
b2dae9f8fd310c19e66b161a7ee9845af78f73e0
ebc5ccf3cc88990248695e833d9ff11e10d91240.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Anuj Phogat [Thu, 21 Sep 2017 21:10:00 +0000 (14:10 -0700)]
Revert "intel: Remove unused device info for KBL GT1.5"
This reverts commit
4c4c28ca70b2267a2563047e35498b1c9252664f.
GT1.5 device info is required for few reserved pci-id's.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Thomas Helland [Wed, 14 Jun 2017 18:02:18 +0000 (20:02 +0200)]
gallium/util: Remove unused keymap
This is not used anywhere in the codebase. It's a hashtable
implementation that is based around cso_hash, and is therefore
(and as mentioned in a comment in the source) quite similar to
u_hash_table.
CC: Brian Paul<brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Fri, 15 Sep 2017 05:59:21 +0000 (22:59 -0700)]
i965: Force outputs_written to contain varyings needed by stream-out.
If transform feedback is recording a varying, it needs a slot in the
VUE map, regardless of whether or not the shader writes it.
Together with the previous patch, this fixes:
- KHR-GL45.enhanced_layouts.xfb_capture_struct
The test captures a structure where the vertex shader writes the first
and third members - but the second still needs a slot.
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Kenneth Graunke [Fri, 15 Sep 2017 05:58:34 +0000 (22:58 -0700)]
i965: Compute VS/GS output VUE map from the NIR info.
unify_interfaces() only updates the NIR program info, not the copy
in the gl_program itself. So, by using the old copy, we were missing
out on these updates.
The TCS/TES ones already did this correctly.
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Kenneth Graunke [Fri, 15 Sep 2017 07:45:35 +0000 (00:45 -0700)]
i965: Handle unwritten PSIZ/VIEWPORT/LAYER outputs in vec4 shaders.
This can occur if the shader is capturing some of the values from the
VUE header for transform feedback, but the shader hasn't written all of
them.
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Kenneth Graunke [Mon, 18 Sep 2017 16:55:57 +0000 (09:55 -0700)]
i965: Fix brw_finish_batch to grow the batchbuffer.
brw_finish_batch emits commands needed at the end of every batch buffer,
including any workarounds. In the past, we freed up some "reserved"
batch space before calling it, so we would never have to flush during
it. This was error prone and easy to screw up, so I deleted it a while
back in favor of growing the batch.
There were two problems:
1. We're in the middle of flushing, so brw->no_batch_wrap is guaranteed
not to be set. Using BEGIN_BATCH() to emit commands would cause a
recursive flush rather than growing the buffer as intended.
2. We already recorded the throttling batch before growing, which
replaces brw->batch.bo with a different (larger) buffer. So growing
would break throttling.
These are easily remedied by shuffling some code around and whacking
brw->no_batch_wrap in brw_finish_batch(). This also now includes the
final workarounds in the batch usage statistics. Found by inspection.
Fixes: 2c46a67b4138631217141f (i965: Delete BATCH_RESERVED handling.)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Mon, 18 Sep 2017 17:00:48 +0000 (10:00 -0700)]
i965: Move MI_BATCHBUFFER_END handling into brw_finish_batch().
This is, by definition, finishing the batch.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Nicholas Miell [Tue, 19 Sep 2017 01:26:23 +0000 (18:26 -0700)]
radv: Implement VK_AMD_rasterization_order
Tested with AMD's Anvil OutOfOrderRasterization demo on a RX 560.
Signed-off-by: Nicholas Miell <nmiell@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Brian Paul [Thu, 21 Sep 2017 16:02:15 +0000 (10:02 -0600)]
glsl: silence signed/unsigned comparison warning
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Fri, 9 Sep 2016 00:56:59 +0000 (20:56 -0400)]
nv20: Enable ARB_texture_border_clamp
Fixes quite a few 'texwrap [12]d border color only' tests on NV20
(10de:0201). All told, 40 more tests pass.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian RomanicK <ian.d.romanick@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Ian RomanicK <ian.d.romanick@intel.com>
Ian Romanick [Fri, 26 May 2017 06:12:52 +0000 (23:12 -0700)]
nv20: Fix GL_CLAMP
v2: Force T and R wrap modes to GL_CLAMP_TO_EDGE for 1D textures.
This fixes a regression in tex1d-2dborder. The test uses a 1D texture
but it provides S and T texture coordinates. Since the T wrap mode
would (correctly) be set to GL_CLAMP, the texture would gradually
blend (incorrectly) with the border color.
I also tried setting NV20_3D_TEX_FORMAT_DIMS_1D instead of
NV20_3D_TEX_FORMAT_DIMS_2D for 1D textures, but that did not help.
It is possible that the same problem exists for 2D textures with the
R-wrap mode, but I don't think there are any piglit tests for that.
No test changes on NV20 (10de:0201).
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Jan Vesely [Wed, 20 Sep 2017 20:01:27 +0000 (16:01 -0400)]
gallium: Add PIPE_SHADER_CAP_INT64_ATOMICS
Denotes availability of 64bit int atomic instructions
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>