anv/cmd_buffer: Conditionally choose the sampled image surface state

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/descriptor_set: Store aux usage of sampled image descriptors

v2: Rebase onto latest changes
v3: Account for NULL image_view in aux_usage assignment

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Create an additional surface state for sampling

This will be used to sample a depth input attachment without having to
pass through the HiZ buffer.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Simplify setup of HiZ sampler surface state

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Remove extra dependency on HiZ-specific variable

surf_usage is only useful to image views that may use HiZ buffers.
Storage image views don't use HiZ buffers.

v2: Update commit message and add an assertion.

Fixes: 055ff2ec521 ("anv: Replace anv_image_has_hiz() with ISL_AUX_USAGE_HIZ")
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Update the HiZ sampling helper

Validate the inputs, verify that this image has a depth
buffer, use gen_device_info instead of

v2:
- Add parenthesis (Jason Ekstrand)
- Make parameters const
- Use gen_device_info instead of gen
- Pass aspect to missed function in transition_depth_buffer

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/cmd_buffer: Replace layout_to_hiz_usage()

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Add anv_layout_to_aux_usage()

This function supersedes layout_to_hiz_usage().

v2:
- Don't find the optimal buffer for layout transitions (Jason Ekstrand).
- Pass the devinfo instead of the gen (Jason Ekstrand)
- Update the function documentation.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/pass: Avoid accessing attachment array out of bounds

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

ralloc: Make sure ralloc() allocations match malloc()'s alignment.

The header of ralloc needs to be aligned, because the compiler assumes
that malloc returns will be aligned to 8/16 bytes depending on the
platform, leading to degraded performance or alignment faults with ralloc.

Fixes SIGBUS on Raspberry Pi at high optimization levels.

This patch is not perfect for MSVC, as maybe in the future the alignment
for the most demanding data type might change to more than 8.

v2: Commit message reword/typo fix, and add a bigger explanation in the
    code (by anholt)

Signed-off-by: Jonas Pfeil <pfeiljonas@gmx.de>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable@lists.freedesktop.org

swr: fix crash in swr_update_derived following st/mesa state changes

Recent change to st/mesa state update logic caused major regressions to
swr validation code.

swr uses the same validation logic (swr_update_derived) for both draw
and Clear calls.  New st/mesa state update logic results in certain state
objects not being set/bound during Clear.  This was causing null ptr
exceptions.  Creation of static dummy state objects allows setting these
pointers during Clear validation, without interfering with relevant state
validation.

Once fixed, new logic also highlighted an error in dirty bit checking for
fragment shader and clip validation.

(The alternative is to have a simplified validation routine for Clear.
Which may do that at some point.)

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>

docs: update features.txt for GL_ARB_clear_texture with swr

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: enable clear_texture with util_clear_texture

Passes corresponding piglit tests.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>

doc: GL_ARB_buffer_storage is supported on llvmpipe/swr

At least, the extension is exported (gallium capability
PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT is 1)

Signed-off-by: Gregory Hainaut <gregory.hainaut@gmail.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

automake: i965: list correct header in Makefile.source

Fixes: 7ac47b1af767 ("i965: Add a header for brw_vec4_vs_visitor")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

svga: fix crash regression since e027935a795

During the first update of the hw_clear_state atoms, we may not yet
have a current rasterizer state object.  So, svga->curr.rast may be
NULL and we crash.

Add a few null pointer checks to work around this.  Note that these
are only needed in the state update functions which are called for
'clear' validation.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: s/unsigned/pipe_prim_type/

And add some default switch cases to silence compiler warnings.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: whitespace fixes in svga_context.h

Trivial.

svga: whitespace and formatting fixes in svga_stage.c

Trivial.

mesa: Avoid read of uninitialized variable

The is_color_attachement variable is later read when handling two
separate error cases, where only one of the cases results in the
variable being initialized.

This can be avoided by giving the variable a safe default value.

Coverity-Id: 1398631
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

anv: add VK_KHR_descriptor_update_template support

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: add VK_KHR_push_descriptor support

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: descriptor: make descriptor writing take a stream allocator

This allows us to allocate surface states from the command buffer when
pushing descriptor sets rather than allocating them through a
descriptor set pool.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: descriptors: extract writing of descriptors elements

This will be reused later on.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: make layout size computation helper available across compilation units

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: move buffer_view declaration

We will need this declaration closer for readability later.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

mesa: Use _mesa_has_OES_geometry_shader() when validating draws

In validate_DrawElements_common() we need to check for OES_geometry_shader
extension to determine if we should fail if transform feedback is
unpaused. However current code reads ctx->Extensions.OES_geometry_shader
directly, which does not take context version into account. This means
that if the context is GLES 3.0, which makes the OES_geometry_shader
inapplicable, we would not validate the draw properly. To fix it, let's
replace the check with a call to _mesa_has_OES_geometry_shader().

Fixes following dEQP tests on i965 with a GLES 3.0 context:

dEQP-GLES3.functional.negative_api.vertex_array#draw_elements
dEQP-GLES3.functional.negative_api.vertex_array#draw_elements_incomplete_primitive
dEQP-GLES3.functional.negative_api.vertex_array#draw_elements_instanced
dEQP-GLES3.functional.negative_api.vertex_array#draw_elements_instanced_incomplete_primitive
dEQP-GLES3.functional.negative_api.vertex_array#draw_range_elements
dEQP-GLES3.functional.negative_api.vertex_array#draw_range_elements_incomplete_primitive

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Replace BRW_SURFACEFORMAT_* with ISL_FORMAT_*.

One less set of enums.  Dropped the #defines from brw_defines.h and ran:

$ for file in *.cpp *.c *.h; do sed -i \
      -e 's/BRW_SURFACEFORMAT_/ISL_FORMAT_/g' \
      -e 's/ISL_FORMAT_ASTC_[A-Zxs0-9_]*/\U&/g' $file; \
  done

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Only flush the batchbuffer if we need to zero the SO offsets

If we don't have pipelined register access (e.g. Haswell before kernel
v4.2), then we can only implement EXT_transform_feedback by reseting the
SO offsets *between* batches. However, if we do have pipelined access to
the SO registers on gen7, we can simply emit an inline reset of the SO
registers without a full batch flush.

v2 [by Ken]: Simplify after recent kernel feature detection changes.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>

anv: do not subtract the base layer to compute depth in 3DSTATE_DEPTH_BUFFER

According to the PRM description of the Depth field:

  "This field specifies the total number of levels for a volume texture
   or the number of array elements allowed to be accessed starting at the
   Minimum Array Element for arrayed surfaces"

However, ISL defines array_len as the length of the range
[base_array_layer, base_array_layer + array_len], so it already represents
a value relative to the base array layer like the hardware expects.

v2: Depth is defined as a U11-1 field, so subtract 1 from
    the actual value (Jason)

This fixes a number of new CTS tests that would crash otherwise:
dEQP-VK.pipeline.render_to_image.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

isl: document the meaning of the array_len field in isl_view

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

vulkan/wsi: Improve the DRI3 error message

This commit improves the message by telling them that they could probably
enable DRI3.  More importantly, it includes a little heuristic to check
to see if we're running on AMD or NVIDIA's proprietary X11 drivers and,
if we are, doesn't emit the warning.  This way, users with both a discrete
card and Intel graphics don't get the warning when they're just running
on the discrete card.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99715
Co-authored-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Rene Lindsay <rjklindsay@hotmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Cc: "17.0" <mesa-dev@lists.freedesktop.org>

i965: Do int64 lowering in NIR

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

nir: Add a simple int64 lowering pass

The algorithms used by this pass, especially for division, are heavily
based on the work Ian Romanick did for the similar int64 lowering pass
in the GLSL compiler.

v2: Properly handle vectors

v3: Get rid of log2_denom stuff.  Since we're using bcsel, we do all the
    calculations anyway and this is just extra instructions.

v4:
 - Add back in the log2_denom stuff since it's needed for ensuring that
   the shifts don't overflow.
 - Rework the looping part of the pass to be easier to expand.

Reviewed-by: Matt Turner <mattst88@gmail.com>

spirv: Use nir_builder for control flow

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

nir/lower_indirect: Use nir_builder control-flow helpers

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

nir/lower_gs_intrinsics: Use nir_builder control-flow helpers

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

glsl/nir: Use nir_builder's new control-flow helpers

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

nir/builder: Add support for easily building control-flow

Each of the pop functions (and push_else) take a control flow parameter as
their second argument.  If NULL, it assumes that the builder is in a block
that's a direct child of the control-flow node you want to pop off the
virtual stack.  This is what 90% of consumers will want.  The SPIR-V pass,
however, is a bit more "creative" about how it walks the CFG and it needs
to be able to pop multiple levels at a time, hence the argument.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

i965: Move intel_debug.h to intel/common/gen_debug.h

This is shared between the Vulkan and GL drivers as it's a requirement
of the back-end compiler.  However, it doesn't really belong in the
compiler.  We rename the file to match the prefix of the other stuff in
common and because libdrm defines an intel_debug.h and this avoids a
pile of possible name conflicts.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Reduce cross-pollination between the DRI driver and compiler

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move select_clip_planes to brw_vs.c

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Delete brw_do_cubemap_normalize

This hasn't been used for quite some time now but we never bothered to
get rid of it when we dropped GLSL IR support for vec4.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add a header for brw_vec4_vs_visitor

brw_vs.h is not a compiler file but brw_vec4_visitor is definitely a
compiler thing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move a bunch of pre-compile and link stuff to brw_program.h

It's all GL-specific and brw_program.h is not part of i965_compiler.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move image uniform setup to brw_nir_uniforms.cpp

It's the only thing that's using it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move channel_expressions and vector_splitting to brw_program.h

They're GL-specific.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Make mark_surface_used a static inline in brw_compiler.h

One of these days, I'd like to see this function go away all together
but for now, let's at least put it near the struct it updates.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move BRW_ATTRIB_WA_* defines to brw_compiler.h

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move BRW_MAX_DRAW_BUFFERS to brw_compiler.h

It does sort-of go with MAX_UBO and friends but MAX_DRAW_BUFFERS is an
actual hardware constant based on the number of things we can blend
rather than an arbitrary "number of things allowed in GL" like some of
the other maximums are.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/inst: Stop using fi_type

It's a mesa define that's trivial to inline.  This removes a dependence
on main/imports.h.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move brw_register_blocks to brw_fs.cpp

Its one and only caller is brw_compile_fs which lives there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move SHADER_TIME_STRIDE to brw_compiler.h

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move SOL binding #defines to brw_compiler.h

While we're at it, we also change the GEN6 binding macro to be a start
index that gets added to the binding.  This makes things a bit more
explicit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i964/gs: Move MAX_GS_INPUT_VERTICES to brw_vec4_gs_visitor.h

It's only users are in brw_vec4_gs_visitor and gen6_vec4_gs_visitor.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gs: Add the gl_prim_to_hw_prim table to vec4_gs_visitor.cpp

It's currently in brw_util.c but that's the only bit of brw_util.c
that's shared between the compiler and the rest of the GL driver.
It's just a fairly obvious table so the duplication isn't bad.  It's
certainly less pain than trying to figure out how to share the code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Don't use MAX_SURFACES in mark_surface_used

Vulkan doesn't respect MAX_SURFACES so this assert isn't valid in that
case.  It should, however, assert that it isn't insanely large.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Get rid of BRW_PRIM_OFFSET

This is a relic of when we wired up meta to be able to use RECTLIST
primitives.  It's no longer needed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vue_map: Stop using GLbitfield types

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Move assign_common_binding_table_offsets to brw_program

This isn't used by Vulkan and is specific to the way the GL driver
works.  There's no reason to have it in common compiler code.  Also, it
relies on BRW_MAX_* defines which are defined in brw_context.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Move some gen4 WM defines to brw_compiler.h

These go in wm_prog_key so they're part of the compiler interface.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Move brw_disassemble_inst to brw_eu.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Move some helpers from brw_context.h to brw_shader.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Move a couple of #defines from brw_context to brw_compiler

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

glsl/int64: Fix a typo in imod64

The zy swizzle gives us one component of quotient and one component of
remainder.  What we wanted was zw for the remainder.

Reviewed-by: Matt Turner <mattst88@gmail.com>

util/build-id: Return a pointer rather than copying the data

We're about to use the build-id as the starting point for another SHA1
hash in the Intel Vulkan driver, and returning a pointer is far more
convenient.

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv: Properly handle destroying NULL devices and instances

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.0 13.0" <mesa-dev@lists.freedesktop.org>

mesa: Fix performance query id check

The queryid_valid() function asserts that an ID given by an application
isn't zero since the spec explicitly reserves an ID of zero as invalid.

The implementation was written as if the ID was a signed integer and
based on the assumption that queryid_to_index() is simply subtracting
one from the ID. It was broken because in fact the ID was stored in an
unsigned int and testing for an index >= 0 would always succeed.

This adds a spec quote to clarify why zero is considered invalid and
checks for zero before even passing the ID to queryid_to_index() for
then checking the upper bound.

This is a v2 of a patch originally posted by Juha-Pekka (thanks)

Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>

amd/common: Fix build with new ac_add_function_attr()

Fix usage of ac_add_function_attr() and make it known!

common/ac_nir_to_llvm.c: In function 'create_llvm_function':
common/ac_nir_to_llvm.c:265:4: error: implicit declaration of function
'ac_add_function_attr' [-Werror=implicit-function-declaration]
    ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_BYVAL);
    ^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

egl/wayland: Don't use DRM format codes for SHM

The wl_drm interface (akin to X11's DRI2) uses the standard set of DRM
FourCC format codes. wl_shm copies this, except for ARGB8888/XRGB8888,
which use their own definitions.

Make sure we only use wl_shm format codes when we're working with
wl_shm. Otherwise, using swrast with 32bpp formats would fail with an
error.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Daniel Stone <daniels@collabora.com> (v1)
Fixes: cb5e799448 ("egl/wayland: unify dri2_wl_create_surface implementations")
v2: [Emil Velikov: move to dri2_wl_create_window_surface]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com> (IRC)

mesa: Drop unused STATE_TEXRECT_SCALE program statevars.

The last user is now gone.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com>

i965: Drop unused STATE_TEXRECT_SCALE code.

In the past, we used this on Gen4-5 to transform non-normalized texture
coordinates (for sampler2DRect) to normalized ones.  We also used it on
Gen6-7.5 for sampler2DRect with GL_CLAMP.

Jason dropped this code in 6c8ba59cff14a1a86273f4008ff2a8e68335ab25
in favor of using nir_lower_tex(), which just does a textureSize()
call.  But we were still setting up these state references for
useless uniform data.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com>

egl: Ensure ResetNotificationStrategy matches for shared contexts.

Fixes:
dEQP-EGL.functional.robustness.negative_context.invalid_robust_shared_context_creation

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: mesa-stable@lists.freedesktop.org

gallivm,ac: add function attributes at call sites instead of declarations

They can vary at call sites if the intrinsic is NOT a legacy SI intrinsic.
We need this to force readnone or inaccessiblememonly on some amdgcn
intrinsics.

This is only used with LLVM 4.0 and later. Intrinsics only used with
LLVM <= 3.9 don't need the LEGACY flag.

gallivm and ac code is in the same patch, because splitting would be
more complicated with all the LEGACY uses all over the place.

v2: don't change the prototype of lp_add_function_attr.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com> (v1)

gallivm,ac: remove unused FUNC_ATTR_LAST enums

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

st/mesa: inform the driver of framebuffer changes before compute dispatches

Even though compute shaders cannot access the framebuffer, there is a
synchronization issue when a compute dispatch accesses a texture that
was previously bound and drawn to as a framebuffer.

Section 9.3 (Feedback Loops Between Textures and the Framebuffer) of
the OpenGL 4.5 spec rather implicitly clarifies that undefined behavior
results if the texture is still attached to the currently bound
framebuffer. However, the feedback loop is broken when the application
changes the framebuffer binding before a compute dispatch, and the
state tracker needs to let the driver known about this.

Fixes GL45-CTS.compute_shader.pipeline-post-fs on SI family Radeons.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

st/glsl_to_tgsi: avoid iterating past the head of the instruction list

exec_node::get_prev() does not guard against going past the beginning
of the list, so we need to add explicit checks here.

Found by ASAN in piglit arb_shader_storage_buffer_object-rendering.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: fix build without opencl and static llvm libs

radeon_llvm_check and friends were never called in the no-opencl case,
which ended up with an empty llvm module list. As --enable-opencl always
requires --enable-llvm, we can use the latter as the guard.

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
[Emil Velikov: commit message polish]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

glsl: remove unecessary flags.q.subroutine_def

This bit is definitely not necessary because subroutine_list
can be used instead. This frees one more bit in the flags.q
struct which is nice because arb_bindless_texture will need
4 bits for the new layout qualifiers.

No piglit regressions found (including compiler tests) with
"-t subroutine".

v2: set the subroutine flag for validating illegal flags

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

vulkan: provide vk.xml as argument to the python generator

Do not hardcode the file in the python script, but pass it via the build
system(s). The latter is the only one that should know about the file
location/tree structure.

Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

automake: vulkan: rename/reuse VULKAN_UTIL_{GENERATED_,}FILES list

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

android: vulkan: add support for libmesa_vulkan_util

The following changes are implemented:

Add src/vulkan/Android.mk to build libmesa_vulkan_util
Android.mk: add src/vulkan to SUBDIR to build new module
intel/vulkan: fix libmesa_vulkan_util,vk_enum_to_str.h dependencies
Add -o OUTPUT_PATH option in src/vulkan/util/gen_enum_to_str.py script
Use -o OUTPUT_PATH option in automake generation rules for vk_enum_to_str.{c,h}

Fixes: e9dcb17 "vulkan/util: Add generator for enum_to_str functions"
Fixes: 8e03250 "vulkan: Combine wsi and util makefiles"
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov]
 - Move parser within main()
 - Use --outdir instead of -o
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

automake: r600: radeonsi: correctly manage libamd_common.la linking

Since both r600 and radeonsi use code from libamd_common they need to
static link it. At the same time, adding a common library to LIB_DEPS is
fragile [can lean to multiple symbol definitions] and non-obvious - I
had to do a double-take how things work atm.

So follow the libradeon.la approach and put common libraries in
TARGET_RADEON_COMMON

Fixes: 936f5407a7d ("gallium/radeon: Add libamd_common.a to TARGET_LIB_DEPS also for r600")
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

glx/tests: automake: add dispatch-index-check to the tarball

Otherwise we'll fail at `make distcheck'

Fixes: 3cc33e76401 ("glx: add GLXdispatchIndex sort check")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

automake: anv: add missing include $(top_srcdir)/src/vulkan/util

Otherwise we'll fail to find the header and `make distcheck` will bail.

Fixes: e9dcb17962f ("vulkan/util: Add generator for enum_to_str functions")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

i965/fs: emit MOV_INDIRECT with the source with the right register type

This was hiding bugs as it retyped the source to destination's type.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handles

When generating the MOV INDIRECT instruction, the source type is ignored
and it is set to destination's type. However, this is going to change in a
later patch, so we need to explicitly set the proper source type.

brw_vec8_grf() creates an float type's fs_reg by default, when the
ICP handle is actually unsigned. This patch fixes these cases before
applying the aforementioned patch.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/fs: fix indirect load DF uniforms on BSW/BXT

The lowered BSW/BXT indirect move instructions had incorrect
source types, which luckily wasn't causing incorrect assembly to be
generated due to the bug fixed in the next patch, but would have
confused the remaining back-end IR infrastructure due to the mismatch
between the IR source types and the emitted machine code.

v2:
- Improve commit log (Curro)
- Fix read_size (Curro)
- Fix DF uniform array detection in assign_constant_locations() when
  it is acceded with 32-bit MOV_INDIRECTs in BSW/BXT.

v3:
- Move changes in assign_constant_locations() to other patch.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/fs: detect different bit size accesses to uniforms to push them in proper locations

Previously, if we had accesses with different sizes to the same uniform, we might not
push it aligned with the bigger one. This is a problem in BSW/BXT when we access
an array of DF uniform with both direct and indirect addressing because for the latter
we use 32-bit MOV INDIRECT instructions. However this problem can happen with other
generations and bitsizes.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/fs: mark last DF uniform array element as 64 bit live one

This bug can make that we don't detect the end of a contiguous area
correctly and push larger areas than the real ones.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

radv: fix txs for sampler buffers

I messed this up when I wrote it, this fixes:
dEQP-VK.memory.pipeline_barrier.*uniform_texel_buffer.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

amd/common: fix ASICREV_IS_POLARIS11_M for Polaris12

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Don't allocate space for unused immutable samplers.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv/ac: Use constants for immutable samplers.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Detect if all immutable samplers for a binding are equal.

We can then use constants for indexed loads.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Store the immutable samplers as uint32_t[4].

So we don't need to know about radv_sampler in ac_nir_to_llvm.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

egl/dri3: implement query surface hook

This is a DRI3 version of a change made for DRI2
(4d6d4f939e0af4252e0b, "egl/dri2: implement query surface hook"),
that fixed failures in dEQP-EGL.functional.resize.surface_size.grow
and dEQP-EGL.functional.resize.surface_size.shrink.

Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Cc: Chad Versace <chadversary@chromium.org>
Signed-off-by: Brendan King <Brendan.King@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>

gallium/radeon: Add libamd_common.a to TARGET_LIB_DEPS also for r600

Fixes build failure with --enable-opencl --enable-xvmc:

make[4]: Entering directory '/home/daenzer/src/mesa-git/mesa/build-amd64/src/gallium/targets/xvmc'
  CXXLD    libXvMCgallium.la
../../../../src/gallium/drivers/r600/.libs/libr600.a(evergreen_compute.o): In function `evergreen_create_compute_state':
/home/daenzer/src/mesa-git/mesa/build-amd64/src/gallium/drivers/r600/../../../../../src/gallium/drivers/r600/evergreen_compute.c:254: undefined reference to `ac_elf_read'
../../../../src/gallium/drivers/r600/.libs/libr600.a(evergreen_compute.o): In function `r600_shader_binary_read_config':
/home/daenzer/src/mesa-git/mesa/build-amd64/src/gallium/drivers/r600/../../../../../src/gallium/drivers/r600/evergreen_compute.c:189: undefined reference to `ac_shader_binary_config_start'
/home/daenzer/src/mesa-git/mesa/build-amd64/src/gallium/drivers/r600/../../../../../src/gallium/drivers/r600/evergreen_compute.c:189: undefined reference to `ac_shader_binary_config_start'
collect2: error: ld returned 1 exit status
Makefile:760: recipe for target 'libXvMCgallium.la' failed

Fixes: dc4c551a345d ("radeon/ac: switch from radeon_elf_read() to ac_elf_read()")
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Timothy Arceri <tarceri@itsqueeze.com>

i965: Move intel_resolve_map.[ch] from i965_compiler_FILES to i965_FILES

I have no idea why these were part of the compiler files.  They're
miptree related code, and the compiler doesn't appear to use them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

gallium/r600: fix r600 build when OpenCL is enabled

Fixes build regression caused by d90bf4ef3e1db7