systemc: Move some constants out of sc_time.cc for other files to use.

Change-Id: Ic88c6834dfe980022e58a3d859ea53193a55bbb1
Reviewed-on: https://gem5-review.googlesource.com/c/12971
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Add a warning to sc_interface::default_event.

The default implementation returns a dummy event, but in the Accellera
implementation it also prints a warning. Print a warning as well, so
that the output matches for the tests.

Change-Id: I1ae2755685515c3fe538f4075af396e963cf155d
Reviewed-on: https://gem5-review.googlesource.com/c/12970
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Filter out an Info about delta cycles and pseudo timesteps.

In the Accellera implementation, every time a delta cycle is traced a
check is done to see if the user has been told what the pseudo timestep
is. To avoid doing that check over and over, we'll leave that out and
tell the verify.py to ignore that message in the reference output.

Change-Id: I825f05394dccf03e951d29561a11c3cc6d4bcda7
Reviewed-on: https://gem5-review.googlesource.com/c/12969
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Check the process type when using sc_join.

Method processes aren't allowed in an sc_join.

Change-Id: I5c8421a396dbe261645a074df514f69fc652c9c8
Reviewed-on: https://gem5-review.googlesource.com/c/12968
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Make sure the right type process is running when calling wait.

That function is only allowed when running a thread or cthread.

Change-Id: Idf98b70018169d4f724aa8168f3c4e8161f0b83d
Reviewed-on: https://gem5-review.googlesource.com/c/12967
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Add an error check to sc_time.

Change-Id: Ie525a1624a6496a51277fb984cbfeec21eb79749
Reviewed-on: https://gem5-review.googlesource.com/c/12966
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Add some error checks to sc_export.

Change-Id: Ib0c14a5c7dad37b33d61c9b406f6b84121d94e46
Reviewed-on: https://gem5-review.googlesource.com/c/12965
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement general and VCD trace support.

This doesn't include WIF trace support, but does make allowances for
adding it in the future.

Change-Id: Ifb62f40a7d8a13e94463930a44ac4b1cf41e3009
Reviewed-on: https://gem5-review.googlesource.com/c/12826
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Don't schedule the ready event unnecessarily.

If we're already going to process the thing we'd be scheduling it to
process, just let the existing invocation get to it.

Change-Id: Ifeebc80903065567fc0eed02beefec6156b22ff7
Reviewed-on: https://gem5-review.googlesource.com/c/12964
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Fix the implementation of sc_event::triggered.

This function just returned false. The new implementation uses the
scheduler's changeStamp function to keep track of how recently the
event was triggered so it can return return the right value.

Change-Id: Idf61cd459e53e224a33d3e53c16210f5e0a99a3a
Reviewed-on: https://gem5-review.googlesource.com/c/12825
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Teach verify.py how to verify vcd files.

The reference output skips the first 7 lines which have volatile info
like the current time.

Change-Id: I9c173ff3903982a07349ca6957ab25e07bdf8e54
Reviewed-on: https://gem5-review.googlesource.com/c/12824
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Fix the default width values for the various sc_trace-s.

These were all set to 8 * sizeof(char) instead of using the size of the
actual data type being traced.

Also add a very simple implementation to the generic sc_signal_in_if<T>
sc_trace which just delegates to the sc_trace of the underlying type T.

Change-Id: I129df46ef9d49705dc3dac76e30c0a3652c981eb
Reviewed-on: https://gem5-review.googlesource.com/c/12818
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Fix a typo in verify.py.

In the generic (non-console output) output checker, a variable should
have been called self.test, but was called self.text.

Change-Id: I2518d6ff01c51fc195eef2b61e987d1b3104c89b
Reviewed-on: https://gem5-review.googlesource.com/c/12817
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Add an error check whether an interface is alread bound to a port.

Change-Id: I06e3484176c0c06daa28f7be0ed8437b3b15ddb2
Reviewed-on: https://gem5-review.googlesource.com/c/12816
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Add some additional error checks.

Change-Id: I19c5e6f1795c2777dbe7d210cfa01f6ced2020f3
Reviewed-on: https://gem5-review.googlesource.com/c/12815
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Change an error message to match the reference outputs.

This is different from the message the Accellera implementation would
print, so it looks like it wouldn't pass this test as is.

Change-Id: I0286fd3e3df7bc3e87f38c35086a32d8dec0bcc9
Reviewed-on: https://gem5-review.googlesource.com/c/12814
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

mem-cache: Add missing includes in TreePLRU

Add missing includes to TreePLRU files.

Change-Id: Ia1e7b2aa91eec8a30b6dccf513cca37a3058b350
Reviewed-on: https://gem5-review.googlesource.com/c/13477
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem: Get rid of some stray lines which ended up in packet.hh.

These were left in by mistake when refactoring patches for review.

Change-Id: I4c39b5a3e2a2d3957e725a6ffcf48c25b8a69f2e
Reviewed-on: https://gem5-review.googlesource.com/c/13495
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

arch: Explicitly specify the endianness in the generic mem helpers.

This avoids using the accessors which automatically assume an
endianness, requiring the memory system to know what the guest ISA is.

Change-Id: I863fa4116f00e77b801a2f8ea2fbe34e7f55fd5f
Reviewed-on: https://gem5-review.googlesource.com/c/13461
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

mips: Use little endian packet accessors.

We know data is little endian, so we can use those accessors
explicitly.

Change-Id: I6220a543686b1d45d26973391b028dc04ce85dd2
Reviewed-on: https://gem5-review.googlesource.com/c/13460
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

alpha: Use little endian packet accessors.

We know data is little endian, so we can use those accessors
explicitly.

Change-Id: Ieb9c1eb8a4fec31ee69cbbfd8c1afdf9f64de366
Reviewed-on: https://gem5-review.googlesource.com/c/13459
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

sparc: Use big endian packet accessors.

We know data is big endian, so we can use those accessors
explicitly.

Change-Id: I06fe35254433b20db05f5f10d0ca29a44d47c301
Reviewed-on: https://gem5-review.googlesource.com/c/13458
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

arm: Use little endian packet accessors.

We know data is little endian, so we can use those accessors
explicitly.

Change-Id: Iee337109fcda134e1ac5a700e5141fd7060f9c45
Reviewed-on: https://gem5-review.googlesource.com/c/13457
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

x86: Use little endian packet accessors.

We know data is little endian, so we can use those accessors
explicitly.

Change-Id: I09aa7f1e525ad1346e932ce4a772b64bf59dc350
Reviewed-on: https://gem5-review.googlesource.com/c/13456
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

mem: Expose the raw packet accessor functions.

This avoids a place where data has its endianness switched so that when
the endianness based accessors switch it back it returns to normal. It
also makes it easier to show intent when accessing single bytes where
endianness doesn't matter, and there's no contextual endianness.

Change-Id: I1b97396c1b9bb39727d35112d90e3969e5fe0aab
Reviewed-on: https://gem5-review.googlesource.com/c/13455
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

dev: Include the platform base class even in NULL_ISA builds.

These classes don't have any ISA specific aspects.

Change-Id: Ifefb12d23e4aee8e3fd56f0a1eb3d9ad00e733a0
Reviewed-on: https://gem5-review.googlesource.com/c/13467
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

syscall_emul: update arm uname release to 3.7.0+

Trying to compile an ARM C hello world with arm-linux-gnueabihf-gcc from
Ubuntu 16.04 leads to a runtime failure with se.py:

FATAL: kernel too old

because the glibc tests if the kernel is at least 3.2.0, and gem5 was
reporting 3.0.0.

Furthermore, it is hard to obtain such toolchain at all: for example
crosstool-NG currently only allows for minimum kernels above 3.2.0.

3.7.0+ was chosen to match the aarch64 value, as it is likely that the
level of support will be very similar.

This commit does not guarantee that full 3.7.0 is supported, but it is
not likely that we had full 3.0.0 support previously either.

However, it is more likely that such support will be eventually achieved
if users can at least try out their programs and implement the missing
system calls as they are found.

Change-Id: I8df3763ae49788a6cb11cb0920e8202cd56b0f09
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/12986
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

mem-cache: Factor ReplaceableEntry out

ReplaceableEntry is referenced by many classes that do
not necessarily need access to the replacement policies.
Therefore, in order to allow better compilation units,
we factor it out to a new file.

Change-Id: I0823567bf1ca336ffcdf783682ef473e8878d7fd
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13418
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem-cache: Move sector_blks to tags folder

Move sector_blks.hh and sector_blks.cc to the tags folder,
as its usage scope is restricted to the tags, and caches
should not be aware of them.

Change-Id: Ia7a71f51ec251d827872daf108c87da543a0ba57
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13417
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem-cache: Rename blk.cc/hh to cache_blk.cc/hh

Rename the files blk.cc and blk.hh to cache_blk.cc and cache_blk.hh
to comply with the usual file-class naming rules.

Change-Id: I8af45df3e4b8dd934fd9929ec914fb230cb2cb09
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13416
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem-cache: Virtualize block print

Encapsulate and virtualize block print, so that relevant
information can be easily printed anywhere.

Change-Id: I91109c29c126755183a0fd2b4446f5335e64076b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13415
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem-cache: Create Tree-PLRU replacement policy

Implementation of a Tree-PLRU replacement policy. It is based on
the assumption that a set associative cache is used.

Change-Id: I74b227e88fd6c93aab5bb2cd0e8730376db28f52
Reviewed-on: https://gem5-review.googlesource.com/c/11106
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

mem-cache: Remove CacheSet.hh

Replacement policies aren't aware of cache sets and do not
organize blocks based on replacement data. Block search is
independent of block placement.

Besides, indexing policies have their own way of addressing
the sets, therefore there is no need to use this class anymore.

BlkType has been removed, as it wasn't being used.

Change-Id: Ia79c2a491e59f295c8d60a0466c317eb0e2bdab9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/9782
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem-cache: Split Tags for indexing policies

Split indexing functionality from tags, so that code duplication
is reduced when adding new classes that use different indexing
policies, such as set associative, skewed associative or other
hash-based policies.

An indexing policy defines the mapping between an address' set
and its physical location. For example, a conventional set assoc
cache maps an address to all ways in a set using an immutable
function, that is, a set x is always mapped to set x. However,
skewed assoc caches map an address to a different set for each way,
using a skewing function.

FALRU has been left unmodified as it is a specialization with its
own complexity.

Change-Id: I0838b41663f21eba0aeab7aeb7839e3703ca3324
Reviewed-on: https://gem5-review.googlesource.com/c/8885
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

mem-cache: Use set and way for ReplaceableEntry

Replaceable entries belong to table-like structures, and therefore
they should be indexable by combining a row and a column. These,
using conventional cache nomenclature translate to sets and ways.

Make these entries aware of their sets and ways. The idea is to
make indexing policies usable by other table-like structures. In
order to do so we move sets and ways to ReplaceableEntry, which
will be the common base among table entries.

Change-Id: If0e3dacf9ea2f523af9cface067469ccecf82648
Reviewed-on: https://gem5-review.googlesource.com/c/12764
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

mem-cache: Use possible locations to find block

Use possible locations to find block to make it placement policy
independent.

Change-Id: I4c9d9e1e1ff91ce12e85ca1970f927d8f4f5a93b
Reviewed-on: https://gem5-review.googlesource.com/c/8884
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

mem-cache: Create tags initialization function

Having the blocks initialized in the constructor makes it harder
to apply inheritance in the tags classes. This patch decouples
the block initialization functionality from the constructor by
using an init() function. It also sets the parent cache.

Change-Id: I0da7fdaae492b1177c7cc3bda8639f79921fbbeb
Reviewed-on: https://gem5-review.googlesource.com/c/11509
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

mem-cache: Remove Packet dependency in Tags

Decouple Tags from Packets, only extracting the necessary
functionality for block insertion. As a side effect, create
a new function to update common insertion statistics.

Change-Id: I5c58f7c17de3255beee531f72a3fd25a30d74c90
Reviewed-on: https://gem5-review.googlesource.com/c/11098
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

systemc: Implement the sc_signal_rv channel and ports.

Change-Id: Id1a3fd2ded224bbe94a4a65e0acf34a3547aedcc
Reviewed-on: https://gem5-review.googlesource.com/c/12813
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Ignore a gem5 warning about setting the stack size in verify.py.

This warning shouldn't make a test fail, but it's still useful to keep
around.

Change-Id: I9ebdbec804e11445edb82fa824ee0a6bce5943b0
Reviewed-on: https://gem5-review.googlesource.com/c/12812
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Warn if sc_stop is called more than once.

Change-Id: Ief88b9af0119ba4b007f79905db2522b5f95b820
Reviewed-on: https://gem5-review.googlesource.com/c/12811
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Check whether the simulation is running when creating sensitivities.

Change-Id: I499cde0d0eb45ba3287a8719174e1c794c1fb634
Reviewed-on: https://gem5-review.googlesource.com/c/12810
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Handle nonstandard cthread sensitivities.

Accellera allows some non-standard values in the second position of the
SC_CTHREAD macro. Do that as well, with the same special handling which
automatically selects the positive edge of boolean ports/interfaces.

Change-Id: I79594980898a17afc30fea6f77384589cbc3c250
Reviewed-on: https://gem5-review.googlesource.com/c/12809
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Change how the scheduler orders processes.

The Accellera implementation looks like it does all the methods, then
all the threads, and then loops back and tries again, and there are
even comments in the code that suggests that. What it actually does,
however, is runs all the methods, then runs a single thread if one is
waiting, and then starts over. The effect is that the scheduler will
run any methods first, then run threads until a method might have
become ready, and then repeat.

This will actually result in more mixing of threads and methods, more
context switches, and worse performance, but it makes the regressions
pass more.

Change-Id: I7cb0485e26eed79204ff2a3c3ded27b973e0b7b0
Reviewed-on: https://gem5-review.googlesource.com/c/12808
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Differentiate between notifying methods and threads.

The Accellera implementation notifies all types of method
sensitivities first, and then notifies all the ones for threads.

Change-Id: I5eda75958675ba518f008852148030e032f70d83
Reviewed-on: https://gem5-review.googlesource.com/c/12807
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Rework how delayed sensitivities are handled.

Make BindInfo into a more general purpose Port class which mirrors
sc_module and Module, sc_object and Object, etc. This tracks multiple
bindings internally, and also pending sensitivities. Keep a global
list of ports which are added in reverse order to match Accellera, and
which is iterated over to finalize binding and for phase callbacks.
This is as opposed to doing it one module at a time, and is to better
match Accellera's ordering for the regressions.

Also the sensitivity classes are now built with factory functions,
which gets around problems calling virtual functions from their
constructors or forgetting to having to have extra boilerplate each
place they're constructed.

The port class also now finalizes port or event finder sensitivities
when its binding is completed, unless it's already complete in which
case it does so immediately.

Change-Id: I1b01689715c425b94e0f68cf0271f5c1565d8c61
Reviewed-on: https://gem5-review.googlesource.com/c/12806
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Refactor sensitivities.

Dynamic and Static sensitivities used to be represented by the same
classes, even though they're (almost) disjoint in how they worked. Also
timeouts, which can be used alongside dynamic sensitivities, were
handled by the sensitivities themselves. That meant that the
sensitivity mechanism had to mix in more types of behaviors,
increasing complexity. Also, the non-standard timed_out function
Accellera includes is harder to implement if the path for timeouts and
regular sensitivities are mixed together.

This change splits up dynamic and static sensitivities and splits out
timeouts. It also immitates the ordering Accellera uses when going
through sensitivities for an event. Static sensitivities are triggered
first in reverse order (why?), and then dynamic sensitivities are
triggered in what amounts to reverse order. To delete a sensitivity
which has been handled, it's swapped with the one in the last position,
and then the vector is truncated to drop it at the end. This has the
net effect of stirring the dynamic sensitivities, and isn't easily
immitated using a different approach, even if other approaches would
be more straightforward.

Double check addSensitivity for event.hh

Change-Id: I1e73dce386b95f68e9d6737deb8bed70ef717e0d
Reviewed-on: https://gem5-review.googlesource.com/c/12805
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement sc_buffer.

This required a small change to sc_signal so that the value change
event and the change stamp for it were accessible.

Change-Id: Ife0545d84f3b25e98da079786c30ffa51025cce7
Reviewed-on: https://gem5-review.googlesource.com/c/12804
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Mark a few more tests as expected to return non-zero.

Change-Id: Ic23865d9c22909bb7482223548dbc7a46c356920
Reviewed-on: https://gem5-review.googlesource.com/c/12623
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Add some error checks to some classes.

These check whether those classes are being constructed in legal
circumstances, and avoids a null pointer dereference.

Change-Id: Ied36ee15c3d7bf6ee444351a841c38576780298e
Reviewed-on: https://gem5-review.googlesource.com/c/12622
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Add a "kind()" overload to sc_port_base.

This is "implementation defined" but needs to exist to match the
golden reference output from Accellera.

Change-Id: I9b7949343b7c62a8d568abc06ab4dfc88233b20a
Reviewed-on: https://gem5-review.googlesource.com/c/12621
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement the sc_*_resolved classes.

Change-Id: Ib595da10e0f900ee4cc1847d41d29251dacb55d7
Reviewed-on: https://gem5-review.googlesource.com/c/12620
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement the sc_clock::time_stamp function.

This is just a non-standard static alias for the sc_time_stamp
function.

Change-Id: Ibcd0559e7dab8232528628259abb8d1bfaee16e0
Reviewed-on: https://gem5-review.googlesource.com/c/12619
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement sc_mutex.

Change-Id: I8a5bd03b46d44aeca3bba15a01a5f2180b4ed5c7
Reviewed-on: https://gem5-review.googlesource.com/c/12618
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement sc_semaphore.

Change-Id: I778d41bd81880e76caa71dc92359a00127d8f987
Reviewed-on: https://gem5-review.googlesource.com/c/12617
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Ensure SC_LONG_64 is defined and available.

The datatype code was checking if SC_LONG_64 was defined to determine
if a long was 64 bits. The code that would define that value was
dropped when porting over from the Accellera implementation, and so
the wrong code was being included. This change both makes those checks
look at the *value* of SC_LONG_64 to ensure that it's not missing by
accident, and assigns it a value in sc_fxdefs.hh.

Change-Id: Ie9bb1146452a3db1d9d99c0db575098bb06463ff
Reviewed-on: https://gem5-review.googlesource.com/c/12616
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement SC_FORK, SC_JOIN, and SC_CJOIN.

SC_CJOIN is non-standard, but relied on by the Accellera tests.

Change-Id: Ia4ddcb1749a07891157a58398137e94fcaa8e815
Reviewed-on: https://gem5-review.googlesource.com/c/12615
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Stop assuming picoseconds as the time resolution.

Also adjust some code to avoid floating point rounding problems and
integer overflow issues.

Change-Id: Ib4b9c4cf4af00333951db5ce07819556141aa5da
Reviewed-on: https://gem5-review.googlesource.com/c/12614
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Keep all pre-init processes on a single list.

We were keeping track of processes which should be initialized and
those which shouldn't on two different lists, and then processing
each list one after the other. This could reorder processes from the
order they were created, and so cause spurious differences which cause
the Accellera tests to fail.

This does make the scheduler slightly simpler, so it's not all bad.

Change-Id: I63306a41ce7bea91fa9ff2f6774ce9150134ce48
Reviewed-on: https://gem5-review.googlesource.com/c/12613
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Track event sensitivities with a list instead of a set.

It's totally legal to signal that an event happened to waiting
processes in any order we choose, but to match the order of events
which appears in the Accellera test golden output, we need to do things
in the order they did. This is less efficient, but will reduce the
number of false positives.

Change-Id: Ie2882249ae846991d627f5f688a9e89e629bb300
Reviewed-on: https://gem5-review.googlesource.com/c/12612
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Mostly implememt sc_simcontext.

Since we don't track the current process using the sc_curr_proc_handle
structure, we keep one around just to return from the appropriate
accessor, and set its values when it's requested. If the object is
kept around, those values won't change to track changing processes.

From what I see, none of the tests rely on the value tracking the
process beyond the callsight.

Change-Id: I1ad3b7a7b15aa0bc4d218f986ffbe7c51501b296
Reviewed-on: https://gem5-review.googlesource.com/c/12611
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Centralize module callbacks and report new warnings.

By centralizing module callbacks, the gem5 module class knows when
different stages of the simulation are happening and can do it's own
extra checks. It also compartmentalizes modules more since the kernel
object doesn't have to reach into them to enumerate ports and exports.

Change-Id: I55887284af9c05150fe9d054f5b6147cad6092a1
Reviewed-on: https://gem5-review.googlesource.com/c/12610
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Change how sc_clock creates processes to match the tests.

Accellera sets up the mechanism which toggles sc_clock differently
than it's set up in gem5. This change moves things around a little to
more closely match the order things are done by Accellera so that the
test output matches.

Change-Id: Ia6d327f4cd5d689f6969398f02a66278a3dc010c
Reviewed-on: https://gem5-review.googlesource.com/c/12609
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement the deprecated "timed_out" function.

This function requires some slightly annoying bookkeeping since it
doesn't just report whether the current process is running as a result
of a timeout, it reports whether it's running as a result of a timeout
*and* it could have been running from some other sensitivity instead.
Pure timeouts don't count as timeouts which makes it harder to handle
in a general way.

Change-Id: I533d97fe66d20d7b83aba80f2ef45a8944668070
Reviewed-on: https://gem5-review.googlesource.com/c/12608
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Catch exceptions during updates, notifications, and callbacks.

Change-Id: I6005c12ce32d24413618e3955625432985f99f69
Reviewed-on: https://gem5-review.googlesource.com/c/12607
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Report an error if notifying during the update phase.

Change-Id: If261c7a981a247884f0a6466756966b454f197f4
Reviewed-on: https://gem5-review.googlesource.com/c/12606
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Track the scheduler status using an enum instead of bools.

The scheduler tracked whether it was paused or stopped with two bools
which are mutually exclusive. It's useful to be able to also check for
some other mutually exclusive states like what phase the scheduler is
currently running.

Rather than adding a bunch of additional bools, this change switches
those mutually exclusive states over to an enum, and adds some methods
to access and maintain that enum.

Change-Id: Ia9696b2853d1b122c1100c9df0e12b018fe9b84b
Reviewed-on: https://gem5-review.googlesource.com/c/12605
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Remove a redundant call to update() from the kernel object.

The t0Handler runs the scheduler's initPhase function which has a call
to update built into it. There's no reason to call that within one of
the kernel's callbacks as well.

Change-Id: I02c755b7d53f93accdacf8149cc1988d7a6e214c
Reviewed-on: https://gem5-review.googlesource.com/c/12604
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Mark a few tests as expected to raise an error.

Change-Id: I8291f5f32fb96c42f75521385cdf14c50243860f
Reviewed-on: https://gem5-review.googlesource.com/c/12603
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Update some defaults in verify.py.

Change the defaults in verify.py to be more like how I've been running
it. This is as close of an approximation as I have to how someone else
would want to run it manually. When run as part of a script, it's less
cumbersome to have to add extra arguments.

Change-Id: Ibd7c7168a38aa5c014ab5c1246c9617c7358e4f9
Reviewed-on: https://gem5-review.googlesource.com/c/12602
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Fortify how exceptions are caught and passed around.

This change tightens up exception catching and makes gem5's systemc
code react to exceptions more in line with the Accellera
implementation. This prevents exceptions from being caught by the
pybind11 integration which makes it very difficult to see where an
exception came from, and makes the output differ by including a
(mostly useless) backtrace.

Change-Id: I7130d53a98fadd137073d1718f780f32f57c658c
Reviewed-on: https://gem5-review.googlesource.com/c/12601
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Merge stderr and stdout when running tests.

The golden output for tests doesn't distinguish between stderr and
stdout, and by only comparing against stdout we have to throw away
errors which would be good to verify we get right. Also the tests
sometimes send output to stderr for no apparent reason, requiring
manually patching the tests.

This change adds filters for two messages which used to go to stderr
in gem5 but now show up in the diffs, one that just says the simulation
is starting, and the other for warns of unimplemented functionality.
The second warning should be turned on at some point so we make sure
everything the tests touch works and they don't just work by
coincidence, but for now it introduces a lot of noise among otherwise
passing tests.

Change-Id: I3b14f7807af561a79d6e0ca87aff1ab6051be596
Reviewed-on: https://gem5-review.googlesource.com/c/12600
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Warn if a process is dont_initialize with no static sensitivieis.

Change-Id: I4db64f42872a6fb459faa401abdad3f168297347
Reviewed-on: https://gem5-review.googlesource.com/c/12599
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Report a warning if an event or object needs to be renamed.

Change-Id: I8085ba19fd7acd69d07a1e032f2fd18b6c5fed6f
Reviewed-on: https://gem5-review.googlesource.com/c/12598
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Teach verify.py to filter messages which start within a line.

It's possible for a test to generate a warning or error in the middle
of a line of output. The previous filter generator function would
create a filter which would only detect those messages which started
at the beginning of a new line.

Change-Id: I40372dc33049df84f3111e4d63a6619db97dcaa3
Reviewed-on: https://gem5-review.googlesource.com/c/12597
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement sc_time::to_string.

This is just another way to call sc_time::print, but it returns a
string instead of printing to a stream.

Change-Id: Idc90c539127e6153af9511bfe5f258b870362330
Reviewed-on: https://gem5-review.googlesource.com/c/12596
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Match how Accellera schedules processes even more closely.

The Accellera implementation runs processes in a cycle where it first
runs all the methods it has, then all the threads, and then starts
again in case any new methods have been scheduled. This keeps methods
and processes in the order they were marked ready (what a prior change
made this scheduler do), but also keeps the methods together and the
threads together (something it used to do, but that change made it
stop doing). This change should make the gem5 scheduler match in both
respects.

Note that its correct to run the processes in whatever order we want,
it's just that if we're going to compare against the "golden" output
from the Accellera tests, we need to match the order to get sensible
results.

Change-Id: I0b1e4ed24c56f97921148b74e90c2dca5fd3fbc4
Reviewed-on: https://gem5-review.googlesource.com/c/12595
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement the nonstandard halt function.

Change-Id: Ie9bd9db92a63169980230bc9a15e153d5609dd0b
Reviewed-on: https://gem5-review.googlesource.com/c/12594
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

configs: Fix CPUClass typo in se.py

Change 719eb033fe435133abf15501c249eec10d1c861f added a typo
to se.py that breaks simpoint simulation, which generates the
following error:

Traceback (most recent call last):
  File "<string>", line 1, in <module>
  File "/home/daniel/gem5/src/python/m5/main.py", line 435, in main
    exec filecode in scope
  File "./configs/example/se.py", line 217, in <module>
    if not CpuConfig.is_atomic_cpu(TestCPUClass):
NameError: name 'TestCPUClass' is not defined

Change-Id: Ideede8c96a40ee16af733c3d57b02b64f1a18d12
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13267
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

arch-arm: Add have_crypto System parameter

This patch adds the have_crypto ArmSystem parameter for enabling crypto
extension. This is done by modifying the AArch32/AArch64 ID registers
at startup time.

Change-Id: I6eefb7e6f6354802a14ea639ad53b75f8e1e11c5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13252
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

cpu: Fix MinorCPU executing Crypto Instructions

Crypto instruction classes added to the MinorDefaultFloatSimdFU.

Change-Id: I0cd4aa422bec74285595312a8cf01f5f425a82cd
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13251
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

arch-arm: AArch64 Crypto AES

This patch implements the AArch64 AES instructions
from the Crypto extension.

Change-Id: I9143041ec7e1c6a50dcad3f72d7d1b55d6f2d402
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13250
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

arch-arm: AArch64 Crypto SHA

This patch implements the AArch64 secure hashing instructions
from the Crypto extension.

Change-Id: I2cdfa81b994637c880f2523fe37cdc6596d05cb1
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13249
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

arch-arm: AArch32 Crypto AES

This patch implements the AArch32 AES instructions
from the Crypto extension.

Change-Id: I51e6deda748b0c26135bcfe9d0c7128f3af91f3d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Matt Horsnell <matt.horsnell@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13248
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

arch-arm: AArch32 Crypto SHA

This patch implements the AArch32 secure hashing instructions
from the Crypto extension.

Change-Id: Iaba8424ab71800228a9aff039d93f5c35ee7d8e5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13247
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

dev, arm: remove the RealViewEB platform

This is an old platform, and we haven't had official Linux kernel configs
for it in a while, so we've decided to deprecate it.

Furthermore, trying to use it fails with:

object 'RealViewEB' has no attribute 'pci_host'

and the last commit in the class happened two years ago, which indicates
that no one has been using it.

Change-Id: Icc674b00b152eb3246e05141dbaf2624cc720f21
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/12471
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

arch-arm: Mark ArmProcess method as override

Allows compilation on clang3.5+ by fixing Winconsistent-missing-override

Change-Id: Ic0ebf3869fc2d9a29fcf7cf5a6535952f41714d0
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13227
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

mem-cache: Fix FALRU hash invalidation

The block was being invalidated before the hash could erase
its entry, therefore it was using invalid values (tag was
being assigned MaxAddr and the secure bit was reset).

This change reorders the calls, so that the appropriate hash
entry is erased.

Change-Id: I161463df0f8f5220179bc68d7be12051e5390d01
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13210
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem-cache: Make checking function const in FALRU

The checking function should not be able to modify either
the head and tail pointers nor should it modify its class.

Change-Id: I2ad495f0c8c6b778d48512143e94b4c9a353f22e
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13209
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

mem-cache: Make boundaries in FALRU an STL container

Turn the dynamically allocated array of pointers "boundaries"
into a STL vector.

Change-Id: I3409898473b155f69b4c6e038eba2dffb5b09380
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13208
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

mem-cache: Fix FALRU inCachesMask initialization

inCachesMask is not being initialized, which triggers an assertion
on insertion. Fix this by implementing a default constructor for
the FALRUBlk.

Change-Id: I587cf5e0191c4587d938e6ab6036ec1b32f37793
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/13207
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

systemc: Change the default naming scheme to use sc_gen_unique_name.

The spec says the default name should just be "object", but the
Accellera implementation calls sc_gen_unique_name, and the tests
expects that.

Change-Id: Ic6922a6d9fb53f3126a9d527868fc11da5320446
Reviewed-on: https://gem5-review.googlesource.com/c/12593
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: "Fix" some error message formatting.

These changes make the output match what Accellera outputs so that the
tests will pass.

Change-Id: I1260cec35fa39586fbef39047b9da4ff3c03b3ed
Reviewed-on: https://gem5-review.googlesource.com/c/12592
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Fix a typo/bug in sc_int_base.hh.

When being turned into gem5 coding style, a pair of "!" operators were
dropped, reversing the behavior of the functions involved.

Change-Id: Ife795c22aff953c5ab592e7baa3a5e1c15e63c84
Reviewed-on: https://gem5-review.googlesource.com/c/12591
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Make some tests use cout instead of cerr to report completion.

cerr goes to simerr, but we compare simout against the golden output.

Change-Id: I9270866a92dd06a23d47c1964dacc4872030f30d
Reviewed-on: https://gem5-review.googlesource.com/c/12470
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Copy the msgType and msg parameters of sc_report.

The original strings pointed to by those parameters may go away before
the sc_report has been completely consumed. By copying them, we make
sure other consumers downstream can still access them.

Change-Id: Iab9a802b7ae3bb5aed3a2716cd92886b8d241dfa
Reviewed-on: https://gem5-review.googlesource.com/c/12469
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Ensure sc_stop during callbacks actually stops.

Make sure calling sc_stop during the appropriate callbacks will
actually skip future action by skipping later callbacks, by flushing
the scheduler before running init (so it doesn't really do anything
but record that it's in running mode now), and schedule the stop event.

Change-Id: I5edfbceda457df88d15bfcac4d97e8578205ec5b
Reviewed-on: https://gem5-review.googlesource.com/c/12468
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Implement the nonstandard at_negedge and at_posedge.

Change-Id: I7ea5cfd309db4b9883df551fd7dcec186e4f38a3
Reviewed-on: https://gem5-review.googlesource.com/c/12467
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: When stopping immediately, block new processes/updates.

When stopping immediately, we're supposed to finish the current
process but not run any other processes or go to the update phase. The
rest of the process could introduce new processes or request new
updates, so we need to make sure we block those if we're in the process
of stopping.

Change-Id: I9cc867d294cf171dfedb4b9d43fbc167c2057de8
Reviewed-on: https://gem5-review.googlesource.com/c/12466
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

systemc: Teach verify.py to ignore two types of errors.

Change-Id: I9e61a034d7f71bc9b1f28cb976ae8b17d6f37612
Reviewed-on: https://gem5-review.googlesource.com/c/12465
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>