Gabe Black [Wed, 2 Jun 2010 17:58:10 +0000 (12:58 -0500)]
ARM: Add a base class for the RFE instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:10 +0000 (12:58 -0500)]
ARM: Make sure some undefined thumb32 instructions fault.
Gabe Black [Wed, 2 Jun 2010 17:58:10 +0000 (12:58 -0500)]
ARM: Squash the low order bits of the PC when performing a regular branch.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: When changing the CPSR and branching, make sure the branch is second.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Ignore/warn when CSSELR or CCSIDR are accessed.
These registers provide information about the caches. Since we can't provide
that information, these will be harmlessly inert.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Ignore/warn access to the bpimva registers.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Ignore/warn on accesses to the dccmvac register.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Decode the enterx and leavex instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Implement the enterx and leavex instructions.
These enter and leave thumbEE mode. Currently thumbEE mode behaves exactly the
same as Thumb mode, but at least this will make it -look- like we're enter and
leaving it. The actual behavioral changes will be implemented in future
changes.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Fix the implementation of BX to work in thumbEE mode.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: When an instruction is intentionally undefined, fault on it.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Decode the thumb version of the ldrd and strd instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Explicitly keep track of the second destination for double loads/stores.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Decode the thumb32 load byte/memory hint instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Ignore/warn on accesses to icimvau.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Ignore/warn on iciallu.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Ignore/warn on ICIALLUIS.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Add support for the clidr register.
This register will always report 0 caches as implemented. It's not clear how
to find out how many there really are when dealing with an arbitrary
hierarchy.
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Decode the unimplemented data barrier CP15 accesses.
These are CP15DSB (Data Synchronization Barrier), and CP15DMB (Data Memory
Barrier).
Gabe Black [Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)]
ARM: Implement a stub of CPACR.
This register controls access to the coprocessors. This doesn't actually
implement it, it allows writes which don't turn anything off. In other words,
it allows the simulated program to ask for what it already has.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Actually write the value of sctlr in ISA.clear().
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Replace the ARM decode of CP15 MCR and MRC instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Decode the unimplemented cp15 instruction barrier.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Ignore accesses to DCCIMVAC.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Allow accesses to the software thread id registers.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Allow accesses to the contextidr register.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Warn about and ignore accesses to DCCISW.
This register is supposed to "Clean and invalidate data or unified cache line
by set/way." Since there isn't a good way to do that, we'll just ignore these
and warn about it.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Decode the thumb versions of the mcr and mrc instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Implement the mrc and mcr instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Rename the RevOp base class to something more generic.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Add a version of the Dest and Op1 operands for accessing the MiscRegs.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Implement a function to decode CP15 registers to MiscReg indices.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Decode the bfi and bfc instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Implement the bfc and bfi instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Decode the ubfx and sbfx instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Decode miscellaneous arm mode media instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Implement the ubfx and sbfx instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Add a register, immediate, immediate to register base for [su]bfx.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Decode the clz instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:08 +0000 (12:58 -0500)]
ARM: Implement the clz instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode the rbit instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Implement the rbit instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode the nop instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Implement nop.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode the ldrex instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Implement the ldrex instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode the usad8 and usada8 instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Implement the usad8 and usada8 instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Add a base class to support usada8.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode the sel instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Implement the sel instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Add a base class for the sel instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode pkh instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Implement the pkh instruction.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode the sign/zero extend instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Implement zero/sign extend instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Add a base class for extend and add instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Generalize the saturation instruction bases for use in other instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:07 +0000 (12:58 -0500)]
ARM: Decode the 8/16 bit signed/unsigned add/subtract half instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement the 8/16 bit signed/unsigned add/subtract half instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Fix signed most significant multiply instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Fix multiply overflow flag setting.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode the saturation instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement the saturation instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement base classes for the saturation instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode the signed add/subtract and subtract/add instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement signed add/subtract and subtract/add.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode the unsigned 8 and 16 bit add and subtract instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement the unsigned 8 bit and 16 bit vector adds and subtracts.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode the unsigned saturating instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement the unsigned saturating instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode the ssub instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement the ssub instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode the SADD8 and SADD16 instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Implement the SADD8 and SADD16 instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Support instructions that set the GE bits when they write the condition codes.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode 32 bit thumb data processing register instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:06 +0000 (12:58 -0500)]
ARM: Decode the 16 bit thumb versions of the REV* instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Decode the ARM version of the REV* instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Pull decoding of ARM pack, unpack, saturate and reverse instructions into a format.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Implement the REV* instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Add base classes suitable for the REV* instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Make LDM that loads the PC perform an interworking branch.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Decode the swp and swpb instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Implement the swp and swpb instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Decode MRS and MSR for thumb.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Replace the versions of MRS and MSR in the ARM decoder with the new ones.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Define versions of MSR and MRS outside the decoder.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Hook up the push/pop versions of stm/ldm in thumb.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Hook SVC into the thumb decoder.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Implement SVC (was SWI) outside of the decoder.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Update the stats for the new syscall behavior.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Trigger system calls from the SupervisorCall invoke method.
This simplifies the decoder slightly, and makes the system call mechanism
very slightly more realistic.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Fix multiply operations.
These fixes were provided by Ali and fix the saturation condition code and
various multiply instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Decode the scalar saturating add/subtract instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Decode the parallel add and subtract instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Implement signed saturating add and/or subtract instructions.
Gabe Black [Wed, 2 Jun 2010 17:58:05 +0000 (12:58 -0500)]
ARM: Implemented prefetch instructions/decoding (pli, pld, pldw).