Jozef Lawrynowicz [Thu, 6 Jun 2019 12:10:19 +0000 (12:10 +0000)]
MSP430: Use minimal code size library shift functions when optimizing for size
gcc/ChangeLog
2019-06-06 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/msp430.md (ashlhi3): Use the const_variant of shift
library functions only when not optimizing for size.
(ashlsi3): Likewise.
(ashrhi3): Likewise.
(ashrsi3): Likewise.
(lshrhi3): Likewise.
(lshrsi3): Likewise.
gcc/testsuite/ChangeLog
2019-06-06 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc.target/msp430/size-optimized-shifts.c: New test.
From-SVN: r271997
Andreas Krebbel [Thu, 6 Jun 2019 11:35:04 +0000 (11:35 +0000)]
re PR rtl-optimization/88751 (Performance regression reload vs lra)
Fix PR88751
This patch implements a small improvement for the heuristic in lra
which decides when it has to activate the simpler register allocation
algorithm.
gcc/ChangeLog:
2019-06-06 Andreas Krebbel <krebbel@linux.ibm.com>
PR rtl-optimization/88751
* ira.c (ira): Use the number of the actually referenced registers
when calculating the threshold.
From-SVN: r271996
Jakub Jelinek [Thu, 6 Jun 2019 09:32:07 +0000 (11:32 +0200)]
* configure: Regenerate.
From-SVN: r271994
Jozef Lawrynowicz [Thu, 6 Jun 2019 09:23:10 +0000 (09:23 +0000)]
MSP430: Emulate 16-bit shifts with rotate insn when src operand is in memory
gcc/ChangeLog
2019-06-06 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/msp430.md (ashlhi3): Force shift src operand into a
register if it is in memory, so the shift can be emulated with a rotate
instruction.
(ashrhi3): Likewise.
(lshrhi3): Likewise.
gcc/testsuite/ChangeLog
2019-06-06 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc.target/msp430/emulate-slli.c: New test.
* gcc.target/msp430/emulate-srai.c: New test.
* gcc.target/msp430/emulate-srli.c: New test.
From-SVN: r271993
Jozef Lawrynowicz [Thu, 6 Jun 2019 09:07:36 +0000 (09:07 +0000)]
MSP430: Put libgcc shift functions in their own section
2019-06-06 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/slli.S (__mspabi_slli_n): Put function in its own
section.
(__mspabi_slli): Likewise.
(__mspabi_slll_n): Likewise.
(__mspabi_slll): Likewise.
* config/msp430/srai.S (__mspabi_srai_n): Likewise.
(__mspabi_srai): Likewise.
(__mspabi_sral_n): Likewise.
(__mspabi_sral): Likewise.
* config/msp430/srli.S (__mspabi_srli_n): Likewise.
(__mspabi_srli): Likewise.
(__mspabi_srll_n): Likewise.
(__mspabi_srll): Likewise.
From-SVN: r271992
Martin Liska [Thu, 6 Jun 2019 07:55:51 +0000 (09:55 +0200)]
Simplify mult where both arguments are 0 or 1 (PR tree-optimization/87954).
2019-06-06 Martin Liska <mliska@suse.cz>
PR tree-optimization/87954
* match.pd: Simplify mult where both arguments are 0 or 1.
2019-06-06 Martin Liska <mliska@suse.cz>
PR tree-optimization/87954
* gcc.dg/pr87954.c: New test.
From-SVN: r271991
Richard Biener [Thu, 6 Jun 2019 07:32:44 +0000 (07:32 +0000)]
vr-values.c (vr_values::extract_range_from_ssa_name): Do not put equivalences on UNDEFINED ranges.
2019-06-06 Richard Biener <rguenther@suse.de>
* vr-values.c (vr_values::extract_range_from_ssa_name): Do not
put equivalences on UNDEFINED ranges.
* gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children):
Make sure to drop defs of stmts added during simplification
to VARYING.
From-SVN: r271990
Richard Biener [Thu, 6 Jun 2019 07:25:19 +0000 (07:25 +0000)]
tree-ssa-structalias.c: Include tree-cfg.h.
2019-06-06 Richard Biener <rguenther@suse.de>
* tree-ssa-structalias.c: Include tree-cfg.h.
(make_heapvar): Do not make heap vars artificial.
(find_func_aliases_for_builtin_call): Handle stack allocation
functions.
(find_func_aliases): Delay processing of simple enough returns
in non-IPA mode.
(set_uids_in_ptset): Adjust.
(find_what_var_points_to): Likewise.
(solve_constraints): Do not dump points-to sets here.
(compute_points_to_sets): Post-process return statements,
amending the escaped solution. Dump points-to sets afterwards.
(ipa_pta_execute): Dump points-to sets.
* gcc.dg/tree-ssa/alias-37.c: New testcase.
* gcc.dg/torture/
20190604-1.c: Likewise.
* gcc.dg/tree-ssa/pta-callused.c: Adjust.
From-SVN: r271989
Martin Liska [Thu, 6 Jun 2019 07:20:16 +0000 (09:20 +0200)]
Fix HTML headers and titles for 'Installing GCC' pages (PR web/87933).
2019-06-06 Martin Liska <mliska@suse.cz>
PR web/87933
* doc/install.texi: Fix HTML headers and
titles for 'Installing GCC' pages.
From-SVN: r271988
Martin Liska [Thu, 6 Jun 2019 07:19:58 +0000 (09:19 +0200)]
IPA ICF: enhance dump output
2019-06-06 Martin Liska <mliska@suse.cz>
* ipa-icf-gimple.h (dump_message_1): Remove.
(dump_message): Likewise.
(return_false_with_message_1): Print also file.
(return_false_with_msg): Likewise.
(return_with_result): Likewise.
(return_with_debug): Likewise.
* ipa-icf.c (sem_function::equals_private): Remove call
to dump_message.
From-SVN: r271987
Claudiu Zissulescu [Thu, 6 Jun 2019 07:19:36 +0000 (09:19 +0200)]
[ARC] Update tmac tests.
Fix order of dg-directives such that tests are executed only when
there is no command line cpu option given.
gcc/testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/tmac-1.c: Reoreder dg-directives.
* gcc.target/arc/tmac-2.c: Likewise.
From-SVN: r271986
Martin Sebor [Thu, 6 Jun 2019 02:53:01 +0000 (02:53 +0000)]
PR c/90737 - [8/9/10 Regression] inconsistent address of a local converted to intptr_t between callee and caller
gcc/c/ChangeLog:
PR c/90737
* c-typeck.c (c_finish_return): Only consider functions returning
pointers as candidates for -Wreturn-local-addr.
gcc/cp/ChangeLog:
PR c/90737
* typeck.c (maybe_warn_about_returning_address_of_local): Only
consider functions returning pointers as candidates for
-Wreturn-local-addr.
gcc/testsuite/ChangeLog:
PR c/90737
* c-c++-common/Wreturn-local-addr.c: New test.
* g++.dg/warn/Wreturn-local-addr-6.C: New test.
From-SVN: r271985
Hongtao Liu [Thu, 6 Jun 2019 01:14:04 +0000 (01:14 +0000)]
sse.md (define_mode_suffix vecmemsuffix): New.
gcc/
2019-06-05 Hongtao Liu <hongtao.liu@intel.com>
* config/i386/sse.md (define_mode_suffix vecmemsuffix): New.
(define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Enable
memory operand for it.
(define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>"): Ditto.
gcc/testsuite
2019-06-05 Hongtao Liu <hongtao.liu@intel.com>
* gcc.target/i386/avx512dq-vfpclasspd-1.c: Adjust scan assember
for {x,y,z} suffix.
* gcc.target/i386/avx512dq-vfpclassps-1.c: Ditto.
From-SVN: r271984
Ian Lance Taylor [Thu, 6 Jun 2019 00:44:01 +0000 (00:44 +0000)]
compiler: make use of specialized fast map routines
In the runtime there are specialized fast map routines for
certain kep types. This CL lets the compiler make use of these
functions, instead of always using the generic ones.
As we now generate multiple versions of map delete calls, to make
things easier we delay the expansion of the built-in delete
function to flatten phase.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/180858
From-SVN: r271983
GCC Administrator [Thu, 6 Jun 2019 00:16:21 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r271982
Yoshinori Sato [Wed, 5 Jun 2019 23:20:27 +0000 (08:20 +0900)]
config.host (rx-*-linux*): Add t-fdpbit to tmake_file Add appropriate tm_file clause as well.
* config.host (rx-*-linux*): Add t-fdpbit to tmake_file
Add appropriate tm_file clause as well.
* config/rx/t-rx (HOST_LIBGCC2_CFLAGS): Remove.
From-SVN: r271978
James Clarke [Wed, 5 Jun 2019 22:27:37 +0000 (22:27 +0000)]
crtbegin.S (__dso_handle): Put in .sdata/.sbss rather than .data/.bss so it can be accessed via...
* config/ia64/crtbegin.S (__dso_handle): Put in .sdata/.sbss
rather than .data/.bss so it can be accessed via gp-relative
addressing.
From-SVN: r271977
Ian Lance Taylor [Wed, 5 Jun 2019 21:05:38 +0000 (21:05 +0000)]
compiler: inline call expressions and function references
Scan inlinable methods for references to global variables and
functions (forgot to do that earlier).
Track all packages mentioned by exports (that should have been done
earlier too).
Record assembler name in export data, so that we can inline calls to
non-Go functions. Modify gccgoimporter code to skip assembler name.
This increases the number of inlinable functions in the standard
library from 215 to 439.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/180677
From-SVN: r271976
Martin Sebor [Wed, 5 Jun 2019 20:32:24 +0000 (20:32 +0000)]
gcc_diag-11.c: Skip until -Wformat-diag has been committed.
gcc/testsuite/ChangeLog:
* gcc.dg/format/gcc_diag-11.c: Skip until -Wformat-diag has
been committed.
From-SVN: r271975
Paolo Carlini [Wed, 5 Jun 2019 20:07:01 +0000 (20:07 +0000)]
decl.c (smallest_type_location): New.
/cp
2019-06-05 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (smallest_type_location): New.
(check_special_function_return_type): Use it.
(grokdeclarator): Lkewise.
/testsuite
2019-06-05 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/diagnostic/return-type-invalid-1.C: New.
* g++.old-deja/g++.brendan/crash16.C: Adjust.
* g++.old-deja/g++.law/ctors5.C: Likewise.
/cp
2019-06-05 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (grokdeclarator): Use locations[ds_friend]
in one place.
/testsuite
2019-06-05 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/other/friend4.C: Test locations too.
* g++.dg/other/friend5.C: Likewise.
* g++.dg/other/friend7.C: Likewise.
From-SVN: r271974
Martin Sebor [Wed, 5 Jun 2019 18:30:48 +0000 (18:30 +0000)]
c-decl.c (start_decl): Adjust quoting and hyphenation in diagnostics.
gcc/c/ChangeLog:
* c-decl.c (start_decl): Adjust quoting and hyphenation
in diagnostics.
(finish_decl): Same.
(finish_enum): Same.
(start_function): Same.
(declspecs_add_type): Same.
* c-parser.c (warn_for_abs): Same.
* c-typeck.c (build_binary_op): Same.
gcc/c-family/ChangeLog:
* c-attribs.c (handle_mode_attribute): Adjust quoting and hyphenation.
(handle_alias_ifunc_attribute): Same.
(handle_copy_attribute): Same.
(handle_weakref_attribute): Same.
(handle_nonnull_attribute): Same.
* c-warn.c (warn_for_sign_compare): Same.
(warn_for_restrict): Same.
* c.opt: Same.
gcc/cp/ChangeLog:
* call.c (build_conditional_expr_1): Adjust quoting and hyphenation.
(convert_like_real): Same.
(convert_arg_to_ellipsis): Same.
* constexpr.c (diag_array_subscript): Same.
* constraint.cc (diagnose_trait_expression): Same.
* cvt.c (ocp_convert): Same.
* decl.c (start_decl): Same.
(check_for_uninitialized_const_var): Same.
(grokfndecl): Same.
(check_special_function_return_type): Same.
(finish_enum_value_list): Same.
(start_preparsed_function): Same.
* parser.c (cp_parser_decl_specifier_seq): Same.
* typeck.c (cp_build_binary_op): Same.
(build_static_cast_1): Same.
gcc/lto/ChangeLog:
* lto-common.c (lto_file_finalize): Adjust quoting and hyphenation.
gcc/objc/ChangeLog:
* objc-act.c (objc_build_setter_call): Adjust quoting and hyphenation.
* objc-encoding.c (encode_gnu_bitfield): Same.
gcc/ChangeLog:
* config/i386/i386-features.c (ix86_get_function_versions_dispatcher):
Adjust quoting and hyphenation.
* convert.c (convert_to_real_1): Same.
* gcc.c (driver_wrong_lang_callback): Same.
(driver::handle_unrecognized_options): Same.
* gimple-ssa-nonnull-compare.c (do_warn_nonnull_compare): Same.
* opts-common.c (cmdline_handle_error): Same.
(read_cmdline_option): Same.
* opts-global.c (complain_wrong_lang): Same.
(print_ignored_options): Same.
(handle_common_deferred_options): Same.
* pretty-print.h: Same.
* print-rtl.c (debug_bb_n_slim): Same.
* sched-rgn.c (make_pass_sched_fusion): Same.
* tree-cfg.c (verify_gimple_assign_unary): Same.
(verify_gimple_label): Same.
* tree-ssa-operands.c (verify_ssa_operands): Same.
* varasm.c (do_assemble_alias): Same.
(assemble_alias): Same.
From-SVN: r271971
Richard Henderson [Wed, 5 Jun 2019 18:16:18 +0000 (11:16 -0700)]
alpha.c (direct_return): Move down after struct machine_function definition...
* config/alpha/alpha.c (direct_return): Move down after
struct machine_function definition; use saved frame_size;
return bool.
(struct machine_function): Add sa_mask, sa_size, frame_size.
(alpha_sa_mask, alpha_sa_size, compute_frame_size): Merge into ...
(alpha_compute_frame_layout): ... new function.
(TARGET_COMPUTE_FRAME_LAYOUT): New.
(alpha_initial_elimination_offset): Use saved sa_size.
(alpha_vms_initial_elimination_offset): Likewise.
(alpha_vms_can_eliminate): Remove alpha_sa_size call.
(alpha_expand_prologue): Use saved frame data. Merge integer
and fp register save loops.
(alpha_expand_epilogue): Likewise.
(alpha_start_function): Use saved frame data.
* config/alpha/alpha-protos.h (direct_return): Update.
(alpha_sa_size): Remove.
From-SVN: r271970
Nina Dinka Ranns [Wed, 5 Jun 2019 18:12:53 +0000 (14:12 -0400)]
ChangeLog for PR c++/63149
From-SVN: r271969
Nina Dinka Ranns [Wed, 5 Jun 2019 18:11:20 +0000 (14:11 -0400)]
PR c++/63149 - wrong auto deduction from braced-init-list
2019-06-04 Nina Dinka Ranns <dinka.ranns@gmail.com>
gcc/cp/
* pt.c (listify_autos): Use non cv qualified auto_node in
std::initializer_list<auto>.
testsuite/
* g++.dg/cpp0x/initlist-deduce2.C: New test.
From-SVN: r271968
David Edelsohn [Wed, 5 Jun 2019 16:45:57 +0000 (16:45 +0000)]
aix-unwind.h (LR_REGNO): Rename to R_LR.
* config/rs6000/aix-unwind.h (LR_REGNO): Rename to R_LR.
(CR2_REGNO): Rename to R_CR2.
(XER_REGNO): Rename to R_XER.
(FIRST_ALTIVEC_REGNO): Rename to R_FIRST_ALTIVEC.
(VRSAVE_REGNO): Rename to R_VRSAVE.
(VSCR_REGNO): R_VSCR.
From-SVN: r271967
Segher Boessenkool [Wed, 5 Jun 2019 16:21:07 +0000 (18:21 +0200)]
rs6000: Fix new testcase
At least with -m32 you need -maltivec if you #include <altivec.h>.
gcc/testsuite/
* g++.target/powerpc/undef-bool-3.C: Add -maltivec to dg-options.
From-SVN: r271966
Martin Sebor [Wed, 5 Jun 2019 14:24:03 +0000 (14:24 +0000)]
c-pragma.c (handle_pragma_weak): Adjust quoting in a diagnostic.
gcc/c-family/ChangeLog:
* c-pragma.c (handle_pragma_weak): Adjust quoting in a diagnostic.
* c.opt (-Wformat-diag): Remove a spurious period.
gcc/testsuite/ChangeLog:
* gcc.dg/weak/weak-19.c: New test.
From-SVN: r271965
Eric Botcazou [Wed, 5 Jun 2019 14:14:40 +0000 (14:14 +0000)]
fold-const.c (extract_muldiv_1): Do not distribute a multiplication by a power-of-two value.
* fold-const.c (extract_muldiv_1) <PLUS_EXPR>: Do not distribute a
multiplication by a power-of-two value.
(fold_plusminus_mult_expr): Use pow2p_hwi to spot a power-of-two value
and turn the modulo operation into a masking operation.
From-SVN: r271963
Sam Tebbs [Wed, 5 Jun 2019 11:06:56 +0000 (11:06 +0000)]
[PATCH][GCC][AARCH64] Add tests for pointer authentication B-key
gcc/testsuite/ChangeLog
* gcc.target/aarch64/return_address_sign_b_1.c: New file.
* gcc.target/aarch64/return_address_sign_b_2.c: New file.
* gcc.target/aarch64/return_address_sign_b_3.c: New file.
* gcc.target/aarch64/return_address_sign_builtin.c: New file.
* g++.target/aarch64/return_address_sign_ab_exception.C: New file.
* g++.target/aarch64/return_address_sign_b_exception.C: New file.
From-SVN: r271954
Jakub Jelinek [Wed, 5 Jun 2019 09:41:13 +0000 (11:41 +0200)]
re PR debug/90733 (ICE in simplify_subreg, at simplify-rtx.c:6440)
PR debug/90733
* var-tracking.c (vt_expand_loc_callback): Don't create raw subregs
with VOIDmode inner operands.
* gcc.dg/pr90733.c: New test.
From-SVN: r271952
Richard Biener [Wed, 5 Jun 2019 08:26:36 +0000 (08:26 +0000)]
re PR middle-end/90726 (exponential behavior on SCEV results everywhere)
2019-06-05 Richard Biener <rguenther@suse.de>
PR middle-end/90726
* tree-ssa-loop-niter.c (expand_simple_operations): Do not
turn an expression graph into a tree.
* gcc.dg/pr90726.c: Enable IVOPTs.
From-SVN: r271950
Jakub Jelinek [Wed, 5 Jun 2019 07:52:23 +0000 (09:52 +0200)]
omp-expand.c (struct omp_region): Add has_lastprivate_conditional member.
* omp-expand.c (struct omp_region): Add has_lastprivate_conditional
member.
(expand_parallel_call): If region->inner->has_lastprivate_conditional,
treat it like explicit monotonic schedule modifier.
(expand_omp_for): Initialize has_lastprivate_conditional.
If fd.lastprivate_conditional != 0, treat it like explicit monotonic
schedule modifier.
From-SVN: r271949
Jakub Jelinek [Wed, 5 Jun 2019 07:37:40 +0000 (09:37 +0200)]
omp-low.c (lower_rec_input_clauses): For lastprivate conditional references...
* omp-low.c (lower_rec_input_clauses): For lastprivate conditional
references, lookup in in hash map MEM_REF operand instead of the
MEM_REF itself.
(lower_omp_1): When looking for lastprivate conditional assignments,
handle MEM_REFs with REFERENCE_TYPE operands.
* testsuite/libgomp.c++/lastprivate-conditional-1.C: New test.
* testsuite/libgomp.c++/lastprivate-conditional-2.C: New test.
From-SVN: r271948
Jakub Jelinek [Wed, 5 Jun 2019 07:36:30 +0000 (09:36 +0200)]
omp-low.c (lower_rec_input_clauses): Force max_vf if is_simd and on privatization clauses OMP_CLAUSE_DECL is...
* omp-low.c (lower_rec_input_clauses): Force max_vf if is_simd and
on privatization clauses OMP_CLAUSE_DECL is privatized by reference
and references a VLA. Handle references to non-VLAs if is_simd
all privatization clauses like reductions.
(lower_rec_input_clauses) <case do_private, case do_firstprivate>:
If omp_is_reference, use always omp simd arrays and set
DECL_VALUE_EXPR in that case, if lower_rec_simd_input_clauses
fails, emit reference initialization.
* g++.dg/vect/simd-1.cc: New test.
From-SVN: r271947
Hongtao Liu [Wed, 5 Jun 2019 06:04:22 +0000 (06:04 +0000)]
re PR target/89803 (Missing AVX512 intrinsics)
gcc/
2019-06-05 Hongtao Liu <hongtao.liu@intel.com>
PR target/89803
* config/i386/avx512dqintrin.h (_mm_mask_fpclass_ss_mask,
_mm_mask_fpclass_sd_mask): New intrinsics.
(_mm_fpclass_ss_mask, _mm_fpclass_sd_mask): Modified, use new builtins.
* config/i386/i386-builtin.def
(__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask):
New builtins.
(__builtin_ia32_fpclassss, __builtin_ia32_fpclasssd): Deleted.
* config/i386/i386-builtin-types.def (DEF_FUNCTION_TYPE (QI, V2DF, INT),
DEF_FUNCTION_TYPE (QI, V4SF, INT)): Deleted.
* config/i386/i386-expand.c (case QI_FTYPE_V4SF_INT,
case QI_FTYPE_V2SF_INT): Ditto.
* config/i386/sse.md
(define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>):
Extended to insnstructions with mask operands.
gcc/testsuite
2019-06-05 Hongtao Liu <hongtao.liu@intel.com>
PR target/89803
* gcc.target/i386/avx-1.c (__builtin_ia32_fpclasssss,
__builtin_ia32_fpclasssd): Removed.
(__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): Define.
* gcc.target/i386/sse-13.c (__builtin_ia32_fpclasssss,
__builtin_ia32_fpclasssd): Removed.
(__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): Define.
* gcc.target/i386/sse-23.c (__builtin_ia32_fpclasssss,
__builtin_ia32_fpclasssd): Removed.
(__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): Define.
* gcc.target/i386/avx512dq-vfpclassss-2.c: New.
* gcc.target/i386/avx512dq-vfpclasssd-2.c: New.
* gcc.target/i386/avx512dq-vfpclassss-1.c (avx512f_test):
Add test for _mm_mask_fpclass_ss_mask.
* gcc.target/i386/avx512dq-vfpclasssd-1.c (avx512f_test):
Add test for _mm_mask_fpclass_sd_mask.
From-SVN: r271946
Ian Lance Taylor [Wed, 5 Jun 2019 00:18:17 +0000 (00:18 +0000)]
compiler: statically allocate constant interface data
When converting a constant to interface, such as interface{}(42)
or interface{}("hello"), if the interface escapes, we currently
generate a heap allocation to hold the constant value.
This CL changes it to generate a static allocation instead, as
the gc compiler does. This reduces allocations in such cases.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/180277
From-SVN: r271945
GCC Administrator [Wed, 5 Jun 2019 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r271944
Segher Boessenkool [Tue, 4 Jun 2019 23:38:35 +0000 (01:38 +0200)]
rs6000: Update direct-move* testcases
This fixes some testcases that the last fifteen or so patches broke.
In all these cases we no longer need to set VSX_REG_ATTR: the default
value of "wa" is correct.
gcc/testsuite/
* gcc.target/powerpc/direct-move-double1.c (VSX_REG_ATTR): Delete.
* gcc.target/powerpc/direct-move-double2.c: Ditto.
* gcc.target/powerpc/direct-move-float1.c: Ditto.
* gcc.target/powerpc/direct-move-float2.c: Ditto.
* gcc.target/powerpc/direct-move-vint1.c: Ditto.
* gcc.target/powerpc/direct-move-vint2.c: Ditto.
From-SVN: r271940
Segher Boessenkool [Tue, 4 Jun 2019 23:37:38 +0000 (01:37 +0200)]
rs6000: Remove wp and wq
wp becomes wa with isa p9tf, and wq is replaced by wa with isa p9kf.
To manage to do that, there is the new mode attribute VSisa.
* config/rs6000/constraints.md (define_register_constraint "wp"):
Delete.
(define_register_constraint "wq"): Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wp and RS6000_CONSTRAINT_wq.
* config/rs6000/vsx.md (define_mode_attr VSr3): Delete.
(define_mode_attr VSa): Delete.
(define_mode_attr VSisa): New.
(rest of file): Adjust.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271939
Segher Boessenkool [Tue, 4 Jun 2019 23:36:49 +0000 (01:36 +0200)]
rs6000: Add p9kf and p9tf isa values
This adds "p9kf" and "p9tf" isa values, to be used for instruction
alternatives where KFmode resp. TFmode is used.
* config/rs6000/rs6000.md (define_attr "isa"): Add p9kf and p9tf.
(define_attr "enabled"): Handle those new isa values.
From-SVN: r271938
Segher Boessenkool [Tue, 4 Jun 2019 23:36:01 +0000 (01:36 +0200)]
rs6000: More simplification
A whole bunch of mode attributes are used only once. Things are
easier to read if we just expand those patterns. It's shorter, too.
* config/rs6000/vsx.md (define_mode_attr VSr4): Delete.
(define_mode_attr VSr5): Delete.
(define_mode_attr VStype_sqrt): Delete.
(define_mode_iterator VSX_SPDP): Delete.
(define_mode_attr VS_spdp_res): Delete.
(define_mode_attr VS_spdp_insn): Delete.
(define_mode_attr VS_spdp_type): Delete.
(*vsx_sqrt<mode>2): Adjust.
(vsx_<VS_spdp_insn>): Delete, split to...
(vsx_xscvdpsp): ... this. New. And...
(vsx_xvcvspdp): ... this. New. And...
(vsx_xvcvdpsp): ... this. New.
From-SVN: r271937
Segher Boessenkool [Tue, 4 Jun 2019 23:35:13 +0000 (01:35 +0200)]
rs6000: <VSs> -> <sd>p
We don't need the <VSs> mode attribute, if we make <sd> work for V4SF
and V2DF just like for SF and DF.
* config/rs6000/rs6000.md (define_mode_attr sd): Add values for V4SF
and V2DF.
* config/rs6000/vsx.md (define_mode_attr VSs): Delete.
(rest of file): Adjust.
From-SVN: r271936
Segher Boessenkool [Tue, 4 Jun 2019 23:34:21 +0000 (01:34 +0200)]
rs6000: ww->wa in testsuite
I should have factored this series better. Oh well. Near the end,
let's call it loose ends.
gcc/testsuite/
* gcc.target/powerpc/direct-move-float1.c: Use "wa" instead of "ww"
constraint.
From-SVN: r271935
Segher Boessenkool [Tue, 4 Jun 2019 23:33:18 +0000 (01:33 +0200)]
rs6000: VSa->wa for some more cases
* config/rs6000/vsx.md (vsx_<VS_spdp_insn>): Use wa instead of <VSa>.
(vsx_extract_<mode>_var): Ditto.
From-SVN: r271934
Segher Boessenkool [Tue, 4 Jun 2019 23:32:21 +0000 (01:32 +0200)]
rs6000: Simplify <VSa> for VSX_TI
When used in VSX_TI, <VSa> is always just "wa".
* config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_TI
with just "wa".
From-SVN: r271933
Segher Boessenkool [Tue, 4 Jun 2019 23:31:32 +0000 (01:31 +0200)]
rs6000: ww -> wa
"ww" can always be "wa".
* config/rs6000/constraints.md (define_register_constraint "ww"):
Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_ww.
* config/rs6000/rs6000.md: Adjust.
* config/rs6000/vsx.md: Adjust.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271932
Segher Boessenkool [Tue, 4 Jun 2019 23:30:43 +0000 (01:30 +0200)]
rs6000: Remove Ftrad, Fvsx, Fs; add s and sd
This removes the <Ftrad>, <Fvsx>, and <Fs> mode attributes, and creates
new <sd> and <s> mode attributes instead. <sd> is either "s" or "d",
depending on whether the mode is single-precision or double-precision
floating point; and <s> is either "s" or nothing.
* config/rs6000/rs6000.md (SFDF, SFDF2): Adjust comments.
(define_mode_attr sd): New.
(define_mode_attr s): New.
(define_mode_attr Ftrad): Delete.
(define_mode_attr Fvsx): Delete.
(define_mode_attr Fs): Delete.
(rest of file): Use the new mode attributes.
* config.rs6000/vsx.md: Use the new mode attributes.
From-SVN: r271931
Segher Boessenkool [Tue, 4 Jun 2019 23:29:31 +0000 (01:29 +0200)]
rs6000: Simplify <VSa> for VSX_W
When used in VSX_W, <VSa> is always just "wa".
* config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_W
with just "wa".
From-SVN: r271930
Segher Boessenkool [Tue, 4 Jun 2019 23:27:57 +0000 (01:27 +0200)]
rs6000: Simplify VS[ra]* for VSX_[BDF]
When used in VSX_B, VSX_D, or VSX_F, both <VSr> and <VSa> are always
just "wa" now. Similarly <VSr2> and <VSr3>. The former of those is
always "wa", so we can remove the mode attribute completely.
* config/rs6000/vsx.md (define_mode_attr VSr2): Delete.
(rest of file): Replace all <VSa>, <VSr>, <VSr2>, and <VSr3> that are
used with VSX_B, VSX_D, or VSX_F, with just "wa".
From-SVN: r271929
Paolo Carlini [Tue, 4 Jun 2019 23:10:56 +0000 (23:10 +0000)]
decl.c (grokdeclarator): Use declarator->id_loc in two additional places.
/cp
2019-06-04 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (grokdeclarator): Use declarator->id_loc in two
additional places.
/testsuite
2019-06-04 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/concepts/pr60573.C: Test locations too.
* g++.dg/cpp0x/deleted13.C: Likewise.
* g++.dg/parse/error29.C: Likewise.
* g++.dg/parse/qualified4.C: Likewise.
* g++.dg/template/crash96.C Likewise.
* g++.old-deja/g++.brendan/crash22.C Likewise.
* g++.old-deja/g++.brendan/crash23.C Likewise.
* g++.old-deja/g++.law/visibility10.C Likewise.
* g++.old-deja/g++.other/decl5.C: Likewise.
From-SVN: r271928
Bill Schmidt [Tue, 4 Jun 2019 21:52:32 +0000 (21:52 +0000)]
re PR target/78263 (Compile failure with AltiVec library on PPC64le and -std=c++11 flag)
[gcc]
2019-06-04 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/78263
* config/rs6000/altivec.h: Don't #define vector, pixel, bool for
C++ with strict ANSI requirements.
[gcc/testsuite]
2019-06-04 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/78263
* g++.target/powerpc: New directory.
* g++.target/powerpc/powerpc.exp: New test driver.
* g++.target/powerpc/undef-bool-3.C: New.
From-SVN: r271927
Marc Glisse [Tue, 4 Jun 2019 20:39:32 +0000 (22:39 +0200)]
Simplify loop size when step=1
2019-06-04 Marc Glisse <marc.glisse@inria.fr>
* tree-ssa-loop-niter.c (number_of_iterations_ne): Skip
computations when step is 1.
From-SVN: r271926
Segher Boessenkool [Tue, 4 Jun 2019 16:51:53 +0000 (18:51 +0200)]
rs6000: wf -> wa
"wf" is just "wa".
* config/rs6000/constraints.md (define_register_constraint "wf"):
Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wf.
* config/rs6000/rs6000.md: Adjust.
* config/rs6000/vsx.md: Adjust.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271921
Andrew Pinski [Tue, 4 Jun 2019 16:34:31 +0000 (16:34 +0000)]
AARCH64: ILP32: Fix aarch64_asan_shadow_offset
aarch64_asan_shadow_offset is using the wrong
offset for ILP32. Change it to be a decent one.
ChangeLog:
* config/aarch64/aarch64.c (aarch64_asan_shadow_offset):
Fix ILP32 value.
From-SVN: r271920
Segher Boessenkool [Tue, 4 Jun 2019 16:32:25 +0000 (18:32 +0200)]
rs6000: wd -> wa
"wd" is just "wa".
* config/rs6000/constraints.md (define_register_constraint "wd"):
Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wd.
* config/rs6000/rs6000.md: Adjust.
* config/rs6000/vsx.md: Adjust.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271919
Segher Boessenkool [Tue, 4 Jun 2019 16:31:34 +0000 (18:31 +0200)]
rs6000: Delete Fv2
<Fv2> always is "wa".
* config/rs6000/rs6000.md (define_mode_attr Fv2): Delete.
(rest of file): Adjust.
From-SVN: r271918
Segher Boessenkool [Tue, 4 Jun 2019 16:30:47 +0000 (18:30 +0200)]
rs6000: Delete VS_64reg
<VS_64reg> now always is "wa". Make that simplification.
* config/rs6000/vsx.md (define_mode_attr VS_64reg): Delete.
(*vsx_extract_<P:mode>_<VSX_D:mode>_load): Adjust.
(vsx_splat_<mode>_reg): Adjust.
From-SVN: r271917
Segher Boessenkool [Tue, 4 Jun 2019 16:29:33 +0000 (18:29 +0200)]
rs6000: ws -> wa
"ws" is just "wa".
* config/rs6000/constraints.md (define_register_constraint "ws"):
Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_ws.
* config/rs6000/rs6000.md: Adjust.
* config/rs6000/vsx.md: Adjust.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271916
Segher Boessenkool [Tue, 4 Jun 2019 16:28:46 +0000 (18:28 +0200)]
rs6000: wv -> v+p7v
"wv" is "v", but only if VSX is enabled (otherwise it's NO_REGS). So
this patch sets "isa" "p7v" to all alternatives that used "wv" before
(and that do not already need a later ISA), and changes the constraint.
* config/rs6000/constraints.md (define_register_constraint "wv"):
Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wv.
* config/rs6000/rs6000.md: Adjust.
* config/rs6000/vsx.md: Adjust.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271915
Segher Boessenkool [Tue, 4 Jun 2019 16:27:45 +0000 (18:27 +0200)]
rs6000: wi->wa, wt->wa
"wi" and "wt" mean just the same as "wa" these days. Change them to
the simpler name.
* config/rs6000/constraints.md (define_register_constraint "wi"):
Delete.
(define_register_constraint "wt"): Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wi and RS6000_CONSTRAINT_wt.
* config/rs6000/rs6000.md: Adjust.
* config/rs6000/vsx.md: Adjust.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271914
Szabolcs Nagy [Tue, 4 Jun 2019 16:16:52 +0000 (16:16 +0000)]
aarch64: fix asm visibility for extern symbols
Commit r271869 broke visibility declarations in asm for extern symbols, because
the new ASM_OUTPUT_EXTERNAL hook failed to call the default hook for elf.
gcc/ChangeLog:
* config/aarch64/aarch64-protos.h (aarch64_asm_output_external): Remove
const.
* config/aarch64/aarch64.c (aarch64_asm_output_external): Call
default_elf_asm_output_external.
From-SVN: r271913
Nathan Sidwell [Tue, 4 Jun 2019 15:17:29 +0000 (15:17 +0000)]
[C++ PATCH] structure tag lookup
https://gcc.gnu.org/ml/gcc-patches/2019-06/msg00179.html
* name-lookup.c (lookup_type_scope_1): Reimplement, handle local
and namespace scopes separately.
From-SVN: r271912
Harald van Dijk [Tue, 4 Jun 2019 14:48:38 +0000 (16:48 +0200)]
PR c++/60531 - Wrong error about unresolved overloaded function
For PR60531, GCC wrongly rejects function templates with explicitly
specified template arguments as overloaded. They are resolved by
resolve_nondeduced_context, which is normally called by
cp_default_conversion through decay_conversion, but the latter have
extra effects making them unusable here. Calling the former directly
does work.
* typeck.c (cp_build_binary_op): See if overload can be resolved.
(cp_build_unary_op): Ditto.
* g++.dg/template/operator15.C: New test.
From-SVN: r271910
Jason Merrill [Tue, 4 Jun 2019 14:47:40 +0000 (10:47 -0400)]
Reduce accumulated garbage in constexpr evaluation.
We want to evaluate the arguments to a call before looking into the cache so
that we have constant values, but if we then find the call in the cache we
end up with a TREE_LIST that we don't end up using; in highly recursive
constexpr evaluation this ends up being a large proportion of the garbage
generated.
The cxx_eval_increment_expression hunk is less important, but it's an easy
tweak; we only use the MODIFY_EXPR to evaluate it, so after that it's
garbage.
* constexpr.c (cxx_eval_call_expression): ggc_free any bindings we
don't save.
(cxx_eval_increment_expression): ggc_free the MODIFY_EXPR after
evaluating it.
From-SVN: r271909
Martin Liska [Tue, 4 Jun 2019 14:39:47 +0000 (16:39 +0200)]
Remove dead code in IPA ICF.
2019-06-04 Martin Liska <mliska@suse.cz>
* ipa-icf.c (INCLUDE_LIST): Remove.
(sem_item_optimizer::execute): Remove call to init_wpa.
* ipa-icf.h (init_wpa): Remove.
From-SVN: r271908
Jakub Jelinek [Tue, 4 Jun 2019 12:49:03 +0000 (14:49 +0200)]
gimplify.c (gimplify_scan_omp_clauses): Don't sorry_at on lastprivate conditional on combined for simd.
* gimplify.c (gimplify_scan_omp_clauses): Don't sorry_at on lastprivate
conditional on combined for simd.
* omp-low.c (struct omp_context): Add combined_into_simd_safelen0
member.
(lower_rec_input_clauses): For gimple_omp_for_combined_into_p max_vf 1
constructs, don't remove lastprivate_conditional_map, but instead set
ctx->combined_into_simd_safelen0 and adjust hash_map, so that it points
to parent construct temporaries.
(lower_lastprivate_clauses): Handle ctx->combined_into_simd_safelen0
like !ctx->lastprivate_conditional_map.
(lower_omp_1) <case GIMPLE_ASSIGN>: If up->combined_into_simd_safelen0,
use up->outer context instead of up.
* omp-expand.c (expand_omp_for_generic): Perform cond_var bump even if
gimple_omp_for_combined_p.
(expand_omp_for_static_nochunk): Likewise.
(expand_omp_for_static_chunk): Add forgotten cond_var bump that was
probably moved over into expand_omp_for_generic rather than being copied
there.
gcc/cp/
* cp-tree.h (CP_OMP_CLAUSE_INFO): Allow for any clauses up to _condvar_
instead of only up to linear.
gcc/testsuite/
* c-c++-common/gomp/lastprivate-conditional-2.c (foo): Don't expect
a sorry_at on any of the clauses.
libgomp/
* testsuite/libgomp.c-c++-common/lastprivate-conditional-7.c: New test.
* testsuite/libgomp.c-c++-common/lastprivate-conditional-8.c: New test.
* testsuite/libgomp.c-c++-common/lastprivate-conditional-9.c: New test.
* testsuite/libgomp.c-c++-common/lastprivate-conditional-10.c: New test.
From-SVN: r271907
Martin Liska [Tue, 4 Jun 2019 09:39:05 +0000 (11:39 +0200)]
Fix typo in tests.
2019-06-04 Martin Liska <mliska@suse.cz>
* value-prof.c (dump_histogram_value): Fix typo.
(gimple_mod_subtract_transform): Likewise.
From-SVN: r271904
Richard Biener [Tue, 4 Jun 2019 09:05:10 +0000 (09:05 +0000)]
re PR middle-end/90726 (exponential behavior on SCEV results everywhere)
2019-06-04 Richard Biener <rguenther@suse.de>
PR middle-end/90726
* tree-chrec.c (chrec_contains_symbols): Add to visited.
(tree_contains_chrecs): Likewise.
(chrec_contains_symbols_defined_in_loop): Move here and avoid
exponential behaivor from ...
* tree-scalar-evolution.c (chrec_contains_symbols_defined_in_loop):
... here.
(expression_expensive_p): Avoid exponential behavior and compute
expanded size, rejecting any expansion.
* tree-ssa-loop-ivopts.c (abnormal_ssa_name_p): Remove.
(idx_contains_abnormal_ssa_name_p): Likewise.
(contains_abnormal_ssa_name_p_1): New helper for walk_tree.
(contains_abnormal_ssa_name_p): Simplify and use
walk_tree_without_duplicates.
* gcc.dg/pr90726.c: New testcase.
From-SVN: r271903
Richard Biener [Tue, 4 Jun 2019 08:09:16 +0000 (08:09 +0000)]
re PR fortran/90738 (gfortran.dg/pointer_array_10.f90 etc. FAIL)
2019-06-04 Richard Biener <rguenther@suse.de>
PR tree-optimization/90738
Revert
2019-06-03 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original
full reference tree and record in ref->ref.
(vn_reference_lookup_3): Pass in original ref to
ao_ref_init_from_vn_reference.
(vn_reference_lookup): Likewise.
* tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype.
* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
Handle non-decl bases in the original reference.
* gcc.dg/tree-ssa/alias-access-path-1.c: Scan fre1.
* gcc.dg/torture/pr90738.c: New testcase.
From-SVN: r271902
Martin Liska [Tue, 4 Jun 2019 07:53:08 +0000 (09:53 +0200)]
IPA ICF: use fibonacci heap instead of list as a worklist.
2019-06-04 Martin Liska <mliska@suse.cz>
* ipa-icf.c (sem_item_optimizer::add_item_to_class): Count
number of references.
(sem_item_optimizer::do_congruence_step):
(sem_item_optimizer::worklist_push): Dump how references
a class has.
(sem_item_optimizer::worklist_pop): Use heap.
(sem_item_optimizer::process_cong_reduction): Likewise.
* ipa-icf.h: Use fibonacci_heap insteam of std::list.
From-SVN: r271901
Martin Liska [Tue, 4 Jun 2019 07:52:51 +0000 (09:52 +0200)]
IPA ICF: rewrite references into a hash_map.
2019-06-04 Martin Liska <mliska@suse.cz>
* ipa-icf.h (struct sem_usage_pair_hash): New.
(sem_usage_pair_hash::hash): Likewise.
(sem_usage_pair_hash::equal): Likewise.
(struct sem_usage_hash): Likewise.
* ipa-icf.c (sem_item::sem_item): Initialize
referenced_by_count.
(sem_item::add_reference): Register a reference
in ref_map and not in target->usages.
(sem_item::setup): Remove initialization of
dead vectors.
(sem_item::~sem_item): Remove usage of dead vectors.
(sem_item::dump): Remove dump of references.
(sem_item_optimizer::sem_item_optimizer): Initialize
m_references.
(sem_item_optimizer::read_section): Remove useless
dump.
(sem_item_optimizer::parse_funcs_and_vars): Likewise here.
(sem_item_optimizer::build_graph): Pass m_references
to ::add_reference.
(sem_item_optimizer::verify_classes): Remove usage of dead
vectors.
(sem_item_optimizer::traverse_congruence_split): Return true
when a class is split.
(sem_item_optimizer::do_congruence_step_for_index): Use
hash_map for look up of (sem_item *, index). That brings
significant speed up.
(sem_item_optimizer::do_congruence_step): Return true
when a split is done.
(congruence_class::is_class_used): Use referenced_by_count.
2019-06-04 Martin Liska <mliska@suse.cz>
* c-c++-common/goacc/acc-icf.c: Change scanned pattern.
* gfortran.dg/goacc/pr78027.f90: Likewise.
From-SVN: r271900
GCC Administrator [Tue, 4 Jun 2019 00:16:16 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r271899
Alan Modra [Tue, 4 Jun 2019 00:13:07 +0000 (09:43 +0930)]
PR90689, ICE in extract_insn on ppc64le
PR target/90689
* config/rs6000/rs6000.c (rs6000_call_aix): Correct r271753 merge
error.
From-SVN: r271895
Ian Lance Taylor [Mon, 3 Jun 2019 23:37:04 +0000 (23:37 +0000)]
compiler, runtime, reflect: generate unique type descriptors
Currently, the compiler already generates common symbols for type
descriptors, so the type descriptors are unique. However, when a
type is created through reflection, it is not deduplicated with
compiler-generated types. As a consequence, we cannot assume type
descriptors are unique, and cannot use pointer equality to
compare them. Also, when constructing a reflect.Type, it has to
go through a canonicalization map, which introduces overhead to
reflect.TypeOf, and lock contentions in concurrent programs.
In order for the reflect package to deduplicate types with
compiler-created types, we register all the compiler-created type
descriptors at startup time. The reflect package, when it needs
to create a type, looks up the registry of compiler-created types
before creates a new one. There is no lock contention since the
registry is read-only after initialization.
This lets us get rid of the canonicalization map, and also makes
it possible to compare type descriptors with pointer equality.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179598
From-SVN: r271894
Paolo Carlini [Mon, 3 Jun 2019 23:17:09 +0000 (23:17 +0000)]
parser.c (cp_parser_unqualified_id): Use build_min_nt_loc in five places.
2019-06-03 Paolo Carlini <paolo.carlini@oracle.com>
* parser.c (cp_parser_unqualified_id): Use build_min_nt_loc in
five places.
From-SVN: r271893
Ian Lance Taylor [Mon, 3 Jun 2019 23:07:54 +0000 (23:07 +0000)]
libgo: delay applying profile stack-frame skip until fixup
When the runtime collects a stack trace to associate it with some
profiling event (mem alloc, mutex, etc) there is a skip count passed
to runtime.Callers (or equivalent) to skip some known count of frames
in order to get to the "interesting" frame corresponding to the
profile event. Now that the profiling mechanism uses lazy fixup (when
removing compiler artifacts like thunks, morestack calls etc), we also
need to move the frame skipping logic after the fixup, so as to insure
that the skip count isn't thrown off by these artifacts.
Fixes golang/go#32290.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179740
From-SVN: r271892
Ian Lance Taylor [Mon, 3 Jun 2019 23:04:23 +0000 (23:04 +0000)]
compiler: permit inlining references to global variables
This requires tracking all references to unexported variables, so that
we can make them global symbols in the object file, and can export
them so that other compilations can see the right definition for their
own inline bodies.
This introduces a syntax for referencing names defined in other
packages: a <pNN> prefix, where NN is the package index. This will
need to be added to gccgoimporter, but I didn't do it yet since it
isn't yet possible to create an object for which gccgoimporter will
see a <pNN> prefix.
This increases the number of inlinable functions in the standard
library from 181 to 215, adding functions like context.Background.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/177920
From-SVN: r271891
Ian Lance Taylor [Mon, 3 Jun 2019 23:02:43 +0000 (23:02 +0000)]
runtime: remove unnecessary functions calling between C and Go
These functions were needed during the transition of the runtime from
C to Go, but are no longer necessary.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179879
From-SVN: r271890
Segher Boessenkool [Mon, 3 Jun 2019 22:36:24 +0000 (00:36 +0200)]
rs6000: Delete -mmfpgpr
This patch makes the -mmfpgpr option not do anything except warn that
the option is deprecated.
* config/rs6000/rs6000.h (MASK_MFPGPR): Delete.
* config/rs6000/rs6000.c (direct_move_p): Adjust.
(rs6000_secondary_reload_simple_move): Adjust.
(rs6000_opt_masks): Neuter the "mfpgpr" option.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Adjust.
* config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED): Adjust
comment.
(power6x): Adjust.
* config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Adjust.
(floatunssi<mode>2_lfiwzx): Adjust.
(fix_trunc<mode>si2_stfiwx): Adjust.
(fixuns_trunc<mode>si2_stfiwx): Adjust.
* config/rs6000/rs6000.opt (mno-mfpgpr): New.
(mfpgpr): Mark as deprecated.
* doc/extend.texi (PowerPC Function Attributes): Delete mfpgpr.
(Basic PowerPC Built-in Functions Available on ISA 2.05): Adjust.
* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mmfpgpr.
gcc/testsuite/
* gcc.target/powerpc/mmfpgpr.c: Delete.
From-SVN: r271889
Segher Boessenkool [Mon, 3 Jun 2019 22:33:11 +0000 (00:33 +0200)]
rs6000: Delete wg
The "wg" constraint is used for the floating point side on mfpgpr
instructions. Those instructions do not exist on any relevant
hardware. This patch deletes the constraint and the insns using it.
* config/rs6000/constraints.md (define_register_constraint "wg"):
Delete.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wg.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.md (*mov<mode>_softfloat32, *movdi_internal64):
Delete "wg" alternatives.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271888
Joseph Myers [Mon, 3 Jun 2019 22:21:39 +0000 (23:21 +0100)]
* sv.po: Update.
From-SVN: r271885
Jonathan Wakely [Mon, 3 Jun 2019 22:18:31 +0000 (23:18 +0100)]
Fix uses of static_assert not guarded by C++11 check
* include/bits/stl_map.h (map): Disable static assert for C++98 mode.
* include/bits/stl_multimap.h (multimap): Likewise.
From-SVN: r271884
Ian Lance Taylor [Mon, 3 Jun 2019 20:06:50 +0000 (20:06 +0000)]
runtime: fix assembly syntax
Some assembler doesn't accept ULL suffix. In fact the suffix
is not really necessary. Drop it.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/180217
From-SVN: r271883
Alan Modra [Mon, 3 Jun 2019 17:35:47 +0000 (03:05 +0930)]
bb-reorder.c (copy_bb_p): Don't overflow size calculation.
* bb-reorder.c (copy_bb_p): Don't overflow size calculation.
(get_uncond_jump_length): Assert length less than INT_MAX and
non-negative.
From-SVN: r271877
François Dumont [Mon, 3 Jun 2019 17:08:34 +0000 (17:08 +0000)]
Rename variables and cleanup comments.
2019-06-03 François Dumont <fdumont@gcc.gnu.org>
Rename variables and cleanup comments.
* include/bits/hashtable_policy.h
* include/bits/hashtable.h
From-SVN: r271876
David Edelsohn [Mon, 3 Jun 2019 14:10:47 +0000 (14:10 +0000)]
enum-1.c: Add -fno-eliminate-unused-debug-symbols on AIX.
* gcc.dg/debug/enum-1.c: Add -fno-eliminate-unused-debug-symbols
on AIX.
* g++.dg/debug/enum-1.C: Same.
From-SVN: r271873
Wilco Dijkstra [Mon, 3 Jun 2019 13:55:15 +0000 (13:55 +0000)]
Fix PR64242 - Longjmp expansion incorrect
Improve the fix for PR64242. Various optimizations can change a memory
reference into a frame access. Given there are multiple virtual frame pointers
which may be replaced by multiple hard frame pointers, there are no checks for
writes to the various frame pointers. So updates to a frame pointer tends to
generate incorrect code. Improve the previous fix to also add clobbers of
several frame pointers and add a scheduling barrier. This should work in most
cases until GCC supports a generic "don't optimize across this instruction"
feature.
Bootstrap OK. Testcase passes on AArch64 and x86-64. Inspected x86, Arm,
Thumb-1 and Thumb-2 assembler which looks correct.
gcc/
PR middle-end/64242
* builtins.c (expand_builtin_longjmp): Add frame clobbers and schedule
block.
(expand_builtin_nonlocal_goto): Likewise.
testsuite/
PR middle-end/64242
* gcc.c-torture/execute/pr64242.c: Update test.
From-SVN: r271870
Szabolcs Nagy [Mon, 3 Jun 2019 13:50:53 +0000 (13:50 +0000)]
aarch64: emit .variant_pcs for aarch64_vector_pcs symbol references
A dynamic linker with lazy binding support may need to handle vector PCS
function symbols specially, so an ELF symbol table marking was
introduced for such symbols.
Function symbol references and definitions that follow the vector PCS
are marked in the generated assembly with .variant_pcs and then the
STO_AARCH64_VARIANT_PCS st_other flag is set on the symbol in the object
file. The marking is propagated to the dynamic symbol table by the
static linker so a dynamic linker can handle such symbols specially.
For this to work, the assembler, the static linker and the dynamic
linker has to be updated on a system. Old assembler does not support
the new .variant_pcs directive, so a toolchain with old binutils won't
be able to compile code that references vector PCS symbols.
gcc/ChangeLog:
* config/aarch64/aarch64-protos.h (aarch64_asm_output_alias): Declare.
(aarch64_asm_output_external): Declare.
* config/aarch64/aarch64.c (aarch64_asm_output_variant_pcs): New.
(aarch64_declare_function_name): Call aarch64_asm_output_variant_pcs.
(aarch64_asm_output_alias): New.
(aarch64_asm_output_external): New.
* config/aarch64/aarch64.h (ASM_OUTPUT_DEF_FROM_DECLS): Define.
(ASM_OUTPUT_EXTERNAL): Define.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pcs_attribute-2.c: New test.
* gcc.target/aarch64/torture/simd-abi-4.c: Check .variant_pcs support.
* lib/target-supports.exp (check_effective_target_aarch64_variant_pcs):
New.
From-SVN: r271869
Jonathan Wakely [Mon, 3 Jun 2019 13:32:17 +0000 (14:32 +0100)]
Corrections for C++2a library status table
* doc/xml/manual/status_cxx2020.xml: Add missing row for P0920R2.
Fix bgcolor for P0340R3.
* doc/html/*: Regenerate.
From-SVN: r271868
Jonathan Wakely [Mon, 3 Jun 2019 13:23:03 +0000 (14:23 +0100)]
PR libstdc++/90686 update C++2a library status docs
PR libstdc++/90686
* doc/xml/manual/status_cxx2014.xml: Document what's missing from
<experimental/memory_resource>.
* doc/xml/manual/status_cxx2020.xml: Document status of P1285R0,
P0339R6, P0340R3, P1164R1 and P1357R1.
* doc/html/*: Regenerate.
From-SVN: r271867
Jonathan Wakely [Mon, 3 Jun 2019 13:22:59 +0000 (14:22 +0100)]
Enforce allocator::value_type consistency for containers in C++2a
In previous standards it is undefined for a container and its allocator
to have a different value_type. Libstdc++ has traditionally allowed it
as an extension, automatically rebinding the allocator to the
container's value_type. Since GCC 8.1 that extension has been disabled
for C++11 and later when __STRICT_ANSI__ is defined (i.e. for
-std=c++11, -std=c++14, -std=c++17 and -std=c++2a).
Since the acceptance of P1463R1 into the C++2a draft an incorrect
allocator::value_type now requires a diagnostic. This patch implements
that by enabling the static_assert for -std=gnu++2a as well.
* doc/xml/manual/status_cxx2020.xml: Document P1463R1 status.
* include/bits/forward_list.h [__cplusplus > 201703]: Enable
allocator::value_type assertion for C++2a.
* include/bits/hashtable.h: Likewise.
* include/bits/stl_deque.h: Likewise.
* include/bits/stl_list.h: Likewise.
* include/bits/stl_map.h: Likewise.
* include/bits/stl_multimap.h: Likewise.
* include/bits/stl_multiset.h: Likewise.
* include/bits/stl_set.h: Likewise.
* include/bits/stl_vector.h: Likewise.
* testsuite/23_containers/deque/48101-3_neg.cc: New test.
* testsuite/23_containers/forward_list/48101-3_neg.cc: New test.
* testsuite/23_containers/list/48101-3_neg.cc: New test.
* testsuite/23_containers/map/48101-3_neg.cc: New test.
* testsuite/23_containers/multimap/48101-3_neg.cc: New test.
* testsuite/23_containers/multiset/48101-3_neg.cc: New test.
* testsuite/23_containers/set/48101-3_neg.cc: New test.
* testsuite/23_containers/unordered_map/48101-3_neg.cc: New test.
* testsuite/23_containers/unordered_multimap/48101-3_neg.cc: New test.
* testsuite/23_containers/unordered_multiset/48101-3_neg.cc: New test.
* testsuite/23_containers/unordered_set/48101-3_neg.cc: New test.
* testsuite/23_containers/vector/48101-3_neg.cc: New test.
From-SVN: r271866
Aldy Hernandez [Mon, 3 Jun 2019 11:28:28 +0000 (11:28 +0000)]
tree-vrp.h (value_range_base::nonzero_p): New.
* tree-vrp.h (value_range_base::nonzero_p): New.
(value_range_base::set_nonnull): Rename to...
(value_range_base::set_nonzero): ...this.
(value_range_base::set_null): Rename to...
(value_range_base::set_zero): ...this.
(value_range::set_nonnull): Remove.
(value_range::set_null): Remove.
* tree-vrp.c (range_is_null): Remove.
(range_is_nonnull): Remove.
(extract_range_from_binary_expr): Use value_range_base::*zero_p
instead of range_is_*null.
(extract_range_from_unary_expr): Same.
(value_range_base::set_nonnull): Rename to...
(value_range_base::set_nonzero): ...this.
(value_range::set_nonnull): Remove.
(value_range_base::set_null): Rename to...
(value_range_base::set_zero): ...this.
(value_range::set_null): Remove.
(extract_range_from_binary_expr): Rename set_*null uses to
set_*zero.
(extract_range_from_unary_expr): Same.
(union_helper): Same.
* vr-values.c (get_value_range): Use set_*zero instead of
set_*null.
(vr_values::extract_range_from_binary_expr): Same.
(vr_values::extract_range_basic): Same.
From-SVN: r271865
Wilco Dijkstra [Mon, 3 Jun 2019 11:27:50 +0000 (11:27 +0000)]
Fix alignment option parser (PR90684)
Fix the alignment option parser to always allow up to 4 alignments.
Now -falign-functions=16:8:8:8 no longer reports an error.
gcc/
PR driver/90684
* opts.c (parse_and_check_align_values): Allow 4 alignment values.
M gcc/ChangeLog
M gcc/opts.c
From-SVN: r271864
Kyrylo Tkachov [Mon, 3 Jun 2019 11:20:58 +0000 (11:20 +0000)]
[AArch64] Emit TARGET_DOTPROD-specific sequence for <us>sadv16qi
Wilco pointed out that when the Dot Product instructions are available we can use them
to generate an even more efficient expansion for the [us]sadv16qi optab.
Instead of the current:
uabdl2 v0.8h, v1.16b, v2.16b
uabal v0.8h, v1.8b, v2.8b
uadalp v3.4s, v0.8h
we can generate:
(1) mov v4.16b, 1
(2) uabd v0.16b, v1.16b, v2.16b
(3) udot v3.4s, v0.16b, v4.16b
Instruction (1) can be CSEd across multiple such expansions and even hoisted outside of loops,
so when this sequence appears frequently back-to-back (like in x264_r) we essentially only have 2 instructions
per sum. Also, the UDOT instruction does the byte-to-word accumulation in one step, which allows us to use
the much simpler UABD instruction before it.
This makes it a shorter and lower-latency sequence overall for targets that support it.
* config/aarch64/iterators.md (MAX_OPP): New code attr.
* config/aarch64/aarch64-simd.md (*aarch64_<su>abd<mode>_3): Rename to...
(aarch64_<su>abd<mode>_3): ... This.
(<sur>sadv16qi): Add TARGET_DOTPROD expansion.
* gcc.target/aarch64/ssadv16qi.c: Add +nodotprod to pragma.
* gcc.target/aarch64/usadv16qi.c: Likewise.
* gcc.target/aarch64/ssadv16qi-dotprod.c: New test.
* gcc.target/aarch64/usadv16qi-dotprod.c: Likewise.
From-SVN: r271863
Prathamesh Kulkarni [Mon, 3 Jun 2019 11:09:41 +0000 (11:09 +0000)]
target-supports.exp (add_options_for_aarch64_sve): New procedure.
2019-06-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* lib/target-supports.exp (add_options_for_aarch64_sve): New procedure.
(aarch64_sve_hw_bits): Call add_options_for_aarch64_sve.
(check_effective_target_aarch64_sve_hw): Likewise.
From-SVN: r271862
Martin Liska [Mon, 3 Jun 2019 11:09:05 +0000 (13:09 +0200)]
Remove Java Trees from GENERIC manual.
2019-06-03 Martin Liska <mliska@suse.cz>
* doc/generic.texi: Remove Java Trees.
From-SVN: r271861
Richard Biener [Mon, 3 Jun 2019 10:45:38 +0000 (10:45 +0000)]
tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original full reference tree and record in ref->ref.
2019-06-03 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original
full reference tree and record in ref->ref.
(vn_reference_lookup_3): Pass in original ref to
ao_ref_init_from_vn_reference.
(vn_reference_lookup): Likewise.
* tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype.
* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
Handle non-decl bases in the original reference.
* gcc.dg/tree-ssa/alias-access-path-1.c: Scan fre1.
From-SVN: r271860
Martin Liska [Mon, 3 Jun 2019 10:42:14 +0000 (12:42 +0200)]
Fix typo in index comparison of CONSTRUCTOR.
2019-06-03 Martin Liska <mliska@suse.cz>
* fold-const.c (operand_equal_p): Fix typo as compare_tree_int
returns 0 when operands are equal.
From-SVN: r271859
Richard Biener [Mon, 3 Jun 2019 10:17:16 +0000 (10:17 +0000)]
re PR tree-optimization/90716 (gcc generates wrong debug information at -O2)
2019-06-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/90716
* tree-loop-distribution.c (destroy_loop): Process blocks in
correct order.
* gcc.dg/guality/pr90716.c: New testcase.
From-SVN: r271858
Prathamesh Kulkarni [Mon, 3 Jun 2019 09:35:37 +0000 (09:35 +0000)]
re PR target/88837 ([SVE] Poor vector construction code in VL-specific mode)
2019-06-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR target/88837
* vector-builder.h (vector_builder::count_dups): New method.
* config/aarch64/aarch64-protos.h (aarch64_expand_sve_vector_init):
Declare prototype.
* config/aarch64/aarch64/sve.md (aarch64_sve_rev64<mode>): Use @.
(vec_init<mode><Vel>): New pattern.
* config/aarch64/aarch64.c (emit_insr): New function.
(aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
(aarch64_sve_expand_vector_init_insert_elems): Likewise.
(aarch64_sve_expand_vector_init_handle_trailing_same_elem): Likewise.
(aarch64_sve_expand_vector_init): Define two overloaded functions.
testsuite/
* gcc.target/aarch64/sve/init_1.c: New test.
* gcc.target/aarch64/sve/init_1_run.c: Likewise.
* gcc.target/aarch64/sve/init_2.c: Likewise.
* gcc.target/aarch64/sve/init_2_run.c: Likewise.
* gcc.target/aarch64/sve/init_3.c: Likewise.
* gcc.target/aarch64/sve/init_3_run.c: Likewise.
* gcc.target/aarch64/sve/init_4.c: Likewise.
* gcc.target/aarch64/sve/init_4_run.c: Likewise.
* gcc.target/aarch64/sve/init_5.c: Likewise.
* gcc.target/aarch64/sve/init_5_run.c: Likewise.
* gcc.target/aarch64/sve/init_6.c: Likewise.
* gcc.target/aarch64/sve/init_6_run.c: Likewise.
* gcc.target/aarch64/sve/init_7.c: Likewise.
* gcc.target/aarch64/sve/init_7_run.c: Likewise.
* gcc.target/aarch64/sve/init_8.c: Likewise.
* gcc.target/aarch64/sve/init_8_run.c: Likewise.
* gcc.target/aarch64/sve/init_9.c: Likewise.
* gcc.target/aarch64/sve/init_9_run.c: Likewise.
* gcc.target/aarch64/sve/init_10.c: Likewise.
* gcc.target/aarch64/sve/init_10_run.c: Likewise.
* gcc.target/aarch64/sve/init_11.c: Likewise.
* gcc.target/aarch64/sve/init_11_run.c: Likewise.
* gcc.target/aarch64/sve/init_12.c: Likewise.
* gcc.target/aarch64/sve/init_12_run.c: Likewise.
From-SVN: r271857
projects / gcc.git / log