Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6

Fix compiling on Solaris since Nate's libelf change

SConstruct:
    export env after we've set CC/CXX
ext/libelf/SConscript:
    pull in the CC/CXX variables from env. Use gm4 if it exists
ext/libelf/elf_begin.c:
ext/libelf/libelf_allocate.c:
    include errno.h instead of sys/errno.h
ext/libelf/elf_common.h:
    use the more standard uintX_t
ext/libelf/elf_strptr.c:
ext/libelf/elf_update.c:
    include sysmacros.h on Solaris for roundup()

--HG--
extra : convert_revision : ea1aab834029399c445dfa4c9f78febf2c3d8f0c

tport.cc:
Oops... forgot to update call site after changing
function argument semantics.

src/mem/tport.cc:
    Oops... forgot to update call site after changing
    function argument semantics.

--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc

A little more cleanup & refactoring of SimpleTimingPort.
Make it a better base class for cache ports.

--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4

Merge zizzer.eecs.umich.edu:/bk/newmem
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : f93aaeabed0da9eeec8eb6f055fb1e31d5d97203

Fix M4 command line... wasn't working on zizzer.
A little more concise now.

--HG--
extra : convert_revision : 5cb46832ac7ce7a0be72765e83c8ceb5d8d4b64a

Restructure SimpleTimingPort a bit:
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability

--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a

Reformat comments to meet line length restriction.

--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a

Remove unnecessary include of physical.hh.

--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4

Move SimObject python files alongside the C++ and fix
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321

Get rid of GNU libelf and its autoconf nastiness and replace
it with FreeBSD's implementation

--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621

Update to ply 2.3

ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e

memtest.py:
Make clocks more reasonable.
Fix bug in sense of options.timing flag.

configs/example/memtest.py:
    Fix bug in sense of options.timing flag.
configs/example/memtest.py:
    Make clocks more reasonable.

--HG--
extra : convert_revision : 3715697988c56e92a4da129b42026d0623f5e85e

Change getDeviceAddressRanges to use bool for snoop arg.

--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638

Add new EventWrapper constructor that takes a Tick value
and schedules the event immediately.

--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983

Insist that PhysicalMemory object have at least one connection.

--HG--
extra : convert_revision : 36c33d25a3b23ac2094577aa504c24fac0f3ffcc

Oops... some places in C++ explicitly ask for a "functional"
port.  It would be better to move this to python IMO but for
now I'll stick in a compatibility hack.

--HG--
extra : convert_revision : a81a29cbd43becd0e485559eb7b2a31f7a0b082d

PhysicalMemory has vector of uniform ports instead of one special one.

configs/example/memtest.py:
    PhysicalMemory has vector of uniform ports instead of one special one.
    Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
    Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
    Add comment.

--HG--
extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1

Update the release notes for the 2.0 beta 3 release

--HG--
extra : convert_revision : 708ba7a5878ad60317e527830b54c4fe62f70454

update all the regresstion tests for release

--HG--
extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2

Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into  zizzer.eecs.umich.edu:/tmp/newmem

--HG--
extra : convert_revision : e4047d458f0ea4ca6c321a7236b01f80ea4efe33

Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 32dc1bec7fdb1ecb8879ed2dd745c4b23929aeab

add an l2 cache option to se example config

configs/common/Options.py:
configs/example/fs.py:
    move l2 cache option to Options.py

--HG--
extra : convert_revision : 5c0071c2827f7db6d56229d5276326364b50f0c8

hopefully the final hacky change to make the bus bridge work ok
cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here

src/mem/bridge.cc:
src/mem/bridge.hh:
    hopefully the final hacky change to make the bus bridge work ok

--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c

Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 8a501917daf81021212d136b4ebbfa059b452a13

Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into  zizzer.eecs.umich.edu:/tmp/newmem

--HG--
extra : convert_revision : 7daf46913daf826f2e29645d8d29eea88469bb5a

Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : e445097240af7b4e73efaca855cd1f217cf00313

couple more bug fixes for intel nic

src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
    couple more bug fixes

--HG--
extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb

add uglyiness to fix dmas

src/dev/io_device.cc:
    extra printing and assertions
src/mem/bridge.hh:
    deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
    make the cache try to satisfy a functional request from the cache above it before checking itself

--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a

Eliminate unused PacketPtr from BaseCache's
RequestEvent and ResponseEvent.
Compiles but not tested.

--HG--
extra : convert_revision : cc791e7adea5b0406e986a0076edba51856b9105

Split BaseCache::CacheEvent into RequestEvent and ResponseEvent.
Compiles but not tested.

--HG--
extra : convert_revision : 4e1e28c4b87721ccfcf35a5ea62c1fa324acbaf9

Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into  zizzer.eecs.umich.edu:/tmp/newmem

--HG--
extra : convert_revision : 162876cb1ad96ca7ca6a2e0f549c98b29e5a8d2d

fix handling of atomic packets
fix up code for counting requests and responses

--HG--
extra : convert_revision : 0d70981ee41c5d9c36cad01bd505281a096f6119

Move full CPU sim object stuff into the encumbered directory

--HG--
extra : convert_revision : 788068dd4f4994d0016dba7e8705359d45a3a45c

Float should have a c++ param type

--HG--
extra : convert_revision : 150bbe7f31aafb43a75195fc2a365fb3c0ec5673

total should be the sum of the vector result of an operation,
not sum the operands and then apply the operation.

--HG--
extra : convert_revision : 06486e59b3dd9588b458ef45c341cc4f2554dc09

remove hit_latency and make latency do the right thing
set the latency parameter in terms of a latency
add caches to tsunami-simple configs

configs/common/Caches.py:
tests/configs/memtest.py:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
tests/configs/simple-atomic-mp.py:
tests/configs/simple-timing-mp.py:
tests/configs/simple-timing.py:
    set the latency parameter in terms of a latency
configs/common/FSConfig.py:
    give the bridge a default latency too
src/mem/cache/cache_builder.cc:
src/python/m5/objects/BaseCache.py:
    remove hit_latency and make latency do the right thing
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-atomic.py:
tests/configs/tsunami-simple-timing-dual.py:
tests/configs/tsunami-simple-timing.py:
    add caches to tsunami-simple configs

--HG--
extra : convert_revision : 37bef7c652e97c8cdb91f471fba62978f89019f1

Merge zizzer:/bk/newmem
into  pb15.local:/Users/ali/work/m5.newmem.zeep

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
    the new version of this is what we want

--HG--
extra : convert_revision : 204df6f8181df81e423def4695cd81544c485c47

update for bus bridge updates

--HG--
extra : convert_revision : 829b1f33c88f1708ce5ee84afb4cd8bda8a6576f

add/update parameters for bus bridge

--HG--
extra : convert_revision : 063f757fbfa2c613328ffa70e556f8926623fa91

couple of updates in the intel nic

--HG--
extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61

update for new reschedule semantics

--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca

undo my previous bus change, it can make the bus deadlock.. so it still constantly reschedules itself

--HG--
extra : convert_revision : b5ef1aa0a6a2e32bd775d2dbcad9cd9505ad9b78

Merge zeep:/z/saidi/work/m5.newmem
into  zizzer.eecs.umich.edu:/tmp/newmem

--HG--
extra : convert_revision : fcace7573830e2a3992c0b052598b97475e951c6

add a backoff algorithm when nacks are received by devices
add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge

src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
    add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
    add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
    add seperate response buffers and request queue sizes
    add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
    assert on the
src/mem/tport.cc:
    add a friendly assert to make sure the packet was inserted into the list

--HG--
extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1

fix the translating ports so it can add a page on a fault

--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80

Merge zizzer:/bk/newmem
into  udhcp-macvpn-703.public.engin.umich.edu:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : e977c5b194954774b6503484797f1c1e0eb4e425

bit_val was being used directly in the statement in return. If type B had fewer bits than last, bit_val << last would get the wrong answer.

src/base/bitfield.hh:
    bit_val was being used directly in the statement in
    return. If type B had fewer bits than last, bit_val << last would get
    the wrong answer.

--HG--
extra : convert_revision : cbc43ccd139f82ebbd65f30af5d05b87c4edac64

update for partial write fix changes

--HG--
extra : convert_revision : 066224dc7034206ea6c3578d41a9a5d75181f82c

the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space
fix the timing cpu to handle receiving a nacked packet

src/cpu/simple/timing.cc:
    make the timing cpu handle receiving a nacked packet
src/mem/bridge.cc:
src/mem/bridge.hh:
    the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space

--HG--
extra : convert_revision : 5e12d0cf6ce985a5f72bcb7ce26c83a76c34c50a

fix partial writes with a functional memory hack
figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached

configs/common/FSConfig.py:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/python/m5/objects/Bridge.py:
    fix partial writes with a functional memory hack
src/mem/bus.cc:
src/mem/bus.hh:
src/python/m5/objects/Bus.py:
    figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached
src/mem/packet.cc:
    fix WriteInvalidateResp to not be a request that needs a response since it isn't
src/mem/port.hh:
    by default return 0 for deviceBlockSize instead of panicing. This makes finding the block size the bus should use easier

--HG--
extra : convert_revision : 3fcfe95f9f392ef76f324ee8bd1d7f6de95c1a64

Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 8867e78b55670da14f38172b5ac16ed5f6770f4c

change the way dprintf works so the cache accesses required to fulfill the dprintf aren't show in between the Cycle: name:
printing and the actual formatted string being printed

--HG--
extra : convert_revision : 8876ba938ba971f854bab490c9af10db039a2e83

fix flushAddr so it doesn't modify an iterator that has been deleted

--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10

update for dprintk and not initializing lastTxInt

--HG--
extra : convert_revision : c81ea950a919349a6e82f61ba591d3fbde4627b3

Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 7e4b82f5949c0807d93fff80c44a8828968d1248

initialize lastTxInt to 0

--HG--
extra : convert_revision : 4c5e9c2145b12fdeba91f3fdd8963c35abe326c2

always skip the debugprintf function (DebugPrintf traceflag shouldn't matter). Otherwise, when you turn on debugprintf alters the execution

--HG--
extra : convert_revision : 1c9a665e3b7234cacf06c31d2e7886244a9e82bc

update release notes a bit

--HG--
extra : convert_revision : e99661b971a1cbb2be6cabb68c1a4dcc7c4792ba

update refs for uart device changes

--HG--
extra : convert_revision : 4bea6652993cf147d9f1e88b1eb1f9796431121a

fix igbe bug

--HG--
extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f

fix console printing bug

--HG--
extra : convert_revision : 5481b72b22e7a2cf3367d777309bc30201f3b1fc

add the ability for the ethernet device  to check if the link is busy

--HG--
extra : convert_revision : 0dc0c4c4546869261f4508ad22a6a85aecf3c334

add a udp stream benchmark and a udp loopback benchmark

--HG--
extra : convert_revision : 9300c67a1258e57436eba6cbdbed8fdf93fb6e59

make ping actually end

--HG--
extra : convert_revision : 6932d050a821abc7871bc73051688a986dcea364

Merge zizzer.eecs.umich.edu:/bk/newmem
into  iceaxe.:/Users/nate/work/m5/incoming

--HG--
extra : convert_revision : d0141a8f2b56be297af3368e3fbdd9600857206d

gcc 4.1 claims that mem_data might be used uninitialized,
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be

Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 63ff3b6efce43f413b1c5560d547513437176d31

Updates for clock changes.

--HG--
extra : convert_revision : 88699ba98a738a62204ae4182f7ee5dcab9285eb

Actually move the time two minutes into the future to make sure
that we get the result that we want

--HG--
extra : convert_revision : d3e1aca921705fe8c8b955229c2afcd2aa9b36ea

whack the old list of outstanding issues, and put the new list at the top

--HG--
extra : convert_revision : af893f11c43bf0033886c2fda0c0421403f041c2

Update Alpha reference stats for clock changes.

tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.out:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini:
tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.out:
tests/long/00.gzip/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stderr:
tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini:
tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.out:
tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/long/00.gzip/ref/alpha/tru64/simple-timing/stderr:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.out:
tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout:
tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini:
tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.out:
tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr:
tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout:
tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini:
tests/long/30.eon/ref/alpha/tru64/simple-timing/config.out:
tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr:
tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout:
tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini:
tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.out:
tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stderr:
tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini:
tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.out:
tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stderr:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.out:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/smred.msg:
tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini:
tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.out:
tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr:
tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini:
tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.out:
tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.out:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini:
tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.out:
tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stderr:
tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini:
tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.out:
tests/long/60.bzip2/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stderr:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.out:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini:
tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.out:
tests/long/70.twolf/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.out:
tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stderr:
tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini:
tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.out:
tests/long/70.twolf/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.out:
tests/long/70.twolf/ref/alpha/tru64/simple-timing/stderr:
    Update refs for clock changes.

--HG--
extra : convert_revision : 7c32a3362da60fd12b7bf9219842f707319cda42

Update release notes

--HG--
extra : convert_revision : d57ffff1a35443214d8fe24d6388daa99b1d747d

Make sure that we don't rebuild libelf stuff that we don't
have to since it doesn't work well on non-linux

--HG--
extra : convert_revision : 2f1f81f756cccf25f1b2b04e6b5ca4b7a20e96b7

Fix mutex test script for latest disk image.

--HG--
extra : convert_revision : 1b0a251046674db1be8c9a2c026ff8c17f9cea06

Remove extra delete that was causing segfault.

--HG--
extra : convert_revision : 8a27ed80308c95988f3bc43d670dc0ac9e946d39

Remove unnecessary check.

--HG--
extra : convert_revision : 8cc2943ebc41e4d430789ee7923dd0dc878be06b

Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 73baa280a96cbcf43a32cbb00035005855ee4848

Fix the splash2 run script

--HG--
extra : convert_revision : 2b5f6718ac93d3d1b9b1d1b290f1ff5fa10cd0d8

Merge zizzer:/bk/newmem
into  zed.eecs.umich.edu:/z/hsul/work/m5/newmem

--HG--
extra : convert_revision : ab72745ed43ef2925cae82c46d55c8328589731c

update_refs for ALPHA_FS with new disk image.

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout:
    update_refs

--HG--
extra : convert_revision : 942d42bcd0ab962a7dda897e455329bf15105887

Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 11df5fb2a8f1fa020d042e75b22a7f2f2bcbd9ab

Update refs for CPU clock changes and O3 CPI/IPC calculation updates.

tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini:
tests/quick/00.hello/ref/mips/linux/simple-atomic/config.out:
tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini:
tests/quick/00.hello/ref/mips/linux/simple-timing/config.out:
tests/quick/00.hello/ref/mips/linux/simple-timing/m5stats.txt:
tests/quick/00.hello/ref/mips/linux/simple-timing/stdout:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.out:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini:
tests/quick/00.hello/ref/sparc/linux/simple-timing/config.out:
tests/quick/00.hello/ref/sparc/linux/simple-timing/m5stats.txt:
tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout:
tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini:
tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.out:
tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt:
tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr:
tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout:
tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini:
tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out:
tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt:
tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr:
tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout:
tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini:
tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.out:
tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt:
tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr:
tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout:
    Update refs.

--HG--
extra : convert_revision : 34a0d18f213386700e2acdd1eb9ebc5fa6daa7f5

Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 05f738ab6cf1e8bd2940f4ce20602f1e8ad1af48

Updated refs for calculating IPC/CPI.

--HG--
extra : convert_revision : ee8dfee5eaa345dcb08f5d06d054655b1f6f79da

Use proper cycles for IPC and CPI equations.

src/cpu/o3/cpu.cc:
    Use proper cycles for these equations.

--HG--
extra : convert_revision : cd49410eed978c789d788e80462abed6cb89fbae

Update refs for new CPU frequency changes.

tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr:
tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr:
tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out:
tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/linux/simple-timing/stderr:
tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stderr:
tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/stderr:
tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr:
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout:
tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini:
tests/quick/50.memtest/ref/alpha/linux/memtest/config.out:
tests/quick/50.memtest/ref/alpha/linux/memtest/m5stats.txt:
tests/quick/50.memtest/ref/alpha/linux/memtest/stdout:
    Update refs

--HG--
extra : convert_revision : 8d9deb2b907843064b40e46207d9c9361941f022

Update configs to set the CPU clock properly.

--HG--
extra : convert_revision : 62fec666f987e9a9a441e319458908483cd2c5ff

Merge zizzer:/bk/newmem
into  zeep.pool:/tmp/newmem

--HG--
extra : convert_revision : 8f173d3522e2e8847e51dfab48f35e34e6d3c1a7

fixes for solaris compile

--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320

create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c

spec-surge-client.rcS:
fix script to reflect new benchmark directory sturcture

configs/boot/spec-surge-client.rcS:
    fix script to reflect new benchmark directory sturcture

--HG--
extra : convert_revision : 45f9d8aebabd1f3f8d1e826e07840e2365511a35

update the stuff that's removed from the SConscripts
since things have moved around a bit

--HG--
extra : convert_revision : 79322a65af6140d0c41aed0b381587eb05d72fd9

Move the turbolaser python simobject stuff into the
encumbered directory

--HG--
extra : convert_revision : 7062ce81183b989f0d922b00d02433633474a854

fix SIGUSR1 and SIGUSR2 by clearing the variables after
they're used

--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886

Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 8630b3771678b68d5cd12a61f7a4de2e3443a8d7

Fixes for splash, may conflict with Korey's SMT work and doesn't support 03cpu yet.

src/cpu/simple/base.cc:
    Cpu's should start as unallocated, not suspended
src/cpu/simple_thread.cc:
    Wait for a thread to be assigned to activate the cpu
src/kern/tru64/tru64.hh:
    When looking for a open cpu to assign threads, look for an unallocated one, not a suspended one.

--HG--
extra : convert_revision : 5e3ad2e96b4a715ed38293ceaccff5b9f4ea7985

Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : fd9a2d0e833dd47f55aad9c50c68431bc6d3e0a7

Update long test refs.

tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.out:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.out:
tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.out:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.out:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stderr:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.out:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.out:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr:
    Update refs.

--HG--
extra : convert_revision : 19483a5a18e76338a3208a58d7460a922377acd3

Merge zizzer:/bk/newmem
into  udhcp-macvpn-501.public.engin.umich.edu:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : 38c2427790d27c64e69ac3223e76cabeeb765904