Alyssa Rosenzweig [Thu, 27 Feb 2020 14:35:50 +0000 (09:35 -0500)]
pan/midgard: Add LDST_ADDRESS property
Many load/store ops (used for globals, SSBOs, shared memory, etc) have
the ability to compute addresses directly. Mark off which ones behave
like this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:35:12 +0000 (09:35 -0500)]
pan/midgard: Extract nir_ssa_index helper
In case we don't have a nir_src.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:15:00 +0000 (09:15 -0500)]
pan/midgard: Partially fix 64-bit swizzle alignment
When mixing 32/64-bit, we need to align the 32-bit registers to get the
required alignment. This isn't quite enough yet, though, since user
swizzles could bypass and will need to be lowered to 32-bit moves
(outstanding todo).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Wed, 26 Feb 2020 18:51:07 +0000 (13:51 -0500)]
pan/midgard: Allow fusing inverted sources for inverted ops
It doesn't make a difference to the actual algorithm, so let's get rid
of them.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Wed, 26 Feb 2020 18:50:46 +0000 (13:50 -0500)]
pan/midgard: Allow inverted inverted ops
We'd like to transform `inand.not` back to `iand` and so forth.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Wed, 26 Feb 2020 18:37:10 +0000 (13:37 -0500)]
panfrost: Increase SSBO/image limit from 4->8
Fixes an error compiling some shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Jonathan Marek [Thu, 20 Feb 2020 02:14:35 +0000 (21:14 -0500)]
etnaviv: disable INT_FILTER for ASTC
Tested on GC3000: INT_FILTER bit is incompatible with ASTC formats.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
Caio Marcelo de Oliveira Filho [Wed, 26 Feb 2020 23:54:33 +0000 (15:54 -0800)]
anv: Remove unused field xfb_used from anv_pipeline
Since we only use xfb_info for GEN >= 8, make the ifdef cover that
local variable.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
Eric Anholt [Tue, 28 Jan 2020 20:02:39 +0000 (12:02 -0800)]
ci: Include db410c support in the ARM container.
I'm working on moving the db410c CI from docker to LAVA, which means we
get to boot a custom kernel. To do that, we need to enable ARCH_QCOM in
the kernel, save the dtb around, and include abootimg in our container so
that we can generate combined kernel/dtb/ramdisk images for fastboot.
LAVA's fastboot support is unable to pack the overlay into an abootimg
image, just a cpio rootfs. We could flash the cpio rootfs after overlay
addition, but that takes 2 minutes to do, and causes wear on the devices.
Instead, we'll bring up the network at boot and use wget to fetch the
overlay. We'll want network support anyway, so that we can transfer the
failure xmls back to the gitlab job's artifacts at some point.
Since the msm GPU and realtek network firmware increase our payload by
3MB, add in firmware compression so that it doesn't waste as much RAM on
devices not using it.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Eric Anholt [Tue, 28 Jan 2020 20:24:21 +0000 (12:24 -0800)]
ci: Shrink the arm64 kernel build a bit.
No sense building some of these subsystems for just testing the GPU.
Saves some container rebuild time and kernel contents to move around.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Eric Anholt [Tue, 11 Feb 2020 22:34:24 +0000 (14:34 -0800)]
ci: Stop disabling ACPI in the LAVA arm64 kernel build.
I can't figure out why, but it's necessary to get QCOM_CLK_APCS_MSM8916
for db410c.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Eric Anholt [Mon, 24 Feb 2020 18:31:33 +0000 (10:31 -0800)]
ci: Remove LLVM from ARM test drivers.
The LLVM libraries were a significant fraction of the entire payload
(55M/250M uncompressed) into the initramfs of the test boards, but
LLVM is only used for the draw module used in select/feedback (which
isn't even tested in CI on ARM yet).
Assume that llvmpipe draw is safe enough for ARM given the coverage on
x86, and disable LLVM for these jobs.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Rohan Garg [Thu, 20 Feb 2020 15:37:48 +0000 (16:37 +0100)]
ci: Split out radv build-testing on arm64
radv needs libllvm which increases our ramdisk size
significantly. Since this driver is only build tested,
we can split it out into a separate job.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Tomeu Vizoso [Thu, 27 Feb 2020 14:09:30 +0000 (15:09 +0100)]
gitlab-ci: Skip dEQP-GLES3.functional.shaders.derivate.*
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Tomeu Vizoso [Thu, 27 Feb 2020 13:18:02 +0000 (14:18 +0100)]
gitlab-ci: Remove GLES3 test from Panfrost fails list
Seems to have been fixed recently.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Tomeu Vizoso [Thu, 27 Feb 2020 12:30:29 +0000 (13:30 +0100)]
gitlab-ci: Use PAN_MESA_DEBUG=gles3 for Panfrost
We can drop now the GLES version overrides now that we have a DEBUG flag
that enables all what is expected from a GLES 3.0 implementation.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Thu, 20 Feb 2020 14:30:42 +0000 (09:30 -0500)]
panfrost: Add PAN_MESA_DEBUG=gles3 option
This enables experimental GLES3.0 support without ES3.1/2 hacks.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Thu, 20 Feb 2020 14:43:34 +0000 (09:43 -0500)]
panfrost: Expose PIPE_CAP_PRIMITIVE_RESTART
It works just fine, we just forgot to expose the CAP.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:40:20 +0000 (15:40 -0500)]
panfrost: Simplify stack shift calculation
I'm not sure why I never saw smaller values, but here you go.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:36:11 +0000 (15:36 -0500)]
panfrost: Reserve an extra page for spilling
I'm not sure what this is for, but the blob does it and I'd rather not
poke farther than needed into hardware-internal details.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:34:51 +0000 (15:34 -0500)]
panfrost: Default to 256 threads for TLS
I'm not sure where I got the impression 1024 was the right number. From
kbase:
#define THREAD_MT_DEFAULT 256
(where MT = "max threads" and the threads to allocate for TLS is <= max
threads). Let's cut out memory footprint for spilling by 75% :)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 16:52:52 +0000 (11:52 -0500)]
panfrost: Fix param getting
....Oops....
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:32:23 +0000 (15:32 -0500)]
panfrost: Don't set shared->unk0
This field controls the size of per-thread temporaries (somehow this is
separate from the regular stack for register spilling..), though I'm not
certain on the details. Regardless this value of 0x1e despite being used
in places by the blob seems wrong and is interfering with correct sizing
of the stack.
We don't use non-spilling scratchpad yet, so this is just here to fix
some details of spilling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:34:16 +0000 (15:34 -0500)]
panfrost: Update spilling comment framebuffer->shared
All of this should apply equally with compute shaders, as far as I know.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 13:16:52 +0000 (08:16 -0500)]
panfrost: Fix padded_vertex_count generation
These two cases were flipped from the notes, leading to underestimates
of the padded vertex count, manifesting as visual corruption (random
geometry messed up). This issue was raised when noticing the corruption
went away when dramaticlaly oversizing max_index on an instanced indexed
draw, and then checking that padded_count >= vertex_count -- which
turned out *not* to be the case on certain inputs, a clear issue. Hence
looking into this routine...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Thu, 20 Feb 2020 15:03:29 +0000 (10:03 -0500)]
panfrost: Fix gl_VertexID/InstanceID
Fixes a bunch of tests in dEQP-GLES3.functional.instanced.*.
Fixes: 027944c7c8c ("panfrost: Avoid reading GPU memory when packing
vertices")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Mon, 24 Feb 2020 14:36:18 +0000 (09:36 -0500)]
pan/midgard: Don't spill near a branch
Fixes
dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_
static_read with register pressure forced down.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:40:46 +0000 (15:40 -0500)]
pan/decode: Dump scratchpad size if present
This will help us narrow the size required for thread local storage.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Wed, 19 Feb 2020 15:32:20 +0000 (10:32 -0500)]
panfrost: Implement index buffer cache
For index bufer resources (not user index buffers), we're able to cache
results. In practice, the cache works pretty dang well. It's still
important that the min/max computation is efficient (since when the
cache misses it'll run at draw-time and we don't want jank), but this
can eliminate a lot of computations entirely.
We use a custom data structure for caching. Search is O(N) to the size
but sizes are capped so it's effectively O(1). Insertion is O(1) with
automatic oldest eviction, on the assumption that the oldest results are
the least likely to still be useful. We might also experiment with other
heuristics based on actual usage later.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Alyssa Rosenzweig [Wed, 19 Feb 2020 15:15:13 +0000 (10:15 -0500)]
panfrost: Combine get_index_buffer with bound computation
These operations are intertwined since there are optimizations that will
want to "double dip". In particular for user index buffers we'd want to
upload simultaneous with index computation. For resources we'd like to
keep resource related code together.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Leo Liu [Fri, 7 Feb 2020 00:20:09 +0000 (19:20 -0500)]
radeon/jpeg: fix the jpeg dt_pitch with YUYV format
The dt_pitch should be same as NV12 format from decoder views,
and it finally got corrected with gfx9 surface's fixes from MR
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3738
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Thu, 13 Feb 2020 18:24:43 +0000 (19:24 +0100)]
st/va: add support YUY2
YUY2 is a duplicate of YUYV and is used by gstreamer for 4:2:2.
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Wed, 12 Feb 2020 10:22:06 +0000 (11:22 +0100)]
st/va: enable 4:2:2 chroma format
Everything is in place to support them.
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Tue, 4 Feb 2020 17:56:59 +0000 (18:56 +0100)]
radeonsi: fix surf_pitch for subsampled surface
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.
For subsampled formats like uyvy (bpe is 2) this breaks in various places:
- sdma copy
- video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363)
when the vl_compositor_gfx_render method is used
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Tue, 4 Feb 2020 17:57:08 +0000 (18:57 +0100)]
gallium/vl: add 4:2:2 support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2363
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Wed, 5 Feb 2020 09:21:20 +0000 (10:21 +0100)]
gallium/video: remove pipe_video_buffer.chroma_format
chroma_format depends on buffer_format so use the format_to_chroma_format
helper instead of storing it next to buffer_format.
This avoids bugs where one value is changed without updating the other.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Wed, 5 Feb 2020 09:20:06 +0000 (10:20 +0100)]
format: add format_to_chroma_format
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Thu, 6 Feb 2020 17:18:38 +0000 (18:18 +0100)]
radeonsi: test subsampled format in testdma
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Samuel Pitoiset [Wed, 26 Feb 2020 14:12:55 +0000 (15:12 +0100)]
ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
The hardware doesn't flush denorms, exactly like fmin/fmax, so
we have to do it manually. This doesn't fix anything known.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Samuel Pitoiset [Wed, 26 Feb 2020 14:09:40 +0000 (15:09 +0100)]
ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
16-bit med3 is only supported on GFX9+.
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f16.*.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Samuel Pitoiset [Wed, 26 Feb 2020 14:04:38 +0000 (15:04 +0100)]
ac/llvm: fix 64-bit fmed3
Lower 64-bit fmed3 because LLVM doesn't expose an intrinsic.
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f64.*.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Mathias Fröhlich [Wed, 26 Feb 2020 06:49:27 +0000 (07:49 +0100)]
mesa: Flush vertices before changing the OpenGL state.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Mathias Fröhlich [Wed, 26 Feb 2020 06:35:27 +0000 (07:35 +0100)]
mesa: Check for OpenGL state change before flushing vertices.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Dave Airlie [Wed, 26 Feb 2020 02:13:13 +0000 (12:13 +1000)]
gallivm/nir: handle mod 0 better.
I haven't seen this crash but TGSI does it so best align with
it to avoid future issues.
Fixes: 44a6b0107b3J (gallivm: add nir->llvm translation (v2))
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Dave Airlie [Wed, 26 Feb 2020 02:10:54 +0000 (12:10 +1000)]
gallivm/nir: fix integer divide SIGFPE
Blender was crashing with a SIGFPE even though the divide by 0
logic was kicking in. I'm not sure why TGSI doesn't get into this state.
The problem was is the numerator was INT_MIN we'd replace the div by
0 with a divide by -1, which is an exception for INT_MIN as INT_MIN/-1
== INT_MAX + 1 (too large for 32-bits). Instead for integer divides
just replace the mask values with 0x7fffffff. Also fix up the
result handling so it aligns with TGSI usage. (gives 0)
Fixes: c717ac1247c3 ("gallivm/nir: wrap idiv to avoid divide by 0 (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Dave Airlie [Tue, 25 Feb 2020 21:03:33 +0000 (07:03 +1000)]
gallivm/tgsi: fix stream id regression
This broke TGSI GS shaders with llvmpipe, it wasn't looking at the
right immediates and it should be cast to an integer type.
Fixes: 163d5fde0669 (gallium/swr: Enable GL_ARB_gpu_shader5: multiple streams)
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Acked-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
Marek Olšák [Thu, 20 Feb 2020 02:43:56 +0000 (21:43 -0500)]
mesa: call FLUSH_VERTICES before updating CoordReplace
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
Marek Olšák [Thu, 20 Feb 2020 01:14:59 +0000 (20:14 -0500)]
mesa: remove leftovers from ARB_shadow_ambient
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
Albert Astals Cid [Wed, 26 Feb 2020 18:33:47 +0000 (19:33 +0100)]
cube_face_index: Use fabsf instead of fabs since we know it's floats
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
Albert Astals Cid [Mon, 24 Feb 2020 23:36:44 +0000 (00:36 +0100)]
cube_face_coord: Use fabsf instead of fabs since we know it's floats
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
Rafael Antognolli [Thu, 20 Feb 2020 19:02:52 +0000 (11:02 -0800)]
iris: Apply the flushes when switching pipelines.
Even though the workaround description says:
"all the listed commands are non-pipelined and hence flush caused due
to pipeline mode change must not cause performance issues..."
My understanding is that we still need to have the flushes. Also, the
flushes are required not only to stall the pipeline, but also to clear
caches, so I don't think they can simply be discarded.
Additionally, while doing some testing that increased the number of
surface STATE_BASE_ADDRESS emitted, I got a lot more GPU hangs. Adding
these flushes fixes those hangs.
Fixes: b8fbb39a (iris: Implement Gen12 workaround for non pipelined
state)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Marek Olšák [Wed, 5 Feb 2020 19:52:38 +0000 (14:52 -0500)]
gallium/hash_table: remove some function wrappers
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Marek Olšák [Wed, 5 Feb 2020 19:47:36 +0000 (14:47 -0500)]
gallium/hash_table: turn it into a wrapper around util/hash_table
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Marek Olšák [Wed, 5 Feb 2020 19:19:40 +0000 (14:19 -0500)]
gallium/hash_table: use the same callback signatures as util/hash_table
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Marek Olšák [Wed, 5 Feb 2020 19:27:21 +0000 (14:27 -0500)]
gallium/hash_table: consolidate hash tables with FD keys
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Marek Olšák [Wed, 5 Feb 2020 19:10:48 +0000 (14:10 -0500)]
gallium/hash_table: consolidate hash tables with pointer keys
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Greg V [Sun, 26 Jan 2020 11:22:45 +0000 (14:22 +0300)]
amd/addrlib: fix build on non-x86 platforms
regparm(0) attribute does not work on aarch64 (and presumably powerpc64 and others).
Default to not specifying any calling convention on non-amd64/i386 platforms.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
Marek Olšák [Mon, 24 Feb 2020 23:16:48 +0000 (18:16 -0500)]
tgsi_to_nir: set num_images and num_samplers with holes correctly
This fixes the copy_uv shader from st/omx, because it uses image 0 and 2
and image 1 isn't declared.
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
Jason Ekstrand [Tue, 25 Feb 2020 03:16:01 +0000 (21:16 -0600)]
nir: Drop nir_tex_instr::texture_array_size
It's set by lots of things and we spend a lot of time maintaining it but
no one actually uses the value for anything useful.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
Eric Anholt [Wed, 26 Feb 2020 00:25:05 +0000 (16:25 -0800)]
freedreno/computerator: Fix defined-but-not-used warnings from lex/yacc.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
Eric Anholt [Sat, 22 Feb 2020 00:38:26 +0000 (16:38 -0800)]
turnip: Fix compiler warning about casting a nondispatchable handle.
Fixes: 1c5d84fcae71 ("turnip: hook up cmdbuffer event set/wait")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
Tomeu Vizoso [Thu, 20 Feb 2020 10:58:38 +0000 (11:58 +0100)]
gitlab-ci: Move to 5.5 kernel plus fixes for Panfrost
There's two fixes that help with stability when running dEQP on Kevin
Chromebooks.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Tomeu Vizoso [Fri, 21 Feb 2020 12:47:38 +0000 (13:47 +0100)]
panfrost: Remove some more prints to stdout
They can confuse test runners.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Tomeu Vizoso [Wed, 18 Dec 2019 15:11:33 +0000 (16:11 +0100)]
gitlab-ci: Run GLES3 tests in dEQP on Panfrost
We are able to run only 1/5th of the tests in around the same time that
dEQP-GLES2 takes, so do that for now while more DUTs are installed.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Tapani Pälli [Wed, 26 Feb 2020 08:30:42 +0000 (10:30 +0200)]
mesa/st: toggle EXT_texture_norm16 based on format support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2556
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Tapani Pälli [Wed, 26 Feb 2020 08:29:49 +0000 (10:29 +0200)]
i965: toggle on EXT_texture_norm16
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Tapani Pälli [Wed, 26 Feb 2020 08:27:04 +0000 (10:27 +0200)]
mesa: introduce boolean toggle for EXT_texture_norm16
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Juan A. Suarez Romero [Wed, 8 Jan 2020 10:48:29 +0000 (10:48 +0000)]
nir/lower_double_ops: add note for lowering mod
Add a note to clarify that while Vulkan allows mod(x,y) to be in [0, y]
range, OpenGL does not allow it, so the lowering ensures the result is
always in [0, y) range, as this lowering is shared by the Vulkan and
OpenGL implementation.
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
Samuel Pitoiset [Wed, 26 Feb 2020 09:21:24 +0000 (10:21 +0100)]
radv: fix creating null devices if KHR_display is enabled
Found this while replaying pipelines with Fossilize, it worked
fine with vkpipeline-db.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
Andreas Baierl [Wed, 26 Feb 2020 08:17:57 +0000 (09:17 +0100)]
gitlab-ci: Add add a set of lima flakes
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
Samuel Pitoiset [Thu, 20 Feb 2020 08:27:07 +0000 (09:27 +0100)]
radv: make use of ac_gpu_info::max_wave64_per_simd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Samuel Pitoiset [Thu, 20 Feb 2020 08:26:03 +0000 (09:26 +0100)]
radv/gfx10: adjust the number of VGPRs used to compute waves
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Samuel Pitoiset [Thu, 20 Feb 2020 07:50:29 +0000 (08:50 +0100)]
radv/gfx10: adjust the LDS size used to compute waves
It's 128KB per CU in WGP.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Samuel Pitoiset [Thu, 20 Feb 2020 08:25:44 +0000 (09:25 +0100)]
radv/gfx10: adjust SGPRs/VGPRs related info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Samuel Pitoiset [Thu, 20 Feb 2020 08:24:38 +0000 (09:24 +0100)]
radv/gfx10: adjust the number of simd per compute unit
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Samuel Pitoiset [Thu, 20 Feb 2020 08:19:44 +0000 (09:19 +0100)]
ac: add more ac_gpu_info related shader fields
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Samuel Pitoiset [Thu, 20 Feb 2020 07:48:38 +0000 (08:48 +0100)]
ac,radeonsi: add ac_gpu_info::lds_size_per_cu
Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Samuel Pitoiset [Mon, 17 Feb 2020 13:45:47 +0000 (14:45 +0100)]
radv: implement a dummy winsys for creating devices without AMDGPU
To allow developers to test the compiler backends without having
any AMD GPUs. To create a null device, set eg.
RADV_FORCE_FAMILY=polaris10 in your environment.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
Mathias Fröhlich [Sun, 16 Feb 2020 10:13:43 +0000 (11:13 +0100)]
egl: Factor out dri2_add_pbuffer_configs_for_visuals {device,surfaceless}.
v2: dri2_add_configs_for_visuals -> dri2_add_pbuffer_configs_for_visuals
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
Mathias Fröhlich [Sun, 9 Feb 2020 18:01:53 +0000 (19:01 +0100)]
egl: Fix A2RGB10 platform_{device,surfaceless} PBuffer configs.
The __DRI_IMAGE_FORMAT_* part wants to be handled for the *101010
type formats as well. Factor out a common function for that task.
That again makes the piglit egl_ext_device_base test work again
for hardware drivers.
v2: Factor out a common function for that task.
v3: dri2_pbuffer_visuals -> dri2_pbuffer_visuals
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 9acb94b6236 "egl: Enable 10bpc EGLConfigs for platform_{device,surfaceless}"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
Jonathan Marek [Sun, 23 Feb 2020 22:30:15 +0000 (17:30 -0500)]
turnip: enable fullDrawIndexUint32/independentBlend/dualSrcBlend/logicOp
These are already implemented but missing from VkPhysicalDeviceFeatures.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
Jonathan Marek [Sun, 23 Feb 2020 22:29:37 +0000 (17:29 -0500)]
turnip: enable sampleRateShading feature
There's still a TODO related to key->sample_shading, but it doesn't look
like it changes anything in ir3, so it works without that.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
Matt Turner [Tue, 25 Feb 2020 21:15:29 +0000 (13:15 -0800)]
intel/tools: Do not print type/qualifiers/name for c_literal
External tools may wish to choose their own type, qualifiers, and name,
so do not emit our own.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Sagar Ghuge [Fri, 7 Feb 2020 22:25:59 +0000 (14:25 -0800)]
intel/tools: Allow i965_disasm to disassemble c_literal input type
Added extra argument named 'type' which can be 'bin' (default if
ommited) or 'c_literal' for input type.
Change 'binary-path' argument name to 'input-path'.
v2:
- Use util_dynarray for assembly (Matt Turner)
- Read data in 8 bytes chunk (Matt Turner)
- Fix help option (Akeem Abodunrin)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Sagar Ghuge [Fri, 7 Feb 2020 22:36:12 +0000 (14:36 -0800)]
intel/tools: Print c_literals 4 byte wide
We already print hex value a byte wide, instead of printing c_literal
byte wide, we can print it 4 byte wide, which gives us 2 different
combinations.
v2: Fix the aliasing issue (Matt Turner)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Sagar Ghuge [Thu, 6 Feb 2020 22:39:20 +0000 (14:39 -0800)]
intel/tools: Add test for state register as source
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Sagar Ghuge [Sat, 8 Feb 2020 00:04:15 +0000 (16:04 -0800)]
intel/tools: Add test for address register as source
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Sagar Ghuge [Thu, 6 Feb 2020 22:11:55 +0000 (14:11 -0800)]
intel/tools: Set correct address register file and number in i965_asm
We need to use already created brw_reg and set correct file type,
register number and sub register number.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Sagar Ghuge [Wed, 5 Feb 2020 00:38:44 +0000 (16:38 -0800)]
intel/tools: Handle STATE_REG in typed source operand
Also stop using brw_sr0_reg function as it return new brw_reg, we
already created register, all we have to is just set file, register
number and subnr.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Sagar Ghuge [Wed, 5 Feb 2020 00:37:01 +0000 (16:37 -0800)]
intel/tools: Handle illegal instruction
Allow assembler to handle illegal instruction even though mesa doesn't
use it but might be required at some point in future.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Eric Anholt [Wed, 19 Feb 2020 00:03:19 +0000 (16:03 -0800)]
meson: Disable bison's -Wdeprecated since we still support old bison.
We can't stop using deprecated keywords because we maintain support for
ancient bison. Silence the warning so that builds are less noisy.
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>
Jason Ekstrand [Fri, 21 Feb 2020 19:39:16 +0000 (13:39 -0600)]
anv: Always enable the data cache
Because we set the needs_data_cache bit from the NIR during compilation,
any time a shader was pulled out of the pipeline cache, we wouldn't set
the bit and the data cache was disabled. Fortunately, on Gen8+, this
bit is ignored because we always use the ALL section in the L3$ config
instead of separate DC and RO sections. On Gen7, however, this meant
that we were basically never running with the data cache enabled and our
compute performance was suffering massively because of it. This commit
improves Geekbench 5 scores on my Haswell GT3 by roughly 330% (no,
that's not a typo).
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
Lionel Landwerlin [Fri, 18 Oct 2019 11:40:42 +0000 (14:40 +0300)]
intel/aub_dump: stub the waits when overriding the device
We don't actually want to wait on anything, just complete submitting
the commands as fast as possible.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
Lionel Landwerlin [Sat, 11 Jan 2020 15:05:46 +0000 (17:05 +0200)]
intel/tools/aub_dump: fix crash when using the default legacy context
When execbuffer->rsvd1 == 0, the legacy context is used. Ensure we
have context created for this.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
Lionel Landwerlin [Sat, 11 Jan 2020 15:04:49 +0000 (17:04 +0200)]
intel/tools/aub_dump: move aub file initialization to maybe_init()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
Icenowy Zheng [Tue, 25 Feb 2020 09:48:12 +0000 (17:48 +0800)]
lima: expose fragment shader derivatives capability
Support for fragment shader derivatives has landed in the Lima PP
compiler for a long time, but its capability is not exposed yet.
Expose the support now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>
Jose Maria Casanova Crespo [Mon, 11 Nov 2019 00:46:24 +0000 (01:46 +0100)]
v3d: Sync on last CS when non-compute stage uses resource written by CS
When a resource is written by a compute shader and then used by a
non-compute stage we sync on last compute job to guarantee that the
resource has been completely written when the next stage reads resources.
In the other cases how flushes are done guarantee the serialization of
the writes and reads.
To reproduce the failure the following tests should be executed in batch
as last test don't fail when run isolated:
KHR-GLES31.core.shader_image_load_store.basic-allFormats-load-fs
KHR-GLES31.core.shader_image_load_store.basic-allFormats-loadStoreComputeStage
KHR-GLES31.core.shader_image_load_store.basic-allTargets-load-cs
KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray
v2: Use fence dep instead of bo_wait (Eric Anholt)
v3: Rename struct names (Iago Toral)
Document why is not needed on graphics->compute case. (Iago Toral)
Follow same code pattern of the other update of in_sync_bcl.
v4: Fixed comments style. (Iago Toral)
Fixes KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
CC: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
Andreas Baierl [Thu, 20 Feb 2020 11:43:46 +0000 (12:43 +0100)]
gitlab-ci: Enable the lima job again
Flaky tests should be fixed to the best of our knowledge.
Fails and skips lists should be up-to-date again.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
Andreas Baierl [Wed, 19 Feb 2020 15:49:07 +0000 (16:49 +0100)]
gitlab-ci: lima: Add flaky tests to the skips list
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
Marek Olšák [Tue, 25 Feb 2020 00:10:21 +0000 (19:10 -0500)]
nir: fix gl_nir_lower_images for bindless images
Fixes: 7342b859afb5a7e7f9fb1813e7ab3a55a1c8a704
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>
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