mesa.git
5 years agopanfrost/midgard: Lower source modifiers for ints
Alyssa Rosenzweig [Mon, 25 Mar 2019 02:49:04 +0000 (02:49 +0000)]
panfrost/midgard: Lower source modifiers for ints

On Midgard, float ops support standard source modifiers (abs/neg) and
destination modifiers (sat/pos/round). Integer ops do not support these,
however. To cope, we use native NIR source modifiers for floats, but
lower them away to iabs/ineg for integers, implementing those ops
simultaneously to avoid regressions.

Fixes the integer tests in
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Implement b2i; improve b2f/f2b
Alyssa Rosenzweig [Mon, 25 Mar 2019 01:13:12 +0000 (01:13 +0000)]
panfrost/midgard: Implement b2i; improve b2f/f2b

Fixes
dEQP-GLES2.functional.shaders.conversions.scalar_to_scalar.bool_to_int_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Lower i2b32
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:56:48 +0000 (00:56 +0000)]
panfrost/midgard: Lower i2b32

Fixes
dEQP-GLES2.functional.shader.conversions.scalar_to_scalar.int_to_bool_vertex

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Lower f2b32 to fne
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:53:46 +0000 (00:53 +0000)]
panfrost/midgard: Lower f2b32 to fne

Fixes
dEQP-GLES2.functional.shaders.swizzles.vector_swizzles.mediump_bvec2_x_vertex

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Lower bool_to_int32
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:25:01 +0000 (00:25 +0000)]
panfrost/midgard: Lower bool_to_int32

Fixes dEQP-GLES2.functional.shaders.linkage.varying_type_vec2 (among
many others).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Map more bany/ball opcodes
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:12:06 +0000 (00:12 +0000)]
panfrost/midgard: Map more bany/ball opcodes

Some of these are not yet fully functional due to related bugs, but this
the correct op mapping. The native ball/bany opcodes act on vec4's
unconditionally. That said, both ball and bany have the nice property
that duplicating an argument does not affect their output, so the
default "hanging swizzles" allow us to implement 2/3-component opcodes
correctly, implicitly lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Add more ball/bany, iabs ops
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:07:32 +0000 (00:07 +0000)]
panfrost/midgard: Add more ball/bany, iabs ops

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Schedule ball/bany to vectors
Alyssa Rosenzweig [Sun, 24 Mar 2019 22:41:15 +0000 (22:41 +0000)]
panfrost/midgard: Schedule ball/bany to vectors

Though they output scalars, they need a vector unit to make sense.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Add fcsel_i opcode
Alyssa Rosenzweig [Sun, 24 Mar 2019 22:27:06 +0000 (22:27 +0000)]
panfrost/midgard: Add fcsel_i opcode

Whereas a normal fcsel acts on a boolean input in r31.w, the fcsel_i
variant acts on an integer input in r31.w, which can be preloaded with
an instruction like imov (with the appropriate negate flag on the
source).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Implement scissor test
Alyssa Rosenzweig [Sun, 24 Mar 2019 21:51:49 +0000 (21:51 +0000)]
panfrost: Implement scissor test

This preliminary implementation should handle some basic cases. Future
work should scissor the FRAGMENT job as well for efficiency.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Fix viewports
Alyssa Rosenzweig [Sun, 24 Mar 2019 20:01:15 +0000 (20:01 +0000)]
panfrost: Fix viewports

Our viewport code hardcoded a number of wrong assumptions, which sort of
sometimes worked but was definitely wrong (and broke most of dEQP). This
corrects the logic, accounting for flipped-Y framebuffers, which
fixes... most of dEQP.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Fix b2f32 swizzle for vectors
Alyssa Rosenzweig [Sun, 24 Mar 2019 16:07:31 +0000 (16:07 +0000)]
panfrost/midgard: Fix b2f32 swizzle for vectors

Fixes issues in most of dEQP-GLES2.functional.shaders.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agosoftpipe: fix clears to only clear specified color buffers.
Dave Airlie [Tue, 26 Mar 2019 05:25:18 +0000 (15:25 +1000)]
softpipe: fix clears to only clear specified color buffers.

This fixes piglit clearbuffer-mixed-format

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agodraw/vs: partly fix basevertex/vertex id
Dave Airlie [Mon, 25 Mar 2019 05:38:18 +0000 (15:38 +1000)]
draw/vs: partly fix basevertex/vertex id

This gets the basevertex from the draw depending on whether
it's an indexed or non-indexed draw.

We still fail a transform feedback test for vertex id, as
the vertex id actually an index id, and isn't getting translated
properly to a vertex id, suggestions on how/where to fix that welcome.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agoamd/surface: provide firstMipIdInTail for metadata surface calculations
Nicolai Hähnle [Wed, 9 Jan 2019 11:42:28 +0000 (12:42 +0100)]
amd/surface: provide firstMipIdInTail for metadata surface calculations

This field was added in a recent addrlib update, and while there
currently seems to be no issue with skipping it, we will have to
set it correctly in the future.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoac/nir: Return frag_coord as integer.
Bas Nieuwenhuizen [Tue, 19 Mar 2019 00:29:43 +0000 (01:29 +0100)]
ac/nir: Return frag_coord as integer.

To preserve the invariant that nir ssa defs are integers or pointers
in LLVM.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agofreedreno/ir3: Fix operand order for DSX/DSY
Kristian H. Kristensen [Mon, 25 Mar 2019 21:04:20 +0000 (14:04 -0700)]
freedreno/ir3: Fix operand order for DSX/DSY

Most cat5 instructions are constructed using ir3_SAM, which uses
regs[1] for the (sampler, tex) src. Not DSX/DSY though, so we look up
src1 and src2 differently for those two.

Fixes: 1dffb089 ("freedreno/ir3: fix sam.s2en encoding")
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: Track whether shader needs derivatives
Kristian H. Kristensen [Mon, 25 Mar 2019 21:12:41 +0000 (14:12 -0700)]
freedreno/ir3: Track whether shader needs derivatives

In 1088b788 ("freedreno/ir3: find # of samplers from uniform vars") we
started counting number of samplers based on the uniform vars instead
of number of cat5 instructions.  We used the number of samplers to
determine whether to enable derivatives, but when we only use
derivatives and no samplers, that now breaks.  Track whether we need
derivatives explicitly and use that to enable the state.

Fixes: 1088b788 ("freedreno/ir3: find # of samplers from uniform vars")
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agost/nine: enable csmt per default on iris
Andre Heider [Wed, 20 Mar 2019 20:38:40 +0000 (21:38 +0100)]
st/nine: enable csmt per default on iris

iris is thread safe, enable csmt for a ~5% performace boost.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
5 years agospirv: Handle the NonUniformEXT decoration
Jason Ekstrand [Wed, 27 Feb 2019 21:59:29 +0000 (15:59 -0600)]
spirv: Handle the NonUniformEXT decoration

5 years agonir: Add access flags to deref and SSBO atomics
Jason Ekstrand [Mon, 4 Mar 2019 19:04:45 +0000 (13:04 -0600)]
nir: Add access flags to deref and SSBO atomics

We will need them for a new ACCESS_NON_UNIFORM flag that's about to be
added in the next commit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agonir: Add texture sources and intrinsics for bindless
Jason Ekstrand [Sun, 28 Oct 2018 12:52:44 +0000 (07:52 -0500)]
nir: Add texture sources and intrinsics for bindless

On Intel, we have both bindless and bindful and we'd like to use them at
the same time if we can so we need to be able to distinguish at the NIR
level between the two.  This also fixes nir_lower_tex to properly handle
bindless in its tex_texture_size and get_texture_lod helpers.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/fs: Make alpha test work with MRT and sample mask
Danylo Piliaiev [Wed, 27 Feb 2019 15:10:42 +0000 (17:10 +0200)]
intel/fs: Make alpha test work with MRT and sample mask

Fix the order of src0_alpha and sample mask in fb payload.
From SKL PRM Volume 7, "Data Payload Register Order
for Render Target Write Messages":
 Type   S0A  oM  sZ  oS  M2     M3       M4
 SIMD8   1   1   0   0   s0A    oM       R
 SIMD16  1   1   0   0   1/0s0A 3/2s0A   oM

It also fixes working of alpha to coverage with sample mask
on GEN6 since now they are in correct order.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoi965,iris,anv: Make alpha to coverage work with sample mask
Danylo Piliaiev [Wed, 20 Feb 2019 17:39:18 +0000 (19:39 +0200)]
i965,iris,anv: Make alpha to coverage work with sample mask

From "Alpha Coverage" section of SKL PRM Volume 7:
 "If Pixel Shader outputs oMask, AlphaToCoverage is disabled in
  hardware, regardless of the state setting for this feature."

From OpenGL spec 4.6, "15.2 Shader Execution":
 "The built-in integer array gl_SampleMask can be used to change
 the sample coverage for a fragment from within the shader."

From OpenGL spec 4.6, "17.3.1 Alpha To Coverage":
 "If SAMPLE_ALPHA_TO_COVERAGE is enabled, a temporary coverage value
  is generated where each bit is determined by the alpha value at the
  corresponding sample location. The temporary coverage value is then
  ANDed with the fragment coverage value to generate a new fragment
  coverage value."

Similar wording could be found in Vulkan spec 1.1.100
"25.6. Multisample Coverage"

Thus we need to compute alpha to coverage dithering manually in shader
and replace sample mask store with the bitwise-AND of sample mask and
alpha to coverage dithering.

The following formula is used to compute final sample mask:
  m = int(16.0 * clamp(src0_alpha, 0.0, 1.0))
  dither_mask = 0x1111 * ((0xfea80 >> (m & ~3)) & 0xf) |
     0x0808 * (m & 2) | 0x0100 * (m & 1)
  sample_mask = sample_mask & dither_mask
Credits to Francisco Jerez <currojerez@riseup.net> for creating it.

It gives a number of ones proportional to the alpha for 2, 4, 8 or 16
least significant bits of the result.

GEN6 hardware does not have issue with simultaneous usage of sample mask
and alpha to coverage however due to the wrong sending order of oMask
and src0_alpha it is still affected by it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109743

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agonir: Add a lowering pass for non-uniform resource access
Jason Ekstrand [Wed, 27 Feb 2019 20:36:44 +0000 (14:36 -0600)]
nir: Add a lowering pass for non-uniform resource access

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agonir/lower_io: Add a bounds-checked 64-bit global address format
Jason Ekstrand [Wed, 9 Jan 2019 20:56:02 +0000 (14:56 -0600)]
nir/lower_io: Add a bounds-checked 64-bit global address format

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agodraw/gs: fix point size outputs from geometry shader.
Dave Airlie [Mon, 25 Mar 2019 05:12:13 +0000 (15:12 +1000)]
draw/gs: fix point size outputs from geometry shader.

If the geom shader emits a point size we failed to find it here,
use the correct API to look it up.

Fixes:
tests/spec/glsl-1.50/execution/geometry/point-size-out.shader_test

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agodraw: bail instead of assert on instance count (v2)
Dave Airlie [Mon, 25 Mar 2019 03:17:31 +0000 (13:17 +1000)]
draw: bail instead of assert on instance count (v2)

With indirect rendering it's fine to set the instance count
parameter to 0, and expect the rendering to be ignored.

Fixes assert in KHR-GLES31.core.compute_shader.pipeline-gen-draw-commands
on softpipe

v2: return earlier before changing fpstate

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agovl/dri3: remove the wait before getting back buffer
Leo Liu [Tue, 19 Mar 2019 17:37:39 +0000 (13:37 -0400)]
vl/dri3: remove the wait before getting back buffer

The wait here is unnecessary since we got a pool of back buffers,
and the wait for swap buffer will happen before the present pixmap,
at the same time the previous back buffer will be put back to pool
for reuse after the check for PresentIdleNotify event

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
5 years agocompiler/nir: add lowering for 16-bit ldexp
Iago Toral Quiroga [Thu, 24 May 2018 07:54:45 +0000 (09:54 +0200)]
compiler/nir: add lowering for 16-bit ldexp

v2 (Topi):
 - Make bit-size handling order be 16-bit, 32-bit, 64-bit
 - Clamp lower exponent range at -28 instead of -30.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agocompiler/nir: add lowering for 16-bit flrp
Iago Toral Quiroga [Wed, 18 Apr 2018 09:02:51 +0000 (11:02 +0200)]
compiler/nir: add lowering for 16-bit flrp

And enable it on Intel.

v2:
 - Squash the change to enable it on Intel (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agocompiler/nir: add lowering option for 16-bit fmod
Iago Toral Quiroga [Wed, 18 Apr 2018 08:50:35 +0000 (10:50 +0200)]
compiler/nir: add lowering option for 16-bit fmod

And enable it on Intel.

v2:
 - Squash the change to enable this lowering on Intel (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agost/mesa: fix texture deletion context mix-up issues (v2)
Brian Paul [Thu, 21 Mar 2019 19:41:12 +0000 (13:41 -0600)]
st/mesa: fix texture deletion context mix-up issues (v2)

When we destroy a context, we need to temporarily make that context
the current one for the thread.

That's because during context tear-down we make many calls to
_mesa_reference_texobj(&texObj, NULL).  Note there's no context
parameter.  If the texture's refcount goes to zero and we need to
delete it, we use the thread's current context.  But if that context
isn't the context we're tearing down, we get into trouble when
deallocating sampler views.  See patch 593e36f956 ("st/mesa:
implement "zombie" sampler views (v2)") for background information.

Also, we need to release any sampler views attached to the fallback
textures.

Fixes a crash on exit with a glretrace of the Nobel Clinician
application.

v2: at end of st_destroy_context(), check if save_ctx == ctx and
unbind the context if so.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agonir: fix a few signed/unsigned comparison warnings
Brian Paul [Fri, 22 Mar 2019 01:19:05 +0000 (19:19 -0600)]
nir: fix a few signed/unsigned comparison warnings

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoandroid: static link with libexpat with Android O+
Kishore Kadiyala [Mon, 11 Mar 2019 09:23:03 +0000 (11:23 +0200)]
android: static link with libexpat with Android O+

In Android O, MESA needs to statically link libexpat so that
it's in same VNDK namespace.

v2: apply change also to anv driver (Tapani)
v3: use += in anv change (Eric Engestrom)

Change-Id: I82b0be5c817c21e734dfdf5bfb6a9aa1d414ab33
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoradv: write availability status vkGetQueryPoolResults() when the data is not available
Samuel Iglesias Gonsálvez [Thu, 21 Mar 2019 16:43:56 +0000 (17:43 +0100)]
radv: write availability status vkGetQueryPoolResults() when the data is not available

If VK_QUERY_RESULT_WITH_AVAILABILY_BIT is set and
VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not
set, we need return to VK_NOT_READY only and set the availability
status field for each query.

From Vulkan spec:

"If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both
not set then no result values are written to pData for queries that are
in the unavailable state at the time of the call, and
vkGetQueryPoolResults returns VK_NOT_READY. However, availability state
is still written to pData for those queries if
VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set."

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoradv: don't overwrite results in VkGetQueryPoolResults() when queries are not available
Samuel Iglesias Gonsálvez [Fri, 22 Mar 2019 09:03:29 +0000 (10:03 +0100)]
radv: don't overwrite results in VkGetQueryPoolResults() when queries are not available

If the query is not available and VK_QUERY_RESULT_WAIT_BIT and
VK_QUERY_RESULT_PARTIAL_BIT are both not set, the spec doesn't
allow to modify its result.

From Vulkan spec:

"If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are
both not set then no result values are written to pData for queries
that are in the unavailable state at the time of the call, and
vkGetQueryPoolResults returns VK_NOT_READY. However, availability state
is still written to pData for those queries
if VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set."

v2:
- Move VK_NOT_READY change to next patch (Samuel Pitoiset)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agost/mesa: fix warnings about implicit conversion on enumeration type
Tapani Pälli [Fri, 22 Mar 2019 12:33:00 +0000 (14:33 +0200)]
st/mesa: fix warnings about implicit conversion on enumeration type

These enums match but compiler warns about implicit conversion.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agost/mesa: fix compilation warning on storage_flags_to_buffer_flags
Tapani Pälli [Fri, 22 Mar 2019 12:29:38 +0000 (14:29 +0200)]
st/mesa: fix compilation warning on storage_flags_to_buffer_flags

(warning: 'const' type qualifier on return type has no effect)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agonir/split_vars: fixup some more explicit_stride related issues.
Dave Airlie [Fri, 22 Mar 2019 04:21:55 +0000 (14:21 +1000)]
nir/split_vars: fixup some more explicit_stride related issues.

With vkpipelinedb Samuel discovered a regression since we stopped
stripping types at the spir-v level.

This adds a check to the var splitting for the case where it
asserts the type hasn't changed, when it has just created a bare
type, and it's different than the original type which has an explicit
stride.

This also removes a pointless assert that also triggers.

Fixes: 3b3653c4cf (nir/spirv: don't use bare types, remove assert in split vars for testing)
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agospirv: Use interface type for block and buffer block
Caio Marcelo de Oliveira Filho [Thu, 21 Mar 2019 20:26:48 +0000 (13:26 -0700)]
spirv: Use interface type for block and buffer block

Also handle GLSL_TYPE_INTERFACE the same way we do GLSL_TYPE_STRUCT in
various places.  Motivated by ARB_gl_spirv work, that will take
advantage of the interface types when handling NIR coming from SPIR-V.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agointel/compiler: handle GLSL_TYPE_INTERFACE as GLSL_TYPE_STRUCT
Caio Marcelo de Oliveira Filho [Thu, 21 Mar 2019 22:02:38 +0000 (15:02 -0700)]
intel/compiler: handle GLSL_TYPE_INTERFACE as GLSL_TYPE_STRUCT

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agospirv: Add an execution environment to the options
Caio Marcelo de Oliveira Filho [Fri, 22 Mar 2019 05:37:50 +0000 (22:37 -0700)]
spirv: Add an execution environment to the options

Also updates gl_spirv to pick the right one.  At the moment nothing
uses it, but upcoming functionality part of ARB_gl_spirv will use it,
and we also later can be more assertful when handling certain features
for each of the execution environments.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
5 years agoegl: Add a 565 pbuffer-only EGL config under X11.
Eric Anholt [Sat, 25 Aug 2018 21:16:59 +0000 (14:16 -0700)]
egl: Add a 565 pbuffer-only EGL config under X11.

The CTS requires a 565-no-depth-no-stencil (meaning d/s not-required, not
not-present) config for ES 3.0, but at depth 24 of X11 we wouldn't do so.
We can satisfy that bad requirement using a pbuffer-only visual with
whatever other buffers the driver happens to have given us.

I've tried to raise this as an absurd requirement with Khronos and made no
progress.

v2: Make sure it's single sample, no depth, no stencil.  Comment typo fix

Reviewed-by: Adam Jackson <ajax@redhat.com>
5 years agonir: Handle array-deref-of-vector case in loop analysis
Caio Marcelo de Oliveira Filho [Fri, 22 Mar 2019 03:37:12 +0000 (20:37 -0700)]
nir: Handle array-deref-of-vector case in loop analysis

SPIR-V can produce those for SSBO and UBO access.  Found when testing
the ARB_gl_spirv series.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agodocs: update freedreno status
Rob Clark [Fri, 22 Mar 2019 20:35:48 +0000 (16:35 -0400)]
docs: update freedreno status

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno: add ESSL cap
Rob Clark [Thu, 21 Mar 2019 13:33:33 +0000 (09:33 -0400)]
freedreno: add ESSL cap

Report 320 for a6xx, which isn't *quite* true (no geom/tess, in
particular), but other caps keep the reported GL and GLSL versions
correct (3.1 / 3.10 es).  But reporting 320 will switch on
EXT_gpu_shader5, which is the goal.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agomesa/st: use ESSL cap top enable gpu_shader5
Rob Clark [Thu, 21 Mar 2019 13:29:58 +0000 (09:29 -0400)]
mesa/st: use ESSL cap top enable gpu_shader5

For GLES2+ contexts, enable EXT_gpu_shader5 if the driver exposes a
sufficiently high ESSL feature level, even if the GLSL feature level
isn't high enough.

This allows drivers to support EXT_gpu_shader5 in GLES contexts before
they support all the additional features of ARB_gpu_shader5 in GL
contexts.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agogallium: add PIPE_CAP_ESSL_FEATURE_LEVEL
Rob Clark [Thu, 21 Mar 2019 12:56:17 +0000 (08:56 -0400)]
gallium: add PIPE_CAP_ESSL_FEATURE_LEVEL

Adds a new cap to allow drivers to expose higher shading language
versions in GLES contexts, to avoid having to report an artificially
low version for the benefit of GL contexts.

The motivation is to expose EXT_gpu_shader5 even though a driver may
not support all the features needed for the corresponding GL extension
(ARB_gpu_shader5).

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agoswr: Fix build with llvm-9.0.
Vinson Lee [Mon, 18 Mar 2019 18:52:48 +0000 (11:52 -0700)]
swr: Fix build with llvm-9.0.

Fix build error after llvm-9.0svn r352827 ("[opaque pointer types] Add a
FunctionCallee wrapper type, and use it.").

In file included from ./rasterizer/jitter/builder.h:158:0,
                 from swr_shader.cpp:35:
./rasterizer/jitter/gen_builder_meta.hpp: In member function ‘llvm::Value* SwrJit::Builder::VGATHERPD(llvm::Value*, llvm::Value*, llvm::Value*, llvm::Value*, llvm::Value*, const llvm:
:Twine&)’:
./rasterizer/jitter/gen_builder_meta.hpp:51:117: error: no matching function for call to ‘cast(llvm::FunctionCallee)’
     Function* pFunc = cast<Function>(JM()->mpCurrentModule->getOrInsertFunction("meta.intrinsic.VGATHERPD", pFuncTy));
                                                                                                                     ^

Suggested-by: Philip Meulengracht <the_meulengracht@hotmail.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alok Hota <alok.hota@intel.com>
5 years agobin/install_megadrivers.py: Fix regression for set DESTDIR
Dylan Baker [Thu, 21 Mar 2019 16:09:20 +0000 (09:09 -0700)]
bin/install_megadrivers.py: Fix regression for set DESTDIR

The previous patch tried to address a bug when DESTDIR is '', however,
it introduces a bug when DESTDIR is not '', and fakeroot is used. This
patch does fix that, and has been tested with the arch pkg-build to
ensure it isn't regressed.

Fixes: 093a1ade4e24b7dd701a093d30a71efd669fe9c8
       ("bin/install_megadrivers.py: Correctly handle DESTDIR=''")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110221
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
5 years agospirv,nir: lower frexp_exp/frexp_sig inside a new NIR pass
Samuel Pitoiset [Fri, 22 Mar 2019 08:24:57 +0000 (09:24 +0100)]
spirv,nir: lower frexp_exp/frexp_sig inside a new NIR pass

This lowering isn't needed for RADV because AMDGCN has two
instructions. It will be disabled for RADV in an upcoming series.

While we are at it, factorize a little bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: use generic float types for frexp_exp and frexp_sig
Samuel Pitoiset [Fri, 22 Mar 2019 12:02:08 +0000 (13:02 +0100)]
nir: use generic float types for frexp_exp and frexp_sig

Only the exponent needs to be 32-bit signed integer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: Fix anonymous union initialization with older GCC.
Vinson Lee [Thu, 21 Mar 2019 21:47:06 +0000 (14:47 -0700)]
nir: Fix anonymous union initialization with older GCC.

Fix this build error with GCC 4.4.7.

  CC     nir/nir_opt_copy_prop_vars.lo
nir/nir_opt_copy_prop_vars.c: In function ‘load_element_from_ssa_entry_value’:
nir/nir_opt_copy_prop_vars.c:454: error: unknown field ‘ssa’ specified in initializer
nir/nir_opt_copy_prop_vars.c:455: error: unknown field ‘def’ specified in initializer
nir/nir_opt_copy_prop_vars.c:456: error: unknown field ‘component’ specified in initializer
nir/nir_opt_copy_prop_vars.c:456: error: extra brace group at end of initializer
nir/nir_opt_copy_prop_vars.c:456: error: (near initialization for ‘(anonymous).<anonymous>’)
nir/nir_opt_copy_prop_vars.c:456: warning: excess elements in union initializer
nir/nir_opt_copy_prop_vars.c:456: warning: (near initialization for ‘(anonymous).<anonymous>’)

Fixes: 96c32d77763c ("nir/copy_prop_vars: handle load/store of vector elements")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109810
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoiris: Push heavy memchecker code to DEBUG
Chris Wilson [Wed, 21 Nov 2018 11:12:11 +0000 (11:12 +0000)]
iris: Push heavy memchecker code to DEBUG

Invoking VALGRIND_CHECK_MEM_IS_DEFINED pulls in enough code to convince
gcc to not inline __gen_uint and results in a lot of packing code ending
up out-of-line with lots of stack copying. To ameliorate this, only
insert the check inside the packer if DEBUG is defined and instead
perform the validation checking before submitting the batch to the
kernel. This should give accurate results if --trace-origins=yes is
used, and failing that we can recompile in full debug mode to check on
insertion.

Improve drawoverhead baseline by 25% with a default build with
valgrind-dev installed (with effectively no loss of vg coverage).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoiris: Fix batch chaining map_next increment.
Kenneth Graunke [Fri, 22 Mar 2019 16:29:40 +0000 (09:29 -0700)]
iris: Fix batch chaining map_next increment.

Caught by Chris Wilson; split out from his valgrind patch.

5 years agofreedreno/ir3: disable early-z for SSBO/image writes
Rob Clark [Thu, 21 Mar 2019 19:57:06 +0000 (15:57 -0400)]
freedreno/ir3: disable early-z for SSBO/image writes

Fixes:

dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth
dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_stencil
dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth_fbo
dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_stencil_fbo

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: rename has_kill to no_earlyz
Rob Clark [Thu, 21 Mar 2019 19:48:54 +0000 (15:48 -0400)]
freedreno/ir3: rename has_kill to no_earlyz

There are other cases where we need to disable early-z, like image
writes.  So rename to something more generic.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agoac/nir: implement 16-bit pack/unpack opcodes
Rhys Perry [Thu, 6 Dec 2018 14:40:23 +0000 (14:40 +0000)]
ac/nir: implement 16-bit pack/unpack opcodes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agovulkan/overlay: improve error reporting
Lionel Landwerlin [Tue, 19 Mar 2019 12:34:51 +0000 (12:34 +0000)]
vulkan/overlay: improve error reporting

We can show the actual command & line where the failure happened

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agovulkan/overlay: check return value of swapchain get images
Lionel Landwerlin [Sat, 16 Mar 2019 18:51:49 +0000 (18:51 +0000)]
vulkan/overlay: check return value of swapchain get images

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agovulkan/overlay: silence validation layer warnings
Lionel Landwerlin [Sat, 16 Mar 2019 18:51:11 +0000 (18:51 +0000)]
vulkan/overlay: silence validation layer warnings

v2: Drop call to FreeDescriptorSet

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agovulkan/overlay: properly register layer object with loader
Lionel Landwerlin [Sat, 16 Mar 2019 18:50:40 +0000 (18:50 +0000)]
vulkan/overlay: properly register layer object with loader

This is required by the validation layers if we want to validate the
commands inserted by the overlay layer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agoradv: Fix driverUUID
Józef Kucia [Tue, 12 Mar 2019 15:07:10 +0000 (16:07 +0100)]
radv: Fix driverUUID

Fixes: 14cad8786a8 ("radv: generate the same driver UUID as radeonsi")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoglsl: Cross validate variable's invariance by explicit invariance only
Danylo Piliaiev [Tue, 4 Sep 2018 08:42:04 +0000 (11:42 +0300)]
glsl: Cross validate variable's invariance by explicit invariance only

'invariant' qualifier is propagated on variables which are used
to calculate other invariant variables, however when we are matching
variable's declarations we should take into account only explicitly
declared invariance because invariance propagation is an implementation
specific detail.

Thus new flag is added to ir_variable_data which indicates 'invariant'
qualifier being explicitly set in the shader.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100316
Fixes: 89b60492 ('glsl: Add a pass to propagate the "invariant" and
  "precise" qualifiers')

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agomesa: Fix GL_NUM_DEVICE_UUIDS_EXT
Józef Kucia [Tue, 12 Mar 2019 15:11:41 +0000 (16:11 +0100)]
mesa: Fix GL_NUM_DEVICE_UUIDS_EXT

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agoiris: Skip resolves and flushes altogether if unnecessary
Kenneth Graunke [Mon, 11 Mar 2019 07:04:56 +0000 (00:04 -0700)]
iris: Skip resolves and flushes altogether if unnecessary

Improves drawoverhead baseline scores by 1.17x.

5 years agoiris: Skip framebuffer resolve tracking if framebuffer isn't dirty
Kenneth Graunke [Sat, 9 Mar 2019 09:27:20 +0000 (01:27 -0800)]
iris: Skip framebuffer resolve tracking if framebuffer isn't dirty

Improves drawoverhead baseline score by 1.86x.

5 years agoiris: Skip input resolve handling if bindings haven't changed
Kenneth Graunke [Sat, 9 Mar 2019 09:31:06 +0000 (01:31 -0800)]
iris: Skip input resolve handling if bindings haven't changed

This brings the drawoverhead 16 Tex w/ no state change score from
22% of baseline to 97% of baseline.

5 years agoiris: Fix util_vma_heap_init size for IRIS_MEMZONE_SHADER
Kenneth Graunke [Thu, 21 Mar 2019 21:56:12 +0000 (14:56 -0700)]
iris: Fix util_vma_heap_init size for IRIS_MEMZONE_SHADER

Fixes assertions when disabling bucket allocators.

5 years agosoftpipe: fix integer texture swizzling for 1 vs 1.0f
Dave Airlie [Thu, 21 Mar 2019 05:22:02 +0000 (15:22 +1000)]
softpipe: fix integer texture swizzling for 1 vs 1.0f

The swizzling was putting float one in not integer 1.

This fixes a lot of arb_texture_view-rendering-formats cases.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agosoftpipe: remove shadow_ref assert.
Dave Airlie [Thu, 21 Mar 2019 04:27:14 +0000 (14:27 +1000)]
softpipe: remove shadow_ref assert.

I don't think this really buys us anything and TG4 with cubemap arrays
falls over because sampler == 2, but otherwise works fine.

Fixes:
./bin/textureGather fs shadow r  CubeArray repeat

on softpipe with ARB_gpu_shader5 enabled.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agosoftpipe: handle 32-bit bitfield inserts
Dave Airlie [Thu, 21 Mar 2019 04:15:43 +0000 (14:15 +1000)]
softpipe: handle 32-bit bitfield inserts

Fixes piglits if ARB_gpu_shader5 is enabled

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agosoftpipe: fix 32-bit bitfield extract
Dave Airlie [Thu, 21 Mar 2019 04:13:48 +0000 (14:13 +1000)]
softpipe: fix 32-bit bitfield extract

These didn't deal with the width == 32 case that TGSI is defined with.

Fixes piglit tests if ARB_gpu_shader5 is enabled.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agonir: fix opt_if_loop_last_continue()
Timothy Arceri [Wed, 20 Mar 2019 11:59:40 +0000 (22:59 +1100)]
nir: fix opt_if_loop_last_continue()

Rather than skipping code that looked like this:

     loop {
        ...
        if (cond) {
           do_work_1();
           continue;
        } else {
           break;
        }
        do_work_2();
     }

Previously we would turn this into:

     loop {
        ...
        if (cond) {
           do_work_1();
           continue;
        } else {
           do_work_2();
           break;
        }
     }

This was clearly wrong. This change checks for this case and makes
sure we now leave it for nir_opt_dead_cf() to clean up.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agoanv: fix build on Nougat
Gurchetan Singh [Tue, 19 Mar 2019 02:06:05 +0000 (19:06 -0700)]
anv: fix build on Nougat

AHardwareBuffer is only available on O and above.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agoanv: move anv_GetMemoryAndroidHardwareBufferANDROID up a bit
Gurchetan Singh [Wed, 20 Mar 2019 02:20:53 +0000 (19:20 -0700)]
anv: move anv_GetMemoryAndroidHardwareBufferANDROID up a bit

No functional change, just makes the next patch a little easier.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agoconfigure.ac / meson: depend on libnativewindow when appropriate
Gurchetan Singh [Fri, 15 Mar 2019 17:08:45 +0000 (10:08 -0700)]
configure.ac / meson: depend on libnativewindow when appropriate

libnativewindow is only available on O or greater, and it's
required for some features.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agov3d: Remove some dead members of struct v3d_compile.
Eric Anholt [Tue, 19 Mar 2019 21:05:30 +0000 (14:05 -0700)]
v3d: Remove some dead members of struct v3d_compile.

These are more vc4 leftovers.

5 years agov3d: Upload all of UBO[0] if any indirect load occurs.
Eric Anholt [Tue, 19 Mar 2019 16:58:14 +0000 (09:58 -0700)]
v3d: Upload all of UBO[0] if any indirect load occurs.

The idea was that we could skip uploading the constant-indexed uniform
data and just upload the uniforms that are variably-indexed.  However,
since the VS bin and render shaders may have a different set of uniforms
used, this meant that we had to upload the UBO for each of them.  The
first case is generally a fairly small impact (usually the uniform array
is the most space, other than a couple of FSes in shader-db), while the
second is a larger impact: 3DMMES2 was uploading 38k/frame of uniforms
instead of 18k.

Given that the optimization is of dubious value, has a big downside, and
is quite a bit of code, just drop it.  No change in shader-db.  No change
on 3DMMES2 (n=15).

5 years agov3d: Move constant offsets to UBO addresses into the main uniform stream.
Eric Anholt [Tue, 19 Mar 2019 18:39:58 +0000 (11:39 -0700)]
v3d: Move constant offsets to UBO addresses into the main uniform stream.

We'd end up with the constant offset in the uniform stream anyway, since
they're bigger than small immediates.  Avoids the extra uniforms and adds
in the shader in favor of just adding once on the CPU.

shader-db:
total instructions in shared programs: 6496865 -> 6494851 (-0.03%)
total uniforms in shared programs: 2119511 -> 2117243 (-0.11%)

5 years agov3d: Rename v3d_tmu_config_data to v3d_unit_data.
Eric Anholt [Tue, 19 Mar 2019 18:29:02 +0000 (11:29 -0700)]
v3d: Rename v3d_tmu_config_data to v3d_unit_data.

I want to reuse this for encoding small constant UBO/SSBO offsets into the
uniform stream to reduce the extra uniform loads and adds for the small
constant offsets.

5 years agoconfigure.ac/meson.build: Add options for library suffixes
Benjamin Gordon [Wed, 13 Jun 2018 22:17:32 +0000 (16:17 -0600)]
configure.ac/meson.build: Add options for library suffixes

When building the Chrome OS Android container, we need to build copies
of mesa that don't conflict with the Android system-supplied libraries.
This adds options to create suffixed versions of EGL and GLES libraries:

libEGL.so -> libEGL${egl-lib-suffix}.so
libGLESv1_CM.so -> libGLESv1_CM${gles-lib-suffix}.so
libGLESv2.so -> libGLES${gles-lib-suffix}.so

This is similar to what happens when --enable-libglvnd is specified, but
without the side effects of linking against libglvnd.  To avoid
unexpected clashes with the suffixed appended by libglvnd, make it an
error to specify both --enable-libglvnd and --with-egl-lib-suffix.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agonir: Record non-vector/scalar varyings as unmovable when compacting
Kenneth Graunke [Wed, 20 Mar 2019 04:40:51 +0000 (21:40 -0700)]
nir: Record non-vector/scalar varyings as unmovable when compacting

In some cases, we can end up with varying structs that aren't split to
their member variables.  nir_compact_varyings attempted to record these
as unmovable, so it would leave them be.  Unfortunately, it didn't do
it right for non-vector/scalar types.  It set the mask to:

   ((1 << (elements * dmul)) - 1) << var->data.location_frac

where elements is the number of vector elements.  For structures and
other non-vector/scalars, elements is 0...so the whole mask became 0.

This caused nir_compact_varyings to assign other varyings on top of
the structure varying's location (as it appeared to take up no space).

To combat this, we just set elements to 4 for non-vector/scalar types,
so that the entire slot gets marked as unmovable.

Fixes KHR-GL45.tessellation_shader.tessellation_control_to_tessellation_evaluation.gl_in on iris.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agofreedreno/ir3: dynamic UBO indexing vs 64b pointers
Rob Clark [Wed, 20 Mar 2019 14:38:01 +0000 (10:38 -0400)]
freedreno/ir3: dynamic UBO indexing vs 64b pointers

Fixes dEQP-GLES31.functional.shaders.opaque_type_indexing.ubo.uniform_fragment
and similar things with multiple UBOs

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: fix bit_count
Rob Clark [Wed, 20 Mar 2019 12:53:44 +0000 (08:53 -0400)]
freedreno/ir3: fix bit_count

Seems like it can only work 16b at a time.  Fixes
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.*

TODO need to check if this limitation applies to a3xx as well.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: additional lowering
Rob Clark [Tue, 19 Mar 2019 18:45:40 +0000 (14:45 -0400)]
freedreno/ir3: additional lowering

For some things that show up when we expose higher glsl

TODO check blob traces to see if we have instructions for some of this?
I guess we don't but worth a check..

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: optimize sam.s2en to sam
Rob Clark [Tue, 19 Mar 2019 17:30:03 +0000 (13:30 -0400)]
freedreno/ir3: optimize sam.s2en to sam

Detect when sampler/texture idx are immediate and switch to non s2en
encoding.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: enable indirect tex/samp (sam.s2en)
Rob Clark [Sat, 16 Mar 2019 14:33:26 +0000 (10:33 -0400)]
freedreno/ir3: enable indirect tex/samp (sam.s2en)

For now it uses indirect for everything.  The next step is for the
ir3_cp pass to detect the case that tex and samp idx are immediate
and convert the sam instruction back to the non .s2en variant.  But
doing that in a following patch so we can shake out the bugs with
.s2en more easily.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: find # of samplers from uniform vars
Rob Clark [Tue, 19 Mar 2019 16:51:39 +0000 (12:51 -0400)]
freedreno/ir3: find # of samplers from uniform vars

When we have indirect samplers, we cannot tell the max sampler
referenced.  Instead just refer to the number of sampler uniforms.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agonir: move gls_type_get_{sampler,image}_count()
Rob Clark [Tue, 19 Mar 2019 19:54:32 +0000 (15:54 -0400)]
nir: move gls_type_get_{sampler,image}_count()

I need at least the sampler variant in ir3..

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agofreedreno/ir3: fix regmask for merged regs
Rob Clark [Sat, 16 Mar 2019 15:45:16 +0000 (11:45 -0400)]
freedreno/ir3: fix regmask for merged regs

On a6xx+ with half-regs conflicting with full-regs, the legalize pass
needs to set appropriate sync bits, such as (sy), on writes to full regs
that conflict with half regs, and visa-versa.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: fix sam.s2en encoding
Rob Clark [Sat, 16 Mar 2019 14:29:44 +0000 (10:29 -0400)]
freedreno/ir3: fix sam.s2en encoding

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: fix sam.s2en decoding
Rob Clark [Sat, 16 Mar 2019 14:29:05 +0000 (10:29 -0400)]
freedreno/ir3: fix sam.s2en decoding

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3/ra: fix half-class conflicts
Rob Clark [Sat, 16 Mar 2019 14:03:12 +0000 (10:03 -0400)]
freedreno/ir3/ra: fix half-class conflicts

On a6xx, half-regs conflict with full-regs.  But we were only setting up
conflicts for the first class (ie. scalar, but not hvec2/hvec3/hvec4),
resulting in higher half-reg classes getting assigned to regs that
overwrite full-regs.

Noticed while trying to enable indirect-sampler (sam.s2en) which uses an
hvec2 argument to pass the sampler/tex index.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3 better cat6 encoding detection
Rob Clark [Fri, 15 Mar 2019 14:29:10 +0000 (10:29 -0400)]
freedreno/ir3 better cat6 encoding detection

These two bits seem to be a better way to detect which encoding we are
looking at.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agoac: fix incorrect argument type for tbuffer.{load,store} with LLVM 7
Samuel Pitoiset [Thu, 21 Mar 2019 11:42:44 +0000 (12:42 +0100)]
ac: fix incorrect argument type for tbuffer.{load,store} with LLVM 7

GLC/SLC are boolean.

This fixes the following LLVM error when checkir is set:
Intrinsic has incorrect argument type!
void (i32, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32)* @llvm.amdgcn.tbuffer.store.i32

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
5 years agoac: fix 16-bit shifts
Samuel Pitoiset [Thu, 21 Mar 2019 10:59:37 +0000 (11:59 +0100)]
ac: fix 16-bit shifts

This fixes the following LLVM error when ckeckir is set:
Type too small for ZExt

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
5 years agoac: add 16-bit support to fract
Samuel Pitoiset [Thu, 21 Mar 2019 08:19:06 +0000 (09:19 +0100)]
ac: add 16-bit support to fract

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoac: add 16-bit support fo fsign
Samuel Pitoiset [Thu, 21 Mar 2019 09:14:30 +0000 (10:14 +0100)]
ac: add 16-bit support fo fsign

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>