Eddie Hung [Tue, 19 Mar 2019 21:54:43 +0000 (14:54 -0700)]
Fix INIT for variable length SRs that have been bumped up one
Eddie Hung [Tue, 19 Mar 2019 20:11:30 +0000 (13:11 -0700)]
Merge remote-tracking branch 'origin/master' into xc7srl
Eddie Hung [Tue, 19 Mar 2019 20:08:43 +0000 (13:08 -0700)]
Make output port a non chain user
Clifford Wolf [Tue, 19 Mar 2019 19:31:53 +0000 (20:31 +0100)]
Merge pull request #885 from YosysHQ/clifford/fix873
Add Xilinx negedge FFs to synth_xilinx dffinit call, fixes #873
Clifford Wolf [Tue, 19 Mar 2019 19:29:54 +0000 (20:29 +0100)]
Add Xilinx negedge FFs to synth_xilinx dffinit call, fixes #873
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Tue, 19 Mar 2019 16:41:40 +0000 (09:41 -0700)]
Merge pull request #808 from eddiehung/read_aiger
Add new read_aiger frontend
Eddie Hung [Tue, 19 Mar 2019 15:52:31 +0000 (08:52 -0700)]
Merge https://github.com/YosysHQ/yosys into read_aiger
Eddie Hung [Tue, 19 Mar 2019 15:52:06 +0000 (08:52 -0700)]
Add author name
Clifford Wolf [Tue, 19 Mar 2019 13:08:57 +0000 (14:08 +0100)]
Merge pull request #884 from zachjs/master
fix local name resolution in prefix constructs
Zachary Snow [Tue, 19 Mar 2019 00:34:21 +0000 (20:34 -0400)]
fix local name resolution in prefix constructs
Eddie Hung [Mon, 18 Mar 2019 23:12:19 +0000 (16:12 -0700)]
Fix shregmap to correctly recognise non chain users; cleanup
Eddie Hung [Mon, 18 Mar 2019 20:35:54 +0000 (13:35 -0700)]
shiftx NULL pointer check
Clifford Wolf [Sun, 17 Mar 2019 11:53:47 +0000 (12:53 +0100)]
Update issue template
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sun, 17 Mar 2019 11:44:23 +0000 (12:44 +0100)]
Update issue template
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Sat, 16 Mar 2019 19:49:46 +0000 (12:49 -0700)]
Cleanup
Eddie Hung [Sat, 16 Mar 2019 15:51:13 +0000 (08:51 -0700)]
Only accept <128 for variable length, only if $shiftx exclusive
Clifford Wolf [Sat, 16 Mar 2019 13:19:02 +0000 (14:19 +0100)]
Merge pull request #877 from FelixVi/master
Add note about test requirements in README
Felix Vietmeyer [Sat, 16 Mar 2019 12:20:59 +0000 (06:20 -0600)]
Add note about test requirements in README
Eddie Hung [Sat, 16 Mar 2019 06:01:40 +0000 (23:01 -0700)]
Cleanup synth_xilinx
Eddie Hung [Sat, 16 Mar 2019 02:13:40 +0000 (19:13 -0700)]
Working
Clifford Wolf [Fri, 15 Mar 2019 23:55:46 +0000 (00:55 +0100)]
Improve mix of src/wire/wirebit coverage in "mutate -list"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 15 Mar 2019 23:17:15 +0000 (00:17 +0100)]
Merge pull request #876 from YosysHQ/clifford/fmcombine
Add fmcombine pass
Clifford Wolf [Fri, 15 Mar 2019 20:45:37 +0000 (21:45 +0100)]
Add "fmcombine -fwd -bwd -nop"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 15 Mar 2019 19:18:38 +0000 (20:18 +0100)]
Add fmcombine pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 23:51:40 +0000 (00:51 +0100)]
Merge pull request #875 from YosysHQ/clifford/mutate
Add "mutate" pass
Clifford Wolf [Thu, 14 Mar 2019 23:48:23 +0000 (00:48 +0100)]
Disable realmath tests
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 23:18:31 +0000 (00:18 +0100)]
Improvements in "mutate" list-reduce algorithm
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 22:20:41 +0000 (23:20 +0100)]
Add "mutate -cfg", improve pick_cover behavior
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 22:01:55 +0000 (23:01 +0100)]
Add a strictly coverage-driven mutation selection strategy
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 22:01:01 +0000 (23:01 +0100)]
Improve "mutate" wire coverage metric
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 18:52:02 +0000 (19:52 +0100)]
Add more mutation types, improve mutation src cover
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 13 Mar 2019 18:27:17 +0000 (19:27 +0100)]
Fix smtbmc.py handling of zero appended steps
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 13 Mar 2019 16:36:37 +0000 (17:36 +0100)]
Add "mutate" command DB reduce functionality
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 13 Mar 2019 16:36:06 +0000 (17:36 +0100)]
Add hashlib "<container>::element(int n)" methods
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 13 Mar 2019 15:09:47 +0000 (16:09 +0100)]
Add "mutate -mode inv", various other mutate improvements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 12 Mar 2019 16:01:59 +0000 (17:01 +0100)]
Add basic "mutate -list N" framework
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 20:22:16 +0000 (21:22 +0100)]
Merge pull request #874 from YosysHQ/clifford/andopt
Improve handling of and-with-1 and or-with-0 in opt_expr, fixes #327
Clifford Wolf [Thu, 14 Mar 2019 19:35:15 +0000 (20:35 +0100)]
Improve handling of and-with-1 and or-with-0 in opt_expr, fixes #327
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 17:42:45 +0000 (18:42 +0100)]
Merge pull request #872 from YosysHQ/clifford/pmuxfix
Improve handling of "full_case" attributes
Clifford Wolf [Thu, 14 Mar 2019 16:51:21 +0000 (17:51 +0100)]
Improve handling of "full_case" attributes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 14 Mar 2019 16:50:20 +0000 (17:50 +0100)]
Fix a syntax bug in ilang backend related to process case statements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Thu, 14 Mar 2019 16:38:42 +0000 (09:38 -0700)]
Reverse bits in INIT parameter for Xilinx, since MSB is shifted first
Eddie Hung [Thu, 14 Mar 2019 16:06:56 +0000 (09:06 -0700)]
Misspell
Eddie Hung [Thu, 14 Mar 2019 16:01:48 +0000 (09:01 -0700)]
Revert "Add shregmap -init_msb_first and use in synth_xilinx"
This reverts commit
26ecbc1aee1dca1c186ab2b51835d74f67bc3e75.
Eddie Hung [Thu, 14 Mar 2019 15:59:19 +0000 (08:59 -0700)]
Merge remote-tracking branch 'origin/master' into xc7srl
Clifford Wolf [Thu, 14 Mar 2019 15:43:23 +0000 (16:43 +0100)]
Merge pull request #869 from cr1901/win-shell
Install launcher executable when running yosys-smtbmc on Windows.
Eddie Hung [Thu, 14 Mar 2019 15:10:02 +0000 (08:10 -0700)]
Add shregmap -init_msb_first and use in synth_xilinx
Eddie Hung [Thu, 14 Mar 2019 15:09:48 +0000 (08:09 -0700)]
Fix cells_map for SRL
Eddie Hung [Thu, 14 Mar 2019 00:13:52 +0000 (17:13 -0700)]
Move shregmap until after first techmap
Eddie Hung [Wed, 13 Mar 2019 23:17:54 +0000 (16:17 -0700)]
Refactor $__SHREG__ in cells_map.v
William D. Jones [Tue, 12 Mar 2019 21:55:47 +0000 (17:55 -0400)]
Install launcher executable when running yosys-smtbmc on Windows.
Signed-off-by: William D. Jones <thor0505@comcast.net>
Clifford Wolf [Wed, 13 Mar 2019 12:40:30 +0000 (13:40 +0100)]
Merge pull request #868 from YosysHQ/clifford/fixmem
Various mem2reg-related improvements in handling of memories
Clifford Wolf [Tue, 12 Mar 2019 20:14:50 +0000 (21:14 +0100)]
Fix a bug in handling quotes in multi-cmd lines in Yosys scripts
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 12 Mar 2019 19:27:36 +0000 (20:27 +0100)]
Merge pull request #866 from YosysHQ/clifford/idstuff
Improve determinism of IdString DB for similar scripts
Clifford Wolf [Tue, 12 Mar 2019 19:14:18 +0000 (20:14 +0100)]
Remove ice40/cells_sim.v hack to avoid warning for blocking memory writes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 12 Mar 2019 19:12:02 +0000 (20:12 +0100)]
Improve handling of memories used in mem index expressions on LHS of an assignment
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 12 Mar 2019 19:10:55 +0000 (20:10 +0100)]
Remove outdated "blocking assignment to memory" warning
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 12 Mar 2019 19:09:47 +0000 (20:09 +0100)]
Only set MEM2REG_FL_CONST_LHS/MEM2REG_FL_VAR_LHS for non-init writes, fixes #867
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Mon, 11 Mar 2019 19:12:28 +0000 (20:12 +0100)]
Improve determinism of IdString DB for similar scripts
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Mon, 11 Mar 2019 18:58:07 +0000 (11:58 -0700)]
Merge pull request #864 from YosysHQ/svalabelfix
Fix handling of cases that look like sva labels, fixes #862
Clifford Wolf [Mon, 11 Mar 2019 08:08:36 +0000 (01:08 -0700)]
Add ENABLE_GLOB Makefile switch
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sun, 10 Mar 2019 23:27:18 +0000 (16:27 -0700)]
Fix handling of cases that look like sva labels, fixes #862
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sat, 9 Mar 2019 21:24:55 +0000 (13:24 -0800)]
Fix typo in ice40_braminit help msg
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sat, 9 Mar 2019 21:24:10 +0000 (13:24 -0800)]
Merge pull request #859 from smunaut/ice40_braminit
iCE40 BRAM primitives init from file
Clifford Wolf [Sat, 9 Mar 2019 21:19:41 +0000 (13:19 -0800)]
Fix signed $shift/$shiftx handling in write_smt2
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sat, 9 Mar 2019 19:52:00 +0000 (11:52 -0800)]
Add $dffsr support to async2sync
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sat, 9 Mar 2019 19:14:57 +0000 (11:14 -0800)]
Merge pull request #858 from YosysHQ/clifford/svalabels
Add support for using SVA labels in yosys-smtbmc console output
Clifford Wolf [Sat, 9 Mar 2019 07:02:56 +0000 (23:02 -0800)]
Merge pull request #861 from YosysHQ/verific_chparam
Add -chparam option to verific command
Clifford Wolf [Sat, 9 Mar 2019 06:53:58 +0000 (22:53 -0800)]
Also add support for labels on sva module items, fixes #699
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Sat, 9 Mar 2019 01:56:16 +0000 (01:56 +0000)]
Update help message for -chparam
Eddie Hung [Sat, 9 Mar 2019 01:54:01 +0000 (01:54 +0000)]
Add -chparam option to verific command
Eddie Hung [Sat, 9 Mar 2019 00:43:50 +0000 (00:43 +0000)]
Fix spelling
Clifford Wolf [Fri, 8 Mar 2019 06:44:50 +0000 (22:44 -0800)]
Merge branch 'master' of github.com:YosysHQ/yosys
Clifford Wolf [Fri, 8 Mar 2019 06:44:37 +0000 (22:44 -0800)]
Fix handling of task output ports in clocked always blocks, fixes #857
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Sylvain Munaut [Thu, 7 Mar 2019 23:11:17 +0000 (00:11 +0100)]
ice40: Run ice40_braminit pass by default
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Sylvain Munaut [Thu, 7 Mar 2019 22:48:10 +0000 (23:48 +0100)]
ice40: Add ice40_braminit pass to allow initialization of BRAM from file
This adds a INIT_FILE attribute to the SB_RAM40_4K blocks that will
initialize content from a hex file. Same behavior is imlemented in the
simulation model and in a new pass for actual synthesis
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Clifford Wolf [Thu, 7 Mar 2019 19:34:12 +0000 (11:34 -0800)]
Merge pull request #856 from kprasadvnsi/master
examples/anlogic/ now also output the SVF file.
Clifford Wolf [Thu, 7 Mar 2019 19:31:46 +0000 (11:31 -0800)]
Use SVA label in smt export if available
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 7 Mar 2019 19:17:32 +0000 (11:17 -0800)]
Add support for SVA labels in read_verilog
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 7 Mar 2019 18:52:44 +0000 (10:52 -0800)]
Add hack for handling SVA labels via Verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 7 Mar 2019 17:08:26 +0000 (09:08 -0800)]
Add link to SF2 / igloo2 macro library guide
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 7 Mar 2019 00:18:49 +0000 (16:18 -0800)]
Improvements in sf2 cells_sim.v
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 6 Mar 2019 23:47:54 +0000 (15:47 -0800)]
Add sf2 techmap rules for more FF types
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 6 Mar 2019 08:41:02 +0000 (00:41 -0800)]
Refactor SF2 iobuf insertion, Add clkint insertion
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 6 Mar 2019 04:47:07 +0000 (20:47 -0800)]
Improve igloo2 example
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 6 Mar 2019 04:35:48 +0000 (20:35 -0800)]
Improve igloo2 example
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 6 Mar 2019 03:49:39 +0000 (19:49 -0800)]
Improvements in SF2 flow and demo
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Kali Prasad [Wed, 6 Mar 2019 04:21:11 +0000 (09:51 +0530)]
examples/anlogic/ now also output the SVF file.
Eddie Hung [Wed, 6 Mar 2019 01:55:29 +0000 (17:55 -0800)]
Fix spelling in pmgen/README.md
Clifford Wolf [Wed, 6 Mar 2019 01:27:58 +0000 (17:27 -0800)]
Improve igloo2 exmaple
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 5 Mar 2019 23:33:19 +0000 (15:33 -0800)]
Merge pull request #842 from litghost/merge_upstream
Changes required for VPR place and route in synth_xilinx
Clifford Wolf [Tue, 5 Mar 2019 23:23:01 +0000 (15:23 -0800)]
Merge pull request #850 from daveshah1/ecp5_warn_conflict
ecp5: Demote conflicting FF init values to a warning
Clifford Wolf [Tue, 5 Mar 2019 23:21:04 +0000 (15:21 -0800)]
Add missing newline
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 5 Mar 2019 23:20:03 +0000 (15:20 -0800)]
Merge pull request #851 from kprasadvnsi/master
Added examples/anlogic/
Clifford Wolf [Tue, 5 Mar 2019 23:19:28 +0000 (15:19 -0800)]
Merge pull request #852 from ucb-bar/firrtlfixes
Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v fails
Clifford Wolf [Tue, 5 Mar 2019 23:16:13 +0000 (15:16 -0800)]
Use "write_edif -pvector bra" for Xilinx EDIF files
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Jim Lawson [Mon, 4 Mar 2019 21:23:58 +0000 (13:23 -0800)]
Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v fails
Mark dff_init.v as expected to fail since it uses "initial value".
Kali Prasad [Mon, 4 Mar 2019 17:56:56 +0000 (23:26 +0530)]
Added examples/anlogic/
Keith Rothman [Mon, 4 Mar 2019 17:22:22 +0000 (09:22 -0800)]
Revert BRAM WRITE_MODE changes.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
David Shah [Mon, 4 Mar 2019 11:18:53 +0000 (11:18 +0000)]
ecp5: Demote conflicting FF init values to a warning
Signed-off-by: David Shah <dave@ds0.me>