Benjamin Nash [Fri, 17 Jun 2005 22:08:05 +0000 (18:08 -0400)]
I/O changes and SkipFuncEvents to increase FreeBSD compatibility.
SConscript:
Added kern/freebsd/freebsd_events.cc.
arch/alpha/isa_traits.hh:
Added Argument to support replacement of calibrate_clocks function in FreeBSD.
dev/ns_gige.hh:
Fixed NIC model number typo.
dev/tsunami_io.cc:
Added support for RTC writes and PIC 2 mask reads. Made RTC static member.
dev/tsunami_io.hh:
Made RTC static member.
kern/freebsd/freebsd_system.cc:
Added events to skip functions in FreeBSD.
kern/freebsd/freebsd_system.hh:
Added events to skip certain functions.
--HG--
extra : convert_revision :
8aaca51d3f9b1bb601722a5bae240aae77b445db
Benjamin Nash [Mon, 13 Jun 2005 16:32:48 +0000 (12:32 -0400)]
Merge m5read@m5.eecs.umich.edu:/bk/m5
into zed.eecs.umich.edu:/.automount/fox/y/benash/bk/m5
--HG--
extra : convert_revision :
73a3fe048bd3f382454c10524fc4c93d3f117d6a
Nathan Binkert [Mon, 13 Jun 2005 16:07:25 +0000 (12:07 -0400)]
Fix assert in PhysicalMemory object
--HG--
extra : convert_revision :
f1da0dde072562248ee587cb452adde3f7e1384e
Nathan Binkert [Mon, 13 Jun 2005 16:05:27 +0000 (12:05 -0400)]
some cleanup to turbolaser code
--HG--
extra : convert_revision :
dc86cc5b7c63e4832cf8a03f6c849611d929d3b9
Nathan Binkert [Mon, 13 Jun 2005 15:54:23 +0000 (11:54 -0400)]
Add NFS-dbench, and iscsi dbench benchmarks
--HG--
extra : convert_revision :
71e416668f4bbcf9785ea2363ec406135a217e32
Nathan Binkert [Mon, 13 Jun 2005 15:46:56 +0000 (11:46 -0400)]
use transactions for database access
base/mysql.hh:
Add support for for transactions
base/stats/mysql.cc:
get rid of table locking and start using transactions
base/stats/mysql_run.hh:
setup()/remove()/cleanup() should be protected, not private
--HG--
extra : convert_revision :
ace710beb7fb689a6e25831d8032f389fc1347e7
Benjamin Nash [Fri, 10 Jun 2005 16:48:29 +0000 (12:48 -0400)]
Removed comment.
--HG--
extra : convert_revision :
a19e33b0b522882bf43e21dd02ad76605411e650
Benjamin Nash [Fri, 10 Jun 2005 16:44:18 +0000 (12:44 -0400)]
Created FreebsdSystem, for FreeBSD-specific tweaks.
SConscript:
Included kern/freebsd/freebsd_system.cc
--HG--
extra : convert_revision :
4fa31602acb511b16bf371f78a8e5a8082536b88
Nathan Binkert [Thu, 9 Jun 2005 19:09:35 +0000 (15:09 -0400)]
BaseSystem was renamed to System
--HG--
extra : convert_revision :
74e03fe9447d9d2be59e675b034dc6df0afcde51
Benjamin Nash [Thu, 9 Jun 2005 19:01:15 +0000 (15:01 -0400)]
Mostly IO modifications, to increase compatibility with FreeBSD.
dev/pcidev.cc:
Allow writes to some PCI read-only registers.
Fix problem when writing to a zero offset IO location.
dev/tsunami_io.cc:
Fix calculation of IO addresses.
Add registers for keyboard and PCI DMA.
dev/tsunamireg.h:
Add registers for keyboard and PCI DMA.
python/m5/objects/System.py:
Allow generic System to be instantiated.
--HG--
extra : convert_revision :
1b985ffa2b8e15aa55246f1d14da615c32ecd3f9
Steve Reinhardt [Sun, 5 Jun 2005 15:56:33 +0000 (11:56 -0400)]
cache.hh:
Add FALRU & IIC back in.
--HG--
extra : convert_revision :
3c3c67abd89b61593df3ac3dffc105c10b7a7ec2
Steve Reinhardt [Sun, 5 Jun 2005 15:55:35 +0000 (11:55 -0400)]
Statistics.py:
get rid of python_file param
--HG--
extra : convert_revision :
94816a98d4263cd2f80e52a0f891db102f1a1fde
Ali Saidi [Sun, 5 Jun 2005 15:39:44 +0000 (11:39 -0400)]
changes linux process names slightly
kern/linux/linux_threadinfo.hh:
kern/linux/sched.hh:
changed names slightly
--HG--
extra : convert_revision :
8e42ebee1d749a65b78af5733de9e0deda3c548e
Steve Reinhardt [Sun, 5 Jun 2005 15:38:38 +0000 (11:38 -0400)]
YA cache fix.
--HG--
extra : convert_revision :
a1d752e6534c826e020a972d76a4baf8aa5d5790
Steve Reinhardt [Sun, 5 Jun 2005 15:35:13 +0000 (11:35 -0400)]
Another cache fix.
--HG--
extra : convert_revision :
6875c6144070b9d43c480756b3863e2d987347dc
Steve Reinhardt [Sun, 5 Jun 2005 15:27:20 +0000 (11:27 -0400)]
Fix up conditional cache stuff.
SConscript:
Get rid of prefetch & split cache files (temporarily).
--HG--
extra : convert_revision :
72072c06a15ce8187adc76eb3a0b83413750e374
Nathan Binkert [Sun, 5 Jun 2005 15:07:47 +0000 (11:07 -0400)]
Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head
--HG--
extra : convert_revision :
2acf413c32b571c44a6cb01b0427cf3bd31fd8e3
Steve Reinhardt [Sun, 5 Jun 2005 15:07:46 +0000 (11:07 -0400)]
Fix documentation formatting bug.
--HG--
extra : convert_revision :
86bb5e5b01742144869eaa2f248650468ed4f861
Nathan Binkert [Sun, 5 Jun 2005 15:02:38 +0000 (11:02 -0400)]
Cleanup copyright stuff. Add our copyright files that
are ours
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
sim/process.cc:
sim/process.hh:
remove $Id$ string
cpu/ozone/cpu.cc:
cpu/ozone/cpu_impl.hh:
cpu/ozone/ea_list.cc:
cpu/ozone/ea_list.hh:
kern/linux/sched.hh:
kern/linux/thread_info.hh:
Add M5 Copyright
cpu/trace/opt_cpu.cc:
dev/rtcreg.h:
nit
kern/linux/aligned.hh:
kern/linux/hwrpb.hh:
util/oprofile-top.py:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
Cleanup copyright
--HG--
extra : convert_revision :
4274e9121ef7543e0b3999b31e935edb19c54d46
Steve Reinhardt [Sun, 5 Jun 2005 15:02:37 +0000 (11:02 -0400)]
Add a few more files to the don't-release list.
--HG--
extra : convert_revision :
e798efa5127865398bf45fd0660b0a2e15faf14b
Steve Reinhardt [Sun, 5 Jun 2005 14:54:13 +0000 (10:54 -0400)]
Merge zizzer:/bk/m5 into vm1.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision :
467f93b532348ed5d75e9c0b8d517a9eda59437f
Steve Reinhardt [Sun, 5 Jun 2005 14:52:44 +0000 (10:52 -0400)]
Update for better conditional compilation of cache models.
--HG--
extra : convert_revision :
e3d7c8882ad34325fdc58cdba44165e0518ea330
Nathan Binkert [Sun, 5 Jun 2005 14:09:26 +0000 (10:09 -0400)]
elf_machdep.h isn't actually used
--HG--
extra : convert_revision :
f67464e39462f8a8e6b9b8f5cde40a5f141909fe
Steve Reinhardt [Sun, 5 Jun 2005 14:09:25 +0000 (10:09 -0400)]
Add simple script to clean up and exported tree for release.
--HG--
extra : convert_revision :
73cd3fa103bd9ea22954d4748115a45410dc07a3
Steve Reinhardt [Sun, 5 Jun 2005 12:38:47 +0000 (08:38 -0400)]
Get rid of Python stats output option.
--HG--
extra : convert_revision :
e53033a2266aed1a1d9c1c9b1c8775a3f1a3f234
Steve Reinhardt [Sun, 5 Jun 2005 12:09:43 +0000 (08:09 -0400)]
Get rid of unnecessary doxygen config files.
--HG--
extra : convert_revision :
a87334a738a057775d1c51946928c9454a892115
Steve Reinhardt [Sun, 5 Jun 2005 12:08:50 +0000 (08:08 -0400)]
Commit copyright-updating script.
--HG--
extra : convert_revision :
7b8c7287395de65305552ed51ff3e3018132a78c
Steve Reinhardt [Sun, 5 Jun 2005 12:08:29 +0000 (08:08 -0400)]
Fix minor doxygen issues.
Doxyfile:
Turn on EXTRACT_ALL so we get full class hierarchy info.
base/range.hh:
cpu/o3/fetch.hh:
cpu/o3/rename_map.hh:
cpu/o3/rob.hh:
dev/ide_disk.cc:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.hh:
Fix doxygen issues.
--HG--
extra : convert_revision :
9e0e8d3510b35db201459b8a3211c5e6ad5f0bb4
Steve Reinhardt [Sun, 5 Jun 2005 09:16:00 +0000 (05:16 -0400)]
Many files:
Update copyright dates and author list
SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
build/SConstruct:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/memtest/memtest.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunamireg.h:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
python/SConscript:
python/m5/__init__.py:
python/m5/config.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/genini.py:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/ccdrv/devtime.c:
util/m5/m5.c:
util/oprofile-top.py:
util/rundiff:
util/m5/m5op.h:
util/m5/m5op.s:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
util/tap/tap.cc:
Update copyright dates and author list
--HG--
extra : convert_revision :
0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
Steve Reinhardt [Sun, 5 Jun 2005 09:08:37 +0000 (05:08 -0400)]
Fix a few broken or inconsistently formatted copyrights
that the script doesn't deal with.
Don't bother with copyright notices in generated files.
LICENSE:
Fix author list.
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
Fix inconsistently formatted copyright.
arch/isa_parser.py:
base/traceflags.py:
Fix copyright & author list.
Don't bother with copyrights in generated files.
dev/rtcreg.h:
Fix broken copyright.
--HG--
extra : convert_revision :
d628e63c495960e2b129cef0aa8fddbdd4dabd45
Steve Reinhardt [Sun, 5 Jun 2005 08:21:22 +0000 (04:21 -0400)]
Many files:
Remove RCS Id string
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ecoff_machdep.h:
arch/isa_parser.py:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.cc:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/kgdb.h:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/coff_sym.h:
base/loader/coff_symconst.h:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/traceflags.py:
base/userinfo.cc:
base/userinfo.hh:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/o3/2bit_local_pred.cc:
cpu/o3/2bit_local_pred.hh:
cpu/o3/alpha_cpu.cc:
cpu/o3/alpha_cpu.hh:
cpu/o3/alpha_cpu_builder.cc:
cpu/o3/alpha_dyn_inst.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/alpha_impl.hh:
cpu/o3/alpha_params.hh:
cpu/o3/bpred_unit.cc:
cpu/o3/bpred_unit.hh:
cpu/o3/bpred_unit_impl.hh:
cpu/o3/btb.cc:
cpu/o3/btb.hh:
cpu/o3/comm.hh:
cpu/o3/commit.cc:
cpu/o3/commit.hh:
cpu/o3/commit_impl.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/cpu_policy.hh:
cpu/o3/decode.cc:
cpu/o3/decode.hh:
cpu/o3/decode_impl.hh:
cpu/o3/fetch.cc:
cpu/o3/fetch.hh:
cpu/o3/fetch_impl.hh:
cpu/o3/free_list.cc:
cpu/o3/free_list.hh:
cpu/o3/iew.cc:
cpu/o3/iew.hh:
cpu/o3/iew_impl.hh:
cpu/o3/inst_queue.cc:
cpu/o3/inst_queue.hh:
cpu/o3/inst_queue_impl.hh:
cpu/o3/mem_dep_unit.cc:
cpu/o3/mem_dep_unit.hh:
cpu/o3/mem_dep_unit_impl.hh:
cpu/o3/ras.cc:
cpu/o3/ras.hh:
cpu/o3/regfile.hh:
cpu/o3/rename.cc:
cpu/o3/rename.hh:
cpu/o3/rename_impl.hh:
cpu/o3/rename_map.cc:
cpu/o3/rename_map.hh:
cpu/o3/rob.hh:
cpu/o3/rob_impl.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/o3/store_set.cc:
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.cc:
cpu/o3/tournament_pred.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/Makefile:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/m5/m5.c:
util/m5/m5op.h:
util/m5/m5op.s:
util/tap/Makefile:
util/tap/tap.cc:
util/term/Makefile:
util/term/term.c:
Remove RCS Id string
--HG--
extra : convert_revision :
fc5b0a6ee2a213785bd58c51ce82eb2f769d6b88
Ali Saidi [Sun, 5 Jun 2005 08:08:41 +0000 (04:08 -0400)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-clean
--HG--
extra : convert_revision :
6fce1b31995cf5c68bd2f4bdfa2b88db6dcd006c
Ali Saidi [Sun, 5 Jun 2005 08:08:05 +0000 (04:08 -0400)]
added copyright
kern/linux/sched.hh:
kern/linux/thread_info.hh:
got rid of everything but exactly what we needed
util/categories.py:
newest version from one of my repositories
--HG--
extra : convert_revision :
c4328e5938d421d60493c0da07022bfa9e92c404
Ron Dreslinski [Sun, 5 Jun 2005 07:51:23 +0000 (03:51 -0400)]
Now it's no longer a beta release
--HG--
extra : convert_revision :
0db477a26278436ea3f640048b63d72132d921d8
Ron Dreslinski [Sun, 5 Jun 2005 07:32:35 +0000 (03:32 -0400)]
Merge zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/m5
--HG--
extra : convert_revision :
065e1a590c2b67f01cb3e8e4e25ee98f053d0a5e
Ron Dreslinski [Sun, 5 Jun 2005 07:32:22 +0000 (03:32 -0400)]
Remove unneeded includes
--HG--
extra : convert_revision :
be4479e7bb2d45dbb2e41423b4163b149ded3acd
Kevin Lim [Sun, 5 Jun 2005 07:25:26 +0000 (03:25 -0400)]
Update #defines for the O3CPU. Also include the copyright.
base/timebuf.hh:
Updated copyright.
cpu/o3/2bit_local_pred.hh:
cpu/o3/alpha_cpu.hh:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_impl.hh:
cpu/o3/alpha_params.hh:
cpu/o3/btb.hh:
cpu/o3/comm.hh:
cpu/o3/commit.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/cpu_policy.hh:
cpu/o3/decode.hh:
cpu/o3/fetch.hh:
cpu/o3/free_list.hh:
cpu/o3/iew.hh:
cpu/o3/inst_queue.hh:
cpu/o3/mem_dep_unit.hh:
cpu/o3/ras.hh:
cpu/o3/regfile.hh:
cpu/o3/rename.hh:
cpu/o3/rename_map.hh:
cpu/o3/rob.cc:
cpu/o3/rob.hh:
cpu/o3/rob_impl.hh:
cpu/o3/sat_counter.hh:
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.hh:
Updated #define to have correct path.
docs/footer.html:
Remove e-mail addr.
--HG--
extra : convert_revision :
68d7af52674621dc3b6d6ac0d564790ffd595fe3
Lisa Hsu [Sun, 5 Jun 2005 07:10:26 +0000 (03:10 -0400)]
Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/clean
--HG--
extra : convert_revision :
dad53da15d9b6773b230bb6cf38daef00f9bd573
Lisa Hsu [Sun, 5 Jun 2005 07:10:18 +0000 (03:10 -0400)]
add appropriate license headers.
--HG--
extra : convert_revision :
cf3d52aa2752c70fa987cbfd494595be8a74fb28
Nathan Binkert [Sun, 5 Jun 2005 06:59:44 +0000 (02:59 -0400)]
Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head
--HG--
extra : convert_revision :
d46f23e63e4a8c6325bcdeaf6cdd76b9e6208707
Steve Reinhardt [Sun, 5 Jun 2005 06:59:43 +0000 (02:59 -0400)]
Change SamplingCPU to Sampler.
--HG--
extra : convert_revision :
ddba327a572804954adcebfff1182b97d474c020
Ron Dreslinski [Sun, 5 Jun 2005 06:53:23 +0000 (02:53 -0400)]
Merge zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/m5
--HG--
extra : convert_revision :
b6a6528fb5ecefaf82c029263c9ed794edfc2012
Ron Dreslinski [Sun, 5 Jun 2005 06:52:52 +0000 (02:52 -0400)]
Add simple scalar license back
--HG--
extra : convert_revision :
7e0d32d3299be8f07b0d94d07de33c97c1d31011
Lisa Hsu [Sun, 5 Jun 2005 06:45:09 +0000 (02:45 -0400)]
Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/clean
--HG--
extra : convert_revision :
ea18370ed0b34420616a241fd432c49ff6c7a648
Lisa Hsu [Sun, 5 Jun 2005 06:44:42 +0000 (02:44 -0400)]
oops, i changed m5term.doxygen when kev had a lock on it, just use his version
--HG--
extra : convert_revision :
f0b507334b219968a6c6319d2c39bbac3bf4901a
Lisa Hsu [Sun, 5 Jun 2005 06:38:39 +0000 (02:38 -0400)]
just make a minor commenting change reflecting the new way to set up command line arguments.
--HG--
extra : convert_revision :
95cbda86d1a2cab431269bf8d4501ef2b3a40885
Lisa Hsu [Sun, 5 Jun 2005 06:36:42 +0000 (02:36 -0400)]
update documentation
--HG--
extra : convert_revision :
83446340f3b27d04fda0509bd34f84e12f9852a3
Nathan Binkert [Sun, 5 Jun 2005 06:26:19 +0000 (02:26 -0400)]
move eio stuff to encumbered
--HG--
extra : convert_revision :
9061382dba285c84931f8825e7159db0e9899944
Nathan Binkert [Sun, 5 Jun 2005 06:26:18 +0000 (02:26 -0400)]
Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head
--HG--
extra : convert_revision :
eb0e28e22549f875cef25043491a30c2755676ed
Steve Reinhardt [Sun, 5 Jun 2005 06:26:17 +0000 (02:26 -0400)]
Merge zizzer:/bk/m5 into vm1.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision :
6f1e9b2650ec9f9a396ee7826e9abffab24848b8
Steve Reinhardt [Sun, 5 Jun 2005 06:26:06 +0000 (02:26 -0400)]
Get rid of a bunch of obsolete utilities.
--HG--
extra : convert_revision :
6ffe39211b6c9cc55f2decd2f1fbdba9ea0fabcd
Ron Dreslinski [Sun, 5 Jun 2005 06:24:26 +0000 (02:24 -0400)]
Defualt only build LRU cache, speed compile
--HG--
extra : convert_revision :
871d5b79de2cd3da1fb618ff09063aa4a00c39ac
Steve Reinhardt [Sun, 5 Jun 2005 06:01:36 +0000 (02:01 -0400)]
Actually commit new doxygen stats doc.
--HG--
extra : convert_revision :
8397036847797c116ce1bcbdb30636e70326c6d6
Steve Reinhardt [Sun, 5 Jun 2005 05:57:57 +0000 (01:57 -0400)]
Add licenses in python dir.
python/m5/__init__.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
Add license.
--HG--
extra : convert_revision :
825dcad94e13b18aadc7188053ad1999a0219eae
Kevin Lim [Sun, 5 Jun 2005 05:50:35 +0000 (01:50 -0400)]
Update for ISCA release.
--HG--
extra : convert_revision :
5c3fd17ba0a5173b22d2977b278013ef50d78a68
Ron Dreslinski [Sun, 5 Jun 2005 05:36:12 +0000 (01:36 -0400)]
Merge zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/m5
--HG--
extra : convert_revision :
21175b3a16c1da736cf7f6fba1c327a809f5ef79
Ron Dreslinski [Sun, 5 Jun 2005 05:35:55 +0000 (01:35 -0400)]
update for ISCA release
--HG--
extra : convert_revision :
ab97c34b76c253267d48479bd043963be8b7fe4b
Nathan Binkert [Sun, 5 Jun 2005 05:24:17 +0000 (01:24 -0400)]
make all of the turbolaser stuff only compile if ALPHA_TLASER
is defined.
build/SConstruct:
Default ALPHA_TLASER to false
dev/uart8250.cc:
fix paths
--HG--
extra : convert_revision :
3616b5b4b9060860a73568a4ed4f1e8eb991938f
Nathan Binkert [Sun, 5 Jun 2005 05:24:16 +0000 (01:24 -0400)]
Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head
--HG--
extra : convert_revision :
cf1b2ab4544492aced52c0012c3a67fee188b683
Ali Saidi [Sun, 5 Jun 2005 05:24:15 +0000 (01:24 -0400)]
moved uart8530 to encumbered directory
--HG--
extra : convert_revision :
353e5591df9bbe5a915d226068fb2e406441d3b5
Ali Saidi [Sun, 5 Jun 2005 05:22:33 +0000 (01:22 -0400)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-clean
--HG--
extra : convert_revision :
0c339eb7574f59665690f7e8457eff0b21e3c4c9
Ali Saidi [Sun, 5 Jun 2005 05:22:21 +0000 (01:22 -0400)]
split uart into urt8250 and uart8530
fix some doxygen comments
SConscript:
Added split uart files
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/tsunami.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/tsunamireg.h:
fix doxgyen file comment
dev/uart.cc:
dev/uart.hh:
python/m5/objects/Uart.py:
split uart into urt8250 and uart8530
--HG--
extra : convert_revision :
2e70aad892a37620d7909017648bca6d7d69d678
Steve Reinhardt [Sun, 5 Jun 2005 05:18:18 +0000 (01:18 -0400)]
Merge zizzer:/bk/m5 into vm1.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision :
2ed9e6c9875903a2cde296155b7d1bee10fea3de
Steve Reinhardt [Sun, 5 Jun 2005 05:17:29 +0000 (01:17 -0400)]
Import stats document from html.
--HG--
extra : convert_revision :
0117ca5b2095b18fd079153a4f0847c9158acd9d
Nathan Binkert [Sun, 5 Jun 2005 04:45:11 +0000 (00:45 -0400)]
insn_fifo isn't used
--HG--
extra : convert_revision :
2a0c72a4d65a5160ce1317968e565704093291a2
Nathan Binkert [Sun, 5 Jun 2005 04:45:10 +0000 (00:45 -0400)]
Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head
--HG--
extra : convert_revision :
b0c9b044b44a1bfc4cded2ebfa240b799dd4a5a0
Steve Reinhardt [Sun, 5 Jun 2005 04:45:09 +0000 (00:45 -0400)]
Minor format tweaks on config file documentation.
--HG--
extra : convert_revision :
ab88d823d6420e3cc3fc37d0b634947df384b631
Steve Reinhardt [Sun, 5 Jun 2005 04:08:03 +0000 (00:08 -0400)]
Rewrite config file documentation for Python config.
--HG--
extra : convert_revision :
24525d1f6e119e30943c036ffafae14c5ea25f2d
Ali Saidi [Sun, 5 Jun 2005 03:56:53 +0000 (23:56 -0400)]
Fix doxgyen comments
Use openbsd ide/atapi header files
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
Fix Doxygen comments
dev/ide_disk.cc:
Use BSD atapi/ide header files
dev/ide_disk.hh:
use ide/atapi header files
--HG--
extra : convert_revision :
a15e40c7d7cc52af6867821e9574ba5c47021721
Lisa Hsu [Sun, 5 Jun 2005 03:36:11 +0000 (23:36 -0400)]
Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/clean
--HG--
extra : convert_revision :
e3646dfd2f0844e4be7f5369032f9932eb378fdb
Lisa Hsu [Sun, 5 Jun 2005 03:36:00 +0000 (23:36 -0400)]
get rid of bad panic.
--HG--
extra : convert_revision :
e4e6ab8f163b3c93ac7c29ab8ac50f369b190dbb
Steve Reinhardt [Sun, 5 Jun 2005 03:13:09 +0000 (23:13 -0400)]
Get rid of broken "long help" option.
--HG--
extra : convert_revision :
8b7c646ce416d2a2a4919acbb87c0b6d65920d42
Steve Reinhardt [Sun, 5 Jun 2005 03:08:49 +0000 (23:08 -0400)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5
--HG--
extra : convert_revision :
f12cecd1359770061b52e9f57f2aaa809e61115c
Steve Reinhardt [Sun, 5 Jun 2005 03:08:26 +0000 (23:08 -0400)]
Clean up to work with recent python config changes.
configs/splash2/run.py:
parent is now Parent.
Need to explicitly instantiate classes.
--HG--
extra : convert_revision :
c260fad00ca82cb1032e73af2e5caa2ad013067d
Nathan Binkert [Sun, 5 Jun 2005 00:50:10 +0000 (20:50 -0400)]
shuffle files around for new directory structure
--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision :
c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
Nathan Binkert [Sat, 4 Jun 2005 23:02:53 +0000 (19:02 -0400)]
Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head
--HG--
extra : convert_revision :
7e9a7c1abf90cc1545d63caf5d6a06351ece36b5
Ali Saidi [Sat, 4 Jun 2005 23:02:52 +0000 (19:02 -0400)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-clean
--HG--
extra : convert_revision :
cce752079ba1ae9d4043df959dc448d815e598b1
Ali Saidi [Sat, 4 Jun 2005 23:00:32 +0000 (19:00 -0400)]
Fix monet configuration
--HG--
extra : convert_revision :
fe053d8fe69cc8731161a875cbf8b78cda48e4b1
Nathan Binkert [Sat, 4 Jun 2005 22:41:44 +0000 (18:41 -0400)]
Remove the inorder CPU
--HG--
extra : convert_revision :
626aad449df9370383becb8e14f4cbf406b5b376
Steve Reinhardt [Sat, 4 Jun 2005 22:41:43 +0000 (18:41 -0400)]
Get rid of vestiges of .mpy file handling.
--HG--
extra : convert_revision :
309b051be3473e2d42d3200c1af84227d01b5900
Nathan Binkert [Sat, 4 Jun 2005 18:19:05 +0000 (14:19 -0400)]
BaseSystem -> System
Make System an object that can be instantiated. For operating
systems that don't need any OS specific hacks.
python/m5/objects/AlphaConsole.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Tsunami.py:
BaseSystem -> System
--HG--
rename : python/m5/objects/BaseSystem.py => python/m5/objects/System.py
extra : convert_revision :
e5d12db02abef1b0eda720b50dd2c09cb1ac5232
Nathan Binkert [Sat, 4 Jun 2005 18:16:04 +0000 (14:16 -0400)]
more portable
arch/alpha/alpha_tru64_process.cc:
Sort #includes
Make code more portable. g++ doesn't seem to always like
struct ::stat (and others). So, we typedef stat outside of
the namespace as something else and use the typedef
base/hostinfo.cc:
use snprintf to quell warning
base/inifile.cc:
use strncpy to quell warning
base/stats/events.cc:
don't use strcpy
cpu/beta_cpu/btb.cc:
use FloorLog2 instead of log2
cpu/beta_cpu/comm.hh:
cpu/beta_cpu/inst_queue.hh:
cpu/beta_cpu/sat_counter.hh:
use sim/host.hh instead of stdint.h
--HG--
extra : convert_revision :
59bd9235dda74e72a8b6a70b3f3a981840384f3f
Nathan Binkert [Sat, 4 Jun 2005 01:47:30 +0000 (21:47 -0400)]
Make m5.fast work
base/loader/elf_object.cc:
elf_version is an odd function. Don't use assert since it
has a necessary side effect.
--HG--
extra : convert_revision :
8c48f91afe6c7ff5030ac1a534dcda7e2e0c5c57
Steve Reinhardt [Fri, 3 Jun 2005 20:21:37 +0000 (16:21 -0400)]
Bug fix & cleanup in config code.
python/m5/config.py:
Bug fix: code was silently converting between
incompatible SimObject types as an unintended
side-effect of the object cloning support.
--HG--
extra : convert_revision :
236f4fe5370f2eddf8af8fab68e2b83dccc34305
Steve Reinhardt [Fri, 3 Jun 2005 20:19:34 +0000 (16:19 -0400)]
Additions/fixes for Tru64 syscall emulation.
We can now run the SimpleScalar wupwise binary
to completion on the test input.
Didn't have time to do more testing, but I fixed
a major problem w/getdirentries that should help
a lot more programs run.
arch/alpha/alpha_tru64_process.cc:
Add truncate, ftruncate, statfs, and fstatfs.
Add v4.x (pre-F64) stat, fstat, and lstat.
Add setsysinfo (though all it does is provide more
specific warning messages).
Fix subtle but major bug in getdirentries.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Add truncate, ftruncate, statfs, and fstatfs.
--HG--
extra : convert_revision :
9037393d00dc49b0074a41603ea647587f5a9ec7
Nathan Binkert [Fri, 3 Jun 2005 14:07:27 +0000 (10:07 -0400)]
Make m5.fast work when there are no Trace.flags
--HG--
extra : convert_revision :
05eda14b86311013d3c32ee56f9f52ae94126fb4
Steve Reinhardt [Thu, 2 Jun 2005 20:15:43 +0000 (16:15 -0400)]
Rename builds more descriptively:
ALPHA -> ALPHA_SE (for Syscall Emulation)
KERNEL -> ALPHA_FS
KERN_TLASER -> ALPHA_FS_TL
Also renamed configs/kernel dir to configs/fullsys.
README:
build/SConstruct:
Rename builds more descriptively.
--HG--
extra : convert_revision :
f2bffb3ad0fc5068cc7fa20661ed9e4e7bc5b202
Nathan Binkert [Thu, 2 Jun 2005 15:20:31 +0000 (11:20 -0400)]
clean up command line stuff
sim/main.cc:
Clean uo usage output and print usage when no options are given
Don't accept mpy files anymore since we don't use them.
--HG--
extra : convert_revision :
c3b16f602f301d2de12547285334c0037d829998
Nathan Binkert [Thu, 2 Jun 2005 15:19:01 +0000 (11:19 -0400)]
Fix-up some config issues
python/m5/config.py:
Make NetworkBandwidth and MemoryBandwidth work
python/m5/objects/Ethernet.py:
Make 1Gbps default for ethernet
--HG--
extra : convert_revision :
59e62f7e62624356ae8d7304598617f60667f040
Nathan Binkert [Thu, 2 Jun 2005 15:17:45 +0000 (11:17 -0400)]
update copyrights that are spit out on the console.
--HG--
extra : convert_revision :
e927fd48d2cc82d20478baeb05f58dce07a800e7
Steve Reinhardt [Thu, 2 Jun 2005 05:03:17 +0000 (01:03 -0400)]
More de-SimpleScalarization of cache code.
--HG--
extra : convert_revision :
b310a0e8a02487302d4861cfa08543b6047a0ff7
Steve Reinhardt [Thu, 2 Jun 2005 04:08:09 +0000 (00:08 -0400)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5
--HG--
extra : convert_revision :
71d4611b6d9496d3237c4d0cd46912a108ec8653
Erik Hallnor [Thu, 2 Jun 2005 03:14:10 +0000 (23:14 -0400)]
Change lru/iic parameter checks for licensing.
--HG--
extra : convert_revision :
5d5ae086d5e7981d49c68a2283ad2c08e27b4399
Steve Reinhardt [Thu, 2 Jun 2005 02:09:22 +0000 (22:09 -0400)]
Get rid of unused sim/int_stats.* files.
--HG--
extra : convert_revision :
6b86e97fbadbd6f00c0bc52f0ab07fd7741f9818
Steve Reinhardt [Thu, 2 Jun 2005 01:59:27 +0000 (21:59 -0400)]
Rename sim/universe.{cc,hh} to root.{cc,hh} (since the
object defined there was renamed Root long ago).
SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
base/misc.cc:
base/pollevent.cc:
base/pollevent.hh:
base/stats/events.cc:
base/trace.hh:
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/inst_queue_impl.hh:
cpu/pc_event.cc:
cpu/static_inst.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
sim/builder.cc:
sim/eventq.cc:
sim/main.cc:
sim/root.cc:
sim/stat_control.cc:
Rename sim/universe.{cc,hh} to root.{cc,hh}.
--HG--
rename : sim/universe.cc => sim/root.cc
extra : convert_revision :
b8699e81e285253d66da75412e7bb2c251c0389a
Steve Reinhardt [Thu, 2 Jun 2005 01:44:00 +0000 (21:44 -0400)]
Standardize clock parameter names to 'clock'.
Fix description for Bus clock_ratio (no longer a ratio).
Add Clock param type (generic Frequency or Latency).
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/beta_cpu/alpha_full_cpu_builder.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/sinic.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
python/m5/objects/BaseCPU.py:
python/m5/objects/BaseCache.py:
python/m5/objects/BaseSystem.py:
python/m5/objects/Bus.py:
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
sim/universe.cc:
Standardize clock parameter names to 'clock'.
Fix description for Bus clock_ratio (no longer a ratio).
python/m5/config.py:
Minor tweaks on Frequency/Latency:
- added new Clock param type to avoid ambiguities
- factored out init code into getLatency()
- made RootFrequency *not* a subclass of Frequency so it
can't be directly assigned to a Frequency paremeter
--HG--
extra : convert_revision :
fc4bb8562df171b454bbf696314cda57e1ec8506
Steve Reinhardt [Wed, 1 Jun 2005 21:14:42 +0000 (17:14 -0400)]
Get rid of obsolete simobj/SConscript
--HG--
extra : convert_revision :
2f2a5e1702a5ad09d80362e25a895e6181b2117c
Steve Reinhardt [Wed, 1 Jun 2005 21:08:45 +0000 (17:08 -0400)]
A few more config updates. Works with regression now.
configs/splash2/run.py:
Update file for new config changes.
python/m5/config.py:
- isParamContext() not defined any more
- fix bug with re-assigning vectors over scalars
and vice versa
--HG--
rename : configs/splash2/run.mpy => configs/splash2/run.py
extra : convert_revision :
2eb28a92f8de327f6dfddd01467c61e759275f6b
Steve Reinhardt [Sun, 29 May 2005 05:14:50 +0000 (01:14 -0400)]
Major cleanup of python config code.
Special mpy importer is gone; everything is just plain
Python now (funky, but straight-up).
May not completely work yet... generates identical ini
files for many configs/kernel settings, but I have yet
to run it against regressions. This commit is for my
own convenience and won't be pushed until more testing
is done.
python/m5/__init__.py:
Get rid of mpy_importer and param_types.
python/m5/config.py:
Major cleanup. We now have separate classes and
instances for SimObjects. Proxy handling and param
conversion significantly reorganized. No explicit
instantiation step anymore; we can dump an ini file
straight from the original tree.
Still needs more/better/truer comments.
test/genini.py:
Replace LoadMpyFile() with built-in execfile().
Export __main__.m5_build_env.
python/m5/objects/AlphaConsole.py:
python/m5/objects/AlphaFullCPU.py:
python/m5/objects/AlphaTLB.py:
python/m5/objects/BadDevice.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/BaseCache.py:
python/m5/objects/BaseSystem.py:
python/m5/objects/Bus.py:
python/m5/objects/CoherenceProtocol.py:
python/m5/objects/Device.py:
python/m5/objects/DiskImage.py:
python/m5/objects/Ethernet.py:
python/m5/objects/Ide.py:
python/m5/objects/IntrControl.py:
python/m5/objects/MemTest.py:
python/m5/objects/Pci.py:
python/m5/objects/PhysicalMemory.py:
python/m5/objects/Platform.py:
python/m5/objects/Process.py:
python/m5/objects/Repl.py:
python/m5/objects/Root.py:
python/m5/objects/SimConsole.py:
python/m5/objects/SimpleDisk.py:
python/m5/objects/Tsunami.py:
python/m5/objects/Uart.py:
Fixes for eliminating mpy_importer, and modified
handling of frequency/latency params.
Also renamed parent to Parent.
--HG--
rename : python/m5/objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.py
rename : python/m5/objects/AlphaFullCPU.mpy => python/m5/objects/AlphaFullCPU.py
rename : python/m5/objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.py
rename : python/m5/objects/BadDevice.mpy => python/m5/objects/BadDevice.py
rename : python/m5/objects/BaseCPU.mpy => python/m5/objects/BaseCPU.py
rename : python/m5/objects/BaseCache.mpy => python/m5/objects/BaseCache.py
rename : python/m5/objects/BaseSystem.mpy => python/m5/objects/BaseSystem.py
rename : python/m5/objects/Bus.mpy => python/m5/objects/Bus.py
rename : python/m5/objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.py
rename : python/m5/objects/Device.mpy => python/m5/objects/Device.py
rename : python/m5/objects/DiskImage.mpy => python/m5/objects/DiskImage.py
rename : python/m5/objects/Ethernet.mpy => python/m5/objects/Ethernet.py
rename : python/m5/objects/Ide.mpy => python/m5/objects/Ide.py
rename : python/m5/objects/IntrControl.mpy => python/m5/objects/IntrControl.py
rename : python/m5/objects/MemTest.mpy => python/m5/objects/MemTest.py
rename : python/m5/objects/Pci.mpy => python/m5/objects/Pci.py
rename : python/m5/objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.py
rename : python/m5/objects/Platform.mpy => python/m5/objects/Platform.py
rename : python/m5/objects/Process.mpy => python/m5/objects/Process.py
rename : python/m5/objects/Repl.mpy => python/m5/objects/Repl.py
rename : python/m5/objects/Root.mpy => python/m5/objects/Root.py
rename : python/m5/objects/SimConsole.mpy => python/m5/objects/SimConsole.py
rename : python/m5/objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.py
rename : python/m5/objects/Tsunami.mpy => python/m5/objects/Tsunami.py
rename : python/m5/objects/Uart.mpy => python/m5/objects/Uart.py
extra : convert_revision :
9dc55103a6f5b40eada4ed181a71a96fae6b0b76
Steve Reinhardt [Sun, 29 May 2005 03:59:48 +0000 (23:59 -0400)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5
--HG--
extra : convert_revision :
475f25967577aa47d84b476c07ce0ddfe05078d0