Dave Airlie [Wed, 23 Nov 2016 02:59:55 +0000 (12:59 +1000)]
vulkan/wsi/radv: add initial prime support (v1.1)
This is a complete rewrite of my previous rfc patches.
This adds the ability to present to a different GPU that rendering
using a driver side operation that can copy from the tiled to
linear shared image.
This does prime support completely in the swapchain present code,
and each queue has a precreated command buffer for each image
and for the each queue family. This means presenting should work
on graphics and compute queues and transfer in the future.
v1.1: initialise needs_linear_copy in swapchain.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 26 Feb 2017 01:37:27 +0000 (02:37 +0100)]
radv/ac: Add integer->integer casts.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Eric Engestrom [Sun, 26 Feb 2017 01:17:25 +0000 (01:17 +0000)]
check: add support for running test as standalone
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Eric Engestrom [Sun, 26 Feb 2017 00:17:52 +0000 (00:17 +0000)]
check: make any failure fatal
Previously, only the last error code was returned.
Using `set -e` makes the script quit on any unhandled error.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Eric Engestrom [Sun, 26 Feb 2017 13:35:25 +0000 (13:35 +0000)]
check: mark two tests are requiring bash
Requirement was removed just before pushing, but it's actually needed
for heredocs (`<<<`).
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Mike Lothian [Sat, 25 Feb 2017 11:50:44 +0000 (11:50 +0000)]
st/nine: Drop USER_INDEX_BUFFERS check
This fixes
4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
PIPE_CAP was removed.
Now USER_INDEX_BUFFERS are always enabled remove the check and only
check for cmst_active directly.
v2: Axel pointed out the code was still needed when cmst was inactive,
Rebase on master too
v3: Drop struct member user_ibufs also && fixup shortlog (Edward).
v4: Fix negation
v5: Use the right variable name csmt != cmst
Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
Reported-and-tested-by: Vinson Lee <vlee@freedesktop.org> (v1)
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Constantine Charlamov [Tue, 21 Feb 2017 04:31:30 +0000 (07:31 +0300)]
st/nine: make use of common uploaders v4
Make use of common uploaders that landed recently to Mesa
v2: fixed formatting, broken due to thunderbird configuration
v3: per Axel comment: added a comment into NineDevice9_DrawPrimitiveUP
v4: per Axel comment: changed style of the comment
Timothy Arceri [Fri, 24 Feb 2017 04:34:51 +0000 (15:34 +1100)]
compiler: style clean-ups in blob.h
Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Brian Paul [Sat, 25 Feb 2017 02:02:39 +0000 (19:02 -0700)]
svga: fix MSVC build error after PIPE_CAP_USER_INDEX_BUFFERS removal
Need to specify the zero for the struct initializer. My earlier test
of the patch series was with MinGW, not MSVC.
Trivial.
Eric Anholt [Fri, 24 Feb 2017 20:57:03 +0000 (12:57 -0800)]
vc4: Lazily emit our FS/VS input loads.
This reduces register pressure in both types of shaders, by reordering the
input loads from the var->data.driver_location order to whatever order
they appear first in the NIR shader. These instructions aren't
reorderable at our QIR scheduling level because the FS takes two in
lockstep to do an interpolation, and the VS takes multiple read
instructions in a row to get a whole vec4-level attribute read.
shader-db impact:
total instructions in shared programs: 76666 -> 76590 (-0.10%)
instructions in affected programs: 42945 -> 42869 (-0.18%)
total max temps in shared programs: 9395 -> 9208 (-1.99%)
max temps in affected programs: 2951 -> 2764 (-6.34%)
Some programs get their max temps hurt, depending on the order that the
load_input intrinsics appear, because we end up being unable to copy
propagate an older VPM read into its only use.
Eric Anholt [Fri, 24 Feb 2017 20:33:38 +0000 (12:33 -0800)]
vc4: Refactor the load_input code out of the intrinsic code.
It's going gain most of ntq_setup_inputs(), so simplify it first.
Eric Anholt [Fri, 24 Feb 2017 20:00:38 +0000 (12:00 -0800)]
vc4: Track the last block we emitted at the top level.
This will be used for delaying our VPM reads (which must be unconditional)
until just before they're used.
Eric Anholt [Fri, 24 Feb 2017 22:18:39 +0000 (14:18 -0800)]
vc4: Emit max number of temps in the shader-db output.
We need to be paying attention to optimization's impact on this -- even if
we reduce instruction count, increasing max temps in general is likely to
cause us to fail to register allocate on some shaders, which means that
those won't run at all.
Vinson Lee [Thu, 23 Feb 2017 21:48:34 +0000 (13:48 -0800)]
util/disk_cache: Use backward compatible st_mtime.
Fix Mac OS X build error.
CC libmesautil_la-disk_cache.lo
In file included from disk_cache.c:46:
./disk_cache.h:57:20: error: no member named 'st_mtim' in 'struct stat'
*timestamp = st.st_mtim.tv_sec;
~~ ^
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99918
Fixes: 207e3a6e4b ("util/radv: move *_get_function_timestamp() to utils")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Vinson Lee [Tue, 14 Feb 2017 01:52:59 +0000 (17:52 -0800)]
glsl: Fix missing-braces warning.
CXX glsl/ast_to_hir.lo
glsl/ast_to_hir.cpp: In member function 'virtual ir_rvalue* ast_declarator_list::hir(exec_list*, _mesa_glsl_parse_state*)':
glsl/ast_to_hir.cpp:4846:42: warning: missing braces around initializer for 'unsigned int [16]' [-Wmissing-braces]
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Marek Olšák [Thu, 23 Feb 2017 00:34:27 +0000 (01:34 +0100)]
ac: silence a warning
trivial
Marek Olšák [Wed, 22 Feb 2017 18:56:26 +0000 (19:56 +0100)]
radeonsi: fix broken tessellation on Carrizo and Stoney
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99850
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 22 Feb 2017 18:59:27 +0000 (19:59 +0100)]
st/mesa: don't update unrelated states in non-draw calls such as Clear
If a VAO isn't bound and u_vbuf isn't enabled because of the Core profile,
we'll get user vertex buffers in drivers if we update vertex buffers
in glClear. So don't do that.
This fixes a regression since disabling u_vbuf for Core profiles.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 22 Feb 2017 20:39:55 +0000 (21:39 +0100)]
st/mesa: set blend state for PBO readbacks
v2: restore the state
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 22 Feb 2017 23:30:49 +0000 (00:30 +0100)]
st/mesa: reset sample_mask, min_sample, and render_condition for PBO ops
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 22 Feb 2017 23:20:17 +0000 (00:20 +0100)]
st/mesa: don't check st->vp in update_clip
The clip state is updated before VS, so it can be NULL for the first draw
call. Just remove the unnecessary dependency on st->vp.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 22 Feb 2017 22:40:53 +0000 (23:40 +0100)]
trace: remove pipe_resource wrapping
Not needed. ddebug does the same thing. The limitation is that drivers
can only use pipe_resource::screen through pipe_resource_reference.
This unbreaks trace, because pipe_context uploaders aren't wrapped,
so trace doesn't understand buffers returned by them.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 17 Feb 2017 01:28:20 +0000 (02:28 +0100)]
gallium: remove PIPE_CAP_USER_INDEX_BUFFERS
all drivers support it
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com> (VMware driver only)
Marek Olšák [Fri, 17 Feb 2017 00:20:23 +0000 (01:20 +0100)]
st/mesa: assume all drivers support user index buffers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com> (VMware driver only)
Marek Olšák [Fri, 17 Feb 2017 01:21:29 +0000 (02:21 +0100)]
svga: implement user index buffers
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com> (VMware driver only)
Marek Olšák [Fri, 17 Feb 2017 01:14:36 +0000 (02:14 +0100)]
freedreno: add support for user index buffers
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 17 Feb 2017 00:59:48 +0000 (01:59 +0100)]
etnaviv: add support for user index buffers
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 22 Feb 2017 19:52:49 +0000 (20:52 +0100)]
gallium/util: add new helpers for user index buffer uploading
v3: split from the etnaviv patch; fix new_ib.buffer leak
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com> (VMware driver only)
Elie TOURNIER [Wed, 8 Feb 2017 22:20:41 +0000 (22:20 +0000)]
nir: delete magic number
Signed-off-by: Elie Tournier <tournier.elie@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Roland Scheidegger [Fri, 24 Feb 2017 17:40:40 +0000 (18:40 +0100)]
gallium/util: (trivial) fix util_clear_render_target
the format of the rt can be different than the one of the texture, so must
propagate the format explicitly to the helper. Broken since
3f9c5d62441eba38e8b1592aba965ed5db6fd89b (but unused by st/mesa).
Emil Velikov [Fri, 24 Feb 2017 17:38:16 +0000 (17:38 +0000)]
util: automake: add sha1/README to the tarball
Suggested-by: Andreas Boll <andreas.boll.dev@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 23 Feb 2017 16:48:57 +0000 (16:48 +0000)]
mapi: remove unused mapi.[ch]
The final user of it was st/vega.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Emil Velikov [Thu, 23 Feb 2017 16:48:56 +0000 (16:48 +0000)]
blorp: automake: add TODO to the tarball
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Emil Velikov [Thu, 23 Feb 2017 16:48:55 +0000 (16:48 +0000)]
anv: automake: add TODO to the tarball
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Emil Velikov [Thu, 23 Feb 2017 16:48:54 +0000 (16:48 +0000)]
vc4: automake: add the kernel/README to the tarball
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Emil Velikov [Thu, 23 Feb 2017 16:48:53 +0000 (16:48 +0000)]
nir: automake: add the README to the tarball
Similar to other accompanying documentation we have in-tree.
For example glsl/README.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Emil Velikov [Sun, 19 Feb 2017 11:49:22 +0000 (11:49 +0000)]
radv/entrypoints: Only generate entrypoints for supported features
This changes the way radv_entrypoints_gen.py works from generating a
table containing every single entrypoint in the XML to just the ones
that we actually need. There's no reason for us to burn entrypoint
table space on a bunch of NV extensions we never plan to implement.
RADV implements VK_AMD_draw_indirect_count, so add that to the list.
Port of
114c281e707919a1420d3a20219ce4392d8b360d
"and/entrypoints: Only generate entrypoints for supported features"
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Robert Bragg [Thu, 23 Feb 2017 11:16:50 +0000 (11:16 +0000)]
main/performance_query: s/GLboolean/bool/
Ideally would have caught these when adding the interface but this just
switches a few return types for the INTEL_performance_query backend
interface to bool instead of GLboolean.
Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:52 +0000 (23:56 +0000)]
eglapi: replace linear entrypoint search with binary search
Tested with dEQP-EGL.functional.get_proc_address.*
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:51 +0000 (23:56 +0000)]
egl: make sure entrypoints list is always sorted
Starting with the next commit, badly sorting this list will break the
eglGetProcAddress().
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:50 +0000 (23:56 +0000)]
egl: distribute all tests
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:49 +0000 (23:56 +0000)]
eglapi: move entrypoints list out to its own file
This will allow us to make sure the list is always sorted in the next
commit.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:48 +0000 (23:56 +0000)]
eglapi: sort entrypoints list
Let's make that comment true.
If will also be necessary in a couple commits (using bsearch).
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:47 +0000 (23:56 +0000)]
eglapi: use macro to map entrypoints to functions
As of the last 3 commits, there's a function for each entrypoint.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:46 +0000 (23:56 +0000)]
eglapi: add entrypoint for eglClientWaitSyncKHR
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:45 +0000 (23:56 +0000)]
eglapi: add entrypoint for eglDestroySyncKHR
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 21 Feb 2017 23:56:44 +0000 (23:56 +0000)]
eglapi: add entrypoint for eglDestroyImageKHR
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Thomas Hellstrom [Wed, 22 Feb 2017 12:07:47 +0000 (13:07 +0100)]
st/va: Fix up YV12 to NV12 putImage conversion
Use the utility u_copy_nv12_from_yv12 to implement this similarly to
how it's been done in the VPAU state tracker. The old code mixed up
planes and fields and didn't correctly handle video surfaces in
interlaced format.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Thomas Hellstrom [Thu, 3 Mar 2016 08:25:44 +0000 (09:25 +0100)]
st/vdpau: Provide YV12 to NV12 putBits conversion v2
mplayer likes putting YV12 data, and if there is a buffer format mismatch,
the vdpau state tracker would try to reallocate the video surface as an
YV12 surface. A virtual driver doesn't like reallocating and doesn't like YV12
surfaces, so if we can't support YV12, try an YV12 to NV12 conversion
instead.
Also advertize that we actually can do the getBits and putBits conversion.
v2: A previous version of this patch prioritized conversion before
reallocating. This has been changed to prioritize reallocating in this version.
Cc: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Leo Liu [Thu, 23 Feb 2017 18:37:58 +0000 (13:37 -0500)]
configure.ac: check require_basic_egl only if egl enabled
Otherwise the configuration fails when building independant libs
like vdpau, vaapi or omx
Fixes: 1ac40173c2a ("configure.ac: simplify EGL requirements for
drivers dependent on EGL")
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Eric Engestrom [Tue, 21 Feb 2017 16:49:25 +0000 (16:49 +0000)]
glx: add GLXdispatchIndex sort check
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lars Hamre [Wed, 22 Feb 2017 15:56:44 +0000 (10:56 -0500)]
docs: update features.txt for GL_ARB_clear_texture with llvmpipe and softpipe
Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Lars Hamre [Wed, 22 Feb 2017 15:56:43 +0000 (10:56 -0500)]
softpipe: enable clear_texture with util_clear_texture
Passes all corresponding piglit tests.
Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Lars Hamre [Wed, 22 Feb 2017 15:56:42 +0000 (10:56 -0500)]
llvmpipe: enable clear_texture with util_clear_texture
Passes all corresponding piglit tests.
Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Lars Hamre [Wed, 22 Feb 2017 15:56:41 +0000 (10:56 -0500)]
gallium: implement util_clear_texture
v3: have util_clear_texture mirror the pipe function (Roland Scheidegger)
v2: rework util clear functions such that they operate on a resource
instead of a surface (Roland Scheidegger)
Creates a util_clear_texture function for implementing the GL_ARB_clear_texture
in softpipe and llvmpipe.
Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Jerome Duval [Wed, 22 Feb 2017 16:02:51 +0000 (16:02 +0000)]
haiku/winsys: fix dt prototype args
Jerome Duval [Wed, 22 Feb 2017 16:01:24 +0000 (16:01 +0000)]
haiku: build fixes around debug defines
Dave Airlie [Thu, 23 Feb 2017 06:06:22 +0000 (16:06 +1000)]
radv: add sample mask output support
This adds support to write to sample mask from the fragment shader.
We can optimise this later like radeonsi.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 23 Feb 2017 02:20:25 +0000 (12:20 +1000)]
radv/ac: refactor our fmask sample index fixup.
This refactors out the sample index fixup between
txf and image load.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 22 Feb 2017 04:29:09 +0000 (14:29 +1000)]
radv: fetch sample index via fmask for image coord as well.
This follows the txf_ms code, I can't figure out why amdgpu-pro
doesn't do this in their shaders, they must know someone we don't.
This fixes:
dEQP-VK.pipeline.multisample_shader_builtin.sample_id.*
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 30 Jan 2017 19:30:26 +0000 (05:30 +1000)]
radv: add sample mask input support
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 23 Feb 2017 04:24:20 +0000 (14:24 +1000)]
radv: enable location at sample when persample is forced.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 23 Feb 2017 04:24:20 +0000 (14:24 +1000)]
radv: fix interpolation at wrong place for offset interp
The code was interpolating at the offset from the sample,
not the offset from the center. Also fix for persample interpolation
modes we should force the pixel center to be at the sample.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
George Kyriazis [Fri, 3 Feb 2017 03:16:47 +0000 (21:16 -0600)]
swr: fix index buffers with non-zero indices
Fix issue with index buffers that do not contain a 0 index. 0 index
can be a non-valid index if the (copied) vertex buffers are a subset of the
user's (which happens because we only copy the range between min & max).
Core will use an index passed in from the driver to replace invalid indices.
Only do this for calls that contain non-zero indices, to minimize performance
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
cost.
George Kyriazis [Fri, 10 Feb 2017 16:24:32 +0000 (10:24 -0600)]
swr: add fetch shader cache
For now, the cache key is all of FETCH_COMPILE_STATE.
Use new/delete for swr_vertex_element_state, since we have to call the
constructors/destructors of the struct elements.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Timothy Arceri [Thu, 23 Feb 2017 03:50:58 +0000 (14:50 +1100)]
st/mesa: free shader cache buffer on fallback
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Timothy Arceri [Thu, 23 Feb 2017 03:42:07 +0000 (14:42 +1100)]
st/mesa: fix crash in shader cache cased by race condition
If a thread doesn't load GLSL IR from cache but does load TGSI
from cache (that was created by another thread) than it will
crash due to expecting gl_program_parameter_list to have been
restored from the GLSL IR cache and not be null.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Jason Ekstrand [Fri, 17 Feb 2017 22:14:48 +0000 (14:14 -0800)]
anv: Enable MSAA compression
This just enables basic MSAA compression (no fast clears) for all
multisampled surfaces. This improves the framerate of the Sascha
"multisampling" demo by 76% on my Sky Lake laptop. Running Talos on
medium settings with 8x MSAA, this improves the framerate in the
benchmark by 80%.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Wed, 22 Feb 2017 02:28:38 +0000 (18:28 -0800)]
anv/blorp/clear_subpass: Only set surface clear color for fast clears
Not all clear colors are valid. In particular, on Broadwell and
earlier, only 0/1 colors are allowed in surface state. No CTS tests are
affected outright by this because, apparently, the CTS coverage for
different clear colors is pretty terrible. However, when multisample
compression is enabled, we do hit it with CTS tests and this commit
prevents regressions when enabling MCS on Broadwell and earlier.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Pohjolainen, Topi [Thu, 23 Feb 2017 13:31:44 +0000 (15:31 +0200)]
intel/isl: Apply render target alignment constraints for MCS
v2: Instead of having the same block in isl_gen7,8,9.c add it
once into isl.c::isl_choose_image_alignment_el() instead.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Lionel Landwerlin [Mon, 20 Feb 2017 16:10:30 +0000 (16:10 +0000)]
intel/isl: add MCS width constraint 16 samples
v3 (Jason Ekstrand): Add a comment explaining why
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Fri, 17 Feb 2017 21:48:11 +0000 (13:48 -0800)]
intel/isl: Return surface creation success from aux helpers
The isl_surf_init call that each of these helpers make can, in theory,
fail. We should propagate that up to the caller rather than just
silently ignoring it.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Kenneth Graunke [Thu, 23 Feb 2017 01:16:01 +0000 (17:16 -0800)]
glsl: Raise a link error for non-SSO ES programs with a TES but no TCS.
OpenGL allows the TCS to be missing and supplies an implicit passthrough
shader, but OpenGL ES does not (see section 7.3 of the ES 3.2 spec,
cited above in the code).
One open question is how to handle this for ARB_ES3_2_compatibility.
This patch raises the link error for all ES shading language programs,
but it might make sense to base it on the API. The approach taken in
this patch is more restrictive, but should still allow any valid ES
programs to work in GL.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Samuel Iglesias Gonsálvez [Wed, 22 Feb 2017 11:27:15 +0000 (12:27 +0100)]
isl/state: fix assert on raw buffer surface state minimum size
From IVB PRM, SURFACE_STATE::Height:
"For typed buffer and structured buffer surfaces, the number of
entries in the buffer ranges from 1 to 2^27 . For raw buffer
surfaces, the number of entries in the buffer is the number of bytes
which can range from 1 to 2^30."
The minimum value is 1, according to the spec. The spec quote
was already added into the code by
028f6d8317f00.
Fixes crashing tests under:
dEQP-VK.robustness.buffer_access.*
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Iago Toral Quiroga [Wed, 22 Feb 2017 08:06:31 +0000 (09:06 +0100)]
glsl: enable early_fragment_tests implicitly with post_depth_coverage
From ARB_post_depth_coverage:
"This extension allows the fragment shader to control whether values in
gl_SampleMaskIn[] reflect the coverage after application of the early
depth and stencil tests. This feature can be enabled with the following
layout qualifier in the fragment shader:
layout(post_depth_coverage) in;
Use of this feature implicitly enables early fragment tests."
And a bit later it also adds:
"early_fragment_tests" requests that fragment tests be performed before
fragment shader execution, as described in section 15.2.4 "Early Fragment
Tests" of the OpenGL Specification. If neither this nor post_depth_coverage
are declared, per-fragment tests will be performed after fragment shader
execution."
Fixes:
GL45-CTS.post_depth_coverage_tests.PostDepthSampleMask
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Iglesias Gonsálvez [Thu, 9 Feb 2017 13:14:29 +0000 (14:14 +0100)]
glsl: refactor get_variable_being_redeclared() to return always an ir_variable pointer
It will return the current variable ('var') or the earlier declaration ('earlier') in
case of redeclaration of that variable.
In order to distinguish between both, 'is_redeclaration' boolean will indicate in which
case we are.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Samuel Iglesias Gonsálvez [Thu, 9 Feb 2017 12:54:46 +0000 (13:54 +0100)]
glsl: fix heap-use-after-free in ast_declarator_list::hir()
The get_variable_being_redeclared() function can free 'var' because
a re-declaration of an unsized array variable can establish the size, so
we set the array type to the 'earlier' declaration and free 'var' as it is
not needed anymore.
However, the same 'var' is referenced later in ast_declarator_list::hir().
This patch fixes it by picking the ir_variable_mode from the proper
ir_variable.
This error was detected by Address Sanitizer.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99677
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Charmaine Lee [Sat, 18 Feb 2017 09:26:52 +0000 (01:26 -0800)]
st/wgl: flush with ST_FLUSH_WAIT before releasing shared contexts
Before releasing a shared context, flush the context
with ST_FLUSH_WAIT to make sure all commands are executed.
This ensures that rendering to any shared resources is completed
before they will be referenced by another context.
Fixes an intermittent flickering with Photoshop. (VMware bug#
1779340)
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Sat, 18 Feb 2017 09:19:23 +0000 (01:19 -0800)]
st: add ST_FLUSH_WAIT to st_context_flush()
When st_context_flush() is called with ST_FLUSH_WAIT,
the function will return after the fence is completed.
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Tue, 21 Feb 2017 04:13:20 +0000 (14:13 +1000)]
radv/ac: handle gs->copy shader clip distances.
This fixes up the clip distance passing between the geometry
shader and the copy shader. It packs the clip and cull distances
into one or two consecutive slots, and avoids wasting space and
make sure the gs output and copy shader input agree on where
things are stored.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 21 Feb 2017 04:09:11 +0000 (14:09 +1000)]
radv/ac: pass clips properly from vertex->geometry shader stages.
This works out the geometry shader clip/cull inputs separately
to the outputs, and uses that information to read from the ES->GS
ring buffer. It stores the clip/cull distances packed into one
or two slots. It fixes the es output emission and gs input
reading to match.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 21 Feb 2017 03:27:52 +0000 (13:27 +1000)]
radv/ac: rename num clips/cull to output clips/culls
As geom shaders can have different ones on entry and exit.
also move to uint8_t as these are never that big.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 21 Feb 2017 01:04:44 +0000 (11:04 +1000)]
vulkan/wsi: move image count to shared structure.
For prime support I need to access this, so move it in advance.
[airlied: fix int->uint32_t]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Thu, 23 Feb 2017 02:35:03 +0000 (13:35 +1100)]
radeon: fix r600 builds when old version of llvm is present
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Dylan Baker [Thu, 23 Feb 2017 00:37:10 +0000 (16:37 -0800)]
vulkan: Fix gen_enum_to_str in out of tree builds
In some configurations the util directory is created when building out
of tree, but not others. This patch ensures that it's created.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-and-Tested-by: Mike Lothian <mike@fireburn.co.uk>
Jason Ekstrand [Wed, 22 Feb 2017 03:37:53 +0000 (19:37 -0800)]
anv/Makefile: Gather all the genX files into one place
While we're here, we also fix the alphabetization of the list of
genx_* files.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Mon, 20 Feb 2017 22:57:09 +0000 (09:57 +1100)]
r600/radeonsi: enable glsl/tgsi on-disk cache
For gpu generations that use LLVM we create a timestamp string
containing both the LLVM and Mesa build times, otherwise we just
use the Mesa build time.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Mon, 20 Feb 2017 22:00:49 +0000 (09:00 +1100)]
st/mesa: get on-disk shader cache
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Tue, 21 Feb 2017 22:18:09 +0000 (09:18 +1100)]
ddebug/rbug/trace: add get_disk_shader_cache() to pass-throughs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Sun, 19 Feb 2017 22:29:01 +0000 (09:29 +1100)]
gallium: add get_disk_shader_cache() callback
V2: Provide more detail in callback description and add description to
screen.rst
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 1 Feb 2017 04:52:27 +0000 (15:52 +1100)]
st/mesa: implement a tgsi on-disk shader cache
Implements a tgsi cache for the OpenGL state tracker.
V2: add support for compute shaders
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 22 Feb 2017 00:33:44 +0000 (11:33 +1100)]
st/mesa: add sha1 field to st program structs
This will be used to share the sha1 computed by the tgsi load
function with the tgsi write function.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Tue, 21 Feb 2017 23:59:13 +0000 (10:59 +1100)]
st/mesa: move set_prog_affected_state_flags() to st_program.c
We want to use this in the new tgsi shader cache so we move it here
and make it available externally.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 22 Feb 2017 03:16:04 +0000 (14:16 +1100)]
util/disk_cache: fix bug with deleting old cache dirs
If there was more than a single directory in the .cache/mesa dir
then it would only remove one (or none) of the directories.
Apparently Valgrind was also reporting:
Conditional jump or move depends on uninitialised value
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Dylan Baker [Fri, 17 Feb 2017 19:57:24 +0000 (11:57 -0800)]
vulkan: Combine wsi and util makefiles
Reviewed-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 15 Feb 2017 23:41:50 +0000 (15:41 -0800)]
vulkan/util: Add generator for enum_to_str functions
This adds a python generator to produce enum_to_str functions for
Vulkan from the vk.xml API description. It supports extensions as well
as core API features, and the generator works with both python2 and
python3.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Thomas Hellstrom [Wed, 22 Feb 2017 20:42:01 +0000 (21:42 +0100)]
Revert "st/vdpau: Fix multithreading"
This reverts commit
f1e5dfbe3c8951a6c8acf41bf5e6c2d090098b2c.
For a detailed discussion see
https://lists.freedesktop.org/archives/mesa-dev/2017-February/145283.html
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Nayan Deshmukh [Wed, 22 Feb 2017 08:25:02 +0000 (13:55 +0530)]
vl: u_upload_alloc might fail to allocate buffer in bicubic filter
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Mon, 20 Feb 2017 18:34:02 +0000 (19:34 +0100)]
gallium: reorder fields in pipe_draw_info
sizeof(struct pipe_draw_info) = 104 -> 88
Also, vertices_per_patch is switched to ubyte, because it can't be more
than 32.
Seemed-reasonable-to: Roland Scheidegger
Marek Olšák [Sun, 19 Feb 2017 18:29:06 +0000 (19:29 +0100)]
gallium/hud: handle a thread switch for API-thread-busy monitoring
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>