gallium/hash_table: remove some function wrappers

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: turn it into a wrapper around util/hash_table

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: use the same callback signatures as util/hash_table

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: consolidate hash tables with FD keys

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: consolidate hash tables with pointer keys

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

amd/addrlib: fix build on non-x86 platforms

regparm(0) attribute does not work on aarch64 (and presumably powerpc64 and others).
Default to not specifying any calling convention on non-amd64/i386 platforms.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>

tgsi_to_nir: set num_images and num_samplers with holes correctly

This fixes the copy_uv shader from st/omx, because it uses image 0 and 2
and image 1 isn't declared.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>

nir: Drop nir_tex_instr::texture_array_size

It's set by lots of things and we spend a lot of time maintaining it but
no one actually uses the value for anything useful.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>

freedreno/computerator: Fix defined-but-not-used warnings from lex/yacc.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>

turnip: Fix compiler warning about casting a nondispatchable handle.

Fixes: 1c5d84fcae71 ("turnip: hook up cmdbuffer event set/wait")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>

gitlab-ci: Move to 5.5 kernel plus fixes for Panfrost

There's two fixes that help with stability when running dEQP on Kevin
Chromebooks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>

panfrost: Remove some more prints to stdout

They can confuse test runners.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>

gitlab-ci: Run GLES3 tests in dEQP on Panfrost

We are able to run only 1/5th of the tests in around the same time that
dEQP-GLES2 takes, so do that for now while more DUTs are installed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>

mesa/st: toggle EXT_texture_norm16 based on format support

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2556
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>

i965: toggle on EXT_texture_norm16

Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>

mesa: introduce boolean toggle for EXT_texture_norm16

Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>

nir/lower_double_ops: add note for lowering mod

Add a note to clarify that while Vulkan allows mod(x,y) to be in [0, y]
range, OpenGL does not allow it, so the lowering ensures the result is
always in [0, y) range, as this lowering is shared by the Vulkan and
OpenGL implementation.

Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>

radv: fix creating null devices if KHR_display is enabled

Found this while replaying pipelines with Fossilize, it worked
fine with vkpipeline-db.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>

gitlab-ci: Add add a set of lima flakes

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>

radv: make use of ac_gpu_info::max_wave64_per_simd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust the number of VGPRs used to compute waves

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust the LDS size used to compute waves

It's 128KB per CU in WGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust SGPRs/VGPRs related info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust the number of simd per compute unit

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

ac: add more ac_gpu_info related shader fields

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

ac,radeonsi: add ac_gpu_info::lds_size_per_cu

Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv: implement a dummy winsys for creating devices without AMDGPU

To allow developers to test the compiler backends without having
any AMD GPUs. To create a null device, set eg.
RADV_FORCE_FAMILY=polaris10 in your environment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>

egl: Factor out dri2_add_pbuffer_configs_for_visuals {device,surfaceless}.

v2: dri2_add_configs_for_visuals -> dri2_add_pbuffer_configs_for_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>

egl: Fix A2RGB10 platform_{device,surfaceless} PBuffer configs.

The __DRI_IMAGE_FORMAT_* part wants to be handled for the *101010
type formats as well. Factor out a common function for that task.
That again makes the piglit egl_ext_device_base test work again
for hardware drivers.

v2: Factor out a common function for that task.
v3: dri2_pbuffer_visuals -> dri2_pbuffer_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 9acb94b6236 "egl: Enable 10bpc EGLConfigs for platform_{device,surfaceless}"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>

turnip: enable fullDrawIndexUint32/independentBlend/dualSrcBlend/logicOp

These are already implemented but missing from VkPhysicalDeviceFeatures.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>

turnip: enable sampleRateShading feature

There's still a TODO related to key->sample_shading, but it doesn't look
like it changes anything in ir3, so it works without that.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>

intel/tools: Do not print type/qualifiers/name for c_literal

External tools may wish to choose their own type, qualifiers, and name,
so do not emit our own.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Allow i965_disasm to disassemble c_literal input type

Added extra argument named 'type' which can be 'bin' (default if
ommited) or 'c_literal' for input type.

Change 'binary-path' argument name to 'input-path'.

v2:
- Use util_dynarray for assembly (Matt Turner)
- Read data in 8 bytes chunk (Matt Turner)
- Fix help option (Akeem Abodunrin)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Print c_literals 4 byte wide

We already print hex value a byte wide, instead of printing c_literal
byte wide, we can print it 4 byte wide, which gives us 2 different
combinations.

v2: Fix the aliasing issue (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Add test for state register as source

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Add test for address register as source

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Set correct address register file and number in i965_asm

We need to use already created brw_reg and set correct file type,
register number and sub register number.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Handle STATE_REG in typed source operand

Also stop using brw_sr0_reg function as it return new brw_reg, we
already created register, all we have to is just set file, register
number and subnr.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Handle illegal instruction

Allow assembler to handle illegal instruction even though mesa doesn't
use it but might be required at some point in future.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

meson: Disable bison's -Wdeprecated since we still support old bison.

We can't stop using deprecated keywords because we maintain support for
ancient bison.  Silence the warning so that builds are less noisy.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>

anv: Always enable the data cache

Because we set the needs_data_cache bit from the NIR during compilation,
any time a shader was pulled out of the pipeline cache, we wouldn't set
the bit and the data cache was disabled.  Fortunately, on Gen8+, this
bit is ignored because we always use the ALL section in the L3$ config
instead of separate DC and RO sections.  On Gen7, however, this meant
that we were basically never running with the data cache enabled and our
compute performance was suffering massively because of it.  This commit
improves Geekbench 5 scores on my Haswell GT3 by roughly 330% (no,
that's not a typo).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>

intel/aub_dump: stub the waits when overriding the device

We don't actually want to wait on anything, just complete submitting
the commands as fast as possible.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>

intel/tools/aub_dump: fix crash when using the default legacy context

When execbuffer->rsvd1 == 0, the legacy context is used. Ensure we
have context created for this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>

intel/tools/aub_dump: move aub file initialization to maybe_init()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>

lima: expose fragment shader derivatives capability

Support for fragment shader derivatives has landed in the Lima PP
compiler for a long time, but its capability is not exposed yet.

Expose the support now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>

v3d: Sync on last CS when non-compute stage uses resource written by CS

When a resource is written by a compute shader and then used by a
non-compute stage we sync on last compute job to guarantee that the
resource has been completely written when the next stage reads resources.

In the other cases how flushes are done guarantee the serialization of
the writes and reads.

To reproduce the failure the following tests should be executed in batch
as last test don't fail when run isolated:

KHR-GLES31.core.shader_image_load_store.basic-allFormats-load-fs
KHR-GLES31.core.shader_image_load_store.basic-allFormats-loadStoreComputeStage
KHR-GLES31.core.shader_image_load_store.basic-allTargets-load-cs
KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray

v2: Use fence dep instead of bo_wait (Eric Anholt)
v3: Rename struct names (Iago Toral)
    Document why is not needed on graphics->compute case. (Iago Toral)
    Follow same code pattern of the other update of in_sync_bcl.
v4: Fixed comments style. (Iago Toral)

Fixes KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
CC: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>

gitlab-ci: Enable the lima job again

Flaky tests should be fixed to the best of our knowledge.
Fails and skips lists should be up-to-date again.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>

gitlab-ci: lima: Add flaky tests to the skips list

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>

nir: fix gl_nir_lower_images for bindless images

Fixes: 7342b859afb5a7e7f9fb1813e7ab3a55a1c8a704
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>

freedreno/computerator: fix build dependency

Ensure the generated register headers are built before computerator uses
them.

Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3939>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3939>

glx/drisw: fix shm put image fallback

The fallback to the non-shm put path used the wrong width here
as the pixmap is still allocated in a shared segment, so the
width needs to reflect that.

Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>

glx/drisw: return false if shmid == -1

If an attempt to create an shm pixmap in XCreateDrawable fails
then it ends up with the shmid == -1. This means the get image
path needs to fallback so return false in this case to use the
non-shm get image path.

Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>

glx/drisw: add getImageShm2 path

This adds return values to the get image path, so the caller can fallback.

Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>

dri: add another get shm variant.

When Brian in 02c3dad0f3b4d26e0faa5cc51d06bc50d693dcdc restricted
the shm permissions it means we hit the fallback paths in some
scenarios we hadn't before.

When you use Xephyr to xdmcp from one user to another the new perms
stop the X server (running as user a) attaching to the SHM segments
from gnome-shell (running as user b).

In this case however only the GLX side of the code had insight into this,
and the dri could was meant of fall back, and it worked for put image
fine but the get image path was broken, since there was no indication
in the broken case of the need to fallback.

This adds a return type to a new interface member that lets the
caller know it has to fallback.

Fixes: 02c3dad0f3b4 ("Call shmget() with permission 0600 instead of 0777")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>

ci: Blacklist another freedreno flaky test.

This is the recurring flake from the last week, including spuriously
failing a pipeline once.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3937>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3937>

intel/isl: Add isl_aux_info.c to Makefile.sources

This should fix the Android build.

Fixes: 58d4749e56 "isl: Add a module which manages aux resolves"
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3934>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3934>

intel/blorp: Implement GEN:BUG:1605967699.

v2:
 - Update comments and refactor code (Lionel).
 - Only apply workaround to stencil resolves.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3909>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3909>

gallium/util: remove unused debug_print_foo helpers

These are unused, so let's just get rid of them.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>

gallium/util: do not use debug_print_format

These are the only two places we use this macro, and it's no longer very
gallium-specific. So let's get rid of this, and just use debug_printf
and util_format_name directly instead.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>

util: move debug_memory_{begin,end} to os_memory_debug.h

This is where the other debug_memory_* functions are declared, so let's
move it here for symmetry.

This allows us to drop an include of u_debug_gallium.h, which makes us
depend on gallium-headers in non-gallium code.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>

hud: add GALLIUM_HUD_SCALE

Scale hud by an integer factor, for high DPI displays.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3931>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3931>

turnip: move tile_load_ib/sysmem_clear_ib into draw_cs

Avoids having to calculate reserved sizes for substream cs, also matches
what the blob does.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>

turnip: make cond_exec helper easier to use

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>

turnip: remove marker seqno

Use robclark's new crashdec/devcoredump thing instead.

Note: not sure this ever really worked because it didn't WFI.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>

turnip: automatically reserve cmdstream space in emit_pkt4/emit_pkt7

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>

turnip: add tu_device pointer to tu_cs

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>

turnip: fix COND_EXEC reserved size in tu_query

Conditionally executed dwords must be in the same bo.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>

freedreno/computerator: add computerator

A standalone tool to compile and run compute shaders from ir3 assembly.
Mostly to have an easy way to experiment with instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>

freedreno/ir3: allow block->predecessors to be null

This way we can also use ir3_print from computerator, which mostly
bypasses the ir3_block construct (since it doesn't need to do
scheduling, etc)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>

freedreno/computerator: rename prefix asm->ir3

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>

freedreno/computerator: polish out some of the rust

Updates for differences between fdre-a3xx's early version of ir3, and
what we have now in mesa.  And updates for instruction name and syntax
changes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>

freedreno/computerator: import parser/lexer from fdre-a3xx

Import the rusty old parser from freedreno.git

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>

lima: remove its hash table entry when invalidating a resource

When a resouce is already invalidated, its hash table entry becomes
useless. In addition, the lima_job_free() function won't remove the hash
table entry for invalidated resource. So the hash entry should be
removed when invalidating the resource, otherwise bogus hash entry might
be left in the table, and when the resource is reused in another job,
the code will find the freed job when invalidating and thus result in crash.

Fixes: c64994433c0d ("lima: track write submits of context (v3)")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3917>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3917>

nir, intel: Move use_scoped_memory_barrier to nir_options

This option will be used later by GLSL, so move to a common struct.

Because nir_options is filled in the compiler instead of the Vulkan
driver, fix that up.  GLSL will ignore that for now.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>

nir/tests: Use nir_scoped_memory_barrier() helper

Most of the vars tests already had a local helper, so just drop it in
favor of the one in nir_builder.  Remaining two tests changed to use
the helper.

The load_store_vectorizer tests were using the specific memory
barriers, but since scoped barriers are also handled, prefer that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>

nir: Add the alias NIR_MEMORY_ACQ_REL

This will help upcoming C++ code that will have to combine those two
semantics.  In C++ it is not possible to do this without a cast or
adding an operator| to the enum.  Since having the short form will
also be convient to C, we picked the former solution.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>

nir/builder: Add nir_scoped_memory_barrier()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>

freedreno: Switch to using lowered image intrinsics.

This cuts out a bunch of deref chain walking that the compiler can do for
us.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

nir: Move intel's intrinsic_image_coordinate_components() to core nir.

This is a query that both Intel and freedreno need to do.  We can simplify
it a lot with the new glsl_get_sampler_dim_coordinate_components()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

freedreno/ir3: Fix the arg to ir3_get_num_components_for_image_format()

GLuint worked fine for storing our enum, but it should be an enum
pipe_format since the image-formats merge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

prog_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

tgsi_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

freedreno/ir3: Reuse glsl_get_sampler_dim_coordinate_components() in tex_info.

Now that we have access to the interior switch statement not going through
the txs special case for coord_components, we can just use it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

spirv_to_nir: Reuse glsl_sampler_dim_coordinate_components().

We just needed to move the SUBPASS_MS case in, and the rest of the cases
match up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

glsl: Factor out the sampler dim coordinate components switch statement.

I want to reuse this in NIR image intrinsics in backends, which just have
dim/is_array.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

v3d: Ask the state tracker to lower image accesses off of derefs.

This saves a bunch of hassle in handling derefs in the backend, and would
be needed for reasonable handling of dynamic indexing of image arrays.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

gallium: Add a cap for enabling lowering of image load/store intrinsics.

The deref stuff is hard to handle in a backend supporting dynamic
indexing, while the lowering can easily turn that into the same kind of
dynamic indexing we do for textures, UBOs, and SSBOs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

nir: Make image lowering optionally handle the !bindless case as well.

iris was doing this internally, but let's rename the function and move the
iris code there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

nir: Rename gl_nir_lower_bindless_images.c in preparation for extending it.

The bulk of it can be reused to implement iris's internal non-bindless
image lowering, which I would like to reuse in freedreno, v3d, and
nir-to-tgsi.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

i965: Use isl_aux_state_transition_write()

v2. Dirty shadow miptrees independent of aux. (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

i965: Use ISL's access preparation functions

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

iris: Use isl_aux_state_transition_write()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

iris: Use ISL's access preparation functions

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

iris: Use isl_aux_usage_has_fast_clear()

Make sure fast-clears aren't attempted or allowed for ISL_AUX_USAGE_MC.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

isl: Add a module which manages aux resolves

Provide a generic interface which manages aux resolves in ISL. The
feature differences between this and what's in iris is:
* Support for media compression. ISL_AUX_USAGE_MC behaves differently
  from many other usages of CCS, so it was useful to implement this
  support upfront, while designing the interfaces.
* Optimizations for full-surface writes. For example, after a
  full-surface write occurs with ISL_AUX_USAGE_CCS_E in the PARTIAL_CLEAR
  state, isl_aux_state_transition_write() returns COMPRESSED_NO_CLEAR
  instead of COMPRESSED_CLEAR.

A performance suggestion for main-surface-invalidating/replacing writes
is given as a comment instead of adding a boolean to
isl_aux_prepare_access(). This avoids extra validation and should be
simple enough for the caller to handle.

v2. Add assertions. (Jason)
v3. Use switches in 2 more functions. (Jason)
    Store aux metadata in a static table. (Jason)
    Change prepare and finish function signatures. (Jason)
    Keep isl_aux_state_transition_* functions separate.
v4. (Jason)
    Assert against resolving in AUX_INVALID.
    Rename aux_info struct to aux_usage_info.
    Drop the justification for each aux_usage_info field.
    Split out the NONE case in write function.
    Restructure tests to more easily confirm coverage.
    Rename access_compressed field to compressed.
    Make write behavior less ambiguous.
v5. (Jason)
    Add more detail above WRITES_RESOLVE_AMBIGUATE.
    Add ISL_AUX_USAGE_MC to WritesResolveAmbiguate.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

freedreno/ir3: Lower output precision

This lowers mediump FS outputs to fp16 in the ir3 backend. For now
this is a modest improvement, which mostly helps us whittle down the
full mediump work.  Once the GLSL level support lands, then right hand
side of the store output intrinsics will be fp16 expressions and we'll
cancel out the fp16 -> fp32 -> fp 16 round trip here.

We've had different attempts at implementing this: rewriting stores in
the GLSL IR, lowering GLSL IR outputs to temporaries and inserting
conversions when writing the temporaries to the outputs.  In the end,
GLSL ends up getting in the way a lot and doing it at the nir level is
easier and still possible since we have the output var precisions.

This part of the fp16 work is more of a step on the way towards full
fp16 support and will add a few extra conversion instructions:

total instructions in shared programs: 8151 -> 8163 (0.15%)
instructions in affected programs: 1187 -> 1199 (1.01%)
helped: 4
HURT: 10

total nops in shared programs: 3146 -> 3152 (0.19%)
nops in affected programs: 563 -> 569 (1.07%)
helped: 5
HURT: 10

total non-nops in shared programs: 5005 -> 5011 (0.12%)
non-nops in affected programs: 92 -> 98 (6.52%)
helped: 0
HURT: 3

total dwords in shared programs: 12832 -> 12800 (-0.25%)
dwords in affected programs: 96 -> 64 (-33.33%)
helped: 1
HURT: 0

total last-baryf in shared programs: 118 -> 115 (-2.54%)
last-baryf in affected programs: 21 -> 18 (-14.29%)
helped: 1
HURT: 0

total full in shared programs: 424 -> 417 (-1.65%)
full in affected programs: 15 -> 8 (-46.67%)
helped: 7

HURT: 0
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

nir/types: Add glsl_float16_type() helper

This returns the float16 version of a float type.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

freedreno/ir3: handle half registers for arrays during register allocation.

So far we only handle full regs of arrays during pre-allocation.
This patch is to handle half regs of arrays and also consider the size
of half regs when finding out conflicts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

nir: Add optimization for doing removing f16/f32 conversions

This eliminates conversions between f16 and f32 where possible. We can
always remove an upcast followed by a down cast, that is:

  f2f16 ( f2f32 (a) )  ->  a
  f2fmp ( f2f32 (a) )  ->  a

In the other direction, f2f16 loses precision and can't be undone by a
f2f32.  However, by definition it's always safe to elminate f2fmp:

  f2f32 ( f2fmp (a) )  ->  a

v2. [Neil Roberts (nroberts@igalia.com)]

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

freedreno/ir3: Add new ir3 pass to fold out fp16 conversions

This pass tries to fold f2f16 conversion into alu instructions.
This will be useful to help reduce the number of instructions once
mesa starts supporting precision lowering.  For example:

  add.f r0.w, r0.w, c0.x
  cov.f32f16 hr2.x, r0.w

to

  add.f hr2.x, r0.w, c0.x

Additionally this pass also tries to fold f2f16 conversion into load_input
instruction:

  bary.f r0.x, 3, r0.w
  cov.f32f16 hr0.x, r0.x

to

  bary.f hr1.x, 3, r0.x

v2: Edit to not fold OPC_MAX_F and OPC_MIN_F, since that's not valid.

v3: Add OPC_ABSNEG_F to the blacklist as well.

v4: Don't remove dead cov instructions, DCE will do that later; don't
iterate through sources when a cov only has one; remove special
handling of IR3_REG_ARRAY and IR3_REG_RELATIV.

v5: Handle folding into u32.u32 movs of floats correctly, don't bail
out on IR3_REG_RELATIV or IR3_REG_ARRAY movs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>