mesa.git
7 years agoi965: Make brw_update_renderbuffer_surface static.
Kenneth Graunke [Thu, 17 Aug 2017 07:57:33 +0000 (00:57 -0700)]
i965: Make brw_update_renderbuffer_surface static.

Also rename it to gen6_update_renderbuffer_surface, as this is the
function for Gen6+.  Having functions named "brw_*" and "gen4_*"
is confusing...if we're using gens, let's stick with those.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965: Drop BRW_NEW_BLORP from SURFACE_STATE setup code.
Kenneth Graunke [Wed, 16 Aug 2017 20:18:26 +0000 (13:18 -0700)]
i965: Drop BRW_NEW_BLORP from SURFACE_STATE setup code.

BLORP invalidates the binding tables, but it doesn't destroy any of the
existing SURFACE_STATE entries in the statebuffer.  We can reuse those.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Make a BRW_NEW_FAST_CLEAR_COLOR dirty bit.
Kenneth Graunke [Wed, 16 Aug 2017 23:04:22 +0000 (16:04 -0700)]
i965: Make a BRW_NEW_FAST_CLEAR_COLOR dirty bit.

When changing fast clear colors, we need to emit new SURFACE_STATE
with the updated color at the next draw call.

Most things work today because the atoms that handle SURFACE_STATE
for images (mutable images, textures, render targets) also listen to
BRW_NEW_BLORP, causing us to re-emit these on every BLORP operation.
However, this is overkill - most BLORP operations don't require us
to re-emit SURFACE_STATE.

One case where this is broken today is a fast clear to a different
color followed by a non-coherent framebuffer fetch.  The renderbuffer
read atom doesn't listen to BRW_NEW_BLORP, and would not get the new
fast clear color.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Drop Gen7+ nonsense from brw_ff_gs.c.
Kenneth Graunke [Tue, 22 Aug 2017 21:56:36 +0000 (14:56 -0700)]
i965: Drop Gen7+ nonsense from brw_ff_gs.c.

brw_ff_gs.c is about using the geometry shader to implement things
that the fixed function ought to do, but doesn't on old hardware.

Gen7+ does not need this.  We should drop the misleading comment
about Gen7 not using geometry shaders.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoi965: Only set key->flat_shade if COL0/COL1 are written.
Kenneth Graunke [Tue, 22 Aug 2017 21:23:17 +0000 (14:23 -0700)]
i965: Only set key->flat_shade if COL0/COL1 are written.

This may reduce some recompiles.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoi965: Clean up brwNewProgram().
Kenneth Graunke [Fri, 18 Aug 2017 06:48:07 +0000 (23:48 -0700)]
i965: Clean up brwNewProgram().

All shader stages do the exact same thing, so we don't need the switch
statement, or the redundant FS case.  I believe these used to be
different before Tim eliminated the (e.g.) brw_vertex_program
subclasses.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agost/va: exclude the buffer reallocation for encode case
Leo Liu [Wed, 23 Aug 2017 17:18:21 +0000 (13:18 -0400)]
st/va: exclude the buffer reallocation for encode case

Since encoder only support de-interlaced buffers.

v2: move to parameter call to tell dec/enc

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoswr: limit pipe_draw_info->restart_index usage
Tim Rowley [Tue, 22 Aug 2017 15:39:57 +0000 (10:39 -0500)]
swr: limit pipe_draw_info->restart_index usage

Only copy this value when in restart drawing mode.

Eliminates valgrind errors when running trivial programs.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoradeonsi: fix wrong assertion in si_init_bindless_descriptors()
Samuel Pitoiset [Wed, 23 Aug 2017 15:10:56 +0000 (17:10 +0200)]
radeonsi: fix wrong assertion in si_init_bindless_descriptors()

Bad mistake, sorry.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agoradeon/video: Return false explicitly for HEVC if not the case
Leo Liu [Wed, 23 Aug 2017 13:53:10 +0000 (09:53 -0400)]
radeon/video: Return false explicitly for HEVC if not the case

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/docs: Fix the math formula of U2I64
Gwan-gyeong Mun [Tue, 22 Aug 2017 15:57:18 +0000 (00:57 +0900)]
gallium/docs: Fix the math formula of U2I64

before:
  dst.xy = (uint64_t) src0.x
  dst.zw = (uint64_t) src0.y

after:
  dst.xy = (int64_t) src0.x
  dst.zw = (int64_t) src0.y

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/docs: Add missing word "Not"
Gwan-gyeong Mun [Tue, 22 Aug 2017 15:29:44 +0000 (00:29 +0900)]
gallium/docs: Add missing word "Not"

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agotgsi: store opcode mnemonics in a separate table
Nicolai Hähnle [Tue, 1 Aug 2017 21:09:48 +0000 (23:09 +0200)]
tgsi: store opcode mnemonics in a separate table

They are only used for debug info.

Together with making tgsi_opcode_info::opcode a bitfield, this reduces
the size of tgsi_opcode_info on 64-bit systems from 24 bytes to 4 bytes,
and makes the whole data structure a bit more linker friendly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium: use tgsi_get_opcode_name instead of tgsi_opcode_info::mnemonic
Nicolai Hähnle [Wed, 2 Aug 2017 10:05:34 +0000 (12:05 +0200)]
gallium: use tgsi_get_opcode_name instead of tgsi_opcode_info::mnemonic

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agotgsi: macro-ify the opcodes table
Nicolai Hähnle [Tue, 1 Aug 2017 21:05:10 +0000 (23:05 +0200)]
tgsi: macro-ify the opcodes table

So we can easily re-arrange members of tgsi_opcode_info, and readers of
the code don't have to guess what all the 0s mean.

Mostly done with regex search&replace.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agotgsi: remove post_indent from some 64-bit opcodes
Nicolai Hähnle [Tue, 1 Aug 2017 20:58:18 +0000 (22:58 +0200)]
tgsi: remove post_indent from some 64-bit opcodes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agotgsi: reduce tgsi_opcode_info::pre_dedent and post_indent to 1 bit
Nicolai Hähnle [Tue, 1 Aug 2017 20:48:08 +0000 (22:48 +0200)]
tgsi: reduce tgsi_opcode_info::pre_dedent and post_indent to 1 bit

It's not clear why they were ever 2 bits to begin with. Perhaps
the original intent was to use signed values, but that doesn't
seem to have ever been the case in master.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium/radeon: fix saving multi-part command streams
Nicolai Hähnle [Fri, 18 Aug 2017 18:28:02 +0000 (20:28 +0200)]
gallium/radeon: fix saving multi-part command streams

Use the correct type to fix pointer arithmetic.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoac/debug: invoke valgrind checks while parsing IBs
Nicolai Hähnle [Fri, 18 Aug 2017 18:17:29 +0000 (20:17 +0200)]
ac/debug: invoke valgrind checks while parsing IBs

Help catch garbage data written into IBs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoac/debug: annotate IB dumps with the raw values
Nicolai Hähnle [Tue, 22 Aug 2017 15:33:54 +0000 (17:33 +0200)]
ac/debug: annotate IB dumps with the raw values

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoac/debug: use an explicit getter for fetching words from the IB
Nicolai Hähnle [Fri, 18 Aug 2017 16:06:20 +0000 (18:06 +0200)]
ac/debug: use an explicit getter for fetching words from the IB

Guard against out-of-bounds accesses, and prepare for upcoming changes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: update comment describing indices into sctx->descriptors
Nicolai Hähnle [Thu, 17 Aug 2017 19:36:40 +0000 (21:36 +0200)]
radeonsi: update comment describing indices into sctx->descriptors

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoutil: fix valgrind errors when dumping pipe_draw_info
Nicolai Hähnle [Fri, 18 Aug 2017 17:29:49 +0000 (19:29 +0200)]
util: fix valgrind errors when dumping pipe_draw_info

Various index-related fields are only initialized when required, so
they should only be dumped in those cases.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: do not assert when reserving bindless slot 0
Samuel Pitoiset [Wed, 23 Aug 2017 07:42:58 +0000 (09:42 +0200)]
radeonsi: do not assert when reserving bindless slot 0

When assertions were disabled, the compiler removed
the call to util_idalloc_alloc() and the first allocated
bindless slot was 0 which is invalid per the spec.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoradeonsi: rename some bindless-related helper functions
Samuel Pitoiset [Wed, 23 Aug 2017 08:59:07 +0000 (10:59 +0200)]
radeonsi: rename some bindless-related helper functions

I think it makes more sense.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: minor cleanups in si_make_{texture,image}_handle_resident()
Samuel Pitoiset [Wed, 23 Aug 2017 08:59:06 +0000 (10:59 +0200)]
radeonsi: minor cleanups in si_make_{texture,image}_handle_resident()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoAndroid: gallium_dri: pass dri.sym to linker
Rob Herring [Mon, 21 Aug 2017 19:27:42 +0000 (14:27 -0500)]
Android: gallium_dri: pass dri.sym to linker

Pass the dri.sym version script to the linker. This ensures only
explicitly exported symbols are exported and shrinks the library by up
to 60KB.

HAVE_DLADDR also needs to be set so that __driDriverExtensions is defined.

We need to pass "--undefined-version" because the Android build system
sets --no-undefined-version by default and we get an error on
driver specific symbols if those drivers are disabled without the option.

Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
7 years agost/va: enable P016 format i.e. reallocate buffer if format changed
Leo Liu [Mon, 21 Aug 2017 18:03:40 +0000 (14:03 -0400)]
st/va: enable P016 format i.e. reallocate buffer if format changed

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: enable P016 mode support
Leo Liu [Mon, 21 Aug 2017 15:51:35 +0000 (11:51 -0400)]
radeon/vcn: enable P016 mode support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: correct target buffer pitch calculation
Leo Liu [Mon, 21 Aug 2017 15:50:38 +0000 (11:50 -0400)]
radeon/vcn: correct target buffer pitch calculation

since the way should be as same as UVD

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoanv: Check that in_fence fd is valid before closing it.
Francisco Jerez [Fri, 18 Aug 2017 19:04:55 +0000 (12:04 -0700)]
anv: Check that in_fence fd is valid before closing it.

Probably harmless, but will overwrite errno with a failure status
code.  Reported by coverity.

CID 1416600: Argument cannot be negative (NEGATIVE_RETURNS)
Fixes: 5c4e4932e02 (anv: Implement support for exporting semaphores as FENCE_FD)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoanv: Add error handling to setup_empty_execbuf().
Francisco Jerez [Fri, 18 Aug 2017 18:00:42 +0000 (11:00 -0700)]
anv: Add error handling to setup_empty_execbuf().

The anv_execbuf_add_bo() call can actually fail in practice, which
should cause the QueueSubmit operation to fail.  Reported by Coverity.

CID: 1416606: Unchecked return value (CHECKED_RETURN)
Fixes: 017cdb10cf (anv: Submit a dummy batch when only semaphores are provided.)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agotgsi/scan: fix uses_double
Marek Olšák [Tue, 22 Aug 2017 14:58:40 +0000 (16:58 +0200)]
tgsi/scan: fix uses_double

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium: remove TGSI opcode SCS
Marek Olšák [Sat, 19 Aug 2017 18:25:08 +0000 (20:25 +0200)]
gallium: remove TGSI opcode SCS

use COS+SIN instead.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
7 years agogallium/u_blitter: don't use boolean, TRUE, FALSE
Marek Olšák [Thu, 17 Aug 2017 13:36:20 +0000 (15:36 +0200)]
gallium/u_blitter: don't use boolean, TRUE, FALSE

v2: cherry-picked from the bigger patch series

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Tested-by: Brian Paul <brianp@vmware.com>
7 years agogallium/u_simple_shaders: do util_make_layered_clear_vertex_shader differently
Marek Olšák [Thu, 17 Aug 2017 11:42:06 +0000 (13:42 +0200)]
gallium/u_simple_shaders: do util_make_layered_clear_vertex_shader differently

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
7 years agogallium/u_blitter: remove get_next_surface_layer callback
Marek Olšák [Thu, 17 Aug 2017 01:35:13 +0000 (03:35 +0200)]
gallium/u_blitter: remove get_next_surface_layer callback

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
7 years agost/glsl_to_tgsi: fix getting the image type for array of structs (again)
Samuel Pitoiset [Tue, 22 Aug 2017 10:34:48 +0000 (12:34 +0200)]
st/glsl_to_tgsi: fix getting the image type for array of structs (again)

We want the type of the field, not of the struct.

This fixes a regression in the following piglit test:
arb_bindless_texture/compiler/images/arrays-of-struct.frag

Fixes: 49d9286a3f ("glsl: stop copying struct and interface member names")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agogallium: remove TGSI opcode BREAKC
Marek Olšák [Sun, 20 Aug 2017 10:41:13 +0000 (12:41 +0200)]
gallium: remove TGSI opcode BREAKC

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium: remove TGSI opcode XPD
Marek Olšák [Sat, 19 Aug 2017 20:23:08 +0000 (22:23 +0200)]
gallium: remove TGSI opcode XPD

use MUL+MAD+MOV instead.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agogallium: remove TGSI opcode DPH
Marek Olšák [Sat, 19 Aug 2017 20:00:02 +0000 (22:00 +0200)]
gallium: remove TGSI opcode DPH

use DP4 or DP3 + ADD.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agogallium: remove TGSI opcode DP2A
Marek Olšák [Sat, 19 Aug 2017 19:41:57 +0000 (21:41 +0200)]
gallium: remove TGSI opcode DP2A

use DP3 instead.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agogallium: remove TGSI_OPCODE_CALLNZ
Marek Olšák [Sat, 19 Aug 2017 19:18:53 +0000 (21:18 +0200)]
gallium: remove TGSI_OPCODE_CALLNZ

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agogallium: remove TGSI FENCE opcodes
Marek Olšák [Sat, 19 Aug 2017 19:09:52 +0000 (21:09 +0200)]
gallium: remove TGSI FENCE opcodes

use MEMBAR instead

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agogallium: remove TGSI opcodes PUSHA, POPA, SAD, TXQ_LZ
Marek Olšák [Sat, 19 Aug 2017 18:24:34 +0000 (20:24 +0200)]
gallium: remove TGSI opcodes PUSHA, POPA, SAD, TXQ_LZ

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agoradeonsi: emit VGT_REUSE_OFF in the right place
Marek Olšák [Mon, 21 Aug 2017 21:16:42 +0000 (23:16 +0200)]
radeonsi: emit VGT_REUSE_OFF in the right place

clip_regs aren't marked dirty when writes_viewport_index is changed.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: add support for TGSI opcodes DCEIL, DFLR, DROUND, DSSG, DTRUNC
Marek Olšák [Sat, 19 Aug 2017 21:37:29 +0000 (23:37 +0200)]
radeonsi: add support for TGSI opcodes DCEIL, DFLR, DROUND, DSSG, DTRUNC

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: use a faster version of PK2H
Marek Olšák [Sat, 19 Aug 2017 20:51:51 +0000 (22:51 +0200)]
radeonsi: use a faster version of PK2H

+ 4 piglit regressions, but it's correct accorcing to the GL spec and
performance is more important than piglit.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: don't decompress Z/S if there is no HTILE
Marek Olšák [Sat, 19 Aug 2017 13:51:30 +0000 (15:51 +0200)]
radeonsi: don't decompress Z/S if there is no HTILE

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/radeon: add helpers for whether HTILE is enabled
Marek Olšák [Sat, 19 Aug 2017 13:28:14 +0000 (15:28 +0200)]
gallium/radeon: add helpers for whether HTILE is enabled

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: don't flush L2 metadata for DB if not needed
Marek Olšák [Sat, 19 Aug 2017 13:06:22 +0000 (15:06 +0200)]
radeonsi/gfx9: don't flush L2 metadata for DB if not needed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: don't flush L2 metadata for CB if not needed
Marek Olšák [Sat, 19 Aug 2017 13:06:22 +0000 (15:06 +0200)]
radeonsi/gfx9: don't flush L2 metadata for CB if not needed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: don't flush TC L2 between rendering and texturing if not needed
Marek Olšák [Fri, 18 Aug 2017 13:51:59 +0000 (15:51 +0200)]
radeonsi/gfx9: don't flush TC L2 between rendering and texturing if not needed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: use correct TC flush flags when invalidating CB & DB
Marek Olšák [Fri, 18 Aug 2017 22:34:12 +0000 (00:34 +0200)]
radeonsi/gfx9: use correct TC flush flags when invalidating CB & DB

Now we can finally stop flushing L2 data.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoac/surface/gfx9: don't allow DCC for the smallest mipmap levels
Marek Olšák [Thu, 17 Aug 2017 21:35:36 +0000 (23:35 +0200)]
ac/surface/gfx9: don't allow DCC for the smallest mipmap levels

This fixes garbage there if we don't flush TC L2 after rendering.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: don't use GS scenario A for VS writing ViewportIndex
Marek Olšák [Fri, 18 Aug 2017 22:01:18 +0000 (00:01 +0200)]
radeonsi/gfx9: don't use GS scenario A for VS writing ViewportIndex

Vulkan doesn't do it anymore.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/radeon: clean up EOP_DATA_SEL magic numbers
Marek Olšák [Fri, 18 Aug 2017 19:14:01 +0000 (21:14 +0200)]
gallium/radeon: clean up EOP_DATA_SEL magic numbers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: set 'not a query' for r600_gfx_write_event_eop correctly
Marek Olšák [Fri, 18 Aug 2017 16:35:57 +0000 (18:35 +0200)]
radeonsi/gfx9: set 'not a query' for r600_gfx_write_event_eop correctly

0 is PIPE_QUERY_OCCLUSION_COUNTER, which is not what we want.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: prevent shader-db crashes
Marek Olšák [Fri, 18 Aug 2017 18:16:03 +0000 (20:16 +0200)]
radeonsi/gfx9: prevent shader-db crashes

- don't precompile LS and ES (they don't exist on GFX9), compile as VS instead
- don't precompile HS and GS (we don't have LS and ES parts)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: properly handle imported textures with unexpected swizzle mode
Marek Olšák [Thu, 17 Aug 2017 21:24:00 +0000 (23:24 +0200)]
radeonsi/gfx9: properly handle imported textures with unexpected swizzle mode

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: remove Constant Engine support
Marek Olšák [Sat, 19 Aug 2017 16:56:36 +0000 (18:56 +0200)]
radeonsi: remove Constant Engine support

We have come to the conclusion that it doesn't improve performance.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi/gfx9: add a temporary workaround for a tessellation driver bug
Marek Olšák [Tue, 15 Aug 2017 22:54:45 +0000 (00:54 +0200)]
radeonsi/gfx9: add a temporary workaround for a tessellation driver bug

The workaround will do for now. The root cause is still unknown.

This fixes new piglit: 16in-1out

Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoglsl_to_tgsi: clean up opcode translation
Marek Olšák [Sun, 20 Aug 2017 16:54:22 +0000 (18:54 +0200)]
glsl_to_tgsi: clean up opcode translation

An island of beauty in the middle of chaos.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agomesa: pass ctx to add_uniform_to_shader constructor
Timothy Arceri [Tue, 22 Aug 2017 10:31:57 +0000 (20:31 +1000)]
mesa: pass ctx to add_uniform_to_shader constructor

Fixes: 4c2422067b5c ("glsl: pass UseSTD430AsDefaultPacking to where it will be used")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agoegl: deduplicate allocations of local buffer over each platform backend (v2)
Gwan-gyeong Mun [Fri, 4 Aug 2017 15:16:11 +0000 (00:16 +0900)]
egl: deduplicate allocations of local buffer over each platform backend (v2)

platform_drm, platform_wayland and platform_android have similiar local buffer
allocation routines. For deduplicating, it unifies dri2_egl_surface's
local buffer allocation routines. And it polishes inconsistent indentations.

Note that as dri2_wl_get_buffers_with_format() have not make a __DRI_BUFFER_BACK_LEFT
attachment buffer for local_buffers, new helper function, dri2_egl_surface_free_local_buffers(),
will drop the __DRI_BUFFER_BACK_LEFT check.
So if other platforms use new helper functions, we have to ensure not to make
__DRI_BUFFER_BACK_LEFT attachment buffer for local_buffers.

v2: Fixes from Emil's review:
   a) Make local_buffers variable, dri2_egl_surface_alloc_local_buffer() and
      dri2_egl_surface_free_local_buffers() unconditionally.
   b) Preserve the original codeflow for error_path and normal_path.
   c) Add note on commit messages for dropping of __DRI_BUFFER_BACK_LEFT check.
   c) Rollback the unrelated whitespace changes.
   d) Add a missing blank line.

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
7 years agomesa: only expose EXT_memory_object functions if the ext is supported
Samuel Pitoiset [Mon, 21 Aug 2017 20:22:29 +0000 (22:22 +0200)]
mesa: only expose EXT_memory_object functions if the ext is supported

They should not be exposed when the extension is unsupported.
Note that ARB_direct_state_access is always exposed and
EXT_semaphore is not supported at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: only expose glImportMemoryFdEXT if the ext is supported
Samuel Pitoiset [Mon, 21 Aug 2017 20:22:28 +0000 (22:22 +0200)]
mesa: only expose glImportMemoryFdEXT if the ext is supported

From the EXT_external_objects_fd spec:

   "If the GL_EXT_memory_object_fd string is reported, the following
    commands are added:

    void ImportMemoryFdEXT(uint memory,
                           uint64 size,
                           enum handleType,
                           int fd);"

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: try to re-use previously deleted bindless descriptor slots
Samuel Pitoiset [Tue, 4 Jul 2017 10:37:32 +0000 (12:37 +0200)]
radeonsi: try to re-use previously deleted bindless descriptor slots

Currently, when the array is full it is resized but it can grow
over and over because we don't try to re-use descriptor slots.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: use slot indexes for bindless handles
Samuel Pitoiset [Mon, 3 Jul 2017 14:06:44 +0000 (16:06 +0200)]
radeonsi: use slot indexes for bindless handles

Using VRAM address as bindless handles is not a good idea because
we have to use LLVMIntToPTr and the LLVM CSE pass can't optimize
because it has no information about the pointer.

Instead, use slots indexes like the existing descriptors. Note
that we use fixed 16-dword slots for both samplers and images.
This doesn't really matter because no real apps use image handles.

This improves performance with DOW3 by +7%.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add si_emit_global_shader_pointers() helper
Samuel Pitoiset [Wed, 28 Jun 2017 16:19:09 +0000 (18:19 +0200)]
radeonsi: add si_emit_global_shader_pointers() helper

To share common code between rw buffers and bindless descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: only initialize dirty_mask when CE is used
Samuel Pitoiset [Wed, 28 Jun 2017 16:48:14 +0000 (18:48 +0200)]
radeonsi: only initialize dirty_mask when CE is used

Looks like it's useless to initialize that field when CE is
unused. This will also allow to declare more than 64 elements
for the array of bindless descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: make some si_descriptors fields 32-bit
Samuel Pitoiset [Wed, 28 Jun 2017 16:46:31 +0000 (18:46 +0200)]
radeonsi: make some si_descriptors fields 32-bit

The number of bindless descriptors is dynamic and we definitely
have to support more than 256 slots.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: declare new user SGPR indices for bindless samplers/images
Samuel Pitoiset [Wed, 28 Jun 2017 16:11:48 +0000 (18:11 +0200)]
radeonsi: declare new user SGPR indices for bindless samplers/images

A new pair of user SGPR is needed for loading the bindless
descriptors from shaders. Because the descriptors are global for
all stages, there is no need to add separate indices for GFX9.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium/util: add new module that allocate "numbers"
Samuel Pitoiset [Tue, 8 Aug 2017 14:15:34 +0000 (16:15 +0200)]
gallium/util: add new module that allocate "numbers"

Will be used for allocating bindless descriptor slots for
RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi/gfx9: add performance counters
Nicolai Hähnle [Thu, 10 Aug 2017 23:28:40 +0000 (01:28 +0200)]
radeonsi/gfx9: add performance counters

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: extract common code of si_upload_{graphics,compute}_shader_descriptors
Nicolai Hähnle [Thu, 10 Aug 2017 20:44:06 +0000 (22:44 +0200)]
radeonsi: extract common code of si_upload_{graphics,compute}_shader_descriptors

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium: remove unused PIPE_DUMP_* defines
Nicolai Hähnle [Mon, 7 Aug 2017 09:05:20 +0000 (11:05 +0200)]
gallium: remove unused PIPE_DUMP_* defines

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoddebug: remove dd_draw_record::driver_state_log
Nicolai Hähnle [Mon, 7 Aug 2017 09:02:33 +0000 (11:02 +0200)]
ddebug: remove dd_draw_record::driver_state_log

It is no longer used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: emit string markers to log context
Nicolai Hähnle [Tue, 15 Aug 2017 13:45:49 +0000 (15:45 +0200)]
radeonsi: emit string markers to log context

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: log decompress blits
Nicolai Hähnle [Tue, 15 Aug 2017 15:11:31 +0000 (17:11 +0200)]
radeonsi: log decompress blits

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: log draw and compute state into log context
Nicolai Hähnle [Fri, 4 Aug 2017 17:35:30 +0000 (19:35 +0200)]
radeonsi: log draw and compute state into log context

Also add missing trace emits and CS logging for compute launches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: print saved CS to the log context
Nicolai Hähnle [Fri, 4 Aug 2017 16:24:33 +0000 (18:24 +0200)]
radeonsi: print saved CS to the log context

Use the auto logger facility, so that CS chunks will be interleaved
with other log info.

v2:
- fix some crashes when not using CE
- fix skipping "previous" chunks of current (unflushed) IB
- fix error handling in si_begin_cs_debug

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: start using u_log_context for debugging
Nicolai Hähnle [Fri, 4 Aug 2017 14:50:05 +0000 (16:50 +0200)]
radeonsi: start using u_log_context for debugging

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: re-order debug state dumping
Nicolai Hähnle [Fri, 4 Aug 2017 13:42:15 +0000 (15:42 +0200)]
radeonsi: re-order debug state dumping

Keep together the parts that won't use the deferred logging mechanism.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: make si_shader_selector_reference globally visible
Nicolai Hähnle [Fri, 4 Aug 2017 14:48:30 +0000 (16:48 +0200)]
radeonsi: make si_shader_selector_reference globally visible

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add reference count to si_compute
Nicolai Hähnle [Fri, 4 Aug 2017 14:47:48 +0000 (16:47 +0200)]
radeonsi: add reference count to si_compute

To allow keep-alive for deferred logging.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: implement pipe_context::set_log_context
Nicolai Hähnle [Fri, 4 Aug 2017 13:54:56 +0000 (15:54 +0200)]
radeonsi: implement pipe_context::set_log_context

We'll add radeonsi-specific code to set_log_context in later patches,
but we may want to log from common code. Hence keep the log pointer
in r600_common_context.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoamd/common: split out ac_parse_ib_chunk from ac_parse_ib
Nicolai Hähnle [Fri, 4 Aug 2017 16:55:39 +0000 (18:55 +0200)]
amd/common: split out ac_parse_ib_chunk from ac_parse_ib

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoddebug: add driver log to record dumps
Nicolai Hähnle [Fri, 4 Aug 2017 15:42:16 +0000 (17:42 +0200)]
ddebug: add driver log to record dumps

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium: add pipe_context::set_log_context
Nicolai Hähnle [Fri, 4 Aug 2017 13:54:41 +0000 (15:54 +0200)]
gallium: add pipe_context::set_log_context

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoutil/log: add auto logger facility
Nicolai Hähnle [Tue, 15 Aug 2017 13:15:47 +0000 (15:15 +0200)]
util/log: add auto logger facility

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoutil: add chunk logging module
Nicolai Hähnle [Fri, 4 Aug 2017 13:31:46 +0000 (15:31 +0200)]
util: add chunk logging module

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglsl/linker: Make several functions not static
Ian Romanick [Tue, 22 Aug 2017 01:57:07 +0000 (18:57 -0700)]
glsl/linker: Make several functions not static

copy_constant_to_storage, set_uniform_initializer,
populate_consumer_input_sets, and get_matching_input are all used by
tests in src/compiler/glsl/tests:

glsl/tests/varyings_test.o: In function `link_varyings_single_simple_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:131: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_gl_ClipDistance_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:159: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_gl_CullDistance_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:186: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_single_interface_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:208: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_one_interface_and_one_simple_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:241: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o:src/compiler/glsl/tests/varyings_test.cpp:272: more undefined references to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)' follow
glsl/tests/varyings_test.o: In function `link_varyings_interface_field_doesnt_match_noninterface_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:289: undefined reference to `linker::get_matching_input(void*, ir_variable const*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_interface_field_doesnt_match_noninterface_vice_versa_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:314: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
src/compiler/glsl/tests/varyings_test.cpp:328: undefined reference to `linker::get_matching_input(void*, ir_variable const*, hash_table*, hash_table*, ir_variable**)'

Fixes: ca73c3358c91 ("glsl: Mark functions static")
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agoi965/clear: Quantize the depth clear value based on the format
Jason Ekstrand [Sun, 20 Aug 2017 03:31:03 +0000 (20:31 -0700)]
i965/clear: Quantize the depth clear value based on the format

In f9fd976e8adba733b08d we changed the clear value to be stored as an
isl_color_value.  This had the side-effect same clear value check is now
happening directly between the f32[0] field of the isl_color_value and
ctx->Depth.Clear.  This isn't what we want for two reasons.  One is that
the comparison happens in floating point even for Z16 and Z24 formats.
Worse than that, ctx->Depth.Clear is a double so, even for 32-bit float
formats, we were comparing as doubles and not floats.  This means that
the test basically always fails for anything other than 0.0f and 1.0f.
This caused a slight performance regression in Lightsmark 2008 because
it was using a depth clear value of 0.999 which can't be stored in a
32-bit float so we were doing unneeded resolves.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/101678
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
7 years agomesa/st: simplify some UBO index logic
Timothy Arceri [Thu, 17 Aug 2017 11:03:03 +0000 (21:03 +1000)]
mesa/st: simplify some UBO index logic

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoi965: enable STD430 packing by default on IVB+
Timothy Arceri [Mon, 24 Jul 2017 02:37:07 +0000 (12:37 +1000)]
i965: enable STD430 packing by default on IVB+

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoglsl: pass UseSTD430AsDefaultPacking to where it will be used
Timothy Arceri [Mon, 24 Jul 2017 00:24:53 +0000 (10:24 +1000)]
glsl: pass UseSTD430AsDefaultPacking to where it will be used

Here we also make use of the UseSTD430AsDefaultPacking constant
and call the new get_internal_ifc_packing() helper.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglsl: add get_internal_ifc_packing() type helper
Timothy Arceri [Mon, 24 Jul 2017 00:11:04 +0000 (10:11 +1000)]
glsl: add get_internal_ifc_packing() type helper

This is used to avoid code duplication when selecting the
packing type for shared and packed layouts.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: add UseSTD430AsDefaultPacking constant
Timothy Arceri [Sun, 23 Jul 2017 01:26:55 +0000 (11:26 +1000)]
mesa: add UseSTD430AsDefaultPacking constant

This will be used to enable the STD430 layout as the default for
UBOs and SSBOs with layouts of shared/packed rather than STD140.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoclover/device: Calculate CL_DEVICE_MEM_BASE_ADDR_ALIGN in device
Aaron Watry [Thu, 17 Aug 2017 01:44:41 +0000 (20:44 -0500)]
clover/device: Calculate CL_DEVICE_MEM_BASE_ADDR_ALIGN in device

The CL CTS queries CL_DEVICE_MEM_BASE_ADDR_ALIGN for a device and
then allocates user pointers aligned to that value for its tests.

The minimum value is defined as:
  the size (in bits) of the largest OpenCL built-in data type supported
  by the device (long16 in FULL profile, long16 or int16 in EMBEDDED
  profile) for devices that are not of type CL_DEVICE_TYPE_CUSTOM.

At the moment, all known devices that support user pointers require
CPU page alignment for buffers created from user pointers, so just
query that from sysconf.

v3: Use std::max instead of MAX2 (Francisco)
    Add missing unistd include
v2: Use system page size instead of a new pipe cap

Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by (v2): Jan Vesely <jan.vesely@rutgers.edu>