Ian Romanick [Tue, 9 Apr 2013 03:00:30 +0000 (20:00 -0700)]
egl/dri2: NULL check value returned by dri2_create_surface
dri2_create_surface can fail for a variety of reasons, including bad
input data. Dereferencing the NULL pointer and crashing is not okay.
Fixes issue identified by Klocwork analysis:
Pointer 'surf' returned from call to function 'dri2_create_surface'
at line 285 may be NULL and will be dereferenced at line 291.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Tue, 9 Apr 2013 02:55:18 +0000 (19:55 -0700)]
mesa: NULL check the pointer before trying to dereference it
Duh.
Fixes issues identified by Klocwork analysis:
Pointer 'table' returned from call to function 'calloc' at line 115
may be NULL and will be dereferenced at line 117.
and
Suspicious dereference of pointer 'table' before NULL check at line
119.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Mon, 8 Apr 2013 23:53:46 +0000 (16:53 -0700)]
glsl: Fix hypothetical NULL dereference related to process_array_type
Ensure that process_array_type never returns NULL, and let
process_array_type handle the case where the supplied base type is NULL.
Fixes issues identified by Klocwork analysis:
Pointer 'type' returned from call to function 'get_type' at line
1907 may be NULL and may be dereferenced at line 1912.
and
Pointer 'field_type' checked for NULL at line 4160 will be
dereferenced at line 4165. Also there is one similar error on line
4174.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Mon, 8 Apr 2013 23:37:04 +0000 (16:37 -0700)]
glsl: Fix hypothetical NULL dereference in ast_process_structure_or_interface_block
Fixes issue identified by Klocwork analysis:
Pointer 'field_type' returned from call to function 'glsl_type' at
line 4126 may be NULL and may be dereferenced at line 4139. Also
there are 2 similar errors on line(s) 4165, 4174.
In practice, it should be impossible to actually get NULL in here
because a syntax error would have already caused compilation to halt.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tom Stellard [Wed, 20 Mar 2013 02:39:31 +0000 (22:39 -0400)]
r300g: Fix bug in OMOD optimization
https://bugs.freedesktop.org/show_bug.cgi?id=60503
NOTE: This is a candidate for the stable branches.
Emil Velikov [Thu, 11 Apr 2013 23:22:33 +0000 (00:22 +0100)]
nvc0: set ret variable if launch desc allocation failed
Pointed out by gcc
nve4_compute.c: In function 'nve4_launch_grid':
nve4_compute.c:511:7: warning: 'ret' may be used uninitialized in
this function [-Wmaybe-uninitialized]
if (ret)
^
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Edit by Christoph Bumiller:
Set it to -1 to indicate failure and only when it's actually required.
Emil Velikov [Thu, 11 Apr 2013 23:22:32 +0000 (00:22 +0100)]
nvc0: bail out early during nve4_compute_setup()
Exit gracefully rather than trying to create a random object, whenever the
chipset is unknown
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Thu, 11 Apr 2013 23:22:31 +0000 (00:22 +0100)]
nvc0: compile nve4_cache_split_name() only in debug build
As otherwise it is unused - pointed out by gcc
nve4_compute.c:586:20: warning: 'nve4_cache_split_name' defined but not used [-Wunused-function]
static const char *nve4_cache_split_name(unsigned value)
^
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Thu, 11 Apr 2013 23:22:30 +0000 (00:22 +0100)]
nv50/codegen: do not emitATOM() if the subOp is unknown
For debug build we'll hit the assert, for release we are going to emit random data
as subOp is used uninitilised. Spotted by gcc
codegen/nv50_ir_emit_nv50.cpp: In member function 'void nv50_ir::CodeEmitterNV50::emitATOM(const nv50_ir::Instruction*)':
codegen/nv50_ir_emit_nv50.cpp:1554:12: warning: 'subOp' may be used uninitialized in this function [-Wmaybe-uninitialized]
uint8_t subOp;
^
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Christoph Bumiller [Sat, 6 Apr 2013 12:52:05 +0000 (14:52 +0200)]
nvc0: implement multisample textures
Christoph Bumiller [Sat, 6 Apr 2013 15:40:02 +0000 (17:40 +0200)]
nvc0: patch up TEX cases with 5 or 6 sources on nve4
Hackishly fixes alignment requirement of 2nd tuple for now.
Christoph Bumiller [Sat, 6 Apr 2013 12:15:54 +0000 (14:15 +0200)]
nvc0: fix 2D engine MS2 resolve
Christoph Bumiller [Mon, 8 Apr 2013 11:47:26 +0000 (13:47 +0200)]
nv50,nvc0: add RGBX16/32_FLOAT formats
Matt Turner [Thu, 11 Apr 2013 16:57:23 +0000 (09:57 -0700)]
i965/vs: Print error if vertex shader fails to compile.
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Thu, 11 Apr 2013 16:55:42 +0000 (09:55 -0700)]
i965: NULL check prog on shader compilation failure.
Also change if (shader) to if (prog) for consistency.
Reviewed-by: Eric Anholt <eric@anholt.net>
José Fonseca [Thu, 11 Apr 2013 21:37:34 +0000 (22:37 +0100)]
scons: Add st_cb_msaa.c to source list.
Dave Airlie [Sun, 3 Mar 2013 20:19:07 +0000 (06:19 +1000)]
r600g: add get_sample_position support (v3)
v2: I rewrote this to use the sample positions properly.
v3: rewrite properly to use bitfield to cast back to signed ints
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Mar 2013 20:17:11 +0000 (06:17 +1000)]
st/mesa: add support for ARB_texture_multisample (v3)
This adds support to the mesa state tracker for ARB_texture_multisample.
hardware doesn't seem to use a different texture instructions, so
I don't think we need to create one for TGSI at this time.
Thanks to Marek for fixes to sample number picking.
v2: idr pointed out a bug in how we picked the max sample counts,
use new internal format chooser interface to pick proper answers.
v3: use st_choose_format directly, it was okay, fix anding of masks.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Mar 2013 20:14:18 +0000 (06:14 +1000)]
st/mesa: add support for get sample position
This just calls into the gallium interface.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Mar 2013 20:11:07 +0000 (06:11 +1000)]
gallium: add get_sample_position interface
This is to be used to implement glGet GL_SAMPLE_POSITION.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 11 Apr 2013 04:51:35 +0000 (05:51 +0100)]
r600g: fix two issues in compressed msaa reading code
I've no idea when sample_chan would ever be 4 here, but 4 is most
definitely wrong, array textures have it as 3 as well.
Also the cayman code though unused is obviously wrong.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Paul Berry [Sat, 23 Mar 2013 04:55:03 +0000 (21:55 -0700)]
i965/vs: Don't hardcode DEBUG_VS in generic vec4 code.
Since the vec4_visitor and vec4_generator classes are going to be
re-used for geometry shaders, we can't enable their debug
functionality based on (INTEL_DEBUG & DEBUG_VS) anymore. Instead, add
a debug_flag boolean to these two classes, so that when they're
instantiated the caller can specify whether debug dumps are needed.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Fri, 22 Mar 2013 18:26:34 +0000 (11:26 -0700)]
i965/vs: Generalize computation of array strides in preparation for GS.
Geometry shader inputs are arrays, but they use an unusual array
layout: instead of all array elements for a given geometry shader
input being stored consecutively, all geometry shader inputs are
interleaved into one giant array. As a result, the array stride we
use to access geometry shader inputs must be equal to the size of the
input VUE, rather than the size of the array element.
This patch introduces a new virtual function,
vec4_visitor::compute_array_stride(), which will allow geometry shader
compilation to specialize the computation of array stride to account
for the unusual layout of geometry shader input arrays. It also
renames the local variable that the ir_dereference_array visitor uses
to store the stride, to avoid confusion.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Fri, 22 Mar 2013 15:47:49 +0000 (08:47 -0700)]
i965/vs: Generalize attribute setup code in preparation for GS.
This patch introduces a new function,
vec4_visitor::lower_attributes_to_hw_regs(), which replaces registers
of type ATTR in the instruction stream with the hardware registers
that store those attributes. This logic will need to be common
between the vertex and geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Fri, 22 Mar 2013 13:59:52 +0000 (06:59 -0700)]
i965/vs: Generalize vertex emission code in preparation for GS.
This patch introduces a new function, vec4_visitor::emit_vertex(),
which contains the code for emitting vertices that will need to be
common between the vertex and geometry shaders.
Geometry shaders will need to use a different message header, and a
different opcode, for their URB writes, so we introduce virtual
functions emit_urb_write_header() and emit_urb_write_opcode() to take
care of the GS-specific behaviours.
Also, since vertex emission happens at the end of the VS, but in the
middle of the GS, we need to be sure to only call
emit_shader_time_end() during VS vertex emission. We accomplish this
by moving the call to emit_shader_time_end() into the VS
implementation of emit_urb_write_opcode().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sun, 17 Feb 2013 19:34:05 +0000 (11:34 -0800)]
i965/vs: rename vec4_generator::generate_vs_instruction.
Since this function is going to get used for geometry shaders too, it
deserves a more generic name: generate_vec4_instruction.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sun, 17 Feb 2013 19:25:37 +0000 (11:25 -0800)]
i965/vs: Generalize data structures pointed to by vec4_generator.
This patch removes the following field from vec4_generator, since it
is not used:
- struct brw_vs_compile *c
And changes the following field:
- struct gl_vertex_program *vp => struct gl_program *prog
With these changes, vec4_generator no longer refers to any VS-specific
data structures. This will pave the way for re-using it for geometry
shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
v2: Use the name "prog" rather than "p".
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Tue, 9 Apr 2013 21:31:28 +0000 (14:31 -0700)]
i965/vs: Rename vec4_generator::prog to shader_prog.
The next patch is going to change the type of vec4_generator::vp from
struct gl_vertex_program * to struct gl_program *, and rename it. The
sensible name to change it to is vec4_generator::prog. However, prog
is already used. Since the existing vec4_generator::prog is of type
struct gl_shader_program, it makes sense to rename it to shader_prog.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sun, 17 Feb 2013 17:09:45 +0000 (09:09 -0800)]
i965/vs: move VS-specific data members to vs_vec4_visitor.
This patch moves the following data structures from vec4_visitor to
vec4_vs_visitor, since they contain VS-specific data:
- struct brw_vs_compile *c (renamed to vs_compile)
- struct brw_vs_prog_data *prog_data (renamed to vs_prog_data)
- src_reg *vp_temp_regs
- src_reg vp_addr_reg
Since brw_vs_compile and brw_vs_prog_data also contain vec4-generic
data, the following pointers are added to the base class, to allow it
to access the vec4-generic portions of these data structures:
- struct brw_vec4_compile *c
- struct brw_vec4_prog_key *key
- struct brw_vec4_prog_data *prog_data
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
v2: Use shorter names in the base class and longer names in the
derived class.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 16 Feb 2013 04:27:03 +0000 (20:27 -0800)]
i965/vs: move ARB_vertex_program functions to vec4_vs_visitor.
This patch moves functions from vec4_visitor to vec4_vs_visitor that
deal with ARB (assembly) vertex programs. There's no point in having
these functions in the base class since we don't intend to support
assembly programs for the GS stage. The following functions are
moved:
- setup_vp_regs
- get_vp_dst_reg
- get_vp_src_reg
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sun, 17 Feb 2013 16:05:52 +0000 (08:05 -0800)]
i965/vs: Add virtual function make_reg_for_system_value().
The system values handled by vec4_visitor::visit(ir_variable *) are
VS-specific (vertex ID and instance ID). This patch moves the
handling of those values into a new virtual function,
make_reg_for_system_value(), so that this VS-specific code won't be
inherited by geomtry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sun, 17 Feb 2013 16:05:52 +0000 (08:05 -0800)]
i965/vs: Make some vec4_visitor functions virtual.
This patch makes the following vec4_visitor functions virtual, since
they will need to be implemented differently for vertex and geometry
shaders. Some of the functions are renamed to reflect their generic
purpose, rather than their VS-specific behaviour:
- setup_attributes
- emit_attribute_fixups (renamed to emit_prolog)
- emit_vertex_program_code (renamed to emit_program_code)
- emit_urb_writes (renamed to emit_thread_end)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 16 Feb 2013 04:12:13 +0000 (20:12 -0800)]
i965/vs: Make vec4_vs_visitor class derived from vec4_visitor.
This patch just creates the derived class; later patches will migrate
VS-specific functions and data structures from the base class into the
derived class.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sun, 17 Feb 2013 15:48:21 +0000 (07:48 -0800)]
i965/vs: split brw_vs_prog_data into generic and VS-specific parts.
This will allow the generic parts to be re-used for geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
v2: Put urb_read_length and urb_entry_size in the generic struct.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 16 Feb 2013 16:45:09 +0000 (08:45 -0800)]
i965/vs: split brw_vs_prog_key into generic and VS-specific parts.
This will allow the generic parts to be re-used for geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 16 Feb 2013 04:33:31 +0000 (20:33 -0800)]
i965/vs: split brw_vs_compile into generic and VS-specific parts.
This will allow the generic parts to be re-used for geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 16 Feb 2013 17:49:11 +0000 (09:49 -0800)]
i965/vs: Remove brw_vs_prog_data pointer from brw_vs_compile.
In patches that follow, we'll be splitting structs brw_vs_prog_data
and brw_vs_compile into a vec4-generic base struct and a VS-specific
derived struct (this will allow the vec4-generic code to be re-used
for geometry shaders). Having brw_vs_compile point to
brw_vs_prog_data makes it difficult to do this cleanly.
Fortunately most of the functions that use brw_vs_compile (those in
the vec4_visitor class) already have access to brw_vs_prog_data
through a separate pointer (vec4_visitor::prog_data). So all we have
to do is use that pointer consistently, and plumb prog_data through
the few remaining functions that need access to it.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Fri, 22 Mar 2013 19:39:40 +0000 (12:39 -0700)]
i965: Generalize computation of VUE map in preparation for GS.
This patch modifies the arguments to brw_compute_vue_map() so that
they no longer bake in the assumption that we are generating a VUE map
for vertex shader outputs. It also makes the function non-static so
that we can re-use it for geometry shader outputs.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 16 Feb 2013 04:19:23 +0000 (20:19 -0800)]
i965/vs: Make type of vec4_visitor::vp more generic.
The vec4_visitor functions don't use any VS specific data from
vec4_visitor::vp. So rename it to "prog" and change its type from
struct gl_vertex_program * to struct gl_program *. This will allow
the code to be re-used for geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
v2: Use the name "prog" rather than "p".
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Tue, 9 Apr 2013 00:17:44 +0000 (17:17 -0700)]
i965: Rename backend_visitor::prog to shader_prog.
The next patch is going to change the type of vec4_visitor::vp from
struct gl_vertex_program * to struct gl_program *, and rename it. The
sensible name to change it to is vec4_visitor::prog. However, prog is
already used in backend_visitor (which vec4_visitor derives from).
Since backend_visitor::prog is of type struct gl_shader_program *, it
makes sense to rename it to shader_prog.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Wed, 10 Apr 2013 03:36:30 +0000 (20:36 -0700)]
glsl: Fix (and validate) comment above glsl_type::name.
The comment above glsl_type::name claimed that it could sometimes be
NULL. This was wrong--it is never NULL. Many error handling paths
would segfault if it were. (Anonymous structs are assigned names like
"#anon_struct_0001"--see the ast_struct_specifier constructor in
glsl_parser_extras.cpp.)
Fix the comment and add assertions to validate that it really is never
NULL.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Christian König [Wed, 3 Apr 2013 08:18:35 +0000 (10:18 +0200)]
radeon/uvd: add UVD implementation v5
Just everything you need for UVD with r600g and radeonsi.
v2: move UVD code to radeon subdir, clean up build system additions,
remove an unused SI function, disable tiling on SI for now.
v3: some minor indentation fix and rebased
v4: dpb size calculation fixed
v5: implement proper fall-back in case the kernel doesn't support UVD,
based on patches from Andreas Boll but cleaned up a bit more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 8 Apr 2013 14:41:01 +0000 (16:41 +0200)]
radeon/winsys: add uvd ring support to winsys v3
Separated from UVD patch for clarity.
v2: sync with next tree for 3.10
v3: as pointed out by Andreas Bool check for drm minor >= 32
http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Dave Airlie [Thu, 11 Apr 2013 05:20:19 +0000 (15:20 +1000)]
st/mesa: fix UBO offsets.
Reported and tested by degasus on #radeon.
Note: This is a candidate for the 9.1 branch
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ralf Jung [Tue, 9 Apr 2013 12:09:50 +0000 (14:09 +0200)]
egl/x11: Fix initialisation of swap_interval
The EGLConfig attributes EGL_MIN/MAX_SWAP_INTERVAL were incorrectly set to
0 and 0. This prevented clients from setting the swap interval to a
reasonable value, like 1 or 2.
Swap interval worked correctly in Mesa 9.0. The commit below introduced
the bug.
commit
7e9bd2b2ed35a440a96362417100a7e43715d606
Author: Eric Anholt <eric@anholt.net>
Date: Tue Sep 25 14:05:30 2012 -0700
egl: Add support for driconf control of swapinterval.
Note: This is a candidate for the 9.1 branch.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63078
[chadv: Wrote commit message]
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 10 Apr 2013 20:49:16 +0000 (13:49 -0700)]
intel: Fall back to X-tiling when larger than estimated aperture size.
If a region is larger than the estimated aperture size, we map/unmap it
by copying with the BLT engine. Which means we can't use Y-tiling.
Fixes Piglit max-texture-size and tex3d-maxsize, which regressed in my
recent change to use Y-tiling by default on Gen6+. This was due to a
botched merge conflict resolution.
v2: Return a mask of valid tilings from intel_miptree_select_tiling.
This allows us to avoid the X-tiling fallback if Y-tiling is actually
mandatory.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 10 Apr 2013 20:46:10 +0000 (13:46 -0700)]
intel: Refactor code in intel_miptree_choose_tiling().
This reduces the nesting level slightly, and in my opinion, makes it a
bit easier to follow.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 9 Apr 2013 18:11:19 +0000 (11:11 -0700)]
intel: Move the max_gtt_map_object_size estimation to intel_context.
We need know this in order to decide what tiling mode to use.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Fredrik Höglund [Fri, 22 Mar 2013 16:14:43 +0000 (17:14 +0100)]
r600g: Add support for GL_ARB_texture_buffer_range
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Paul Berry [Tue, 9 Apr 2013 12:58:43 +0000 (05:58 -0700)]
i965/blorp: Remove unnecessary test in gen7_blorp_emit_depth_stencil_config.
gen7_blorp_emit_depth_stencil_config() is only called when
params->depth.mt is non-null. Therefore, it's not necessary to do an
"if (params->depth.mt)" test inside it. The presence of this if test
was misleading static analysis tools (and briefly, me) into thinking
that gen7_blorp_emit_depth_stencil_config() might sometimes access
uninitialized data and dereference a null pointer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Marek Olšák [Fri, 5 Apr 2013 12:22:42 +0000 (14:22 +0200)]
r600g: fix valgrind warning on Cayman
Warning: "Conditional jump or move depends on uninitialised value(s)".
Zack Rusin [Tue, 9 Apr 2013 12:11:45 +0000 (05:11 -0700)]
gallivm/tgsi: handle untyped moves
both mov and ucmp can be used to move variables of any type.
correctly note that about ucmp in the tgsi_info and make
sure gallivm can handle that by correctly casting the untyped
moves.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Tue, 9 Apr 2013 12:01:54 +0000 (05:01 -0700)]
gallivm: fix loops and conditionals within GS
We were using simple temporaries, without using alloca or phi
nodes which meant that on every iteration of the loop our
temporaries, which were holding the number of vertices and
primitives which were emitted, were being reset to zero. Now
we're using alloca to allocate those variables to preserve
them across conditionals.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Tue, 9 Apr 2013 10:50:32 +0000 (03:50 -0700)]
llvmpipe: implement PIPE_QUERY_SO_STATISTICS
We were missing the implementation of PIPE_QUERY_SO_STATISTICS
query, this change implements it on top of the existing
facilities.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Tue, 9 Apr 2013 10:28:48 +0000 (03:28 -0700)]
gallivm: fix unsigned divide and remainder opcodes
We want to both make sure we never divide by zero to not generate
sigfpe and that divide by zero is guaranteed to return 0xffffffff.
Based on José idea.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Thu, 4 Apr 2013 22:06:14 +0000 (15:06 -0700)]
gallivm: fix breakc
we break when the mask values are 0 not, 1, plus it's bit comparison
not a floating point comparison. This fixes both.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Chad Versace [Fri, 5 Apr 2013 23:35:47 +0000 (16:35 -0700)]
intel/hsw: Enable hiz (v2)
Enable hiz by setting intel_context::has_hiz. However, to work around
a hardware bug, we selectively enable hiz for only nicely aligned miptree
slices.
No Piglit regressions on Haswell 0x0d26 rev07 when based atop
mesa-master-
4ad3601.
Improves the performance of GLB27_TRex_C24Z16_FixedTimeStep by 18.52%
(hsw-0x0d26-rev07; kernel-3.9.0-rc1; GLBenchmark 2.7.0 Release a68901;
samples=3).
v2: Replace the check for IS_HASWELL(devid) in intel_miptree_slice_has_hiz()
with a conditional set of has_hiz. [for anholt]
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Chad Versace [Fri, 5 Apr 2013 21:51:31 +0000 (14:51 -0700)]
i965: Remove brw_context::depthstencil::hiz_mt
After recent refactorings, the field is written but no longer read.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Chad Versace [Mon, 8 Apr 2013 20:45:49 +0000 (13:45 -0700)]
intel: Replace checks for hiz_mt with intel_has*hiz()
When appropriate, replace each check `hiz_mt != NULL` with either a call
to intel_miptree_slice_has_hiz() or intel_renderbuffer_has_hiz(). No
behavioral change.
This prepares for selectively enabling hiz on individual miptree slices
for Haswell.
This refactoring had several side effects.
1. To prevent new warnings about discarding the const qualifier,
I removed 'const' from some variable declarations in
intel_validate_framebuffer(). The alternative was to add const
qualifiers to multiple function signatures in the
intel_renderbuffer_has_hiz call graph. Since the dominant convention
in the Intel code is to not qualify function parameters as const,
I chose to remove rather than add const qualifiers.
2. I changed the signature of brw_emit_depth_stencil_hiz() by replacing
`struct intel_mipmap_tree *hiz_mt` with `bool hiz`. The function used
hiz_mt mostly as a boolean indicator of the presence of hiz, so the
signature change is consistent with the patch's goal.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Chad Versace [Fri, 5 Apr 2013 21:29:53 +0000 (14:29 -0700)]
i965: Change signature of brw_get_depthstencil_tile_masks()
Add new parameters `depth_level` and `depth_layer`, which specify depth
miptree's slice of interest. A following patch will pass the new
parameters through to intel_miptree_slice_has_hiz().
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Chad Versace [Wed, 20 Mar 2013 00:44:50 +0000 (17:44 -0700)]
i965/blorp: Add fields brw_blorp_mip_info::level,layer
The new fields define the 2D miptree slice to be used. A following patch
will pass the new fields through to intel_miptree_slice_has_hiz().
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Chad Versace [Thu, 21 Feb 2013 03:18:40 +0000 (19:18 -0800)]
intel: Add field intel_mipmap_slice::has_hiz
On Haswell, HiZ will selectively be enabled on individual miptree slices
to workaround a hardware bug. The new field 'has_hiz' indicates if HiZ is
enabled for a given slice.
Also add two new accessor functions for this field.
intel_miptree_slice_has_hiz
intel_renderbuffer_has_hiz
The new field and accessor functions are not yet used. Also, this patch
introduces no behavioral change because, in this patch,
intel_miptree_alloc_hiz() sets has_hiz for all slices.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Chad Versace [Tue, 12 Mar 2013 02:21:46 +0000 (19:21 -0700)]
i965/blorp: Align rectangle primitive for hiz ops
The hardware docs and the simulator require that the rectangle primitive
emitted during fast depth clears and hiz resolves must be aligned to 8x4
pixels.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Eric Anholt [Thu, 4 Apr 2013 21:10:18 +0000 (14:10 -0700)]
i965/vs: Use GRFs for pull constant offsets on gen7.
This allows the computation of the offset to get written directly into the
message source.
shader-db results:
total instructions in shared programs:
3308390 ->
3283025 (-0.77%)
instructions in affected programs: 442998 -> 417633 (-5.73%)
No difference in GLB2.7 low res (n=9).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Thu, 4 Apr 2013 23:30:49 +0000 (16:30 -0700)]
i965/vs: When asked to make a dst_reg for a src.xxxx, just write to src.x.
We have several places in our pull constant handling where we make a
temporary src_reg for an int, and then turn it into a dst. In doing so,
we were writing to the dst.xyzw, so we never register coalesced it with a
later mov from dst.x to real_dst.x.
These extra channels written would be removed if we had channel-wise DCE
in the backend, but we don't. Fix it for now by just not writing these
extra channels that won't get used.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Tue, 9 Apr 2013 20:34:08 +0000 (13:34 -0700)]
i965/gen6: Reduce updates of transform feedback offsets with HW contexts.
The software-tracked transform feedback offsets (svbi_0_starting_index)
are incorrect in the presence of primitive restart, so we were actually
updating it with a bogus value if the batch wrapped and we emitted the
packet again during a single transform feedback. By reducing state
emission, we avoid the bug.
Fixes piglit OpenGL 3.1/primitive-restart-xfb flush
Reviewed-by: Paul Berry <stereotype441@gmail.com>
NOTE: This is a candidate for the 9.1 branch.
Eric Anholt [Mon, 8 Apr 2013 17:56:23 +0000 (10:56 -0700)]
i965/gen7: Skip resetting SOL offsets at batch start with HW contexts.
The software-tracked transform feedback offsets (svbi_0_starting_index)
are incorrect in the presence of primitive restart, so we can't reliably
compute offsets for our buffer pointers after a batch flush. Thanks to HW
contexts, our transform feedback offsets are now saved, so we can just
keep using the ones from before the batch wrap.
Fixes piglit OpenGL 3.1/primitive-restart-xfb flush
Reviewed-by: Paul Berry <stereotype441@gmail.com>
NOTE: This is a candidate for the 9.1 branch.
Christian König [Tue, 26 Mar 2013 14:09:27 +0000 (15:09 +0100)]
radeonsi: remove sampler writemask v3
v2: fix instrinsic name as well
v3: LLVM revision incremented as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Niels Ole Salscheider [Sun, 24 Feb 2013 22:00:04 +0000 (23:00 +0100)]
pipe-loader: Fix out of source build
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Brian Paul [Wed, 10 Apr 2013 00:43:40 +0000 (18:43 -0600)]
st/mesa: remove #if FEATURE_GL/ES tests
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Brian Paul [Wed, 10 Apr 2013 00:43:40 +0000 (18:43 -0600)]
mesa: remove old comment about FEATURE_GL
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Brian Paul [Wed, 10 Apr 2013 00:43:40 +0000 (18:43 -0600)]
mesa: remove #ifdef FEATURE_ES2, add some comments instead
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Brian Paul [Wed, 10 Apr 2013 00:43:40 +0000 (18:43 -0600)]
st/mesa: remove #include mfeatures.h
None of these were needed.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Brian Paul [Tue, 9 Apr 2013 14:52:30 +0000 (08:52 -0600)]
docs: initial 9.2 release notes file
Brian Paul [Tue, 9 Apr 2013 14:47:00 +0000 (08:47 -0600)]
st/osmesa: re-use buffers in OSMesaMakeCurrent()
Rather than creating a new buffer each time. Fixes problems found
with vtk.
Tested-by: Kevin H. Hobbs <hobbsk@ohio.edu>
Marek Olšák [Sat, 6 Apr 2013 22:22:32 +0000 (00:22 +0200)]
mesa: update derived framebuffer state in GetMultisamplefv
This makes sure that ctx->DrawBuffer->Visual.samples is up-to-date.
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Sat, 6 Apr 2013 22:19:06 +0000 (00:19 +0200)]
mesa: fix glGet queries depending on derived framebuffer state (v2)
"ctx->DrawBuffer->Visual" might be invalid if (NewState &_NEW_BUFFERS) != 0.
v2: also fix:
- RGBA_INTEGER_MODE_EXT
- RGBA_FLOAT_MODE_ARB (also check API support)
- FRAMEBUFFER_SRGB_CAPABLE_EXT
NOTE: This is a candidate for stable branches.
Reviewed-by: Eric Anholt <eric@anholt.net>
Paul Berry [Sat, 6 Apr 2013 03:15:39 +0000 (20:15 -0700)]
i965/gen7.5: Allow HW primitive restart for all primitive types.
Gen7.5 (Haswell) hardware supports primitive restart for all primitive
types. It also handles all possible primitive restart indices.
Rather than specialize both can_cut_index_handle_restart_index() and
the switch statement in can_cut_index_handle_prims() for Haswell, just
return early if the hardware is Haswell because we know it can handle
everything.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Paul Berry [Fri, 5 Apr 2013 21:56:21 +0000 (14:56 -0700)]
i965: Only use brw_draw.c's trim() function when necessary.
brw_draw.c contains a trim() function which modifies the vertex count
for quads and quad strips in order to discard dangling vertices. In
principle this shouldn't be necessary, since hardware since Gen4 is
capable of discarding dangling vertices by itself. However, it's
necessary because as a hack to speed up rendering on Gen 4-5, we
sometimes convert quads to trifans and quad strips to tristrips. The
trim() function isn't necessary on Gen6 and up.
This patch documents why and when the trim() function is necessary,
and avoids calling it when it's not needed.
This will avoid creating problems when we enable hardware support for
primitive restart of quads and quad strips on Haswell.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Paul Berry [Sun, 7 Apr 2013 13:29:46 +0000 (06:29 -0700)]
i965/vs: Fix DEBUG_SHADER_TIME when VS terminates with 2 URB writes.
The call to emit_shader_time_end() before the second URB write was
conditioned with "if (eot)", but eot is always false in this code
path, so emit_shader_time_end() was never being called for vertex
shaders that performed 2 URB writes.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Christian König [Tue, 9 Apr 2013 16:36:22 +0000 (18:36 +0200)]
st/vdpau: fix subtitle related bug v2
Drawing subtitles didn't increased the dirty area of the surface.
Reported and tested by freeedrich on irc.
v2: don't clear the surface
Signed-off-by: Christian König <christian.koenig@amd.com>
Paul Berry [Tue, 9 Apr 2013 17:37:16 +0000 (10:37 -0700)]
glsl/linker: Reduce scope of non-flat integer varying fix.
In the mailing list discussion of "glsl/linker: fix varying packing
for non-flat integer varyings." (commit
7862bde), we concluded that
since the bug only applies to integral variables, it is safer to just
apply the bug fix to integer varyings. I forgot to make the change
before pushing the patch upstream. (Note: we aren't aware of any bugs
in commit
7862bde; it just seems wise to be on the safe side).
This patch makes the change. Assuming commit
7862bde gets
cherry-picked back to 9.1, this commit should be cherry-picked too.
NOTE: This is a candidate for the 9.1 release branch.
Paul Berry [Sat, 6 Apr 2013 17:50:46 +0000 (10:50 -0700)]
glsl/linker: Adapt flat varying handling in preparation for geometry shaders.
When a varying is consumed by transform feedback, but is not used by
the fragment shader, assign_varying_locations() sets its interpolation
type to "flat" in order to ensure that lower_packed_varyings never has
to deal with non-flat integral varyings (the GLSL spec doesn't require
integral vertex outputs to be flat if they aren't consumed by the
fragment shader).
A similar situation will arise when geometry shader support is added,
since the GLSL spec only requires integral vertex shader outputs to be
flat when they are consumed by the fragment shader. This patch
modifies the linker to handle this situation too.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Paul Berry [Sat, 6 Apr 2013 17:33:25 +0000 (10:33 -0700)]
glsl: Document lower_packed_varyings' "flat" requirement with an assert.
To minimize the variety of type conversions that lower_packed_varyings
needs to perform, it assumes that integral varyings are always
qualified as "flat". link_varyings.cpp takes care of ensuring that
this is the case (even in the circumstances where GLSL doesn't require
it).
This patch documents the assumption with an assertion, for ease in
future debugging.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Paul Berry [Sat, 6 Apr 2013 16:36:06 +0000 (09:36 -0700)]
glsl/linker: fix varying packing for non-flat integer varyings.
Commit
dfb57e7 (glsl: Fix error checking on "flat" keyword to match
GLSL ES 3.00, GLSL 1.50) relaxed the rules for integral varyings: they
only need to be declared as "flat" if they are a fragment shader
inputs. This allowed for the possibility of a vertex shader output
being a non-flat integer, provided that it was not matched to a
fragment shader input. A non-contrived situation where this might
arise is if a vertex shader generates some integral outputs which are
consumed by tranform feedback, but not by the fragment shader.
Unfortunately, lower_packed_varyings assumes that *all* integral
varyings are flat, regardless of whether they are consumed by the
fragment shader. As a result, attempting to create a non-flat
integral vertex output of a size that required packing (i.e. a size
other than ivec4 or uvec4) would cause an assertion failure in
lower_packed_varyings.
This patch prevents the assertion failure by forcing vertex shader
outputs to be "flat" whenever they are not consumed by the fragment
shader. This should have no effect on rendering since the "flat"
keyword only affects the behaviour of fragment shader inputs.
Fixes piglit test "spec/EXT_transform_feedback/nonflat-integral".
NOTE: This is a candidate for the 9.1 release branch.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Paul Berry [Tue, 9 Apr 2013 17:03:11 +0000 (10:03 -0700)]
glsl: Check the size of ir_print_visitor's mode[] array with STATIC_ASSERT.
ir_print_visitor::visit(ir_variable *)'s mode[] array needs to match
the declaration of the enum ir_variable_mode. It's hard to verify
that at compile time, but at least we can use a STATIC_ASSERT to make
sure it's the right size.
This required adding ir_var_mode_count to the enum.
Paul Berry [Sun, 7 Apr 2013 02:16:58 +0000 (19:16 -0700)]
glsl: Fix ir_print_visitor's handling of interpolation qualifiers.
This patch updates the interp[] array to match the enum
glsl_interp_qualifier.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
v2: Add a STATIC_ASSERT to make sure the array is the correct size.
This required adding INTERP_QUALIFIER_COUNT to the enum.
Johannes Obermayr [Tue, 9 Apr 2013 16:38:42 +0000 (17:38 +0100)]
autotools: Better describe which cases OProfileJIT is required.
Signed-off-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 9 Apr 2013 01:13:29 +0000 (19:13 -0600)]
softpipe: misc updates to image dumping in softpipe_flush()
Vinson Lee [Sat, 6 Apr 2013 03:46:30 +0000 (20:46 -0700)]
tgsi: Ensure struct tgsi_ind_register field Index is initialized.
Fixes uninitialized scalar variable defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Martin Andersson [Tue, 2 Apr 2013 20:43:33 +0000 (22:43 +0200)]
r600g: Fix UMAD on Cayman
The multiplication part of tgsi_umad did not work on Cayman, because it did
not populate the correct vector slots.
This fixed hardlocks in the EXT_transform_feedback/order tests.
NOTE: This is a candidate for the stable branches.
(might not be easy to cherry-pick though)
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Kenneth Graunke [Tue, 9 Apr 2013 02:39:20 +0000 (19:39 -0700)]
intel: Remove the texture_tiling driconf option.
This option can force textures to be untiled. However, on Gen6+, depth
buffers must be Y-tiled. MSAA buffers also must be Y-tiled. So setting
this option on even a trivial application like glxgears causes assertion
failures in a debug build, and likely GPU hangs in a release build.
It's just giving users a license to shoot themselves in the foot.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 9 Apr 2013 02:27:38 +0000 (19:27 -0700)]
i965: Prefer Y-tiling on Gen6+.
In the past, we preferred X-tiling for color buffers because our BLT
code couldn't handle Y-tiling. However, the BLT paths have been largely
replaced by BLORP on Gen6+, which can handle any kind of tiling.
We hadn't measured any performance improvement in the past, but that's
probably because compressed textures were all untiled anyway.
Improves performance in GLB27_TRex_C24Z16_FixedTime by 7.69231%.
v2: Rebase on top of Eric's untiled-for-larger-than-aperture changes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 9 Apr 2013 02:27:37 +0000 (19:27 -0700)]
i965: Use tiling even for compressed textures.
The code has no rationale for why we would force compressed textures to
be untiled, and it appears to work fine. Git archeology indicates that
it's been that way dating back to when we first started tiling.
Improves performance in GLB27_TRex_C24Z16_FixedTimeStep at 1280x720 by
10.0529% +/- 0.573075% (n=12). Improves performance in Xonotic by
4.56409% +/- 0.27965% (n=3).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Chad Versace [Tue, 9 Apr 2013 02:27:36 +0000 (19:27 -0700)]
intel: Refactor selection of miptree tiling
This patch (1) extracts from intel_miptree_create() the spaghetti logic
that selects the tiling format, (2) rewrites that spaghetti into a lucid
form, and (3) moves it to a new function, intel_miptree_choose_tiling().
No behavioral change.
As a bonus, it is now evident that the force_y_tiling parameter to
intel_miptree_create() does not really force Y tiling.
v2 (Ken): Rebase on top of Eric's untiled-for-larger-than-aperture
changes. This required passing in the miptree.
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Chad Versace [Fri, 5 Apr 2013 22:18:00 +0000 (15:18 -0700)]
intel: Allocate hiz in intel_renderbuffer_move_to_temp()
When moving the renderbuffer to a new miptree, we neglected to allocate
the hiz buffer for the new miptree. Oops.
Fixes all Piglit depthstencil-render-miplevels tests from crash to pass on
Sandybridge.
Note: This is a candidate for the 9.1 branch.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Dave Airlie [Sun, 7 Apr 2013 04:29:59 +0000 (14:29 +1000)]
st/mesa: fix levels in initial texture creation
calim pointed out we were getting mipmap levels for array multisamples,
this didn't make sense. So then I noticed this function takes last_level
so we are passing in a too high value here.
I think this should fix the case he was seeing.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ian Romanick [Fri, 15 Mar 2013 22:23:19 +0000 (15:23 -0700)]
glsl: Don't early-out for error-type inputs
Check the type of the array operand and the index operand before doing
other checks. This simplifies the code a bit now (eliminating the
error_emitted parameter), and enables some later functional changes.
The shader
uniform float x[6];
uniform sampler2D s;
void main() { gl_Position.x = xx[s + 1]; }
still generates (only) the two expected errors:
0:3(33): error: `xx' undeclared
0:3(39): error: Operands to arithmetic operators must be numeric
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Fri, 15 Mar 2013 22:14:18 +0000 (15:14 -0700)]
glsl: Don't emit spurious errors for constant indexes of the wrong type
Previously the shader
uniform float x[6];
void main() { gl_Position.x = x[1.0]; }
would have generated the errors
0:2(33): error: array index must be integer type
0:2(36): error: array index must be < 6
Now only
0:2(33): error: array index must be integer type
will be generated.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Fri, 15 Mar 2013 22:10:35 +0000 (15:10 -0700)]
glsl: Collect all of the non-constant index error checks together
This puts all of the checks togeher for easier reading. It also means
that all the checks are blocked on array->type->is_array. Shortly this
will allow elimination of some is_error check work-arounds in this
function.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>