Nathan Binkert [Thu, 12 May 2011 18:19:35 +0000 (11:19 -0700)]
stats: delete mysql support
we can add it back within python in some future changeset
Nathan Binkert [Thu, 12 May 2011 18:19:35 +0000 (11:19 -0700)]
stats: move code that loops over all stats into python
Nathan Binkert [Thu, 12 May 2011 18:19:32 +0000 (11:19 -0700)]
stats: better expose statistics to python.
Build a python list and dict of all stats and expose flags properly.
--HG--
rename : src/python/m5/stats.py => src/python/m5/stats/__init__.py
Nathan Binkert [Mon, 9 May 2011 20:34:11 +0000 (16:34 -0400)]
work around gcc 4.5 warning
Tushar Krishna [Sat, 7 May 2011 21:43:30 +0000 (17:43 -0400)]
NetworkTest: added sim_cycles parameter to the network tester.
The network tester terminates after injecting for sim_cycles
(default=1000), instead of having to explicitly pass --maxticks from the
command line as before. If fixed_pkts is enabled, the tester only
injects maxpackets number of packets, else it keeps injecting till sim_cycles.
The tester also works with zero command line arguments now.
Tushar Krishna [Sat, 7 May 2011 21:28:15 +0000 (17:28 -0400)]
network: added Torus and Pt2Pt topologies
Nilay Vaish [Sat, 7 May 2011 12:38:36 +0000 (07:38 -0500)]
Trace: Remove the options trace-help and trace-flags
The options trace-help and trace-flags are no longer required. In there place,
the options debug-help and debug-flags have been provided.
Gabe Black [Fri, 6 May 2011 08:00:32 +0000 (01:00 -0700)]
X86: Fix the Lldt instructions so they load the ldtr and not the tr.
Korey Sewell [Thu, 5 May 2011 06:20:31 +0000 (02:20 -0400)]
ruby: use RubyMemory flag & remove setDebug() functionality
The RubyMemory flag wasnt used in the code, creating large gaps in trace output. Replace cprintfs w/dprintfs
using RubyMemory in memory controller. DPRINTF also deprecate the usage of the setDebug() pure virtual
function in the AbstractMemoryOrCache Class as well the m_debug/cprintf functions in MemoryControl.hh/cc
Ali Saidi [Thu, 5 May 2011 01:38:28 +0000 (20:38 -0500)]
ARM: Update ARM_FS stats for mp changes
Ali Saidi [Thu, 5 May 2011 01:38:28 +0000 (20:38 -0500)]
ARM: Configure bootloader parameters
Ali Saidi [Thu, 5 May 2011 01:38:28 +0000 (20:38 -0500)]
ARM: Add support for loading the a bootloader and configuring parameters for it
Prakash Ramrakhyani [Thu, 5 May 2011 01:38:28 +0000 (20:38 -0500)]
ARM: Implement WFE/WFI/SEV semantics.
Ali Saidi [Thu, 5 May 2011 01:38:28 +0000 (20:38 -0500)]
ARM: Add support for MP misc regs and broadcast flushes.
Prakash Ramrakhyani [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
ARM: Make GIC handle IPIs and multiple processors.
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
ARM: Add snoop control unit device.
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
ARM: Add support for some more registers in the real view controller.
Prakash Ramrakhyani [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
ARM: Boot loader changes that make it more flexible about load and I/O addrs
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
O3/ARM: Update stats for recent changes.
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
Debug: Add a function to cause the simulator to create a checkpoint from GDB.
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
CPU: Add some useful debug message to the timing simple cpu.
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
CPU: Fix a case where timing simple cpu faults can nest.
If we fault, change the state to faulting so that we don't fault again in the same cycle.
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
O3: Remove assertion for case that is actually handled in code.
If an nonspeculative instruction has a fault it might not be in the
nonSpecInsts map.
Ali Saidi [Thu, 5 May 2011 01:38:27 +0000 (20:38 -0500)]
Core: Add some documentation about the sim clocks.
Chris Emmons [Thu, 5 May 2011 01:38:26 +0000 (20:38 -0500)]
RealView: Fix the 24 and 100MHz clocks which were providing incorrect values.
Ali Saidi [Thu, 5 May 2011 01:38:26 +0000 (20:38 -0500)]
O3: Fix a small corner case with the lsq hazard detection logic.
Ali Saidi [Thu, 5 May 2011 01:38:26 +0000 (20:38 -0500)]
ARM: Add vfpv3 support to native trace.
Ali Saidi [Thu, 5 May 2011 01:38:26 +0000 (20:38 -0500)]
ARM: Fix small bug with vcvt instruction
Nathan Binkert [Wed, 4 May 2011 14:08:08 +0000 (10:08 -0400)]
debug: fix help output
Steve Reinhardt [Mon, 2 May 2011 19:40:32 +0000 (12:40 -0700)]
scons: interpret paths relative to launch directory
Make sure all command-line targets and EXTRAS directories
are interpreted relative to the launch directory. This
turns out to be very useful when building code from an
EXTRAS directory using SCons's -C option.
We were trying to do this with targets but it didn't actually
work since we didn't update BUILD_TARGETS (so SCons got
confused internally). We weren't even trying with EXTRAS.
To simplify the code, the default target is also interpreted
relative to the launch dir even though it was explicitly
handled as relative to the m5 dir before... I doubt anyone
really uses this anyway so it didn't seem worth the complexity.
(Maybe we should get rid of it?)
Steve Reinhardt [Mon, 2 May 2011 19:40:31 +0000 (12:40 -0700)]
scons: allow use of current builds as default build settings
Currently the --default= option only looks at the predefined
build configs (in m5/build_opts), so you're limited to basing
a new build config off of those (ALPHA_SE, etc.). If you've
already defined a non-standard build config and want to clone
it or tweak it, you have to start from scratch. This patch
causes --default= to look first among the existing builds
(in build/variables) before looking in build_opts so you
can specify an existing non-standard build config as a
starting point for a new config.
Korey Sewell [Mon, 2 May 2011 04:16:14 +0000 (00:16 -0400)]
ruby: dbg: use system ticks instead of cycles
Gabe Black [Fri, 29 Apr 2011 08:46:19 +0000 (04:46 -0400)]
Util: Replace mkblankimage.sh with the new gem5img.py.
This change replaces the mkblankimage.sh script, used for creating new disk
images, with a new gem5img.py script. The new version is written in python
instead of bash, takes its parameters from command line arguments instead of
prompting for them, and finds a free loopback device dynamically instead of
hardcoding /dev/loop1. The file system used is now optionally configurable,
and the blank image is filled by a "hole" left by lseek and write instead of
literally filling it with zeroes.
The functionality of the new script is broken into subcommands "init",
"mount", "umount", "new", "partition", and "format". "init" creates a new file
of the appropriate size, partitions it, and then formats the first (and only)
new parition. "mount" attaches a new loopback device to the first parition of
the image file and mounts it to the specified mount point. "umount" unmounts
the specified mount point and identifies and cleans up the underlying loopback
device. "new", "partition", and "format" are the individual stages of "init"
but broken out so they can be run individually. That's so an image can be
reinitialized in place if needed.
Two features of the original script are being dropped. The first is the
ability to specify a source directory to copy into the new file system. The
second is the ability to specify a list of commands to run which are expected
to (but not required to) update the permissions of the files in the new fs.
Both of these seem easy enough to do manually, especially given the "mount"
and "umount" commands, that removing them would meaningfully simplify the
script without making it less useful.
Brad Beckmann [Fri, 29 Apr 2011 00:18:16 +0000 (17:18 -0700)]
regress: updates after changing ruby network bandwidth
Brad Beckmann [Fri, 29 Apr 2011 00:18:14 +0000 (17:18 -0700)]
network: set the ExtLink bw to 16 bytes
Therefore all links by default are 16 bytes wide and thus work with Garnet's
uniform link bandwidth assumption.
Brad Beckmann [Fri, 29 Apr 2011 00:18:14 +0000 (17:18 -0700)]
garnet: removed flit_width from Routers
Brad Beckmann [Fri, 29 Apr 2011 00:18:14 +0000 (17:18 -0700)]
network: adjusted default endpoint bandwidth
The simple network's endpoint bandwidth value is used to adjust the overall
bandwidth of the network. Specifically, the ration between endpoint bandwidth
and the MESSAGE_SIZE_MULTIPLIER determines the increase. By setting the value
to 1000, that means the bandwdith factor specified in the links translates to
the link bandwidth in bytes. Previously, it was increasing that value by 10.
This patch will likely require a reset of the ruby regression tester stats.
Brad Beckmann [Fri, 29 Apr 2011 00:18:14 +0000 (17:18 -0700)]
network: removed the unused network-wide latency param
Brad Beckmann [Fri, 29 Apr 2011 00:18:14 +0000 (17:18 -0700)]
network: moved network config params
Moved the buffer_size, endpoint_bandwidth, and adaptive_routing params out of
the top-level parent network object and to only those networks that actually
use those parameters.
Brad Beckmann [Fri, 29 Apr 2011 00:18:14 +0000 (17:18 -0700)]
network: basic link bw for garnet and simple networks
This patch ensures that both Garnet and the simple networks use the bw value
specified in the topology. To do so, the patch generalizes the specification
of bw for basic links. This value is then translated to the specific value
used by the simple and Garnet networks. Since Garent does not support
non-uniformed link bandwidth, the patch also adds a check to ensure all bws are
equal.
--HG--
rename : src/mem/ruby/network/BasicLink.cc => src/mem/ruby/network/simple/SimpleLink.cc
rename : src/mem/ruby/network/BasicLink.hh => src/mem/ruby/network/simple/SimpleLink.hh
rename : src/mem/ruby/network/BasicLink.py => src/mem/ruby/network/simple/SimpleLink.py
Brad Beckmann [Fri, 29 Apr 2011 00:18:14 +0000 (17:18 -0700)]
network: convert links & switches to first class C++ SimObjects
This patch converts links and switches from second class simobjects that were
virtually ignored by the networks (both simple and Garnet) to first class
simobjects that directly correspond to c++ ojbects manipulated by the
topology and network classes. This is especially true for Garnet, where the
links and switches directly correspond to specific C++ objects.
By making this change, many aspects of the Topology class were simplified.
--HG--
rename : src/mem/ruby/network/Network.cc => src/mem/ruby/network/BasicLink.cc
rename : src/mem/ruby/network/Network.hh => src/mem/ruby/network/BasicLink.hh
rename : src/mem/ruby/network/Network.cc => src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.cc
rename : src/mem/ruby/network/Network.hh => src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.hh
rename : src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.py => src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py
rename : src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.py => src/mem/ruby/network/garnet/fixed-pipeline/GarnetRouter_d.py
rename : src/mem/ruby/network/Network.cc => src/mem/ruby/network/garnet/flexible-pipeline/GarnetLink.cc
rename : src/mem/ruby/network/Network.hh => src/mem/ruby/network/garnet/flexible-pipeline/GarnetLink.hh
rename : src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.py => src/mem/ruby/network/garnet/flexible-pipeline/GarnetLink.py
rename : src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.py => src/mem/ruby/network/garnet/flexible-pipeline/GarnetRouter.py
Brad Beckmann [Fri, 29 Apr 2011 00:18:12 +0000 (17:18 -0700)]
garnet: cleaned up flexible network header file
Brad Beckmann [Fri, 29 Apr 2011 00:18:12 +0000 (17:18 -0700)]
ruby: moved topology to the top network directory
Moved the Topology class to the top network directory because it is shared by
both the simple and Garnet networks.
--HG--
rename : src/mem/ruby/network/simple/Topology.cc => src/mem/ruby/network/Topology.cc
rename : src/mem/ruby/network/simple/Topology.hh => src/mem/ruby/network/Topology.hh
Brad Beckmann [Fri, 29 Apr 2011 00:18:12 +0000 (17:18 -0700)]
ruby: removed dated comment in SimpleNetwork
Nathan Binkert [Thu, 28 Apr 2011 23:45:17 +0000 (16:45 -0700)]
event: fix PythonEvent
order of %includes since they matter for this case
Nathan Binkert [Mon, 25 Apr 2011 21:18:08 +0000 (14:18 -0700)]
stats: update 20.parser o3 now that it works. realview-o3 works too.
Nilay Vaish [Mon, 25 Apr 2011 17:23:37 +0000 (12:23 -0500)]
base: include types.hh in base/stats/mysql.hh
Due to certain changes made via changeset 8229, the compilation was failing
in certain cases. The compiler pointed to base/stats/mysql.hh for not naming
a certain types like uint64_t. To rectify this, base/types.hh is being
included in base/stats/mysql.hh.
Gabe Black [Sat, 23 Apr 2011 22:02:29 +0000 (15:02 -0700)]
X86: When decoding a memory only inst, fault on reg encodings, don't assert.
This change makes the decoder figure out if an instruction that only supports
memory is using a register encoding and decodes directly to "Unknown" which will
behave appropriately. This prevents other parts of the instruction creation
process from seeing the mismatch and asserting.
Nathan Binkert [Fri, 22 Apr 2011 17:18:51 +0000 (10:18 -0700)]
tests: updates for stat name change
Nathan Binkert [Thu, 21 Apr 2011 02:07:46 +0000 (19:07 -0700)]
stats: ensure that stat names are valid
Nathan Binkert [Thu, 21 Apr 2011 02:07:45 +0000 (19:07 -0700)]
stats: one more name violation
Nathan Binkert [Thu, 21 Apr 2011 02:07:44 +0000 (19:07 -0700)]
python: fix another bug from changes to main.py
Nathan Binkert [Thu, 21 Apr 2011 01:45:03 +0000 (18:45 -0700)]
fix some build problems from prior changesets
Steve Reinhardt [Wed, 20 Apr 2011 20:47:42 +0000 (13:47 -0700)]
Change default regression build from 'fast' to 'opt'
Brad Danofsky [Wed, 20 Apr 2011 18:14:52 +0000 (11:14 -0700)]
stats: add user settable separator string for arrayed stats
Default is '::', so no visible change unless it is overridden
Brad Danofsky [Wed, 20 Apr 2011 18:14:51 +0000 (11:14 -0700)]
scons: Allow the build directory live under an EXTRAS directory
Nathan Binkert [Wed, 20 Apr 2011 01:45:23 +0000 (18:45 -0700)]
tests: update stats for name changes
Nathan Binkert [Wed, 20 Apr 2011 01:45:21 +0000 (18:45 -0700)]
stats: rename stats so they can be used as python expressions
Nathan Binkert [Tue, 19 Apr 2011 18:13:01 +0000 (11:13 -0700)]
python: different import for dealing with demandimport
Nathan Binkert [Sun, 17 Apr 2011 21:21:04 +0000 (14:21 -0700)]
style: fix all_regions code and remove bogus region type
Nathan Binkert [Sun, 17 Apr 2011 20:57:40 +0000 (13:57 -0700)]
style: remove extra debugging print
Nathan Binkert [Sun, 17 Apr 2011 20:57:03 +0000 (13:57 -0700)]
file_types: Make code work in Python 2.4
Nathan Binkert [Fri, 15 Apr 2011 17:45:11 +0000 (10:45 -0700)]
unittest: Make unit tests capable of using swig and python, convert stattest
Nathan Binkert [Fri, 15 Apr 2011 17:44:59 +0000 (10:44 -0700)]
python: cleanup python code so stuff doesn't automatically happen at startup
this allows things to be overridden at startup (e.g. for tests)
Nathan Binkert [Fri, 15 Apr 2011 17:44:44 +0000 (10:44 -0700)]
scons: make a flexible system for guarding source files
This is similar to guards on mercurial queues and they're used for selecting
which files are compiled into some given object. We already do something
similar, but it's mostly hard coded for the m5 binary and the m5 library
and I'd like to make it more flexible to better support the unittests
Nathan Binkert [Fri, 15 Apr 2011 17:44:32 +0000 (10:44 -0700)]
trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing. This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
Nathan Binkert [Fri, 15 Apr 2011 17:44:15 +0000 (10:44 -0700)]
debug: create a Debug namespace
Nathan Binkert [Fri, 15 Apr 2011 17:44:14 +0000 (10:44 -0700)]
includes: fix up code after sorting
Nathan Binkert [Fri, 15 Apr 2011 17:44:06 +0000 (10:44 -0700)]
includes: sort all includes
Nathan Binkert [Fri, 15 Apr 2011 17:43:51 +0000 (10:43 -0700)]
style: add sort_includes to the style hook
Nathan Binkert [Fri, 15 Apr 2011 17:43:47 +0000 (10:43 -0700)]
style: move style verifiers into classes
Nathan Binkert [Fri, 15 Apr 2011 17:43:30 +0000 (10:43 -0700)]
style: add a user interface wrapper class
makes things work both with mercurial and stand alone with stdio
Nathan Binkert [Fri, 15 Apr 2011 17:43:06 +0000 (10:43 -0700)]
util: python implementation of a routine that will sort includes
I didn't realize that the perl version existed when I started this,
this version has a lot more features than the previous one since it will
sort and separate python, system, and m5 headers in separate groups, it
will remove duplicates, it will also convert c headers to stl headers
Nathan Binkert [Fri, 15 Apr 2011 17:42:32 +0000 (10:42 -0700)]
region: add a utility class for keeping track of regions of some range
This is basically like the range_map stuff in src/base (range already
exists in Python). This code is like a set of ranges. I'm using it
to keep track of changed lines in source code, but it could be use to
keep track of memory ranges and holes in memory regions. It could
also be used in memory allocation type stuff. (Though it's not at all
optimized.)
Nathan Binkert [Fri, 15 Apr 2011 17:38:02 +0000 (10:38 -0700)]
SortedDict: add functions for getting ranges of keys, values, items
Nathan Binkert [Fri, 15 Apr 2011 17:37:28 +0000 (10:37 -0700)]
python: figure out if the m5.internal package exists even with demandimport
Nathan Binkert [Wed, 13 Apr 2011 16:32:19 +0000 (09:32 -0700)]
refcnt: Update doxygen comments
Nathan Binkert [Wed, 13 Apr 2011 16:32:18 +0000 (09:32 -0700)]
refcnt: Inline comparison functions
Nathan Binkert [Wed, 13 Apr 2011 16:32:18 +0000 (09:32 -0700)]
main: separate out interact() so it can be used by other functions
Nathan Binkert [Wed, 13 Apr 2011 16:32:17 +0000 (09:32 -0700)]
util: fix the language type function
Ali Saidi [Tue, 12 Apr 2011 20:09:20 +0000 (16:09 -0400)]
ARM: Fix stats for ARM_SE checkpoint restore fix.
Register reads/writes done in startup() count against the stats while they
don't count if done in initState().
Ali Saidi [Mon, 11 Apr 2011 01:02:28 +0000 (21:02 -0400)]
ARM: Fix checkpoint restoration in ARM_SE.
Ali Saidi [Mon, 11 Apr 2011 01:02:28 +0000 (21:02 -0400)]
ARM: Get rid of some comments/todos that no longer apply.
Brad Beckmann [Wed, 6 Apr 2011 21:41:41 +0000 (14:41 -0700)]
ruby: fixes to support more types of RubyRequests
Ali Saidi [Mon, 4 Apr 2011 16:42:32 +0000 (11:42 -0500)]
ARM: Update stats for default inclusion of CF adapter.
Ali Saidi [Mon, 4 Apr 2011 16:42:31 +0000 (11:42 -0500)]
ARM: Include IDE/CF controller by default in PBX model.
Frame buffer and boot linux:
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxFrameBuf --kernel=vmlinux.touchkit
Linux from a CF card:
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxCflash --kernel=vmlinux.touchkit
Run Android
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmAndroid --kernel=vmlinux.android
Run MP
./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxCflash --kernel=vmlinux.mp-2.6.38
Anthony Gutierrez [Mon, 4 Apr 2011 16:42:31 +0000 (11:42 -0500)]
Sim: Fix Simulation.py to allow more than 1 core for standard switching.
This patch moves the assignment of testsys.switch_cpus, testsys.switch_cpus_1,
switch_cpu_list, and switch_cpu_list1 outside of the for loop so they are
assigned only once, after switch_cpus and switch_cpus_1 are constructed.
Ali Saidi [Mon, 4 Apr 2011 16:42:31 +0000 (11:42 -0500)]
ARM: Update stats for previous changes.
Ali Saidi [Mon, 4 Apr 2011 16:42:29 +0000 (11:42 -0500)]
ARM: Use CPU local lock before sending load to mem system.
This change uses the locked_mem.hh header to handle implementing CLREX. It
simplifies the current implementation greatly.
Ali Saidi [Mon, 4 Apr 2011 16:42:28 +0000 (11:42 -0500)]
ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.
This change fixes a small bug in the arm copyRegs() code where some registers
wouldn't be copied if the processor was in a mode other than MODE_USER.
Additionally, this change simplifies the way the O3 switchCpu code works by
utilizing TheISA::copyRegs() to copy the required context information
rather than the adhoc copying that goes on in the CPU model. The current code
makes assumptions about the visibility of int and float registers that aren't
true for all architectures in FS mode.
Ali Saidi [Mon, 4 Apr 2011 16:42:28 +0000 (11:42 -0500)]
ARM: Fix bug in MicroLdrNeon templates for initiateAcc().
William Wang [Mon, 4 Apr 2011 16:42:28 +0000 (11:42 -0500)]
ARM: Cleanup and small fixes to some NEON ops to match the spec.
Only certain bits of the cpacr can be written, some must be equal.
Mult instructions that write the same register should do something sane
Ali Saidi [Mon, 4 Apr 2011 16:42:28 +0000 (11:42 -0500)]
ARM: Cleanup implementation of ITSTATE and put important code in PCState.
Consolidate all code to handle ITSTATE in the PCState object rather than
touching a variety of structures/objects.
Ali Saidi [Mon, 4 Apr 2011 16:42:28 +0000 (11:42 -0500)]
ARM: Fix m5op parameters bug.
All the m5op parameters are 64 bits, but we were only sending 32 bits;
and the static register indexes were incorrectly specified.
Ali Saidi [Mon, 4 Apr 2011 16:42:27 +0000 (11:42 -0500)]
ARM: Tag appropriate instructions as IsReturn
Ali Saidi [Mon, 4 Apr 2011 16:42:27 +0000 (11:42 -0500)]
ARM: Fix table walk going on while ASID changes error
Ali Saidi [Mon, 4 Apr 2011 16:42:26 +0000 (11:42 -0500)]
CPU: Remove references to memory copy operations
Ali Saidi [Mon, 4 Apr 2011 16:42:25 +0000 (11:42 -0500)]
O3: Update stats for memory order violation checking patch.
Ali Saidi [Mon, 4 Apr 2011 16:42:23 +0000 (11:42 -0500)]
O3: Tighten memory order violation checking to 16 bytes.
The comment in the code suggests that the checking granularity should be 16
bytes, however in reality the shift by 8 is 256 bytes which seems much
larger than required.
Ali Saidi [Mon, 4 Apr 2011 16:42:23 +0000 (11:42 -0500)]
IDE: Support x86, Alpha, and ARM use of the IDE controller.