Luke Kenneth Casson Leighton [Tue, 25 Apr 2023 17:36:31 +0000 (18:36 +0100)]
add CW and CW2 Form
needed for both #1035 and #1067
Luke Kenneth Casson Leighton [Sat, 15 Apr 2023 16:32:29 +0000 (17:32 +0100)]
check RC1, add data-dependent fail-first LD/ST test
Jacob Lifshay [Tue, 25 Apr 2023 06:49:19 +0000 (23:49 -0700)]
replace min/max[su][.] with minmax[.]
Jacob Lifshay [Tue, 25 Apr 2023 06:47:20 +0000 (23:47 -0700)]
add unofficial and comment2 columns to minor_19.csv
Jacob Lifshay [Tue, 25 Apr 2023 06:45:18 +0000 (23:45 -0700)]
add MM-form
Jacob Lifshay [Tue, 25 Apr 2023 06:15:11 +0000 (23:15 -0700)]
fix bug where pseudo-code assignments modify more than just the variable being assigned to
Jacob Lifshay [Fri, 21 Apr 2023 03:23:48 +0000 (20:23 -0700)]
rename/convert/merge XLCASTU/XLCASTS to EXTZXL/EXTSXL
Jacob Lifshay [Fri, 21 Apr 2023 03:15:48 +0000 (20:15 -0700)]
rewrite all uses of XLCASTU/XLCASTS
Jacob Lifshay [Fri, 21 Apr 2023 03:13:57 +0000 (20:13 -0700)]
add EXTZ since it's in PowerISA v3.1B (see lbz for an example)
Jacob Lifshay [Thu, 20 Apr 2023 04:00:51 +0000 (21:00 -0700)]
fix EXTSXL/XLCASTU/XLCASTS when inputs are python ints
Jacob Lifshay [Thu, 20 Apr 2023 03:36:09 +0000 (20:36 -0700)]
use proper cast function
Jacob Lifshay [Thu, 20 Apr 2023 01:12:32 +0000 (18:12 -0700)]
change XLEN-ification
See bug #1064
Jacob Lifshay [Thu, 20 Apr 2023 00:58:19 +0000 (17:58 -0700)]
change extsb/h/w to scale based on XLEN rather than extending from a fixed width
See https://bugs.libre-soc.org/show_bug.cgi?id=1061
Jacob Lifshay [Tue, 18 Apr 2023 04:26:00 +0000 (21:26 -0700)]
add shaddw
Jacob Lifshay [Tue, 18 Apr 2023 04:25:40 +0000 (21:25 -0700)]
spelling fix
Dmitry Selyutin [Wed, 12 Apr 2023 18:16:18 +0000 (21:16 +0300)]
media: migrate to binutils
Dmitry Selyutin [Mon, 10 Apr 2023 16:11:23 +0000 (19:11 +0300)]
sv_binutils: fix broken script
Luke Kenneth Casson Leighton [Thu, 6 Apr 2023 12:26:20 +0000 (13:26 +0100)]
add power_decode_svp64_rm.py capability for new LD/ST format
https://bugs.libre-soc.org/show_bug.cgi?id=1047
Luke Kenneth Casson Leighton [Tue, 4 Apr 2023 15:10:02 +0000 (16:10 +0100)]
add quick test_pysvp64dis.py of LD/ST data-dependent fail-first
Luke Kenneth Casson Leighton [Tue, 4 Apr 2023 14:26:49 +0000 (15:26 +0100)]
https://bugs.libre-soc.org/show_bug.cgi?id=1047
start sorting out power_insn.py to conform to new LD/ST spec.
Data-Dependent Fail-First gets top priority, pred-result is dropped,
saturation removed from LDST-IDX leaving space for "els" to be added
with its own bit
Luke Kenneth Casson Leighton [Tue, 4 Apr 2023 13:18:02 +0000 (14:18 +0100)]
whitespace cleanup (80 char per line hard limit)
Luke Kenneth Casson Leighton [Tue, 4 Apr 2023 13:02:13 +0000 (14:02 +0100)]
comment about massive unnecessary code-duplication that should not
have been done in the way it was, but it is a good step along the right
lines because it a gets the job done by b producing the right answers
that c get us to the simplified path in an incremental fashion.
am adding this note in the source code to make sure that readers are aware
Luke Kenneth Casson Leighton [Tue, 4 Apr 2023 12:48:30 +0000 (13:48 +0100)]
fix setvl unit test which happened to use deprecated
DCT schedule
Jacob Lifshay [Thu, 30 Mar 2023 07:55:20 +0000 (00:55 -0700)]
fix add-like CA/OV outputs
this is a massive kludge, but that's what lkcl requested due to time constraints
Jacob Lifshay [Thu, 30 Mar 2023 07:54:22 +0000 (00:54 -0700)]
fix broken test case
forgot to set the expected value to the input value for inputs that aren't outputs
Jacob Lifshay [Thu, 30 Mar 2023 07:02:56 +0000 (00:02 -0700)]
add addex to simulator
works, except it has incorrect CA/OV outputs, which I'll fix as part of fixing all add-like ops
Jacob Lifshay [Thu, 30 Mar 2023 05:00:43 +0000 (22:00 -0700)]
fix typo when getting pseudo-code output variables
Jacob Lifshay [Thu, 30 Mar 2023 04:38:02 +0000 (21:38 -0700)]
switch to testing Rc=1 variants
Jacob Lifshay [Thu, 30 Mar 2023 04:30:53 +0000 (21:30 -0700)]
fix `neg[o].` causing the simulator to raise TypeError
Jacob Lifshay [Thu, 30 Mar 2023 03:03:43 +0000 (20:03 -0700)]
add case_nego_
Jacob Lifshay [Thu, 30 Mar 2023 02:02:19 +0000 (19:02 -0700)]
rename le -> lt since CR bits are lt, gt, eq, and so, not le
Luke Kenneth Casson Leighton [Wed, 29 Mar 2023 09:08:56 +0000 (10:08 +0100)]
remove DCT/iDCT redundant modes which require less-efficient cos tables
turns out that values are often repeated so why waste space especially
when the svshape instruction is under pressure
this goes into https://libre-soc.org/openpower/sv/rfc/ls009/
Jacob Lifshay [Wed, 29 Mar 2023 03:36:22 +0000 (20:36 -0700)]
add test cases for ca/ov outputs of a bunch of add-like ops covered by pia
Jacob Lifshay [Tue, 28 Mar 2023 07:30:56 +0000 (00:30 -0700)]
add check against PIA's output downloaded from ftp.libre-soc.org
Luke Kenneth Casson Leighton [Sat, 25 Mar 2023 17:14:51 +0000 (17:14 +0000)]
all whitespace. reduce to under 80 chars
Luke Kenneth Casson Leighton [Sat, 25 Mar 2023 14:14:30 +0000 (14:14 +0000)]
update comments on svstep returning pack/unpack state
Konstantinos Margaritis [Sat, 25 Mar 2023 16:17:53 +0000 (16:17 +0000)]
fix docs to align with recent change in setvl syntax/operation
Luke Kenneth Casson Leighton [Sat, 25 Mar 2023 10:21:30 +0000 (10:21 +0000)]
whitespace - 80 char limit
Luke Kenneth Casson Leighton [Sat, 25 Mar 2023 10:03:11 +0000 (10:03 +0000)]
in xchacha20 svp64 assembler remove r22 from setvl and
use (new, modified) setvl options. see simplev.mdwn
Luke Kenneth Casson Leighton [Sat, 25 Mar 2023 09:55:12 +0000 (09:55 +0000)]
updated simplev setvl specification pseudocode: MAJOR spec change.
VF is set and persistence cleared when *MAXVL* is set
test affected: chacha20
Luke Kenneth Casson Leighton [Sat, 25 Mar 2023 08:37:27 +0000 (08:37 +0000)]
whitespace
Luke Kenneth Casson Leighton [Fri, 24 Mar 2023 10:43:27 +0000 (10:43 +0000)]
whoops added "CRB-Form" format not "CRB"
Konstantinos Margaritis [Mon, 20 Mar 2023 09:50:44 +0000 (09:50 +0000)]
add .bin files to target
Konstantinos Margaritis [Mon, 20 Mar 2023 09:47:39 +0000 (09:47 +0000)]
fix typo
Konstantinos Margaritis [Mon, 20 Mar 2023 09:46:03 +0000 (09:46 +0000)]
and *.elf files
Konstantinos Margaritis [Mon, 20 Mar 2023 09:45:07 +0000 (09:45 +0000)]
also clean *.bin files
Konstantinos Margaritis [Mon, 20 Mar 2023 09:42:08 +0000 (09:42 +0000)]
Enable compilation and execution on x86 as well
Konstantinos Margaritis [Mon, 20 Mar 2023 09:40:46 +0000 (09:40 +0000)]
Pass object code filename instead of actual data
This enables compilation on non-Power architectures.
Luke Kenneth Casson Leighton [Sat, 18 Mar 2023 22:50:01 +0000 (22:50 +0000)]
brief explanation of Vertical-First
Luke Kenneth Casson Leighton [Sat, 18 Mar 2023 22:48:06 +0000 (22:48 +0000)]
spelling
Luke Kenneth Casson Leighton [Sat, 18 Mar 2023 22:47:54 +0000 (22:47 +0000)]
whitespace cleanup
Konstantinos Margaritis [Sat, 18 Mar 2023 19:56:31 +0000 (19:56 +0000)]
Documentation about SVP64 implementation of XChacha20
Konstantinos Margaritis [Sat, 18 Mar 2023 00:29:56 +0000 (00:29 +0000)]
fix tabs
Konstantinos Margaritis [Sat, 18 Mar 2023 00:10:56 +0000 (00:10 +0000)]
final working version
Konstantinos Margaritis [Sat, 18 Mar 2023 00:08:52 +0000 (00:08 +0000)]
add for syntax highlighting
Konstantinos Margaritis [Sat, 18 Mar 2023 00:08:21 +0000 (00:08 +0000)]
comment some prints, use correct boundaries when copying ciphertext buffer
Konstantinos Margaritis [Sat, 18 Mar 2023 00:07:50 +0000 (00:07 +0000)]
use svp64 version
Konstantinos Margaritis [Sat, 18 Mar 2023 00:07:13 +0000 (00:07 +0000)]
print correct/svp64 cipher text
Konstantinos Margaritis [Fri, 17 Mar 2023 09:39:18 +0000 (09:39 +0000)]
Add xchacha_encrypt_bytes_svp64
Konstantinos Margaritis [Fri, 17 Mar 2023 09:38:25 +0000 (09:38 +0000)]
call xchacha_encrypt_bytes_svp64
Konstantinos Margaritis [Fri, 17 Mar 2023 09:37:57 +0000 (09:37 +0000)]
rewrite loop
Konstantinos Margaritis [Fri, 17 Mar 2023 09:36:53 +0000 (09:36 +0000)]
Refactor code, add quarterround macros
Konstantinos Margaritis [Fri, 17 Mar 2023 09:35:16 +0000 (09:35 +0000)]
Add xchacha_encrypt_bytes_svp64 wrapper function
Luke Kenneth Casson Leighton [Wed, 15 Mar 2023 15:09:35 +0000 (15:09 +0000)]
add CRB-Form fields for crternlogi and crbinlog, they are both now
reduced to 3-in 1-out, both needing to become overwrites due to the
mask field (msk) making BF a Read-Modify-Write
https://bugs.libre-soc.org/show_bug.cgi?id=1023#c4
Konstantinos Margaritis [Sun, 12 Mar 2023 22:42:23 +0000 (22:42 +0000)]
First working version of SVP64 arm xchacha_hchacha20() function
Luke Kenneth Casson Leighton [Sun, 12 Mar 2023 22:27:01 +0000 (22:27 +0000)]
set MAXVL=VL=32 first, then set vertical-first separately
(chacha20)
Konstantinos Margaritis [Sun, 12 Mar 2023 19:26:30 +0000 (19:26 +0000)]
used same input data as the actual C test
Konstantinos Margaritis [Sun, 12 Mar 2023 19:26:02 +0000 (19:26 +0000)]
WIP: fixed some registers, wrong VL
Konstantinos Margaritis [Sun, 12 Mar 2023 19:24:42 +0000 (19:24 +0000)]
uncomment loop
Luke Kenneth Casson Leighton [Sun, 12 Mar 2023 15:03:04 +0000 (15:03 +0000)]
change target registers in test_caller_svp64_chacha20.py to match
those in xchacha20_svp64.s
Luke Kenneth Casson Leighton [Sun, 12 Mar 2023 14:57:15 +0000 (14:57 +0000)]
whoops use same temp reg for ctr
Luke Kenneth Casson Leighton [Sun, 12 Mar 2023 14:52:26 +0000 (14:52 +0000)]
parameterise svstep RT (set to 16 in chacha20 test)
Luke Kenneth Casson Leighton [Sun, 12 Mar 2023 14:46:07 +0000 (14:46 +0000)]
parameterising VL and SHAPE0-2 in chacha20 test
Luke Kenneth Casson Leighton [Sun, 12 Mar 2023 14:38:42 +0000 (14:38 +0000)]
parameterise the target block in chacha20 test,
set the parameter (block) to GPR 64
Luke Kenneth Casson Leighton [Sun, 12 Mar 2023 10:52:01 +0000 (10:52 +0000)]
add print-out for chacha20 schedule
Konstantinos Margaritis [Sun, 12 Mar 2023 10:50:52 +0000 (10:50 +0000)]
fix tabs
Konstantinos Margaritis [Sun, 12 Mar 2023 10:44:43 +0000 (10:44 +0000)]
[WIP] xchacha20 SVP64 implementation using pypowersim wrapper
Konstantinos Margaritis [Sun, 12 Mar 2023 10:43:46 +0000 (10:43 +0000)]
use absolute path
Luke Kenneth Casson Leighton [Wed, 8 Mar 2023 17:19:41 +0000 (17:19 +0000)]
update pseudocode for dsld/dsrd to note that only when Rc=1 is setting
overflow=1 relevant. for ls003
Luke Kenneth Casson Leighton [Mon, 20 Feb 2023 12:44:03 +0000 (12:44 +0000)]
after move data to new directory, update runner-script to match
Dmitry Selyutin [Tue, 24 Jan 2023 18:47:09 +0000 (21:47 +0300)]
power_enums: enable Rc-aware dsld/dsrd
Dmitry Selyutin [Tue, 24 Jan 2023 13:22:44 +0000 (16:22 +0300)]
fields.text: fix TLI XO format
Dmitry Selyutin [Tue, 24 Jan 2023 13:22:13 +0000 (16:22 +0300)]
bitmanip.mdwn: add missing Rc static operand
Dmitry Selyutin [Sun, 22 Jan 2023 17:46:58 +0000 (20:46 +0300)]
svp64_utf_8_validation.py: convert labels to addresses
Dmitry Selyutin [Sun, 22 Jan 2023 00:32:47 +0000 (03:32 +0300)]
power_insn: fix dst/src duplication detection
Dmitry Selyutin [Sat, 21 Jan 2023 22:06:23 +0000 (01:06 +0300)]
power_insn: canonicalize SVP64 insn name
Dmitry Selyutin [Sat, 21 Jan 2023 18:58:22 +0000 (21:58 +0300)]
power_insn: hack CR assembly
Dmitry Selyutin [Fri, 20 Jan 2023 16:07:27 +0000 (19:07 +0300)]
power_insn: override bogus FMA instructions
Dmitry Selyutin [Thu, 19 Jan 2023 21:33:31 +0000 (00:33 +0300)]
power_insn: refactor operands; simplify lookups
Dmitry Selyutin [Thu, 19 Jan 2023 04:25:01 +0000 (07:25 +0300)]
pysvp64asm: drop obsolete code
Dmitry Selyutin [Wed, 18 Jan 2023 19:58:00 +0000 (22:58 +0300)]
power_insn: fix paired registers disassembly
Dmitry Selyutin [Mon, 16 Jan 2023 19:10:44 +0000 (22:10 +0300)]
power_insn: support legacy style
Dmitry Selyutin [Mon, 19 Dec 2022 22:34:00 +0000 (01:34 +0300)]
power_insn: major refactoring and cleanup
Dmitry Selyutin [Sun, 15 Jan 2023 08:35:18 +0000 (11:35 +0300)]
pysvp64dis: do not create temporary bytes upon load
Dmitry Selyutin [Sun, 15 Jan 2023 08:32:38 +0000 (11:32 +0300)]
power_enums: support paired registers
Dmitry Selyutin [Fri, 6 Jan 2023 17:22:53 +0000 (20:22 +0300)]
power_fields: support assignment to same class instance
Dmitry Selyutin [Sun, 18 Dec 2022 20:16:28 +0000 (23:16 +0300)]
power_enums: fix CR register types
Dmitry Selyutin [Sun, 18 Dec 2022 19:13:20 +0000 (22:13 +0300)]
power_enums: fix RC1 predicates conversion
Dmitry Selyutin [Sun, 18 Dec 2022 18:36:09 +0000 (21:36 +0300)]
pysvp64asm: avoid empty fields
Dmitry Selyutin [Sun, 18 Dec 2022 18:35:26 +0000 (21:35 +0300)]
isatables: split dsld/dsrd Rc versions