mesa.git
5 years agost/mesa: Prefer R8 for bitmap textures
Dave Airlie [Thu, 4 Oct 2018 01:41:26 +0000 (02:41 +0100)]
st/mesa: Prefer R8 for bitmap textures

If it's not available, we fall back to A8. This should work on all drivers,
because we depend on it in the display-list code already.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agodrirc: enable vk_x11_override_min_image_count for DOOM
Samuel Pitoiset [Tue, 8 Oct 2019 08:30:03 +0000 (10:30 +0200)]
drirc: enable vk_x11_override_min_image_count for DOOM

DOOM fails to handle more images than expected when the adaptative
sync mode is enabled.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1902
Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: implement VK_KHR_shader_clock
Samuel Pitoiset [Mon, 7 Oct 2019 08:26:22 +0000 (10:26 +0200)]
radv: implement VK_KHR_shader_clock

NIR->LLVM and ACO already support nir_intrinsic_shader_clock.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoiris: Implement the Broadwell NP Z PMA Stall Fix
Kenneth Graunke [Wed, 25 Sep 2019 07:31:07 +0000 (00:31 -0700)]
iris: Implement the Broadwell NP Z PMA Stall Fix

This should help avoid stalls in the pixel mask array in certain
non-promoted depth cases.  It especially helps for Z16, as each bit
in the PMA corresponds to two pixels when using Z16, as opposed to
the usual one pixel.

Improves performance in GFXBench5 TRex by 22% (n=1).

5 years agodocs: Update recently enabled VK extensions on Intel
Caio Marcelo de Oliveira Filho [Tue, 8 Oct 2019 22:52:04 +0000 (15:52 -0700)]
docs: Update recently enabled VK extensions on Intel

5 years agoanv: Enable VK_EXT_shader_subgroup_{ballot,vote}
Caio Marcelo de Oliveira Filho [Thu, 22 Aug 2019 19:30:43 +0000 (12:30 -0700)]
anv: Enable VK_EXT_shader_subgroup_{ballot,vote}

Anvil now supports and passes Vulkan CTS tests matching

    dEQP-VK.subgroups.*.ext_shader_subgroup_ballot.*
    dEQP-VK.subgroups.*.ext_shader_subgroup_vote.*

and crucible tests matching

    func.shader-ballot.*
    func.shader-subgroup-vote.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agost/mesa: Fix inverted polygon stipple condition
Kenneth Graunke [Tue, 8 Oct 2019 22:20:19 +0000 (15:20 -0700)]
st/mesa: Fix inverted polygon stipple condition

Fixes Piglit's gl-2.1-polygon-stipple-fs on iris.

Fixes: 63f24c3c016 ("gallium: Enable MESA_framebuffer_flip_y")
Reviewed-by: Fritz Koenig <frkoenig@google.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
5 years agogallium: Enable MESA_framebuffer_flip_y
Fritz Koenig [Tue, 30 Jul 2019 21:40:33 +0000 (14:40 -0700)]
gallium: Enable MESA_framebuffer_flip_y

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
5 years agomesa: Allow MESA_framebuffer_flip_y for GLES 3
Fritz Koenig [Tue, 30 Jul 2019 21:53:30 +0000 (14:53 -0700)]
mesa: Allow MESA_framebuffer_flip_y for GLES 3

Implement glFramebufferParameteriMESA on GLES 3 so
that the extension is not dependant on GLES 3.1

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
5 years agomesa: GetFramebufferParameteriv spelling
Fritz Koenig [Mon, 7 Oct 2019 18:15:03 +0000 (11:15 -0700)]
mesa: GetFramebufferParameteriv spelling

GetFramebufferParameteriv was incorrectly spelled as
GetFramebufferParameteri.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
5 years agoinclude/GLES2: Sync GLES2 headers with Khronos
Fritz Koenig [Mon, 7 Oct 2019 18:33:59 +0000 (11:33 -0700)]
include/GLES2: Sync GLES2 headers with Khronos

Bring in glFramebufferParameteriMESA/glGetFramebufferParameterivMESA

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
5 years agoradeonsi: enable zerovram for Rocket League
Clément Guérin [Sat, 5 Oct 2019 03:05:09 +0000 (20:05 -0700)]
radeonsi: enable zerovram for Rocket League

Fixes corruption on game startup.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1888
Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
5 years agoiris: Properly unreference extra VBOs for draw parameters
Kenneth Graunke [Tue, 8 Oct 2019 17:11:52 +0000 (10:11 -0700)]
iris: Properly unreference extra VBOs for draw parameters

bound_vertex_buffers doesn't include extra draw parameters buffers.
Tracking this correctly is kind of complicated, and iris_destroy_state
isn't exactly in a hot path, so just loop over all VBO bindings.

Fixes: 4122665dd90 (iris: Enable ARB_shader_draw_parameters support)
Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
5 years agomeson: fix sys/mkdev.h detection on Solaris
Eric Engestrom [Sat, 14 Sep 2019 21:18:32 +0000 (22:18 +0100)]
meson: fix sys/mkdev.h detection on Solaris

On Solaris, sys/sysmacros.h has long-deprecated copies of major() & minor()
but not makedev().
sys/mkdev.h has all three and is the preferred choice.

Let's make sure we check for all 3 major(), minor() and makedev().

Reported-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Tested-by: Alan Coopersmith <alan.coopersmith@oracle.com>
5 years agoinclude: update drm-uapi
Eric Engestrom [Sat, 5 Oct 2019 07:30:44 +0000 (08:30 +0100)]
include: update drm-uapi

`drm.h` was missing a `#include <stdint.h>`, which was completely
breaking the non-linux builds after 272f9cfe6a19212354c8 ("dri: Use DRM_FORMAT_*
instead of defining our own copy.") started making use of it.

Fixes: 272f9cfe6a19212354c8 ("dri: Use DRM_FORMAT_* instead of defining our own copy.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/950
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoloader: Simplify handling of the radeonsi driver
Michel Dänzer [Mon, 7 Oct 2019 10:02:14 +0000 (12:02 +0200)]
loader: Simplify handling of the radeonsi driver

The list of AMD/ATI devices supported by radeon/r200/r300/r600 is
complete, so anything else must use radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoamd/llvm: Fix warning due to asserted-only variable.
Bas Nieuwenhuizen [Tue, 8 Oct 2019 01:41:50 +0000 (03:41 +0200)]
amd/llvm: Fix warning due to asserted-only variable.

[212/893] Compiling C object 'src/amd/llvm/ce8261c@@amd_common_llvm@sta/ac_nir_to_llvm.c.o'.
../mesa/src/amd/llvm/ac_nir_to_llvm.c: In function ‘visit_image_atomic’:
../mesa/src/amd/llvm/ac_nir_to_llvm.c:2636:17: warning: unused variable ‘format’ [-Wunused-variable]
 2636 |    const GLenum format = nir_intrinsic_format(instr);
      |                 ^~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agopanfrost: Draw the wallpaper when only depth/stencil bufs are cleared
Boris Brezillon [Fri, 20 Sep 2019 06:55:54 +0000 (08:55 +0200)]
panfrost: Draw the wallpaper when only depth/stencil bufs are cleared

When only the depth/stencil bufs are cleared, we should make sure the
color content is reloaded into the tile buffers if we want to preserve
their content.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Make sure a clear does not re-use a pre-existing batch
Boris Brezillon [Thu, 19 Sep 2019 13:52:02 +0000 (15:52 +0200)]
panfrost: Make sure a clear does not re-use a pre-existing batch

glClear()s are expected to be the first thing GL apps do before drawing
new things. If there's already an existing batch targetting the same
FBO that has draws attached to it, we should make sure the new clear
gets a new batch assigned to guaranteed that the FB content is actually
cleared with the requested color/depth/stencil values.

We create a panfrost_get_fresh_batch_for_fbo() helper for that and
call it from panfrost_clear().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agoiris: Update comment about 3-component formats and buffer textures
Kenneth Graunke [Mon, 7 Oct 2019 23:03:14 +0000 (16:03 -0700)]
iris: Update comment about 3-component formats and buffer textures

You can't render to PIPE_BUFFER so there's no reason to prefer RGBX.
PBO upload would like to use proper RGB textures as source data.

5 years agoiris: Allow packed RGB pbo uploads
Chris Wilson [Wed, 10 Jul 2019 19:18:38 +0000 (20:18 +0100)]
iris: Allow packed RGB pbo uploads

Hitting any fallback path on Broxton as we require clflushing the whole
buffer even for an upload of a subtexture. However, since gallium
provides a pbo upload path, allow it to sample packed RGB if supported.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoanv/android: fix images created with external format support
Tapani Pälli [Mon, 7 Oct 2019 06:07:48 +0000 (09:07 +0300)]
anv/android: fix images created with external format support

This fixes a case where user first creates image and then later binds it
with memory created from AHW buffer.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agomeson: Always add LLVM coroutines module.
Bas Nieuwenhuizen [Mon, 7 Oct 2019 15:34:22 +0000 (17:34 +0200)]
meson: Always add LLVM coroutines module.

It gets used by the gallium auxiliary draw module, which gets used
pretty much always when LLVM is used as JIT.

At the same time most builds don't hit the issue here because the
shared library of LLVM contains all modules.

Fixes: d32690b43c91 ("gallivm: add coroutine pass manager support")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/951
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
5 years agoamd: Move all amd/common code that depends on LLVM to amd/llvm.
Timur Kristóf [Fri, 27 Sep 2019 08:29:51 +0000 (10:29 +0200)]
amd: Move all amd/common code that depends on LLVM to amd/llvm.

This commit is a step towards the goal of being able to build RADV
without LLVM. In the future we would like to offer the option to
use RADV solely with ACO. There is still a need for the common AMD
code located in amd/common but the LLVM specific parts need to be
separated.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agonvc0: add support for GL_EXT_demote_to_helper_invocation
Ilia Mirkin [Wed, 2 Oct 2019 23:47:00 +0000 (19:47 -0400)]
nvc0: add support for GL_EXT_demote_to_helper_invocation

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agogallium/tgsi: add support for DEMOTE and READ_HELPER opcodes
Ilia Mirkin [Wed, 2 Oct 2019 23:39:30 +0000 (19:39 -0400)]
gallium/tgsi: add support for DEMOTE and READ_HELPER opcodes

This mirrors the intrinsics in the GLSL IR. One could imagine an
alternate definition where reading the semantic would account for the
READ_HELPER functionality, but that feels potentially dodgy and could be
subject to CSE unpleasantness.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoradeonsi: use simple_mtx_t instead of mtx_t
Marek Olšák [Thu, 26 Sep 2019 17:37:45 +0000 (13:37 -0400)]
radeonsi: use simple_mtx_t instead of mtx_t

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agost/mesa: use simple_mtx_t instead of mtx_t
Marek Olšák [Thu, 26 Sep 2019 17:37:45 +0000 (13:37 -0400)]
st/mesa: use simple_mtx_t instead of mtx_t

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agogallium: add PIPE_RESOURCE_FLAG_SINGLE_THREAD_USE to skip util_range lock
Marek Olšák [Thu, 26 Sep 2019 01:38:40 +0000 (21:38 -0400)]
gallium: add PIPE_RESOURCE_FLAG_SINGLE_THREAD_USE to skip util_range lock

u_upload_mgr sets it, so that util_range_add can skip the lock.

The time spent in tc_transfer_flush_region decreases from 0.8% to 0.2%
in torcs on radeonsi.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoutil: use simple_mtx_t for util_range
Marek Olšák [Thu, 26 Sep 2019 01:22:45 +0000 (21:22 -0400)]
util: use simple_mtx_t for util_range

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agowinsys/radeon: initialize SIMD properties in radeon_info
Marek Olšák [Mon, 30 Sep 2019 19:14:11 +0000 (15:14 -0400)]
winsys/radeon: initialize SIMD properties in radeon_info

This was missed when I added them.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1839
Fixes: 0692ae34e93 ("ac: move ac_get_num_physical_sgprs into radeon_info")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
5 years agoiris: Drop vtbl usage for some load_register calls
Kenneth Graunke [Mon, 7 Oct 2019 20:20:36 +0000 (13:20 -0700)]
iris: Drop vtbl usage for some load_register calls

We can just call the actual functions directly.

5 years agoiris/state: Move reg/mem load/store functions earlier in file
Jordan Justen [Fri, 4 Oct 2019 08:21:45 +0000 (01:21 -0700)]
iris/state: Move reg/mem load/store functions earlier in file

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agomeson: drop unused inc_nir
Eric Engestrom [Tue, 24 Sep 2019 23:43:48 +0000 (00:43 +0100)]
meson: drop unused inc_nir

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: drop duplicate inc_nir from spirv2nir
Eric Engestrom [Tue, 24 Sep 2019 23:43:29 +0000 (00:43 +0100)]
meson: drop duplicate inc_nir from spirv2nir

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: drop duplicate inc_nir from libglsl
Eric Engestrom [Tue, 24 Sep 2019 23:43:13 +0000 (00:43 +0100)]
meson: drop duplicate inc_nir from libglsl

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: drop duplicate inc_nir from libiris
Eric Engestrom [Tue, 24 Sep 2019 23:39:22 +0000 (00:39 +0100)]
meson: drop duplicate inc_nir from libiris

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: rename libnir to _libnir to make it clear it's not meant to be used anywhere...
Eric Engestrom [Tue, 24 Sep 2019 23:44:21 +0000 (00:44 +0100)]
meson: rename libnir to _libnir to make it clear it's not meant to be used anywhere else

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: use idep_nir instead of libnir in pipe-loader
Eric Engestrom [Tue, 24 Sep 2019 23:38:02 +0000 (00:38 +0100)]
meson: use idep_nir instead of libnir in pipe-loader

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: use idep_nir instead of libnir in haiku softpipe
Eric Engestrom [Tue, 24 Sep 2019 23:37:20 +0000 (00:37 +0100)]
meson: use idep_nir instead of libnir in haiku softpipe

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: use idep_nir instead of libnir in gallium nine
Eric Engestrom [Tue, 24 Sep 2019 23:37:00 +0000 (00:37 +0100)]
meson: use idep_nir instead of libnir in gallium nine

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: use idep_nir instead of libnir in libclnir
Eric Engestrom [Tue, 24 Sep 2019 23:35:49 +0000 (00:35 +0100)]
meson: use idep_nir instead of libnir in libclnir

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: use idep_nir instead of libnir in libnouveau
Eric Engestrom [Tue, 24 Sep 2019 23:35:07 +0000 (00:35 +0100)]
meson: use idep_nir instead of libnir in libnouveau

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: add missing idep_nir_headers in iris_gen_libs
Eric Engestrom [Wed, 25 Sep 2019 06:58:07 +0000 (07:58 +0100)]
meson: add missing idep_nir_headers in iris_gen_libs

Fixes: 4929f020c37eac5b07f9 ("iris: better SBE")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agoscript: drop get_reviewer.pl
Eric Engestrom [Mon, 30 Sep 2019 21:29:55 +0000 (22:29 +0100)]
script: drop get_reviewer.pl

This script doesn't make sense anymore in the age of GitLab.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson/loader: drop unneeded *.h file
Eric Engestrom [Wed, 2 Oct 2019 12:43:21 +0000 (13:43 +0100)]
meson/loader: drop unneeded *.h file

Meson automatically tracks any file included by a file it already tracks,
and `pci_id_driver_map.h` & `loader.h` are included by `loader.c`, while
`loader_dri3_helper.h` is included by `loader_dri3_helper.c`.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoloader: use ARRAY_SIZE instead of NULL sentinel
Eric Engestrom [Wed, 2 Oct 2019 12:42:14 +0000 (13:42 +0100)]
loader: use ARRAY_SIZE instead of NULL sentinel

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoloader: s/int/bool/ for predicate result
Eric Engestrom [Wed, 2 Oct 2019 19:09:50 +0000 (20:09 +0100)]
loader: s/int/bool/ for predicate result

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoloader: replace int/1/0 with bool/true/false
Eric Engestrom [Wed, 2 Oct 2019 12:39:30 +0000 (13:39 +0100)]
loader: replace int/1/0 with bool/true/false

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoegl: replace MESA_EGL_NO_X11_HEADERS hack with upstream EGL_NO_X11
Eric Engestrom [Wed, 4 Sep 2019 12:19:32 +0000 (13:19 +0100)]
egl: replace MESA_EGL_NO_X11_HEADERS hack with upstream EGL_NO_X11

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
5 years agoiris: Drop bonus parameters from iris_init_*_context()
Kenneth Graunke [Wed, 2 Oct 2019 14:25:17 +0000 (10:25 -0400)]
iris: Drop bonus parameters from iris_init_*_context()

Nothing uses vtbl or dbg, and screen is available from the batch.

5 years agonir/constant_folding: fold load_constant intrinsics
Rhys Perry [Wed, 4 Sep 2019 16:03:18 +0000 (17:03 +0100)]
nir/constant_folding: fold load_constant intrinsics

These can appear after loop unrolling.

v2: stylistic changes
v2: replace state->mem_ctx with state->shader
v2: add bounds checking
v3: use nir_intrinsic_range() for bounds checking
v3: fix issue where partially out-of-bounds reads are replaced with undefs
v4: fix merge conflicts during rebase
v5: split into two commits
v6: set constant_data to NULL after freeing (fixes nir_sweep()/Iris)
v7: don't remove the constant data if there are no constant loads

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> (v6)
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agonir/constant_folding: add back and use constant_fold_state
Rhys Perry [Thu, 26 Sep 2019 10:19:07 +0000 (11:19 +0100)]
nir/constant_folding: add back and use constant_fold_state

Useful for load_constant folding.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agoanv: Implement VK_KHR_shader_clock
Caio Marcelo de Oliveira Filho [Fri, 19 Apr 2019 19:18:02 +0000 (12:18 -0700)]
anv: Implement VK_KHR_shader_clock

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agospirv: Implement SPV_KHR_shader_clock
Caio Marcelo de Oliveira Filho [Fri, 19 Apr 2019 19:15:16 +0000 (12:15 -0700)]
spirv: Implement SPV_KHR_shader_clock

We only have the subgroup variant in NIR (equivalent to clockARB), so
only support that for now.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agovulkan: Update the XML and headers to 1.1.124
Caio Marcelo de Oliveira Filho [Mon, 7 Oct 2019 15:19:20 +0000 (08:19 -0700)]
vulkan: Update the XML and headers to 1.1.124

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoRevert "iris: Hack up a SKL/Gen9LP PS push constant fifo depth workaround"
Kenneth Graunke [Mon, 7 Oct 2019 16:08:41 +0000 (09:08 -0700)]
Revert "iris: Hack up a SKL/Gen9LP PS push constant fifo depth workaround"

This reverts commit 4f857423b3c095516e553b976b41969c2b9721fa.

It caused GPU hangs on all affected platforms, in e.g.
Piglit bin/stencil-twoside -auto -fbo.

5 years agogitlab-ci/lava: Fix image to use in test jobs
Tomeu Vizoso [Sun, 6 Oct 2019 16:12:00 +0000 (09:12 -0700)]
gitlab-ci/lava: Fix image to use in test jobs

In the test stage, we can use any of the two container images as we
arent going to do anything architecture-dependent when submitting the
jobs to LAVA.

But if we are in a pipeline in which the images need to be rebuilt and
one finishes much earlier than the other, it could happen that the test
job that executes first fails to find the container image.

To avoid that, have each job in the test stage to use the image that has
been already implicitly built by depending on the build job for the
given arch.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
5 years agoRevert "Revert "st/dri2: Implement DRI2bufferDamageExtension""
Boris Brezillon [Mon, 7 Oct 2019 10:24:51 +0000 (12:24 +0200)]
Revert "Revert "st/dri2: Implement DRI2bufferDamageExtension""

This reverts commit 19546108d3dd5541a189e36df4ea83b3f519e48f.
This commit breaks the build because lima implements
->set_damage_region(). I guess we'll need more discussion before
removing the ->set_damage_region() hook.

5 years agoRevert "st/dri2: Implement DRI2bufferDamageExtension"
Boris Brezillon [Tue, 1 Oct 2019 14:24:27 +0000 (16:24 +0200)]
Revert "st/dri2: Implement DRI2bufferDamageExtension"

This reverts commit 492ffbed63a2a62759224b1c7d45aa7923d8f542.

BACK_LEFT attachment can be outdated when the user calls
KHR_partial_update(), leading to a damage region update on the
wrong pipe_resource object.
Let's not expose the ->set_damage_region() method until the core is
fixed to handle that properly.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
5 years agogitlab-ci: Move LAVA-related files into top-level ci dir
Tomeu Vizoso [Wed, 18 Sep 2019 14:43:30 +0000 (16:43 +0200)]
gitlab-ci: Move LAVA-related files into top-level ci dir

In preparation for testing drivers other than Panfrost in LAVA labs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agogitlab-ci: Run dEQP on devices with Panfrost
Tomeu Vizoso [Wed, 18 Sep 2019 14:03:36 +0000 (16:03 +0200)]
gitlab-ci: Run dEQP on devices with Panfrost

Include Panfrost's gitlab.ci.yml file from Mesa's main .gitlab-ci.yml so
we test on devices with Panfrost.

This uses LAVA to schedule jobs in the devices and will be the base for
testing Etnaviv, Lima, etc.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoiris: Hack up a SKL/Gen9LP PS push constant fifo depth workaround
Kenneth Graunke [Sat, 5 Oct 2019 19:02:28 +0000 (15:02 -0400)]
iris: Hack up a SKL/Gen9LP PS push constant fifo depth workaround

This is a port of Nanley's 904c2a617d86944fbdc2c955f327aacd0b3df318
from i965 to iris.

One concern is that iris uses larger batches, and also emits far fewer
commands, so we may come closer to the 500 limit within a batch, and
could need to supplement this with actual counting.  Manhattan 3.0 had
239 3DSTATE_CONSTANT_PS packets in a batch,  Unigine Valley had 155.
So it seems like we're still in the realm of safety.

5 years agoiris: Refactor push constant allocation so we can reuse it
Kenneth Graunke [Sat, 5 Oct 2019 18:48:46 +0000 (14:48 -0400)]
iris: Refactor push constant allocation so we can reuse it

We'll need this for a workaround shortly.  While refactoring, also
improve the comment slightly.

5 years agointel/isl: set vertical surface alignment on null surfaces
Lionel Landwerlin [Fri, 4 Oct 2019 12:51:54 +0000 (15:51 +0300)]
intel/isl: set vertical surface alignment on null surfaces

Just following the spec. Somewhat unclear whether this applies to NULL
surfaces.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/isl: set surface array appropriately
Lionel Landwerlin [Fri, 4 Oct 2019 12:47:49 +0000 (15:47 +0300)]
intel/isl: set surface array appropriately

This doesn't seem to affect anything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/isl: Set null surface format to R32_UINT
Lionel Landwerlin [Fri, 4 Oct 2019 10:12:44 +0000 (13:12 +0300)]
intel/isl: Set null surface format to R32_UINT

It appears we never had a test in piglit or deqp sampling from a null
surface...

It turns out this triggers a hang on IVB only. Updating the null
surface format to R32_UINT fixes the hang on ivb and doesn't affect
other platforms, so set it by default for all platforms.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/1872
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoetnaviv: set texture INT_FILTER bit
Jonathan Marek [Thu, 12 Sep 2019 20:49:59 +0000 (16:49 -0400)]
etnaviv: set texture INT_FILTER bit

This should improve texture sampling performance on GC3000.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
5 years agoetnaviv: implement texture comparator
Jonathan Marek [Thu, 12 Sep 2019 20:46:02 +0000 (16:46 -0400)]
etnaviv: implement texture comparator

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
5 years agoetnaviv: update headers from rnndb
Jonathan Marek [Thu, 12 Sep 2019 20:41:22 +0000 (16:41 -0400)]
etnaviv: update headers from rnndb

Update to etna_viv commit 7ff8029.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
5 years agointel: fix subslice computation from topology data
Lionel Landwerlin [Fri, 4 Oct 2019 16:37:14 +0000 (19:37 +0300)]
intel: fix subslice computation from topology data

We're missing the offset of the slice in the subslice mask...

This worked for most platforms that don't have first slice fused off
because we would reread the same mask from slice0 again and again...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c1900f5b0f ("intel: devinfo: add helper functions to fill fusing masks values")
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/1869
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
5 years agodri: Avoid swapbuffer throttling in glXCopySubBufferMESA
Kenneth Graunke [Thu, 3 Oct 2019 16:16:50 +0000 (12:16 -0400)]
dri: Avoid swapbuffer throttling in glXCopySubBufferMESA

We were supplying __DRI2_THROTTLE_SWAPBUFFER, rather than the obvious
choice of __DRI2_THROTTLE_COPYSUBBUFFER.  This meant that we hit the
swap-based frame throttling.  glXCopySubBuffer doesn't seem like it's
intended to be a frame boundary, so we'd like to avoid this throttling.

Tested-by: Michel Dänzer <mdaenzer@redhat.com> # DRI3 only
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
5 years agost/dri: Perform MSAA downsampling for __DRI2_THROTTLE_COPYSUBBUFFER
Kenneth Graunke [Thu, 3 Oct 2019 16:11:22 +0000 (12:11 -0400)]
st/dri: Perform MSAA downsampling for __DRI2_THROTTLE_COPYSUBBUFFER

glXCopySubBufferMESA copies data from the back buffer to the front,
so it needs to perform a MSAA downsampling operation just like
glXSwapBuffers would.

Currently, the CopySubBuffer implementations supply a throttle reason
of __DRI2_THROTTLE_SWAPBUFFERS, so they hit this path and work today.
But we'd like to avoid swapbuffer throttling in this case, so the next
patch will change that reason.

Tested-by: Michel Dänzer <mdaenzer@redhat.com> # DRI3 only
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
5 years agoscons/MSYS2-MinGW-W64: Fix build options defaults
Prodea Alexandru-Liviu [Sat, 5 Oct 2019 08:43:13 +0000 (08:43 +0000)]
scons/MSYS2-MinGW-W64: Fix build options defaults
Signed-off-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
When building in a MSYS2 Mingw-w64 environment Mesa3D sets wrong default build options which inevitably lead to build failure.

5 years agointel/error2aub: add support for platforms without PPGTT
Lionel Landwerlin [Thu, 3 Oct 2019 09:21:47 +0000 (12:21 +0300)]
intel/error2aub: add support for platforms without PPGTT

Not much to do to enable this, just make sure to always write to the
GGTT :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoaco: fix load_constant with multiple arrays
Rhys Perry [Sat, 21 Sep 2019 15:36:32 +0000 (16:36 +0100)]
aco: fix load_constant with multiple arrays

I thought I fixed this, but I guess I must have broken it again.

Fixes various dEQP-VK.draw.* tests

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
5 years agonir: Fix some wonky whitespace in nir_search.h.
Eric Anholt [Mon, 16 Sep 2019 22:18:28 +0000 (15:18 -0700)]
nir: Fix some wonky whitespace in nir_search.h.

Reviewed-by: Ian Romanick <ian.d.romainck@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir: Factor out most of the algebraic passes C code to .c/.h.
Eric Anholt [Mon, 23 Sep 2019 21:36:32 +0000 (14:36 -0700)]
nir: Factor out most of the algebraic passes C code to .c/.h.

Working on the algebraic implementation, I was being driven nuts by my
editor not highlighting and handling indentation for the C code.  It turns
out that it's basically not pass-specific code, and we can move it over to
the relevant .c file.  Replaces 30KB of code with 34KB of data on my i965
build.  No perf diff on shader-db (n=3)

Reviewed-by: Ian Romanick <ian.d.romainck@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir: Keep the range analysis HT around intra-pass until we make a change.
Eric Anholt [Mon, 23 Sep 2019 22:40:46 +0000 (15:40 -0700)]
nir: Keep the range analysis HT around intra-pass until we make a change.

This lets us memoize range analysis work across instructions.  Reduces
runtime of shader-db on Intel by -30.0288% +/- 2.1693% (n=3).

Fixes: 405de7ccb6cb ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir: Skip emitting no-op movs from the builder.
Eric Anholt [Mon, 16 Sep 2019 21:34:20 +0000 (14:34 -0700)]
nir: Skip emitting no-op movs from the builder.

Having passes generate these is just making more work for copy
propagation (and thus probably calling more optimization passes)
later.  Noticed while trying to debug nir_opt_algebraic()
top-to-bottom having O(n^2) behavior due to not finding new matches in
replacement code.

Reviewed-by: Ian Romanick <ian.d.romainck@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir: Make nir_search's dumping go to stderr.
Eric Anholt [Mon, 16 Sep 2019 21:27:24 +0000 (14:27 -0700)]
nir: Make nir_search's dumping go to stderr.

Reviewed-by: Ian Romanick <ian.d.romainck@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agosurfaceless: Support EGL_WL_bind_wayland_display
Adam Jackson [Thu, 3 Oct 2019 14:10:59 +0000 (10:10 -0400)]
surfaceless: Support EGL_WL_bind_wayland_display

Feature parity with the drm, x11, and wayland platforms.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/1870
Tested-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
5 years agonir/print: always use the right FILE *
Rhys Perry [Thu, 3 Oct 2019 18:09:24 +0000 (19:09 +0100)]
nir/print: always use the right FILE *

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agonir: initialize needs_helper_invocations as well
Erik Faye-Lund [Thu, 3 Oct 2019 19:45:41 +0000 (15:45 -0400)]
nir: initialize needs_helper_invocations as well

Similar to the previous commit, we should also initialize
needs_helper_invocations here.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agonir: initialize uses_discard to false
Erik Faye-Lund [Mon, 8 Apr 2019 12:59:39 +0000 (14:59 +0200)]
nir: initialize uses_discard to false

This matches what we do for uses_sample_qualifier, and what we
do in ir_set_program_inouts.cpp as well.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoradv/aco,aco: set lower_fmod
Rhys Perry [Thu, 3 Oct 2019 14:32:19 +0000 (15:32 +0100)]
radv/aco,aco: set lower_fmod

This simplifies ACO and allows the lowered code to be optimized (in
particular, constant folded).

Totals from affected shaders:
SGPRS: 1776 -> 1776 (0.00 %)
VGPRS: 1436 -> 1436 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 203452 -> 203564 (0.06 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 103 -> 103 (0.00 %)

At least some of the code size increase seems to be from literals being
applied to instructions as a result of constant folding.

v2: remove fmod/frem handling in init_context()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
5 years agoscons/windows: Fix build with LLVM>=8
Prodea Alexandru-Liviu [Fri, 4 Oct 2019 13:48:08 +0000 (13:48 +0000)]
scons/windows: Fix build with LLVM>=8

Fixes eebe091d292609de8aaf5b5c537d867b23908947
("scons/windows: Enable compute shaders when possible.")
Signed-off-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agodri3: Pass __DRI2_THROTTLE_COPYSUBBUFFER from loader_dri3_copy_drawable
Michel Dänzer [Thu, 3 Oct 2019 10:23:45 +0000 (12:23 +0200)]
dri3: Pass __DRI2_THROTTLE_COPYSUBBUFFER from loader_dri3_copy_drawable

0 is __DRI2_THROTTLE_SWAPBUFFER, which doesn't really make sense here.

Avoids dri_flush() throttling twice for the same glFlush call with front
buffer rendering, as described in
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2057 .

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agor600: Fix interpolateAtCentroid
Gert Wollny [Wed, 28 Aug 2019 08:48:04 +0000 (10:48 +0200)]
r600: Fix interpolateAtCentroid

If the instruction interpolateAtCentroid is used the extra interpolator
must also be enabled in the state.

Fixes: fs-interpolateatcentroid-block
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
5 years agomeson: Only error building gallium video without libdrm when the platform is drm
Dylan Baker [Thu, 3 Oct 2019 17:17:08 +0000 (10:17 -0700)]
meson: Only error building gallium video without libdrm when the platform is drm

Fixes: 3b265f61f5f61f08718fe5bb4b2726f9b8e016cc
       ("meson: gallium media state trackers require libdrm with x11")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1878
Tested-by: Vinson Lee <vlee@freedesktop.org>
5 years agopan/midgard: Replace mir_is_live_after with new pass
Alyssa Rosenzweig [Fri, 4 Oct 2019 01:42:09 +0000 (21:42 -0400)]
pan/midgard: Replace mir_is_live_after with new pass

Now that we have live_out calculated per block as metadata, calculating
liveness of an instruction at a given point in the program becomes O(n)
to the size of the block worst-case, rather than O(n) the program.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopan/midgard: Calculate temp_count for liveness
Alyssa Rosenzweig [Fri, 4 Oct 2019 01:51:27 +0000 (21:51 -0400)]
pan/midgard: Calculate temp_count for liveness

This needs to be correct or the analysis fails.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopan/midgard: Invalidate liveness for mir_is_live_after
Alyssa Rosenzweig [Fri, 4 Oct 2019 01:29:59 +0000 (21:29 -0400)]
pan/midgard: Invalidate liveness for mir_is_live_after

Callers should have liveness info ready. Ideally we'd have a nice
metadata tracking framework like NIR to handle this automatically, but
for now this will allow us to make forward progress... when we're about
to do something with liveness, invalidate everything ahead to force a
clean calculation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopan/midgard: Begin tracking liveness metadata
Alyssa Rosenzweig [Fri, 4 Oct 2019 01:16:56 +0000 (21:16 -0400)]
pan/midgard: Begin tracking liveness metadata

This will allow us to explicitly invalidate liveness analysis results so
we can cache liveness results.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopan/midgard: Don't try to OR live_in of successors
Alyssa Rosenzweig [Thu, 3 Oct 2019 20:13:13 +0000 (16:13 -0400)]
pan/midgard: Don't try to OR live_in of successors

By definition, once liveness analysis has occurred:

   live_out = OR {succ} succ->live_in

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopan/midgard: Move RA's liveness analysis into midgard_liveness.c
Alyssa Rosenzweig [Thu, 3 Oct 2019 20:10:03 +0000 (16:10 -0400)]
pan/midgard: Move RA's liveness analysis into midgard_liveness.c

There are unfortunately two distinct liveness analysis passes in the
compiler right now -- one good (but complex) pass used by RA based on
solving data flow equations, and one awful (but simple) pass used for
dead code elimination and bundling based on an abstract walk of the AST.

Let's move RA's pass into shared code so we can work on unifying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopan/midgard: Add mir_calculate_temp_count helper
Alyssa Rosenzweig [Fri, 4 Oct 2019 01:51:05 +0000 (21:51 -0400)]
pan/midgard: Add mir_calculate_temp_count helper

This allows us to fill in ctx->temp_count explicitly, even if we haven't
squished down the MIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopan/midgard: Remove mir_has_multiple_writes
Alyssa Rosenzweig [Thu, 3 Oct 2019 20:01:51 +0000 (16:01 -0400)]
pan/midgard: Remove mir_has_multiple_writes

We already enforce this with the SSA/register distinction in the
backend. There is no need to duplicate this logic merely for an assert.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years ago.mailmap: add a couple of aliases for Jakob Bornecrantz
Erik Faye-Lund [Mon, 16 Sep 2019 17:24:38 +0000 (19:24 +0200)]
.mailmap: add a couple of aliases for Jakob Bornecrantz

Reviewed-by: Jakob Bornecrantz <jakob@collabora.com>
5 years ago.mailmap: add an alias for Tomeu Vizoso
Erik Faye-Lund [Mon, 16 Sep 2019 18:00:46 +0000 (20:00 +0200)]
.mailmap: add an alias for Tomeu Vizoso

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>