mesa: Add missing null checks into prog_hash_table.c

Check calloc return values in hash_table_insert() and
hash_table_replace()

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glcpp: link with tests/common.c

So that prog_hash_table can use _mesa_error_no_memory function.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

mesa/main: Add missing null check in _mesa_CreatePerfQueryINTEL()

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>

mesa/drivers: Add extra null check in blitframebuffer_texture()

If texObj == NULL here it mean there is already GL_INVALID_VALUE
or GL_OUT_OF_MEMORY error set to context.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Add null check in loop_analysis.cpp

Check return value from hash_table_find before using it as a pointer

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: add missing null check in _mesa_NewHashTable()

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

loader: add optional /sys filesystem method for PCI identification.

Introduce a simple PCI identification method of looking up the answer
the /sys filesystem (available on Linux).  Attempted after libudev, but
before DRM.

Disabled by default (available only when the --enable-sysfs configure
option is specified).

Signed-off-by: Gary Wong <gtw@gnu.org>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>

loader: allow attempting more than one method of PCI identification.

loader_get_pci_id_for_fd() and loader_get_device_name_for_fd() now attempt
all available strategies to identify the hardware, instead of conditionally
compiling in a single test.  The existing libudev and DRM approaches have
been retained, attempting first libudev (if available) and then DRM (if
necessary).

Signed-off-by: Gary Wong <gtw@gnu.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

st/egl: do not link against libloader

Move the link to the final targets, like any other place in
mesa/gallium. This allows better visibilty and will prevent
us from including the library archive twice.

Resolves multiple definition of `loader_get_pci_id_for_fd'

multiple definition of `loader_get_pci_id_for_fd'

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79263
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79382
Cc: Chia-I Wu <olv@lunarg.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chia-I Wu <olv@lunarg.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

egl_dri2: fix wayland_platform when drm_platform is not set

The build fails with implicit delaration of drmGetCap (xf86drm.h)
Were we're including the header only when building the DRM_PLATFORM.

Wayland backend can operate without DRM_PLATFORM so replace the
guard, and fold in drmGetCap() usage to silence compiler warnings.

Cc: Chad Versace <chad.versace@linux.intel.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

i965/fs: Set correct number of regs_written for MCS fetches.

regs_written is in units of virtual GRFs.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glx: load dri driver with RTLD_LOCAL so dlclose never fails to unload

There is no reason anymore to load with RTLD_GLOBAL and for some driver
this even result in dlclose failing to unload leading to catastrophic
failure with swrast fallback.

Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>

i915g: Support B5G5R5A1 render targets and textures

i915g: Support R4G4B4A4 render targets and textures

i915g: Fix copy region code

This fixes a few issues with it, also cleans up the code.

glsl/tests: remove generated tests from the repo

They were made unneccesary by the last commit.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl/tests: call create_test_cases.py in optimization-test

This way, when someone modifies create_test_cases.py and forgets to
commit their changes again, people will notice.

v2: make sure we parse the right directories and check for existance the
right way.

v3 (Ken): Use $PYTHON2 instead of calling python directly.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl/tests/lower_jumps: fix generated sexpr's for loops

In 088494aa (as well as other commits in the series) Paul Berry modified
the tests for lower_jumps to account for the fact that the s-expression
for the loop IR instruction changed from
(loop () () () () (statements...)) to (loop (statements...)), but he
forgot to update create_test_cases.py which he used to create the tests.
Fix that, so that now create_test_cases.py is synced with the generated
tests.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: be more consistent about printing constants

Make sure that we print the same number of digits when printing 0.0 as
any other floating-point number. This will make generating expected
output files for tests easier. To avoid breaking "make check," update
the generated tests for lower_jumps before the next commit which will
bring create_test_cases.py in line with them.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: replace strncmp("gl_") calls with new is_gl_identifier() helper

Makes things a little easier to read.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: fix use-after free bug/crash in ast_declarator_list::hir()

The call to get_variable_being_redeclared() may delete 'var' so we
can't reference var->name afterward.  We fix that by examining the
var's name before making that call.

Fixes valgrind warnings and possible crash when running the piglit
tests/spec/glsl-1.30/execution/clipping/vs-clip-distance-in-param.shader_test
test (and probably others).

Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Fix repeated usage of rectangle texture coordinate scaling.

Previously, we set up new entries in the params[] array on every access
of a rectangle texture.  Unfortunately, we only reserve space for
(2 * MaxTextureImageUnits) extra entries, so programs which accessed
rectangle textures more times than that would write off the end of the
array and likely crash.

We don't really have a decent mapping between the index returned by
_mesa_add_state_reference and our index into the params array, so we
have to manually search for it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78691
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: mesa-stable@lists.freedesktop.org

egl-static: Fix undefined reference to `loader_*'

Trivial.  Better than a broken build.

meta/blit: Use gl_FragColor also in the msaa blit shader

Fixes framebuffer_blit_functionality_multisampled_to_singlesampled_blit
es3 cts test on bdw. Also fixes this on ivb when ivb is forced to use
the meta path.

No piglit regressions on IVB.

Further input from Ken:

 "Unfortunately, this doesn't fix MRT for integer data.

  In the single-sampled case, since we're directly copying data, we were
  read/copy/write data as "float" values, which actually contained the
  integer bits.  Here, we can't do that since we need to process the
  actual integer data.

  I do wonder if we could use intBitsToFloat/uintBitsToFloat to stuff the
  integer bits in the float gl_FragColor output.  Just a crazy idea.

  In the long term (post 10.2), I think we should draft an extension that
  allows you to do "layout(location = all)" on user-defined fragment
  shader outputs.  (Or some similar syntax.)"

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

nvc0/ir: use SM35 ISA with GK20A

GK20A is mostly compatible with GK104, but uses the SM35 ISA. Use
the GK110 path when this chip is detected.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: add GK20A 3D class

GK20A is mostly compatible with GK104, but features a new 3D
class. Add it to the relevant header and use it when GK20A is
detected.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965/sf: Replace push/pop in brw_emit_anyprim_setup.

Each of the subroutine emitters alter the predication state, but
otherwise don't change anything (or put it back when they do).
Resetting predication at the end makes these functions idempotent with
regard to the default instruction state - which is a nice property.

With that in place, push/pop is no longer necessary.

v2: Improve whitespace (requested by Matt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/sf: Drop unnecessary push/pop in copy_z_inv_w.

brw_MOV doesn't alter the default instruction state, so this does
nothing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/sf: Drop unnecessary push/pop in flatshading code.

brw_JMPI sets predicate_control to BRW_PREDICATE_NONE, but that's
already the value coming in.  Otherwise, nothing changes state.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/sf: Move brw_compile::flag_value to brw_sf_compile.

This field is only used to track the current value of the flag register
during the SF compile.  It has no place in the common compiler code.

While we're changing every call, drop the 'brw' prefix from the function
since it's static.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/sf: Move brw_set_predicate_control_flag_value to brw_sf_emit.c.

Only the Gen4-5 SF program compiler actually uses this function; move
it there.  Soon the fields will be moved out of brw_compile.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/sf: Drop useless push/pop state from flag register mashing code.

There's no point in pushing and popping the default state; the code
between the two stack operations doesn't alter anything.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/sf: Drop unnecessary push/pop in do_twoside_color.

None of the assembly emitters called between push and pop actually
change the state.  So, we can drop these.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Don't implicitly set predicate default state in brw_CMP.

Previously, brw_CMP with a null destination implicitly set the default
state to make future instructions predicated.  This is messy and
confusing - emitting a CMP that populates the flag register and later
using it to predicate instructions are logically separate.  With the
main compiler, we may even schedule instructions between the CMP and the
user of the flag value.

This patch simplifies brw_CMP to just emit a CMP instruction, and not
mess with predication.  It also updates all necessary callers.  These
mostly fell into two patterns:

1. brw_CMP followed by brw_IF.

   We don't need to do anything special here; brw_IF already sets up
   predication appropriately.

2. brw_CMP followed by a single predicated instruction.

   The old model was to call brw_CMP, emit the next (predicated)
   instruction, then disable predication for any instructions beyond
   that.  Instead, just explicitly set predicate_control on the single
   instruction we want to predicate.  It's no more code, and requires
   less cross-module knowledge.

This drops setting flag_value to 0xff as well, which is a field only
used by the SF compile.  There is only one brw_CMP call in the SF code,
which is in do_twoside_caller, and called at the start of
brw_emit_tri_setup, where flag_value is already 0xff.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Drop unnecessary predication default state resets in clip code.

Presumably, this was to reset the default state of predication_control
from brw_CMP.  But brw_CMP only sets that if dst is ARF null, which it
isn't here.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/sf: Reset flag_value to 0xff before emitting SF subroutines.

When compiling any of the SF program variants, flag_value starts off as
0xff and will be modified when generating code.

brw_emit_anyprim_setup emits several subroutines, saving and restoring
flag_value across each of them.  Since it starts out as 0xff, this is
equivalent to simply setting it to 0xff at the start of each subroutine.

Resetting the value makes more logical sense; each subroutine doesn't
know whether one of the others even executed, much less what it did
to the flag register.

This also lets us to drop the brw_set_predicate_control_flag_value call
from brw_init_compile: predicate is already initialized to
BRW_PREDICATE_NONE by the memset, and the value of flag_value is
irrelevant (as it's only used by the SF compiler).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

st/omx/enc: implement restricted b frames pattern

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

radeon/vce: implement non-referenced frames

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

vl: add interface for non-referenced frames

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

i965/meta: Store stencil texturing mode

Meta path needs to keep the current texture object's state. Fixes
the following gles3 cts tests on bdw:

framebuffer_blit_functionality_negative_width_blit.test: fail
framebuffer_blit_functionality_all_buffer_blit.test: fail
framebuffer_blit_functionality_negative_height_blit.test: fail
framebuffer_blit_functionality_missing_buffers_blit.test: fail
framebuffer_blit_functionality_negative_dimensions_blit.test: fail
framebuffer_blit_functionality_minifying_blit.test: fail
framebuffer_blit_functionality_magnifying_blit.test: fail

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

meta/blit: Add stencil texturing mode save and restore

v2 (Ken): Only restore the mode if it has changed.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i915g: Fix shader disasm code

This broke when I separated declarations/shader.

i915g: Fallback to sw for npot copies

i915g's npot support is incomplete, so let's not use it for copies.
This fixes a bunch of piglit tests.

i915g: handle more formats in copy

We can handle depth, luminance,... copies by simply replacing the
format with a known format of the same bpp.

nvc0: implement clear_buffer

Provide an accelerated path for ARB_clear_buffer_object

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965: Switch types D->UD when possible to allow compaction.

Number of compacted instructions: 827404 -> 833045 (0.68%)

Reviewed-by: Eric Anholt <eric@anholt.net>

Revert "i965: Don't make instructions with a null dest a barrier to scheduling."

This reverts commit 42a26cb5e441a01d5288b299980f23affaad53fe.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78648

Revert "i965/fs: Simplify interference scan in register coalescing."

This reverts commit 5ff1e446d44bb9d50f84883c7058635cb070e069.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77704

Revert "i965/fs: Give up in interference check if we see a WHILE."

This reverts commit 55de1c035cbca2b7087b3aa21a8c3dfc900a4ad9.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>

Revert "i965/fs: Reduce restrictions on interference in register coalescing."

This reverts commit f770123f58b46459e8dbd27525162ee8ba89f30b.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78692

nvc0: revert mistaken logic to collapse color outputs to the beginning

In commit af38ef907, I added a "fix" to color outputs not being assigned
correctly when sample mask was being output. This was totally wrong --
the color indices (i.e. "si" values) were the ones that were wrong. Undo
that hunk.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>

mesa/st: fix color outputs in presence of sample mask output

Commit c5d822dad90 added support for sample mask incorrectly. It became
treated as a color output, and messed up the color output indices.
Revert the hunk that did that, and add explicit support just like for
depth/stencil writes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Marek Olšák <marek.olsak@amd.com>

freedreno/a3xx: texture fixes

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno: update generated headers

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno: few caps fixes

Signed-off-by: Rob Clark <robclark@freedesktop.org>

mesa/x86: Fix build with clang <= 3.3.

clang <= 3.3 cpuid.h does not define contants for feature bits.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79095
Signed-off-by: Vinson Lee <vlee@freedesktop.org>

i965: Don't treat HW_REGs as barriers if they're immediates.

We had a handful of cases where we'd used brw_imm_*() to generate an
immediate, rather than fs_reg(). We shouldn't do that but we shouldn't
limit scheduling flexibility on account of immediate arguments either.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Don't use brw_imm_* unnecessarily.

Using brw_imm_* creates a source with file=HW_REG, and the scheduler
inserts barrier dependencies when it sees HW_REG. None of these are
hardware-registers in the sense that they're special and scheduling
shouldn't touch them. A few of the modified cases already have HW_REGs
for other sources, so it won't allow extra flexibility in some cases.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

automake: correctly append the version-script

Turns out that the AC conditional did not include the
the version-scripts as expected. Rather it truncated
the remaining linker flags.

Cc: Jon TURNEY <jon.turney@dronecode.org.uk>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jon TURNEY <jon.turney@dronecode.org.uk>

targets/libgl-xlib: hide all the exported symbol mayhem

Leave only the gl/glx and mangled gl symbols.
XMesa* was never an official interface and the only
user of it was mesa-demos, while they were still in
the same repo as mesa.

v2: Conditionally use the version-script.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

targets/osmesa: include mangled gl symbols

Missed out with commit d4c3968c25885f6eb53dee4cc0c60d8d3f8fec32

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

targets/xa: limit the amount of exported symbols

In the presence of LLVM the final library exports every symbol from
the llvm namespace. Resolve this by using a version script (w/o the
version/name tag).

Considering that there are only ~35 symbols, explicitly list them
to minimize the chances of rogue symbols sneaking in.

v2: Conditionally include the version-script.

Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> (v1)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

dri_util: keep __dri2ConfigOptions symbol private

The symbol was added with commit 45e2b51c853(DRI2/GLX: check for
vblank_mode in DRI2 GLX code) but was never used as such according
to git log.

Possibly it was marked as public due to confusion with
__driConfigOptions which was used for dri1 drivers.

Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

targets/opencl: Fix (static) linking with LLVM (v2)

Without this, I get linking failures (static linking).

The static linking is sort of required for me, because otherwise Steam and
applications using the Steam runtime regularily fail because my LLVM was
compiled and linked against a newer libgcc_s, libstdc++, etc. and uses
features from those newer versions. And instead of Steam just not
starting, my X starts crashing, whenever libGL fails to load a (32 bit)
driver.

Since I hate crashes of X and I don't think Valve/Steam will behave like
a proper distribution soon (rebuilds versus current Debian Testing, since
they base their Steam OS off that), I need a radeonsi which carries its
own LLVM within and doesn't care about what the runtime sets. This means
linking Mesa statically.

v1 → v2: Move logic to configure.ac

Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>

glx: do not leak dri3Display

v2: Do not wrap the code in ifdef HAVE_DRI3 (suggested by Keith)

Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

gallium/egl: st_profiles are build time decision, treat them as such

The profiles are present depending on the defines at build time.
Drop the extra functions and feed the defines directly into the
state-tracker at build time.

v2: Drop unused variable i.

Acked-by: Chia-I Wu <olvaffe@gmail.com> (v1)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

dri_util: set implemented version of the DRI_CORE extension

... rather than the one defined in our internal interface (dri_interface.h)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

i965/fs: Don't modify ann_count if not debugging.

If we make ann_count non-zero, annotation_finalize() won't bail.

Not modifying it seems to make the code more clear than would modifying
annotation_finalize().

Revert "i965/fs: Change fs_visitor::emit_lrp to use MAC for gen<6"

This reverts commit a6860100b87415ab510d0d210cabfeeccebc9a0a.

Why this code didn't work in all circumstances is unknown and without a
working Ironlake simulator (which uses a different AUB format) we'll
probably never know, short of a lot of experimentation, and spending a
bunch of time to try to optimize a few instructions on Ironlake is not
time well spent.

Moreover, for mix(vec4, vec4, vec4) using the accumulator introduces a
dependence between the otherwise independent per-component calculations.
Not using the accumulator, even if it means an extra instruction per
component might be preferable. We don't know, we don't have data, and
we don't have the necessary register on Ironlake for shader_time to tell
us.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77707
Acked-by: Kenneth Graunke <kenneth@whitecape.org>

Revert "i965/vec4: Change vec4_visitor::emit_lrp to use MAC for gen<6"

This reverts commit 2dfbbeca50b95ccdd714d9baa4411c779f6a20d9 with the
comment about MAC and implicit accumulator removed.

Why this code didn't work in all circumstances is unknown and without a
working Ironlake simulator (which uses a different AUB format) we'll
probably never know, short of a lot of experimentation, and spending a
bunch of time to try to optimize a few instructions on Ironlake is not
time well spent.

Moreover, for mix(vec4, vec4, vec4) using the accumulator introduces a
dependence between the otherwise independent per-component calculations.
Not using the accumulator, even if it means an extra instruction per
component might be preferable. We don't know, we don't have data, and
we don't have the necessary register on Ironlake for shader_time to tell
us.

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77703
Acked-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Remove useless typo'd debugging messages.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move brw_land_fwd_jump() to compilation unit of its use.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Use next_insn_offset rather than nr_insn.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Emit 0.0:F sources with type VF instead.

Number of compacted instructions: 817752 -> 827404 (1.18%)

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Emit ARF:UD for non-present src1 on Gen6+.

Enables the next commits to compact more instructions.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Support compacted instructions with immediate sources.

Note the weirdness with src1 subregs. The compacted immediate fields are
uncompacted to bits [127:96] and the high five bits of the subreg
mapping maps to bits [100:96].

Number of compacted instructions: 790085 -> 817752 (3.50%)

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Use next_offset() in instruction compaction code.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Move next_offset() to brw_eu.h for use elsewhere.

Also perform arithmetic on char* rather than void* since the latter is a
GNU C extension not available in C++.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Rename next_ip() -> next_offset().

That we were comparing its return value with offsets should have been a
clue. :)

Make it take a void *store in preparation for making the function useful
elsewhere.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Print disassembly after compaction.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965/fs: Make patch_discard_jumps_to_fb_writes return bool.

... to tell us whether it emitted any code. Will be used to determine
whether we need to skip an annotation for it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

i965: Add annotation data structure and support code.

Will be used to print disassembly after jump targets are set and
instructions are compacted, while still retaining higher-level IR
annotations and basic block information.

An array of 'struct annotation' will live along side the generated
assembly. The generators will populate the array with their IR
annotations, and basic block pointers if the instructions began or ended
a basic block pointer.

We'll then update the instruction offset when we compact instructions
and then using the annotations print the disassembly.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965/fs+blorp: Remove left over dump_file arguments.

Were used by the blorp unit test programs.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

i965/fs: Don't hardcode DEBUG_WM in generic fs code.

Similar to Paul's commit e9fa3a944 except brw_fs_generator's debug_flag
is for DEBUG_WM and DEBUG_BLORP.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Pass in start_offset to brw_compact_instructions().

Let's us avoid recompacting the SIMD8 instructions when we compact the
SIMD16 program.

Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Delete unused brw_blorp_blit_test_compile().

i965/cfg: Make DO instruction begin a basic block.

The DO instruction doesn't exist on Gen6+. Since before this commit, DO
always ended a basic block, if it also happened to start one (e.g., a
while loop inside an if statement) the block containing only the DO
would actually contain no hardware instructions.

Pre-Gen6's WHILE instructions jumps to the instruction following the DO,
so strictly speaking we won't be modeling that properly, but I claim
there is actually no functional difference.

This will simplify an upcoming change where we want to mark the first
hardware instruction in the loop as beginning a block, and the last
instruction before the loop as ending one.

Reviewed-by: Eric Anholt <eric@anholt.net>

darwin: Guard Core Profile usage behind a testing envvar

Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>

darwin: Write errors in choosing the pixel format to the crash log

Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>

nv50: count wrapped textures towards the tex_obj count

But don't count their size towards the allocated memory, since that
belongs to whoever created it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: assert that we have vertex elements state

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: use PRIxPTR for sizeof()

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50,nvc0: allow 15,16,30 bpp display formats

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50,nvc0: handle guard band defines

[imirkin: moved default case out of switch]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir/tgsi: optimize KIL

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv50/ir: fix lowering of predicated instructions (without defs)

Note that predicated instructions with defs are still not supported
because transformation to SSA doesn't handle them yet.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv50/ir/opt: fix constant folding with saturate modifier

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv50,nvc0: set constbufs dirty on pipe context switch

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv50: setup scissors on clear_render_target/depth_stencil

[imirkin: add logic to also clear the "regular" scissors]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>