Luke Kenneth Casson Leighton [Sun, 1 Oct 2023 15:05:30 +0000 (16:05 +0100)]
whoops should be 5x3 comment not 5x3
Shriya Sharma [Tue, 3 Oct 2023 11:13:35 +0000 (12:13 +0100)]
Added English Language description for stdupx instruction
Shriya Sharma [Tue, 3 Oct 2023 11:12:38 +0000 (12:12 +0100)]
Added English Language description for stdup instruction
Shriya Sharma [Tue, 3 Oct 2023 11:11:43 +0000 (12:11 +0100)]
Added English Language description for stwupx instruction
Shriya Sharma [Tue, 3 Oct 2023 11:10:47 +0000 (12:10 +0100)]
Added English Language description for stwup instruction
Shriya Sharma [Tue, 3 Oct 2023 11:09:34 +0000 (12:09 +0100)]
Added English Language description for sthupx instruction
Shriya Sharma [Tue, 3 Oct 2023 11:05:50 +0000 (12:05 +0100)]
Added spaces for sthup instruction
Shriya Sharma [Tue, 3 Oct 2023 11:04:59 +0000 (12:04 +0100)]
Added English Language description for sthup instruction
Shriya Sharma [Tue, 3 Oct 2023 11:04:14 +0000 (12:04 +0100)]
Added English Language description for stbupx instruction
Shriya Sharma [Tue, 3 Oct 2023 11:03:18 +0000 (12:03 +0100)]
Added English Language description for stbup instruction
Shriya Sharma [Tue, 3 Oct 2023 10:39:03 +0000 (11:39 +0100)]
Added English Language description for stfiwx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:37:36 +0000 (11:37 +0100)]
Added English Language description for stfdux instruction
Shriya Sharma [Tue, 3 Oct 2023 10:36:42 +0000 (11:36 +0100)]
Added English Language description for stfdu instruction
Shriya Sharma [Tue, 3 Oct 2023 10:35:44 +0000 (11:35 +0100)]
Added English Language description for stfdx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:35:02 +0000 (11:35 +0100)]
Added English Language description for stfd instruction
Shriya Sharma [Tue, 3 Oct 2023 10:34:11 +0000 (11:34 +0100)]
Added English Language description for stfsux instruction
Shriya Sharma [Tue, 3 Oct 2023 10:33:18 +0000 (11:33 +0100)]
Added English Language description for stfsu instruction
Shriya Sharma [Tue, 3 Oct 2023 10:32:22 +0000 (11:32 +0100)]
Added English Language description for stfsx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:31:27 +0000 (11:31 +0100)]
Added English Language description for stfs instruction
Shriya Sharma [Tue, 3 Oct 2023 10:29:58 +0000 (11:29 +0100)]
Added English Language description for lfiwzx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:29:02 +0000 (11:29 +0100)]
Added English Language description for lfiwax instruction
Shriya Sharma [Tue, 3 Oct 2023 10:28:02 +0000 (11:28 +0100)]
Added English Language description for lfdux instruction
Shriya Sharma [Tue, 3 Oct 2023 10:26:57 +0000 (11:26 +0100)]
Added English Language description for lfdu instruction
Shriya Sharma [Tue, 3 Oct 2023 10:26:07 +0000 (11:26 +0100)]
Added English Language description for lfdx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:25:09 +0000 (11:25 +0100)]
Added English Language description for lfd instruction
Shriya Sharma [Tue, 3 Oct 2023 10:24:12 +0000 (11:24 +0100)]
Added English Language description for lfsux instruction
Shriya Sharma [Tue, 3 Oct 2023 10:22:54 +0000 (11:22 +0100)]
Added English Language description for lfsu instruction
Shriya Sharma [Tue, 3 Oct 2023 10:21:55 +0000 (11:21 +0100)]
Added English Language description for lfsx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:21:02 +0000 (11:21 +0100)]
Added English Language description for lfs instruction
Shriya Sharma [Tue, 3 Oct 2023 10:17:28 +0000 (11:17 +0100)]
Added English Language description for stmw instruction
Shriya Sharma [Tue, 3 Oct 2023 10:16:18 +0000 (11:16 +0100)]
Added English Language description for stdbrx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:14:22 +0000 (11:14 +0100)]
Added English Language description for stwbrx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:12:34 +0000 (11:12 +0100)]
Added English Language description for sthbrx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:11:18 +0000 (11:11 +0100)]
Added English Language description for stq instruction
Shriya Sharma [Tue, 3 Oct 2023 10:09:32 +0000 (11:09 +0100)]
Added English Language description for stdux instruction
Shriya Sharma [Tue, 3 Oct 2023 10:08:41 +0000 (11:08 +0100)]
Added English Language description for stdu instruction
Shriya Sharma [Tue, 3 Oct 2023 10:07:23 +0000 (11:07 +0100)]
Added spaces for english language description
Shriya Sharma [Tue, 3 Oct 2023 10:04:25 +0000 (11:04 +0100)]
Added English Language description for stdx instruction
Shriya Sharma [Tue, 3 Oct 2023 10:03:39 +0000 (11:03 +0100)]
Added English Language description for std instruction
Shriya Sharma [Tue, 3 Oct 2023 10:02:55 +0000 (11:02 +0100)]
Added English Language description for stwux instruction
Shriya Sharma [Tue, 3 Oct 2023 10:02:06 +0000 (11:02 +0100)]
Added English Language description for stwu instruction
Shriya Sharma [Tue, 3 Oct 2023 10:01:04 +0000 (11:01 +0100)]
Added English Language description for stwx instruction
Shriya Sharma [Tue, 3 Oct 2023 09:58:07 +0000 (10:58 +0100)]
Added English Language description for stw instruction
Shriya Sharma [Tue, 3 Oct 2023 09:56:02 +0000 (10:56 +0100)]
Added English Language description for sthux instruction
Shriya Sharma [Tue, 3 Oct 2023 09:55:10 +0000 (10:55 +0100)]
Added English Language description for sthu instruction
Shriya Sharma [Tue, 3 Oct 2023 09:54:24 +0000 (10:54 +0100)]
Added English Language description for sthx instruction
Shriya Sharma [Tue, 3 Oct 2023 09:53:35 +0000 (10:53 +0100)]
Added English Language description for sth instruction
Shriya Sharma [Tue, 3 Oct 2023 09:52:44 +0000 (10:52 +0100)]
Added English Language description for stbux instruction
Shriya Sharma [Tue, 3 Oct 2023 09:51:46 +0000 (10:51 +0100)]
Added English Language description for stbu instruction
Shriya Sharma [Tue, 3 Oct 2023 09:50:26 +0000 (10:50 +0100)]
Added English Language description for stbx instruction
Shriya Sharma [Tue, 3 Oct 2023 09:49:12 +0000 (10:49 +0100)]
Added English Language description for stb instruction
Luke Kenneth Casson Leighton [Sun, 1 Oct 2023 10:12:55 +0000 (11:12 +0100)]
manually revert damaged caused by jacob to pseudocode parser
the purpose of the parser database is to preserve precisely and exactly
the data that is read in, such that it is possible to re-write it
precisely and exactly
jacob had destroyed that extremely important requirement by making
unauthorized modifications to this fundamental low-level code.
jacobs task is now to review the reversions and re-implement the
otherwise extremely valuable enhancements, but this time in a
way that listens to the project leader and administrators
Luke Kenneth Casson Leighton [Sun, 1 Oct 2023 09:45:43 +0000 (10:45 +0100)]
Revert "demo moving pseudocode to separate file"
This reverts commit
b5d9084971dd761683a3a164af24c673a608aa23.
Luke Kenneth Casson Leighton [Sun, 1 Oct 2023 09:40:43 +0000 (10:40 +0100)]
Revert "add support for pseudocode being a [[!inline]] directive"
This reverts commit
43152e91f4530ddaef5cef2614b41e022c57fced.
Luke Kenneth Casson Leighton [Sun, 1 Oct 2023 09:40:34 +0000 (10:40 +0100)]
Revert "ignore indented comments too"
This reverts commit
60f9f523f78cae9e357b61e6bc55ca1b323dfa14.
Luke Kenneth Casson Leighton [Sat, 30 Sep 2023 13:30:02 +0000 (14:30 +0100)]
skip blank lines in pagereader.py pprint_ops()
Luke Kenneth Casson Leighton [Fri, 29 Sep 2023 18:31:38 +0000 (19:31 +0100)]
code-comments
Luke Kenneth Casson Leighton [Fri, 29 Sep 2023 18:23:59 +0000 (19:23 +0100)]
moving the temp array (t) along, so that adding to y is the same size
in bigmul python-based code. idea is to make everything line up
and be as uniform as possible, reduce number of instructions to bare min.
,
Luke Kenneth Casson Leighton [Fri, 29 Sep 2023 17:46:51 +0000 (18:46 +0100)]
first attempt to create an Indexed Schedule, for bigmul powmod,
but it is not perfect. needs thought
Jacob Lifshay [Thu, 28 Sep 2023 02:51:35 +0000 (19:51 -0700)]
fix divmod
Jacob Lifshay [Thu, 28 Sep 2023 02:50:47 +0000 (19:50 -0700)]
in divmod algorithm log regexes that match against expected register values
Jacob Lifshay [Thu, 28 Sep 2023 02:48:50 +0000 (19:48 -0700)]
test python_divmod_algorithm
Jacob Lifshay [Thu, 28 Sep 2023 02:45:34 +0000 (19:45 -0700)]
format code
Jacob Lifshay [Thu, 28 Sep 2023 02:25:57 +0000 (19:25 -0700)]
log asmop to LogKind.InstrInOuts too since only printing `.long 0xFOOBAR` isn't very useful
Luke Kenneth Casson Leighton [Wed, 27 Sep 2023 19:13:16 +0000 (20:13 +0100)]
remove use of addc, use adde instead setting ca to zero.
eliminates one more unnecessary instruction.
Luke Kenneth Casson Leighton [Wed, 27 Sep 2023 18:44:43 +0000 (19:44 +0100)]
reduce 4-repeats of identical code down to 1 copy with indices in powmod.py
Luke Kenneth Casson Leighton [Wed, 27 Sep 2023 18:13:47 +0000 (19:13 +0100)]
add seeming-redundant addc/adde (actually part of big-mul-*add*)
which completes the pattern for REMAP transformation
Luke Kenneth Casson Leighton [Wed, 27 Sep 2023 15:19:32 +0000 (16:19 +0100)]
convert basic_pypowersim to hex rather than broken octal (?)
Luke Kenneth Casson Leighton [Wed, 27 Sep 2023 10:25:43 +0000 (11:25 +0100)]
code-cleanup, bit of comments, copyright, blah blah, link to bugreport
all preparation before doing code-morph on simple-demo to work out how
to demonstrate REMAP Indexed (then BigMul) viability
Luke Kenneth Casson Leighton [Wed, 27 Sep 2023 10:18:53 +0000 (11:18 +0100)]
add what is currently a duplicate of python_mul_algorithm, plan is to
morph python_mul_algorithm2 to be "REMAP"-friendly
Jacob Lifshay [Wed, 27 Sep 2023 04:41:58 +0000 (21:41 -0700)]
working on adding divmod 512x256 to 256x256
Jacob Lifshay [Wed, 27 Sep 2023 04:39:31 +0000 (21:39 -0700)]
log writing CA[32]/OV[32] for OP_ADD
Jacob Lifshay [Wed, 27 Sep 2023 03:34:39 +0000 (20:34 -0700)]
add unit test for mcrxrx
Jacob Lifshay [Wed, 27 Sep 2023 03:34:25 +0000 (20:34 -0700)]
fix mcrxrx
Jacob Lifshay [Wed, 27 Sep 2023 03:28:16 +0000 (20:28 -0700)]
fix concat when the first argument is a FieldSelectableInt
Jacob Lifshay [Wed, 27 Sep 2023 01:56:03 +0000 (18:56 -0700)]
fix wrong register in docs
Jacob Lifshay [Wed, 27 Sep 2023 00:23:59 +0000 (17:23 -0700)]
256x256-bit mul no longer broken since bug #1161 was fixed
Shriya Sharma [Wed, 27 Sep 2023 07:43:17 +0000 (08:43 +0100)]
Added english language description and brackets for lmw instruction
Shriya Sharma [Wed, 27 Sep 2023 07:35:17 +0000 (08:35 +0100)]
Added english language description and brackets for ldbrx instruction
Shriya Sharma [Wed, 27 Sep 2023 07:32:27 +0000 (08:32 +0100)]
Added english language description and brackets for lwbrx instruction
Shriya Sharma [Wed, 27 Sep 2023 07:29:47 +0000 (08:29 +0100)]
Added english language description and brackets for lhbrx instruction
Jacob Lifshay [Mon, 25 Sep 2023 22:57:23 +0000 (15:57 -0700)]
add MemMMap tests
Jacob Lifshay [Mon, 25 Sep 2023 22:29:25 +0000 (15:29 -0700)]
skip zero words when iterating words in MemMMap
Jacob Lifshay [Mon, 25 Sep 2023 21:41:49 +0000 (14:41 -0700)]
format src/openpower/decoder/isa/test_mem.py
Luke Kenneth Casson Leighton [Mon, 25 Sep 2023 13:59:33 +0000 (14:59 +0100)]
add basis of Context Manager for capturing which inputs and outputsa
are involved in a carry-roll-over math primitive.
also very useful to generate (automated) unit tests
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 18:07:15 +0000 (19:07 +0100)]
minor alteration of reporting hash in mini-test of poly1305-donna.py
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 18:06:28 +0000 (19:06 +0100)]
detect if add arg2 is greater than 7 and ignore it for poly1305 tracking.
this allows narrowing down of some data for test purposes
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 10:53:26 +0000 (11:53 +0100)]
add an intercept (on all poly1305-donna.py math primitives)
but only do a report on ADD and ADDLO, for now
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 10:04:42 +0000 (11:04 +0100)]
add link to poly1305-design (really good)
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 10:00:11 +0000 (11:00 +0100)]
allow intercept on dsrd (rename DSRD) in poly13005-donna.py
Luke Kenneth Casson Leighton [Sat, 23 Sep 2023 15:00:05 +0000 (16:00 +0100)]
provide intercepts of 64/128-bit math primitives that still look
like poly1305-donna-64bit.h
Luke Kenneth Casson Leighton [Sat, 23 Sep 2023 13:41:02 +0000 (14:41 +0100)]
convert all use of "+" to ADD(a,b) in order to prepare to intercept
it and make a note of any "carry-roll-over" in poly1305-donna.py
Jacob Lifshay [Sat, 23 Sep 2023 01:25:21 +0000 (18:25 -0700)]
switch UTF-8 validation tests to use MemMMap so it gets some testing
Jacob Lifshay [Sat, 23 Sep 2023 01:23:22 +0000 (18:23 -0700)]
add MemMMap class
https://bugs.libre-soc.org/show_bug.cgi?id=1173
Jacob Lifshay [Fri, 22 Sep 2023 22:40:30 +0000 (15:40 -0700)]
split out most Mem methods into MemCommon base class
Jacob Lifshay [Fri, 22 Sep 2023 22:10:14 +0000 (15:10 -0700)]
format mem.py
Dmitry Selyutin [Fri, 22 Sep 2023 18:31:16 +0000 (21:31 +0300)]
syscalls: fix syscall arguments
Dmitry Selyutin [Fri, 22 Sep 2023 18:30:22 +0000 (21:30 +0300)]
syscalls: introduce syscall arguments length
Dmitry Selyutin [Fri, 22 Sep 2023 18:10:25 +0000 (21:10 +0300)]
syscalls: fix sys_ni_syscall call
Dmitry Selyutin [Fri, 22 Sep 2023 18:08:57 +0000 (21:08 +0300)]
syscalls: fix default table path
projects / openpower-isa.git / log