libreriscv.git
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lkcl [Tue, 18 Aug 2020 08:53:31 +0000 (09:53 +0100)]

4 years agofix screenshot
Luke Kenneth Casson Leighton [Sat, 15 Aug 2020 11:10:58 +0000 (12:10 +0100)]
fix screenshot

4 years agoadd screenshot
Luke Kenneth Casson Leighton [Sat, 15 Aug 2020 11:10:28 +0000 (12:10 +0100)]
add screenshot

4 years agoadd alu_fsm.py source link
Luke Kenneth Casson Leighton [Sat, 15 Aug 2020 11:09:02 +0000 (12:09 +0100)]
add alu_fsm.py source link

4 years agoadd gtkwave screenshot
Luke Kenneth Casson Leighton [Sat, 15 Aug 2020 11:07:34 +0000 (12:07 +0100)]
add gtkwave screenshot

4 years agomove page down one level
Luke Kenneth Casson Leighton [Sat, 15 Aug 2020 11:06:11 +0000 (12:06 +0100)]
move page down one level

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lkcl [Sat, 15 Aug 2020 11:05:50 +0000 (12:05 +0100)]

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lkcl [Sat, 15 Aug 2020 10:59:10 +0000 (11:59 +0100)]

4 years agoRevert "make hrfid same as rfid for now"
Luke Kenneth Casson Leighton [Fri, 14 Aug 2020 19:26:16 +0000 (20:26 +0100)]
Revert "make hrfid same as rfid for now"

This reverts commit 0506d0d92db9cef3378d9c1345a77e43af3d3720.

4 years agomake hrfid same as rfid for now
Luke Kenneth Casson Leighton [Fri, 14 Aug 2020 19:24:46 +0000 (20:24 +0100)]
make hrfid same as rfid for now

4 years agowark, wrong number for hrfid
Luke Kenneth Casson Leighton [Fri, 14 Aug 2020 17:24:58 +0000 (18:24 +0100)]
wark, wrong number for hrfid

4 years agoadd hrfid opcode
Luke Kenneth Casson Leighton [Fri, 14 Aug 2020 17:22:15 +0000 (18:22 +0100)]
add hrfid opcode

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 12 Aug 2020 22:43:17 +0000 (23:43 +0100)]

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lkcl [Tue, 11 Aug 2020 12:33:51 +0000 (13:33 +0100)]

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lkcl [Thu, 6 Aug 2020 15:20:00 +0000 (16:20 +0100)]

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lkcl [Thu, 6 Aug 2020 15:19:40 +0000 (16:19 +0100)]

4 years agofirst execution of libresoc litex BIOS simulation
Luke Kenneth Casson Leighton [Thu, 6 Aug 2020 15:17:43 +0000 (16:17 +0100)]
first execution of libresoc litex BIOS simulation

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lkcl [Wed, 5 Aug 2020 11:37:30 +0000 (12:37 +0100)]

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lkcl [Wed, 5 Aug 2020 11:32:08 +0000 (12:32 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 5 Aug 2020 04:58:33 +0000 (05:58 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 5 Aug 2020 04:57:45 +0000 (05:57 +0100)]

4 years agocompleted #324
programmerjake [Wed, 5 Aug 2020 03:54:16 +0000 (04:54 +0100)]
completed #324

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lkcl [Tue, 4 Aug 2020 09:09:47 +0000 (10:09 +0100)]

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tplaten@d8aaf6947db541852330ac00af10ca032f889584 [Mon, 3 Aug 2020 18:26:39 +0000 (19:26 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Mon, 3 Aug 2020 17:33:55 +0000 (18:33 +0100)]

4 years agoadd openlane link
Luke Kenneth Casson Leighton [Mon, 3 Aug 2020 17:20:32 +0000 (18:20 +0100)]
add openlane link

4 years agoDon't put version control in file names
Cole Poirier [Sat, 1 Aug 2020 23:36:29 +0000 (16:36 -0700)]
Don't put version control in file names

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lkcl [Fri, 31 Jul 2020 11:27:48 +0000 (12:27 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Thu, 30 Jul 2020 18:04:24 +0000 (19:04 +0100)]

4 years agoUpdate 3d_gpu/180nm_single_core_test_asic_memlayout_F1 to F2, Data[0:15]
Cole Poirier [Thu, 30 Jul 2020 18:02:43 +0000 (11:02 -0700)]
Update 3d_gpu/180nm_single_core_test_asic_memlayout_F1 to F2, Data[0:15]
is now Data[0:127]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 29 Jul 2020 18:16:41 +0000 (19:16 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 29 Jul 2020 18:15:52 +0000 (19:15 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 29 Jul 2020 18:14:46 +0000 (19:14 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 29 Jul 2020 18:13:55 +0000 (19:13 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 29 Jul 2020 18:13:31 +0000 (19:13 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 29 Jul 2020 18:11:38 +0000 (19:11 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 29 Jul 2020 17:32:48 +0000 (18:32 +0100)]

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programmerjake [Wed, 29 Jul 2020 17:07:59 +0000 (18:07 +0100)]

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lkcl [Tue, 28 Jul 2020 20:52:34 +0000 (21:52 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 28 Jul 2020 20:25:15 +0000 (21:25 +0100)]

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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 28 Jul 2020 20:24:50 +0000 (21:24 +0100)]

4 years agoMerge branch 'master' of git.libre-soc.org:libreriscv
Cole Poirier [Tue, 28 Jul 2020 20:22:19 +0000 (13:22 -0700)]
Merge branch 'master' of git.libre-soc.org:libreriscv

4 years agoAdd svg version of 180nm_single_core_test_asic_memlayout to wiki
Cole Poirier [Tue, 28 Jul 2020 20:21:38 +0000 (13:21 -0700)]
Add svg version of 180nm_single_core_test_asic_memlayout to wiki

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 28 Jul 2020 19:23:40 +0000 (20:23 +0100)]

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 28 Jul 2020 19:20:26 +0000 (20:20 +0100)]

4 years agoAdd section to HDL_workflow/coriolis2 documenting how to use soclayou
Cole Poirier [Tue, 28 Jul 2020 18:44:49 +0000 (11:44 -0700)]
Add section to HDL_workflow/coriolis2 documenting how to use soclayou
repo

4 years ago(no commit message)
lkcl [Mon, 27 Jul 2020 12:41:31 +0000 (13:41 +0100)]

4 years agomtmsrd pseudocode accidentally from v3.1B - returning to v3.0B
Luke Kenneth Casson Leighton [Mon, 27 Jul 2020 11:40:43 +0000 (12:40 +0100)]
mtmsrd pseudocode accidentally from v3.1B - returning to v3.0B

4 years agoStatus update
Samuel A. Falvo II [Sun, 26 Jul 2020 22:44:30 +0000 (15:44 -0700)]
Status update

4 years agoargh actually const is too long because of hex digits
Luke Kenneth Casson Leighton [Sat, 25 Jul 2020 21:25:41 +0000 (22:25 +0100)]
argh actually const is too long because of hex digits

4 years agowhoops one extra bit on the overflow test in mullw/mulld
Luke Kenneth Casson Leighton [Sat, 25 Jul 2020 21:18:18 +0000 (22:18 +0100)]
whoops one extra bit on the overflow test in mullw/mulld

4 years agoMerge branch 'master' of git.libre-soc.org:libreriscv
Cole Poirier [Fri, 24 Jul 2020 23:06:28 +0000 (16:06 -0700)]
Merge branch 'master' of git.libre-soc.org:libreriscv

4 years agoAdd nmigen-soc to HDL_workflow wiki doc
Cole Poirier [Fri, 24 Jul 2020 23:05:57 +0000 (16:05 -0700)]
Add nmigen-soc to HDL_workflow wiki doc

4 years ago(no commit message)
lkcl [Fri, 24 Jul 2020 22:19:11 +0000 (23:19 +0100)]

4 years agoMerge branch 'master' of git.libre-soc.org:libreriscv
Cole Poirier [Fri, 24 Jul 2020 21:36:22 +0000 (14:36 -0700)]
Merge branch 'master' of git.libre-soc.org:libreriscv
Merge lkcl comment about needing recent pip3

4 years agoChange pia pip install to use --user option so not need sudo
Cole Poirier [Fri, 24 Jul 2020 21:23:12 +0000 (14:23 -0700)]
Change pia pip install to use --user option so not need sudo