Alexander Ivchenko [Tue, 18 Nov 2014 10:53:13 +0000 (10:53 +0000)]
safe-3.c: Add bind_pic_locally.
gcc/testsuite
* c-c++-common/tm/safe-3.c: Add bind_pic_locally.
* g++.dg/ipa/devirt-15.C: Ditto.
* g++.dg/ipa/devirt-7.C: Ditto.
* g++.dg/ipa/pr60600.C: Ditto.
* g++.dg/opt/vt2.C: Ditto.
* g++.dg/opt/vt4.C: Ditto.
* g++.dg/pr48484.C: Ditto.
* g++.dg/tm/pr47746.C: Ditto.
* g++.dg/tree-ssa/pr57380.C: Ditto.
* gcc.dg/ipa/inline-4.c: Ditto.
* gcc.dg/ipa/inlinehint-1.c: Ditto.
* gcc.dg/ipa/inlinehint-2.c: Ditto.
* gcc.dg/ipa/inlinehint-3.c: Ditto.
* gcc.dg/pr47276.c: Ditto.
* gcc.dg/pure-2.c: Ditto.
* gcc.dg/tm/nested-2.c: Ditto.
* gcc.dg/tree-ssa/alias-29.c: Ditto.
* gcc.target/i386/3dnow-1.c: Ditto.
* gcc.target/i386/3dnow-2.c: Ditto.
* gcc.target/i386/3dnowA-1.c: Ditto.
* gcc.target/i386/3dnowA-2.c: Ditto.
* gcc.target/i386/avx-1.c: Ditto.
* gcc.target/i386/avx-2.c: Ditto.
* gcc.target/i386/memcpy-1.c: Ditto.
* gcc.target/i386/mmx-1.c: Ditto.
* gcc.target/i386/mmx-2.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-22a.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/sse-24.c: Ditto.
* gcc.target/i386/vect-double-1.c: Ditto.
* g++.dg/fstack-protector-strong.C: Add target nonpic.
* gcc.dg/fstack-protector-strong.c: Ditto.
From-SVN: r217704
Hale Wang [Tue, 18 Nov 2014 10:48:15 +0000 (10:48 +0000)]
small-multiply-m0-1.c: Only apply when "-mcpu=cortex-m0/m1/m0plus.small-multiply".
2014-11-18 Hale Wang <hale.wang@arm.com>
* gcc.target/arm/small-multiply-m0-1.c: Only apply when
"-mcpu=cortex-m0/m1/m0plus.small-multiply".
* gcc.target/arm/small-multiply-m0-2.c: Likewise.
* gcc.target/arm/small-multiply-m0-3.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-1.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
* gcc.target/arm/small-multiply-m1-1.c: Likewise.
* gcc.target/arm/small-multiply-m1-2.c: Likewise.
* gcc.target/arm/small-multiply-m1-3.c: Likewise.
From-SVN: r217703
Marc Glisse [Tue, 18 Nov 2014 10:26:31 +0000 (11:26 +0100)]
tree.c (element_mode, [...]): New functions.
2014-11-18 Marc Glisse <marc.glisse@inria.fr>
* tree.c (element_mode, integer_truep): New functions.
* tree.h (element_mode, integer_truep): Declare them.
* fold-const.c (negate_expr_p, fold_negate_expr, combine_comparisons,
fold_cond_expr_with_comparison, fold_real_zero_addition_p,
fold_comparison, fold_ternary_loc, tree_call_nonnegative_warnv_p,
fold_strip_sign_ops): Use element_mode.
(fold_binary_loc): Use element_mode and element_precision.
* match.pd: Use integer_truep, element_mode, element_precision,
VECTOR_TYPE_P and build_one_cst. Extend some transformations to
vectors. Simplify A/-A.
From-SVN: r217702
Kyrylo Tkachov [Tue, 18 Nov 2014 10:10:53 +0000 (10:10 +0000)]
[ARM] Use std::swap instead of manually swapping
* config/arm/arm.md (unaligned_loaddi): Use std::swap instead of
manual swapping implementation.
(movcond_addsi): Likewise.
* config/arm/arm.c (arm_canonicalize_comparison): Likewise.
(arm_select_dominance_cc_mode): Likewise.
(arm_reload_out_hi): Likewise.
(gen_operands_ldrd_strd): Likewise.
(output_move_double): Likewise.
(arm_print_operand_address): Likewise.
(thumb_output_move_mem_multiple): Likewise.
(SWAP_RTX): Delete.
From-SVN: r217701
James Greenhalgh [Tue, 18 Nov 2014 10:01:55 +0000 (10:01 +0000)]
[Patch ARM Refactor Builtins 8/8] Neaten up the ARM Neon builtin infrastructure
gcc/
* config/arm/arm-builtins.c (CONVERT_QUALIFIERS): Delete.
(COPYSIGNF_QUALIFIERS): Likewise.
(CREATE_QUALIFIERS): Likewise.
(DUP_QUALIFIERS): Likewise.
(FLOAT_WIDEN_QUALIFIERS): Likewise.
(FLOAT_NARROW_QUALIFIERS): Likewise.
(REINTERP_QUALIFIERS): Likewise.
(RINT_QUALIFIERS): Likewise.
(SPLIT_QUALIFIERS): Likewise.
(FIXCONV_QUALIFIERS): Likewise.
(SCALARMUL_QUALIFIERS): Likewise.
(SCALARMULL_QUALIFIERS): Likewise.
(SCALARMULH_QUALIFIERS): Likewise.
(SELECT_QUALIFIERS): Likewise.
(VTBX_QUALIFIERS): Likewise.
(SHIFTIMM_QUALIFIERS): Likewise.
(SCALARMAC_QUALIFIERS): Likewise.
(LANEMUL_QUALIFIERS): Likewise.
(LANEMULH_QUALIFIERS): Likewise.
(LANEMULL_QUALIFIERS): Likewise.
(SHIFTACC_QUALIFIERS): Likewise.
(SHIFTINSERT_QUALIFIERS): Likewise.
(VTBL_QUALIFIERS): Likewise.
(LOADSTRUCT_QUALIFIERS): Likewise.
(LOADSTRUCTLANE_QUALIFIERS): Likewise.
(STORESTRUCT_QUALIFIERS): Likewise.
(STORESTRUCTLANE_QUALIFIERS): Likewise.
(neon_builtin_type_mode): Delete.
(v8qi_UP): Map to V8QImode.
(v8qi_UP): Map to V8QImode.
(v4hi_UP): Map to V4HImode.
(v4hf_UP): Map to V4HFmode.
(v2si_UP): Map to V2SImode.
(v2sf_UP): Map to V2SFmode.
(di_UP): Map to DImode.
(v16qi_UP): Map to V16QImode.
(v8hi_UP): Map to V8HImode.
(v4si_UP): Map to V4SImode.
(v4sf_UP): Map to V4SFmode.
(v2di_UP): Map to V2DImode.
(ti_UP): Map to TImode.
(ei_UP): Map to EImode.
(oi_UP): Map to OImode.
(neon_itype): Delete.
(neon_builtin_datum): Remove itype, make mode a machine_mode.
(VAR1): Update accordingly.
(arm_init_neon_builtins): Use machine_mode directly.
(neon_dereference_pointer): Likewise.
(arm_expand_neon_args): Use qualifiers to decide operand types.
(arm_expand_neon_builtin): Likewise.
* config/arm/arm_neon_builtins.def: Remap operation type for
many builtins.
From-SVN: r217700
James Greenhalgh [Tue, 18 Nov 2014 10:00:29 +0000 (10:00 +0000)]
[Patch ARM Refactor Builtins 7/8] Use qualifiers arrays when initialising builtins and fix type mangling
gcc/
* config/arm/arm-builtins.c (arm_scalar_builtin_types): New.
(enum arm_simd_type): Likewise.
(struct arm_simd_type_info): Likewise
(arm_mangle_builtin_scalar_type): Likewise.
(arm_mangle_builtin_vector_type): Likewise.
(arm_mangle_builtin_type): Likewise.
(arm_simd_builtin_std_type): Likewise.
(arm_lookup_simd_builtin_type): Likewise.
(arm_simd_builtin_type): Likewise.
(arm_init_simd_builtin_types): Likewise.
(arm_init_simd_builtin_scalar_types): Likewise.
(arm_init_neon_builtins): Rewrite using qualifiers.
* config/arm/arm-protos.h (arm_mangle_builtin_type): New.
* config/arm/arm-simd-builtin-types.def: New file.
* config/arm/t-arm (arm-builtins.o): Depend on it.
* config/arm/arm.c (arm_mangle_type): Call arm_mangle_builtin_type.
* config/arm/arm_neon.h (int8x8_t): Use new internal type.
(int16x4_t): Likewise.
(int32x2_t): Likewise.
(float16x4_t): Likewise.
(float32x2_t): Likewise.
(poly8x8_t): Likewise.
(poly16x4_t): Likewise.
(uint8x8_t): Likewise.
(uint16x4_t): Likewise.
(uint32x2_t): Likewise.
(int8x16_t): Likewise.
(int16x8_t): Likewise.
(int32x4_t): Likewise.
(int64x2_t): Likewise.
(float32x4_t): Likewise.
(poly8x16_t): Likewise.
(poly16x8_t): Likewise.
(uint8x16_t): Likewise.
(uint16x8_t): Likewise.
(uint32x4_t): Likewise.
(uint64x2_t): Likewise.
From-SVN: r217699
James Greenhalgh [Tue, 18 Nov 2014 09:57:13 +0000 (09:57 +0000)]
[Patch ARM Refactor Builtins 6/8] Add some tests for "poly" mangling
gcc/testsuite/
* g++.dg/abi/mangle-arm-crypto.C: New.
* g++.dg/abi/mangle-neon.C (f19): New.
(f20): Likewise.
From-SVN: r217698
James Greenhalgh [Tue, 18 Nov 2014 09:55:56 +0000 (09:55 +0000)]
[Patch ARM Refactor Builtins 5/8] Start keeping track of qualifiers in ARM.
gcc/
* gcc/config/arm/arm-builtins.c (arm_type_qualifiers): New.
(neon_itype): Add new types corresponding to the types used in
qualifiers names.
(arm_unop_qualifiers): New.
(arm_bswap_qualifiers): Likewise.
(arm_binop_qualifiers): Likewise.
(arm_ternop_qualifiers): Likewise.
(arm_getlane_qualifiers): Likewise.
(arm_lanemac_qualifiers): Likewise.
(arm_setlane_qualifiers): Likewise.
(arm_combine_qualifiers): Likewise.
(arm_load1_qualifiers): Likewise.
(arm_load1_lane_qualifiers): Likewise.
(arm_store1_qualifiers): Likewise.
(arm_storestruct_lane_qualifiers): Likewise.
(UNOP_QUALIFIERS): Likewise.
(DUP_QUALIFIERS): Likewise.
(SPLIT_QUALIFIERS): Likewise.
(CONVERT_QUALIFIERS): Likewise.
(FLOAT_WIDEN_QUALIFIERS): Likewise.
(FLOAT_NARROW_QUALIFIERS): Likewise.
(RINT_QUALIFIERS): Likewise.
(COPYSIGNF_QUALIFIERS): Likewise.
(CREATE_QUALIFIERS): Likewise.
(REINTERP_QUALIFIERS): Likewise.
(BSWAP_QUALIFIERS): Likewise.
(BINOP_QUALIFIERS): Likewise.
(FIXCONV_QUALIFIERS): Likewise.
(SCALARMUL_QUALIFIERS): Likewise.
(SCALARMULL_QUALIFIERS): Likewise.
(SCALARMULH_QUALIFIERS): Likewise.
(TERNOP_QUALIFIERS): Likewise.
(SELECT_QUALIFIERS): Likewise.
(VTBX_QUALIFIERS): Likewise.
(GETLANE_QUALIFIERS): Likewise.
(SHIFTIMM_QUALIFIERS): Likewise.
(LANEMAC_QUALIFIERS): Likewise.
(SCALARMAC_QUALIFIERS): Likewise.
(SETLANE_QUALIFIERS): Likewise.
(SHIFTINSERT_QUALIFIERS): Likewise.
(SHIFTACC_QUALIFIERS): Likewise.
(LANEMUL_QUALIFIERS): Likewise.
(LANEMULL_QUALIFIERS): Likewise.
(LANEMULH_QUALIFIERS): Likewise.
(COMBINE_QUALIFIERS): Likewise.
(VTBL_QUALIFIERS): Likewise.
(LOAD1_QUALIFIERS): Likewise.
(LOADSTRUCT_QUALIFIERS): Likewise.
(LOAD1LANE_QUALIFIERS): Likewise.
(LOADSTRUCTLANE_QUALIFIERS): Likewise.
(STORE1_QUALIFIERS): Likewise.
(STORESTRUCT_QUALIFIERS): Likewise.
(STORE1LANE_QUALIFIERS): Likewise.
(STORESTRUCTLANE_QUALIFIERS): Likewise.
(neon_builtin_datum): Keep track of qualifiers.
(VAR1): Likewise.
From-SVN: r217697
James Greenhalgh [Tue, 18 Nov 2014 09:54:22 +0000 (09:54 +0000)]
[Patch ARM Refactor Builtins 4/8] Refactor "VAR<n>" Macros
gcc/
* config/arm/arm-builtins.c (VAR1): Add a comma.
(VAR2): Rewrite in terms of VAR1.
(VAR3-10): Likewise.
(arm_builtins): Remove leading comma before ARM_BUILTIN_MAX.
* config/arm/arm_neon_builtins.def: Remove trailing commas.
From-SVN: r217696
James Greenhalgh [Tue, 18 Nov 2014 09:52:46 +0000 (09:52 +0000)]
[Patch ARM Refactor Builtins 3/8] Pull builtins code to its own file
gcc/
* config.gcc (extra_objs): Add arm-builtins.o for arm*-*-*.
(target_gtfiles): Add config/arm/arm-builtins.c for arm*-*-*.
* config/arm/arm-builtins.c: New.
* config/arm/t-arm (arm_builtins.o): New.
* config/arm/arm-protos.h (arm_expand_builtin): New.
(arm_builtin_decl): Likewise.
(arm_init_builtins): Likewise.
(arm_atomic_assign_expand_fenv): Likewise.
* config/arm/arm.c (arm_atomic_assign_expand_fenv): Remove prototype.
(arm_init_builtins): Likewise.
(arm_init_iwmmxt_builtins): Likewise
(safe_vector_operand): Likewise
(arm_expand_binop_builtin): Likewise
(arm_expand_unop_builtin): Likewise
(arm_expand_builtin): Likewise
(arm_builtin_decl): Likewise
(insn_flags): Remove static.
(tune_flags): Likewise.
(enum arm_builtins): Move to config/arm/arm-builtins.c.
(arm_init_neon_builtins): Likewise.
(struct builtin_description): Likewise.
(arm_init_iwmmxt_builtins): Likewise.
(arm_init_fp16_builtins): Likewise.
(arm_init_crc32_builtins): Likewise.
(arm_init_builtins): Likewise.
(arm_builtin_decl): Likewise.
(safe_vector_operand): Likewise.
(arm_expand_ternop_builtin): Likewise.
(arm_expand_binop_builtin): Likewise.
(arm_expand_unop_builtin): Likewise.
(neon_dereference_pointer): Likewise.
(arm_expand_neon_args): Likewise.
(arm_expand_neon_builtin): Likewise.
(neon_split_vcombine): Likewise.
(arm_expand_builtin): Likewise.
(arm_builtin_vectorized_function): Likewise.
(arm_atomic_assign_expand_fenv): Likewise.
From-SVN: r217695
James Greenhalgh [Tue, 18 Nov 2014 09:50:30 +0000 (09:50 +0000)]
[Patch ARM Refactor Builtins 2/8] Move Processor flags to arm-protos.h
gcc/
* config/arm/t-arm (arm.o): Include arm-protos.h in the recipe.
* config/arm/arm.c (FL_CO_PROC): Move to arm-protos.h.
(FL_ARCH3M): Likewise.
(FL_MODE26): Likewise.
(FL_MODE32): Likewise.
(FL_ARCH4): Likewise.
(FL_ARCH5): Likewise.
(FL_THUMB): Likewise.
(FL_LDSCHED): Likewise.
(FL_STRONG): Likewise.
(FL_ARCH5E): Likewise.
(FL_XSCALE): Likewise.
(FL_ARCH6): Likewise.
(FL_VFPV2): Likewise.
(FL_WBUF): Likewise.
(FL_ARCH6K): Likewise.
(FL_THUMB2): Likewise.
(FL_NOTM): Likewise.
(FL_THUMB_DIV): Likewise.
(FL_VFPV3): Likewise.
(FL_NEON): Likewise.
(FL_ARCH7EM): Likewise.
(FL_ARCH7): Likewise.
(FL_ARM_DIV): Likewise.
(FL_ARCH8): Likewise.
(FL_CRC32): Likewise.
(FL_SMALLMUL): Likewise.
(FL_IWMMXT): Likewise.
(FL_IWMMXT2): Likewise.
(FL_TUNE): Likewise.
(FL_FOR_ARCH2): Likewise.
(FL_FOR_ARCH3): Likewise.
(FL_FOR_ARCH3M): Likewise.
(FL_FOR_ARCH4): Likewise.
(FL_FOR_ARCH4T): Likewise.
(FL_FOR_ARCH5): Likewise.
(FL_FOR_ARCH5T): Likewise.
(FL_FOR_ARCH5E): Likewise.
(FL_FOR_ARCH5TE): Likewise.
(FL_FOR_ARCH5TEJ): Likewise.
(FL_FOR_ARCH6): Likewise.
(FL_FOR_ARCH6J): Likewise.
(FL_FOR_ARCH6K): Likewise.
(FL_FOR_ARCH6Z): Likewise.
(FL_FOR_ARCH6ZK): Likewise.
(FL_FOR_ARCH6T2): Likewise.
(FL_FOR_ARCH6M): Likewise.
(FL_FOR_ARCH7): Likewise.
(FL_FOR_ARCH7A): Likewise.
(FL_FOR_ARCH7VE): Likewise.
(FL_FOR_ARCH7R): Likewise.
(FL_FOR_ARCH7M): Likewise.
(FL_FOR_ARCH7EM): Likewise.
(FL_FOR_ARCH8A): Likewise.
* config/arm/arm-protos.h: Take definitions moved from arm.c.
From-SVN: r217694
James Greenhalgh [Tue, 18 Nov 2014 09:48:14 +0000 (09:48 +0000)]
[ARM Refactor Builtins: 1/8] Remove arm_neon.h's "Magic Words"
gcc/testsuite/
* gcc.target/arm/pr51968.c (foo): Do not try to pass "Magic Word".
gcc/
* config/arm/arm.c (arm_expand_neon_builtin): Remove "Magic Word"
parameter, rearrange switch statement accordingly.
(arm_evpc_neon_vrev): Remove "Magic Word".
* config/arm/unspecs.md (unspec): Split many UNSPECs to
rounding, or signed/unsigned variants.
* config/arm/neon.md: Remove "Magic Word" code.
* config/arm/iterators.md (VPF): New.
(VADDL): Likewise.
(VADDW): Likewise.
(VHADD): Likewise.
(VQADD): Likewise.
(VADDHN): Likewise.
(VMLAL): Likewise.
(VMLAL_LANE): Likewise.
(VLMSL): Likewise.
(VMLSL_LANE): Likewise.
(VQDMULH): Likewise,
(VQDMULH_LANE): Likewise.
(VMULL): Likewise.
(VMULL_LANE): Likewise.
(VSUBL): Likewise.
(VSUBW): Likewise.
(VHSUB): Likewise.
(VQSUB): Likewise.
(VSUBHN): Likewise.
(VABD): Likewise.
(VABDL): Likewise.
(VMAXMIN): Likewise.
(VMAXMINF): Likewise.
(VPADDL): Likewise.
(VPADAL): Likewise.
(VPMAXMIN): Likewise.
(VPMAXMINF): Likewise.
(VCVT_US): Likewise.
(VCVT_US_N): Likewise.
(VQMOVN): Likewise.
(VMOVL): Likewise.
(VSHL): Likewise.
(VQSHL): Likewise.
(VSHR_N): Likewise.
(VSHRN_N): Likewise.
(VQSHRN_N): Likewise.
(VQSHRUN_N): Likewise.
(VQSHL_N): Likewise.
(VSHLL_N): Likewise.
(VSRA_N): Likewise.
(pf): Likewise.
(sup): Likewise.
(r): Liekwise.
(maxmin): Likewise.
(shift_op): Likewise.
* config/arm/arm_neon_builtins.def: Split many patterns.
* config/arm/arm_neon.h (vaddl_s8): Remove "Magic Word" code.
From-SVN: r217693
Kyrylo Tkachov [Tue, 18 Nov 2014 09:33:25 +0000 (09:33 +0000)]
[ARM] Handle simple SImode PLUS and MINUS cases in rtx costs
* config/arm/arm.c (arm_new_rtx_costs, case PLUS, MINUS):
Add cost of alu.arith in simple SImode case.
From-SVN: r217692
Jiong Wang [Tue, 18 Nov 2014 09:30:08 +0000 (09:30 +0000)]
[LRA] Relax one gcc_assert in lra-eliminate for fixed register
gcc/
* lra-eliminations.c (update_reg_eliminate): Relax gcc_assert for fixed
registers.
From-SVN: r217691
Marat Zakirov [Tue, 18 Nov 2014 08:46:39 +0000 (08:46 +0000)]
opts.c (finish_options): Disable aggressive opts for sanitizer.
gcc
2014-11-18 Marat Zakirov <m.zakirov@samsung.com>
* opts.c (finish_options): Disable aggressive opts for sanitizer.
(common_handle_option): Move code to finish_options.
gcc/testsuite
2014-11-18 Marat Zakirov <m.zakirov@samsung.com>
* c-c++-common/asan/aggressive-opts.c: New test.
From-SVN: r217690
Yury Gribov [Tue, 18 Nov 2014 07:37:17 +0000 (07:37 +0000)]
re PR sanitizer/63802 (UBSan doesn't catch misaligned access if address is 16-bytes (or more) aligned)
2014-11-18 Yury Gribov <y.gribov@samsung.com>
PR sanitizer/63802
gcc/
* stor-layout.c (min_align_of_type): Respect user alignment
more.
gcc/testsuite/
* c-c++-common/ubsan/pr63802.c: New test.
From-SVN: r217689
Ilya Enkovich [Tue, 18 Nov 2014 07:25:12 +0000 (07:25 +0000)]
passes.c (remove_cgraph_node_from_order): New.
gcc/
* passes.c (remove_cgraph_node_from_order): New.
(do_per_function_toporder): Register cgraph removal
hook.
gcc/testsuite/
* g++.dg/pr63766.C: New.
From-SVN: r217688
Terry Guo [Tue, 18 Nov 2014 02:20:47 +0000 (02:20 +0000)]
arm.c (arm_issue_rate): Return 2 for cortex-m7.
2014-11-17 Terry Guo <terry.guo@arm.com>
* config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
* config/arm/arm.md (generic_sched): Exclude cortex-m7.
(generic_vfp): Likewise.
* config/arm/cortex-m7.md: Pipeline description for cortex-m7.
From-SVN: r217687
GCC Administrator [Tue, 18 Nov 2014 00:16:38 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r217686
Vladimir Makarov [Tue, 18 Nov 2014 00:14:25 +0000 (00:14 +0000)]
re PR rtl-optimization/63906 (lra_remat miscompiles glibc on aarch64)
2014-11-17 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/63906
* lra-remat.c (operand_to_remat): Check SP and
frame_pointer_required.
From-SVN: r217683
Mircea Namolaru [Mon, 17 Nov 2014 22:59:07 +0000 (23:59 +0100)]
Support for unroll and jam optimization.
From-SVN: r217682
Andrew Pinski [Mon, 17 Nov 2014 22:33:23 +0000 (22:33 +0000)]
thunderx.md: Remove copyright which should not have been there.
2014-11-17 Andrew Pinski <apinski@cavium.com>
* config/aarch64/thunderx.md: Remove copyright which should not
have been there.
From-SVN: r217680
Michael Meissner [Mon, 17 Nov 2014 22:32:26 +0000 (22:32 +0000)]
rs6000.c (RELOAD_REG_AND_M16): Add support for Altivec style vector loads that ignore the bottom 3 bits of the...
[gcc]
2014-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* config/rs6000/rs6000.c (RELOAD_REG_AND_M16): Add support for
Altivec style vector loads that ignore the bottom 3 bits of the
address.
(rs6000_debug_addr_mask): New function to print the addr_mask
values if debugging.
(rs6000_debug_print_mode): Call rs6000_debug_addr_mask to print
out addr_mask.
(rs6000_setup_reg_addr_masks): Add support for Altivec style
vector loads that ignore the bottom 3 bits of the address. Allow
pre-increment and pre-decrement on floating point, even if the
-mupper-regs-{sf,df} options were used.
(rs6000_init_hard_regno_mode_ok): Rework DFmode support if
-mupper-regs-df. Add support for -mupper-regs-sf. Rearrange code
placement for direct move support.
(rs6000_option_override_internal): Add checks for -mupper-regs-df
requiring -mvsx, and -mupper-regs-sf requiring -mpower8-vector.
If -mupper-regs, set both -mupper-regs-sf and -mupper-regs-df,
depending on the underlying cpu.
(rs6000_secondary_reload_fail): Add ATTRIBUTE_NORETURN.
(rs6000_secondary_reload_toc_costs): Helper function to identify
costs of a TOC load for secondary reload support.
(rs6000_secondary_reload_memory): Helper function for secondary
reload, to determine if a particular memory operation is directly
handled by the hardware, or if it needs support from secondary
reload to create a valid address.
(rs6000_secondary_reload): Rework code, to be clearer. If the
appropriate -mupper-regs-{sf,df} is used, use FPR registers to
reload scalar values, since the FPR registers have D-form
addressing. Move most of the code handling memory to the function
rs6000_secondary_reload_memory, and use the reg_addr structure to
determine what type of address modes are supported. Print more
debug information if -mdebug=addr.
(rs6000_secondary_reload_inner): Rework entire function to be more
general. Use the reg_addr bits to determine what type of
addressing is supported.
(rs6000_preferred_reload_class): Rework. Move constant handling
into a single place. Prefer using FLOAT_REGS for scalar floating
point.
(rs6000_secondary_reload_class): Use a FPR register to move a
value from an Altivec register to a GPR, and vice versa. Move VSX
handling above traditional floating point.
* config/rs6000/rs6000.md (mov<mode>_hardfloat, FMOVE32 case):
Delete some spaces in the constraints.
(DF->DF move peephole2): Disable if -mupper-regs-{sf,df} to
allow using FPR registers to load/store an Altivec register for
scalar floating point types.
(SF->SF move peephole2): Likewise.
(DFmode splitter): Add a define_split to move floating point
constants to the constant pool before register allocation.
Normally constants are put into the pool immediately, but
-ffast-math delays putting them into the constant pool for the
reciprocal approximation support.
(SFmode splitter): Likewise.
* config/rs6000/rs6000.opt (-mupper-regs-df): Make option public.
(-mupper-regs-sf): Likewise.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__UPPER_REGS_DF__ if -mupper-regs-df. Define __UPPER_REGS_SF__ if
-mupper-regs-sf.
(-mupper-regs): New combination option that sets -mupper-regs-sf
and -mupper-regs-df by default if the cpu supports the instructions.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mupper-regs, -mupper-regs-sf, and -mupper-regs-df.
* config/rs6000/predicates.md (memory_fp_constant): New predicate
to return true if the operand is a floating point constant that
must be put into the constant pool, before register allocation
occurs.
* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Enable
-mupper-regs-df by default.
(ISA_2_7_MASKS_SERVER): Enable -mupper-regs-sf by default.
(POWERPC_MASKS): Add -mupper-regs-{sf,df} as options set by the
various -mcpu=... options.
(power7 cpu): Enable -mupper-regs-df by default.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mupper-regs.
[gcc/testsuite]
2014-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-ldst.c: Rewrite to use 40 live
floating point variables instead of using asm to test allocating
values to the Altivec registers.
* gcc.target/powerpc/upper-regs-sf.c: New -mupper-regs-sf and
-mupper-regs-df tests.
* gcc.target/powerpc/upper-regs-df.c: Likewise.
* config/rs6000/predicates.md (memory_fp_constant): New predicate
Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com>
From-SVN: r217679
H.J. Lu [Mon, 17 Nov 2014 22:12:55 +0000 (22:12 +0000)]
Export "detect_leaks=0"
PR bootstrap/63888
* bootstrap-asan.mk (ASAN_OPTIONS): Export "detect_leaks=0".
From-SVN: r217678
Jason Merrill [Mon, 17 Nov 2014 22:09:27 +0000 (17:09 -0500)]
re PR c++/33911 (attribute deprecated vs. templates)
PR c++/33911
gcc/cp/
* call.c (build_call_a): Don't warn_deprecated_use here.
(build_over_call): Or here.
* decl2.c (mark_used): Do it here.
(is_late_template_attribute): Attribute deprecated is not deferred.
(cplus_decl_attributes): Propagate TREE_DEPRECATED out to the template.
* parser.c (cp_parser_template_name): Warn about deprecated template.
(cp_parser_template_argument): Likewise.
libstdc++-v3/
* include/backward/binders.h: Suppress -Wdeprecated-declarations.
* include/ext/array_allocator.h: Likewise.
From-SVN: r217677
Zhouyi Zhou [Mon, 17 Nov 2014 22:05:45 +0000 (22:05 +0000)]
ira-conflicts.c (build_conflict_bit_table): Add the current object to OBJECTS_LIVE after traversing OBJECTS_LIVE.
* ira-conflicts.c (build_conflict_bit_table): Add the current
object to OBJECTS_LIVE after traversing OBJECTS_LIVE.
From-SVN: r217676
Jan Hubicka [Mon, 17 Nov 2014 22:04:36 +0000 (23:04 +0100)]
ipa-cp.c (ipa_get_indirect_edge_target_1): Handle speculation.
* ipa-cp.c (ipa_get_indirect_edge_target_1): Handle speculation.
(ipa_get_indirect_edge_target): Add SPECULATIVE argument.
(devirtualization_time_bonus): Use it.
(ipcp_discover_new_direct_edges): Likewise.
* ipa-inline-analysis.c (estimate_edge_devirt_benefit): Update.
* ipa-prop.h (ipa_get_indirect_edge_target): Update prototype.
From-SVN: r217675
Tom de Vries [Mon, 17 Nov 2014 21:48:14 +0000 (21:48 +0000)]
Add -ftree-tail-merge to tail-merge testcases
2014-11-17 Tom de Vries <tom@codesourcery.com>
* gcc.dg/pr43864-2.c: Add -ftree-tail-merge to dg-options.
* gcc.dg/pr43864-3.c: Same.
* gcc.dg/pr43864-4.c: Same.
* gcc.dg/pr43864.c: Same.
* gcc.dg/pr50763.c: Same.
* gcc.dg/pr51879-12.c: Same.
* gcc.dg/pr51879-16.c: Same.
* gcc.dg/pr51879-17.c: Same.
* gcc.dg/pr51879-18.c: Same.
* gcc.dg/pr51879-2.c: Same.
* gcc.dg/pr51879-3.c: Same.
* gcc.dg/pr51879-4.c: Same.
* gcc.dg/pr51879-6.c: Same.
* gcc.dg/pr51879-7.c: Same.
* gcc.dg/pr51879.c: Same.
From-SVN: r217674
Tom de Vries [Mon, 17 Nov 2014 21:48:05 +0000 (21:48 +0000)]
Fix scan patterns for pr43864-{2,3,4].c
2014-11-17 Tom de Vries <tom@codesourcery.com>
* gcc.dg/pr43864-2.c: Fix scan-tree-dump-times scan pattern.
* gcc.dg/pr43864-3.c: Same.
* gcc.dg/pr43864-4.c: Same.
From-SVN: r217673
Jason Merrill [Mon, 17 Nov 2014 20:17:56 +0000 (15:17 -0500)]
re PR c++/50473 ([C++0x] ICE in type_has_nontrivial_copy_init, at cp/tree.c:2574)
PR c++/50473
* decl.c (cp_finish_decl): Don't try to process a non-dependent
constant initializer for a reference.
* pt.c (value_dependent_expression_p): A reference is always
dependent.
* call.c (extend_ref_init_temps_1): Also clear TREE_SIDE_EFFECTS
on any NOP_EXPRs.
From-SVN: r217672
Jan Hubicka [Mon, 17 Nov 2014 19:35:57 +0000 (20:35 +0100)]
tree.c (free_lang_data_in_decl): Set DECL_FUNCTION_SPECIFIC_OPTIMIZATION to optimization_default_node.
* tree.c (free_lang_data_in_decl): Set DECL_FUNCTION_SPECIFIC_OPTIMIZATION
to optimization_default_node.
From-SVN: r217671
Jason Merrill [Mon, 17 Nov 2014 19:08:07 +0000 (14:08 -0500)]
Handle C++14 constexpr flow control.
* constexpr.c (cxx_eval_loop_expr, cxx_eval_switch_expr): New.
(cxx_eval_statement_list): New.
(cxx_eval_constant_expression): Handle LABEL_EXPR,
CASE_LABEL_EXPR, GOTO_EXPR, LOOP_EXPR, SWITCH_EXPR. Handle jump
semantics of RETURN_EXPR.
(many functions): Add jump_target parameter.
(returns, breaks, continues, switches, label_matches): New.
* cp-tree.h (LABEL_DECL_BREAK, LABEL_DECL_CONTINUE): New.
* cp-gimplify.c (begin_bc_block): Set them.
From-SVN: r217670
Jason Merrill [Mon, 17 Nov 2014 19:08:02 +0000 (14:08 -0500)]
cp-gimplify.c (genericize_cp_loop): Use LOOP_EXPR.
* cp-gimplify.c (genericize_cp_loop): Use LOOP_EXPR.
(genericize_for_stmt): Handle null statement-list.
From-SVN: r217669
Jan Hubicka [Mon, 17 Nov 2014 18:53:51 +0000 (19:53 +0100)]
cgraphunit.c (analyze_functions): Use opt_for_fn.
* cgraphunit.c (analyze_functions): Use opt_for_fn.
* cgraph.h (cgraph_node::optimize_for_size_p): Likewise.
From-SVN: r217668
Jan Hubicka [Mon, 17 Nov 2014 18:52:59 +0000 (19:52 +0100)]
cgraph.c (symbol_table::create_edge): Use opt_for_fn.
* cgraph.c (symbol_table::create_edge): Use opt_for_fn.
(cgraph_node::cannot_return_p): Likewise.
(cgraph_edge::cannot_lead_to_return_p): Likewise.
(cgraph_edge::maybe_hot_p): Likewise.
From-SVN: r217667
Jan Hubicka [Mon, 17 Nov 2014 18:52:28 +0000 (19:52 +0100)]
predict.c (maybe_hot_frequency_p): Use opt_for_fn.
* predict.c (maybe_hot_frequency_p): Use opt_for_fn.
(optimize_function_for_size_p): Likewise.
(probably_never_executed): Likewise; replace cfun by fun.
From-SVN: r217666
Alan Lawrence [Mon, 17 Nov 2014 18:29:49 +0000 (18:29 +0000)]
[AArch64] Extend aarch64_simd_vec_set pattern, replace asm for vld1_lane
gcc/:
* config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Add
variant reading from memory and assembling to ld1.
* config/aarch64/arm_neon.h (vld1_lane_f32, vld1_lane_f64, vld1_lane_p8,
vld1_lane_p16, vld1_lane_s8, vld1_lane_s16, vld1_lane_s32,
vld1_lane_s64, vld1_lane_u8, vld1_lane_u16, vld1_lane_u32,
vld1_lane_u64, vld1q_lane_f32, vld1q_lane_f64, vld1q_lane_p8,
vld1q_lane_p16, vld1q_lane_s8, vld1q_lane_s16, vld1q_lane_s32,
vld1q_lane_s64, vld1q_lane_u8, vld1q_lane_u16, vld1q_lane_u32,
vld1q_lane_u64): Replace asm with vset_lane and pointer dereference.
gcc/testsuite/:
* gcc.target/aarch64/vld1_lane.c: New test.
From-SVN: r217665
Jason Merrill [Mon, 17 Nov 2014 18:16:19 +0000 (13:16 -0500)]
* constexpr.c (use_new_call): Always use new call handling.
From-SVN: r217664
Jason Merrill [Mon, 17 Nov 2014 18:16:14 +0000 (13:16 -0500)]
C++14 constexpr support (minus loops and multiple returns)
C++14 constexpr support (minus loops and multiple returns)
gcc/
* tree-inline.c (copy_fn): New.
* tree-inline.h: Declare it.
gcc/cp/
* constexpr.c (use_new_call): New macro.
(build_data_member_initialization): Ignore non-mem-inits.
(check_constexpr_bind_expr_vars): Remove C++14 checks.
(constexpr_fn_retval): Likewise.
(check_constexpr_ctor_body): Do nothing in C++14.
(massage_constexpr_body): In C++14 only collect mem-inits.
(get_function_named_in_call): Handle null CALL_EXPR_FN.
(cxx_bind_parameters_in_call): Build bindings in same order as
parameters. Don't treat iniviref parms specially in new call mode.
(cxx_eval_call_expression): If use_new_call, do constexpr expansion
based on DECL_SAVED_TREE rather than the massaged constexpr body.
Set up ctx->object from AGGR_INIT_EXPR_SLOT if we don't have one.
(is_sub_constant_expr): Don't mess with ctx.ctor here.
(cxx_eval_component_reference): A null element means we're mid-
initialization.
(cxx_eval_store_expression, cxx_eval_increment_expression): New.
(cxx_eval_constant_expression): Handle RESULT_DECL, DECL_EXPR,
MODIFY_EXPR, STATEMENT_LIST, BIND_EXPR, USING_STMT,
PREINCREMENT_EXPR, POSTINCREMENT_EXPR, PREDECREMENT_EXPR,
POSTDECREMENT_EXPR. Don't look into DECL_INITIAL of variables in
constexpr functions. In new-call mode find parms in the values table.
(potential_constant_expression_1): Handle null CALL_EXPR_FN.
Handle STATEMENT_LIST, MODIFY_EXPR, MODOP_EXPR, IF_STMT,
PREINCREMENT_EXPR, POSTINCREMENT_EXPR, PREDECREMENT_EXPR,
POSTDECREMENT_EXPR, BIND_EXPR, WITH_CLEANUP_EXPR,
CLEANUP_POINT_EXPR, MUST_NOT_THROW_EXPR, TRY_CATCH_EXPR,
EH_SPEC_BLOCK, EXPR_STMT, DECL_EXPR, CASE_LABEL_EXPR, BREAK_STMT,
CONTINUE_STMT, USING_STMT, IF_STMT, DO_STMT, FOR_STMT, WHILE_STMT,
SWITCH_STMT, ASM_EXPR.
(cxx_eval_vec_init_1): Call build_aggr_init_expr.
(cxx_eval_indirect_ref): Don't return a CONSTRUCTOR when the
caller wants an lvalue.
(cxx_eval_outermost_constant_expr): Pull object out of AGGR_INIT_EXPR.
(maybe_constant_init): Look through INIT_EXPR.
(ensure_literal_type_for_constexpr_object): Set
cp_function_chain->invalid_constexpr.
* cp-tree.h (struct language_function): Add invalid_constexpr bitfield.
* decl.c (start_decl): Set cp_function_chain->invalid_constexpr.
(check_for_uninitialized_const_var): Likewise.
(maybe_save_function_definition): Check it.
* parser.c (cp_parser_jump_statement): Set
cp_function_chain->invalid_constexpr.
(cp_parser_asm_definition): Likewise.
From-SVN: r217663
Alan Lawrence [Mon, 17 Nov 2014 18:07:45 +0000 (18:07 +0000)]
aarch64-builtins.c (TYPES_CREATE): Remove.
gcc/:
* config/aarch64/aarch64-builtins.c (TYPES_CREATE): Remove.
* config/aarch64/aarch64-simd-builtins.def (create): Remove.
* config/aarch64/aarch64-simd.md (aarch64_create<mode>): Remove.
* config/aarch64/arm_neon.h (vcreate_f64, vreinterpret_f64_s64,
vreinterpret_f64_u64): Replace __builtin_aarch64_createv1df with C casts.
* config/aarch64/iterators.md (VD1): Remove.
gcc/testsuite/:
* gcc.target/aarch64/simd/vfma_f64.c: Add asm volatile memory.
* gcc.target/aarch64/simd/vfms_f64.c: Likewise.
From-SVN: r217662
Kyrylo Tkachov [Mon, 17 Nov 2014 17:31:56 +0000 (17:31 +0000)]
[AArch64] Remove crypto extension from default for cortex-a53, cortex-a57
* config/aarch64/aarch64-cores.def (cortex-a53): Remove
AARCH64_FL_CRYPTO from feature flags.
(cortex-a57): Likewise.
(cortex-a57.cortex-a53): Likewise.
From-SVN: r217661
Jason Merrill [Mon, 17 Nov 2014 17:00:38 +0000 (12:00 -0500)]
re PR c++/52282 ([C++0x] rejects-valid issues with decltype/constexpr)
PR c++/52282
* decl.c (build_ptrmemfunc_type): Don't build a different
RECORD_TYPE for a qualified PMF.
* cp-tree.h (TYPE_PTRMEMFUNC_FN_TYPE): Merge cv-quals.
(TYPE_PTRMEMFUNC_FN_TYPE_RAW): New.
* decl2.c (cplus_decl_attributes): Use TYPE_PTRMEMFUNC_FN_TYPE_RAW.
* tree.c (cp_walk_subtrees): Likewise.
(cp_build_qualified_type_real): Remove special PMF handling.
From-SVN: r217660
Jan Hubicka [Mon, 17 Nov 2014 16:48:29 +0000 (17:48 +0100)]
tree.c (free_lang_data_in_decl): Annotate all functio nbodies with DECL_FUNCTION_SPECIFIC_TARGET.
* tree.c (free_lang_data_in_decl): Annotate all functio nbodies with
DECL_FUNCTION_SPECIFIC_TARGET.
* i386.c (ix86_set_current_function): Handle explicit default options.
* lto.c (lto_read_decls): Do not rebuild DECL_FUNCTION_SPECIFIC_TARGET.
From-SVN: r217659
Ilya Enkovich [Mon, 17 Nov 2014 16:17:06 +0000 (16:17 +0000)]
builtins.c (expand_builtin_memcpy_with_bounds): Use target hook instead of BNDmode.
* builtins.c (expand_builtin_memcpy_with_bounds): Use target hook
instead of BNDmode.
(expand_builtin_mempcpy_with_bounds): Likewise.
(expand_builtin_memset_with_bounds): Likewise.
From-SVN: r217658
Ilya Enkovich [Mon, 17 Nov 2014 13:55:49 +0000 (13:55 +0000)]
tree-ssa-strlen.c: include ipa-chkp.h, cgraph.h, ipa-ref.h, plugin-api.h.
gcc/
* tree-ssa-strlen.c: include ipa-chkp.h, cgraph.h,
ipa-ref.h, plugin-api.h.
(get_string_length): Handle calls with bounds.
(adjust_last_stmt): Likewise.
(handle_builtin_strchr): Likewise.
(handle_builtin_strcpy): Likewise.
(handle_builtin_memcpy): Likewise.
(handle_builtin_strcat): Likewise.
gcc/testsuite/
* gcc.target/i386/chkp-strlen-1.c: New.
* gcc.target/i386/chkp-strlen-2.c: New.
* gcc.target/i386/chkp-strlen-3.c: New.
* gcc.target/i386/chkp-strlen-4.c: New.
* gcc.target/i386/chkp-strlen-5.c: New.
From-SVN: r217657
Ilya Enkovich [Mon, 17 Nov 2014 13:52:37 +0000 (13:52 +0000)]
tree-chkp-opt.c (chkp_get_nobnd_fndecl): New.
gcc/
* tree-chkp-opt.c (chkp_get_nobnd_fndecl): New.
(chkp_get_nochk_fndecl): New.
(chkp_optimize_string_function_calls): New.
(chkp_opt_execute): Call chkp_optimize_string_function_calls.
* tree-cfg.h (insert_cond_bb): New.
* tree-cfg.c (insert_cond_bb): New.
gcc/testsuite/
* gcc.target/i386/chkp-stropt-1.c: New.
* gcc.target/i386/chkp-stropt-2.c: New.
* gcc.target/i386/chkp-stropt-3.c: New.
* gcc.target/i386/chkp-stropt-4.c: New.
* gcc.target/i386/chkp-stropt-5.c: New.
* gcc.target/i386/chkp-stropt-6.c: New.
* gcc.target/i386/chkp-stropt-7.c: New.
* gcc.target/i386/chkp-stropt-8.c: New.
* gcc.target/i386/chkp-stropt-9.c: New.
* gcc.target/i386/chkp-stropt-10.c: New.
* gcc.target/i386/chkp-stropt-11.c: New.
* gcc.target/i386/chkp-stropt-12.c: New.
* gcc.target/i386/chkp-stropt-13.c: New.
* gcc.target/i386/chkp-stropt-14.c: New.
* gcc.target/i386/chkp-stropt-15.c: New.
* gcc.target/i386/chkp-stropt-16.c: New.
From-SVN: r217656
Ilya Enkovich [Mon, 17 Nov 2014 13:45:55 +0000 (13:45 +0000)]
tree-core.h (built_in_class): Add builtin codes to be used by Pointer Bounds Checker for instrumented builtin...
* tree-core.h (built_in_class): Add builtin codes to be used
by Pointer Bounds Checker for instrumented builtin functions.
* tree-streamer-in.c: Include ipa-chkp.h.
(streamer_get_builtin_tree): Created instrumented decl if
required.
* ipa-chkp.h (chkp_maybe_clone_builtin_fndecl): New.
* ipa-chkp.c (chkp_build_instrumented_fndecl): Support builtin
function decls.
(chkp_maybe_clone_builtin_fndecl): New.
(chkp_maybe_create_clone): Support builtin function decls.
(chkp_versioning): Clone builtin functions.
* tree-chkp.c (chkp_instrument_normal_builtin): New.
(chkp_add_bounds_to_call_stmt): Support builtin functions.
(chkp_replace_function_pointer): Likewise.
* builtins.c (expand_builtin_memcpy_args): New.
(expand_builtin_memcpy): Call expand_builtin_memcpy_args.
(expand_builtin_memcpy_with_bounds): New.
(expand_builtin_mempcpy_with_bounds): New.
(expand_builtin_mempcpy_args): Add orig_exp arg. Support
BUILT_IN_CHKP_MEMCPY_NOBND_NOCHK
(expand_builtin_memset_with_bounds): New.
(expand_builtin_memset_args): Support BUILT_IN_CHKP_MEMSET_NOBND_NOCHK.
(expand_builtin_with_bounds): New.
* builtins.h (expand_builtin_with_bounds): New.
* expr.c (expand_expr_real_1): Support instrumented builtin calls.
From-SVN: r217655
H.J. Lu [Mon, 17 Nov 2014 13:38:38 +0000 (13:38 +0000)]
Replace unsigned long with __SIZE_TYPE__
* g++.dg/ipa/pr63894.C (new): Replace unsigned long with
__SIZE_TYPE__.
From-SVN: r217654
Dodji Seketeli [Mon, 17 Nov 2014 09:56:43 +0000 (09:56 +0000)]
Add more comments to some gimple accessors
gcc/ChangeLog:
* gimple.h (gimple_set_visited, gimple_visited_p)
(gimple_set_plf, gimple_plf, gimple_set_uid, gimple_uid): Add more
comments to these accessors.
Signed-off-by: Dodji Seketeli <dodji@redhat.com>
From-SVN: r217653
Richard Biener [Mon, 17 Nov 2014 09:38:48 +0000 (09:38 +0000)]
re PR tree-optimization/63898 (r217560 caused segfault building 462.libquantum from cpu2006)
2014-11-17 Richard Biener <rguenther@suse.de>
PR middle-end/63898
PR middle-end/63883
* gfortran.dg/pr63883.f90: New testcase.
From-SVN: r217652
Georg-Johann Lay [Mon, 17 Nov 2014 09:37:05 +0000 (09:37 +0000)]
avr-log.c (avr_log_set_avr_log): Set avr_log_details to "all".
* config/avr/avr-log.c (avr_log_set_avr_log) [TARGET_ALL_DEBUG]:
Set avr_log_details to "all".
From-SVN: r217651
Richard Biener [Mon, 17 Nov 2014 09:31:33 +0000 (09:31 +0000)]
re PR tree-optimization/63898 (r217560 caused segfault building 462.libquantum from cpu2006)
2014-11-17 Richard Biener <rguenther@suse.de>
PR middle-end/63898
* match.pd: Guard X / CST -> X * CST' transform against
zero CST.
From-SVN: r217650
Dodji Seketeli [Mon, 17 Nov 2014 09:26:17 +0000 (09:26 +0000)]
Added Dodji Seketeli as line map maintainer
* MAINTAINERS (Various Maintainers): Added myself as line map
maintainer.
* ChangeLog: Update this.
Signed-off-by: Dodji Seketeli <dodji@redhat.com>
From-SVN: r217649
Markus Trippelsdorf [Mon, 17 Nov 2014 09:21:34 +0000 (09:21 +0000)]
Add testcase for PR 63894
2014-11-17 Markus Trippelsdorf <markus@trippelsdorf.de>
PR ipa/63894
* g++.dg/ipa/pr63894.C: New test.
From-SVN: r217648
Terry Guo [Mon, 17 Nov 2014 07:06:54 +0000 (07:06 +0000)]
thumb1.md (*addsi3_cbranch_scratch): Updated to UAL format.
gcc/
2014-11-17 Terry Guo <terry.guo@arm.com>
* config/arm/thumb1.md (*addsi3_cbranch_scratch): Updated to UAL
format.
gcc/testsuite/
2014-11-17 Terry Guo <terry.guo@arm.com>
* gcc.target/arm/thumb1-ual-1.c: New test.
From-SVN: r217647
Zhenqiang Chen [Mon, 17 Nov 2014 06:29:07 +0000 (06:29 +0000)]
ifcvt.c (HAVE_cbranchcc4): Define.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
* ifcvt.c (HAVE_cbranchcc4): Define.
(noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
Use HAVE_cbranchcc4.
From-SVN: r217646
Zhenqiang Chen [Mon, 17 Nov 2014 06:24:36 +0000 (06:24 +0000)]
aarch64.c (aarch64_code_to_ccmode, [...]): New functions.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* config/aarch64/aarch64.c (aarch64_code_to_ccmode,
aarch64_convert_mode, aarch64_gen_ccmp_first,
aarch64_gen_ccmp_next): New functions.
(TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): Define.
From-SVN: r217645
Zhenqiang Chen [Mon, 17 Nov 2014 06:19:08 +0000 (06:19 +0000)]
aarch64-protos.h (aarch64_ccmp_mode_to_code): New.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* config/aarch64/aarch64-protos.h (aarch64_ccmp_mode_to_code): New.
* aarch64.c (aarch64_nzcv_codes): New data.
(aarch64_ccmp_mode_to_code): New.
(aarch64_print_operand): Output nzcv.
config/aarch64/aarch64.md (cbranchcc4, *ccmp_and, *ccmp_ior, cstorecc4):
New patterns.
(cstore<mode>4): Handle ccmp_cc_register.
* config/aarch64/predicates.md (const0_operand): New.
From-SVN: r217644
Zhenqiang Chen [Mon, 17 Nov 2014 06:12:43 +0000 (06:12 +0000)]
aarch64-modes.def: Define ccmp CC mode.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* config/aarch64/aarch64-modes.def: Define ccmp CC mode.
* config/aarch64/aarch64.c (aarch64_get_condition_code_1): New function
extacted from aarch64_get_condition_code.
(aarch64_get_condition_code): Call aarch64_get_condition_code_1.
config/aarch64/predicates.md (ccmp_cc_register): New predicate.
From-SVN: r217643
Zhenqiang Chen [Mon, 17 Nov 2014 06:07:15 +0000 (06:07 +0000)]
constraints.md (Usn, [...]): New constraints.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* config/aarch64/constraints.md (Usn, aarch64_ccmp_immediate,
aarch64_ccmp_operand): New constraints.
From-SVN: r217642
Zhenqiang Chen [Mon, 17 Nov 2014 06:03:07 +0000 (06:03 +0000)]
Makefile.in: Add ccmp.o.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* Makefile.in: Add ccmp.o.
* ccmp.c: New file.
* ccmp.h: New file.
* expr.c: include "ccmp.h"
(expand_cond_expr_using_cmove): Handle VOIDmode.
(expand_expr_real_1): Try to expand ccmp.
From-SVN: r217641
Zhenqiang Chen [Mon, 17 Nov 2014 05:52:26 +0000 (05:52 +0000)]
cfgexpand.c (expand_gimple_cond): Check ccmp.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* cfgexpand.c (expand_gimple_cond): Check ccmp.
* expmed.c (emit_cstore): Make it global.
* expmed.h: #include "insn-codes.h"
(emit_cstore): New prototype.
* expr.c (expand_operands): Make it global.
* expr.h (expand_operands): New prototype.
* optabs.c (get_rtx_code): Make it global.
* optabs.h (get_rtx_code): New prototype.
From-SVN: r217640
Zhenqiang Chen [Mon, 17 Nov 2014 05:38:41 +0000 (05:38 +0000)]
target.def (gen_ccmp_first, [...]): Add two new hooks.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaor.org>
* target.def (gen_ccmp_first, gen_ccmp_first): Add two new hooks.
* doc/tm.texi.in (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New.
* doc/tm.texi (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New.
From-SVN: r217639
Patrick Palka [Mon, 17 Nov 2014 02:01:36 +0000 (02:01 +0000)]
Always combine comparisons or conversions from booleans.
2014-11-16 Patrick Palka <ppalka@gcc.gnu.org>
gcc/
PR middle-end/63790
* tree-ssa-forwprop.c (forward_propagate_into_comparison_1):
Always combine comparisons or conversions from booleans.
gcc/testsuite/
PR middle-end/63790
* gcc.dg/tree-ssa/pr21031.c: Drop XFAIL.
* gcc.dg/tree-ssa/forwprop-29.c: New test.
From-SVN: r217638
GCC Administrator [Mon, 17 Nov 2014 00:16:28 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r217637
Jan Hubicka [Sun, 16 Nov 2014 21:01:45 +0000 (22:01 +0100)]
* ipa-polymorphic-call.c
(ipa_polymorphic_call_context::speculation_consistent_p): Constify.
(ipa_polymorphic_call_context::meet_speculation_with): New function.
(ipa_polymorphic_call_context::combine_with): Handle types in construction
better.
(ipa_polymorphic_call_context::equal_to): Do not bother about useless
speculation.
(ipa_polymorphic_call_context::meet_with): New function.
* cgraph.h (class ipa_polymorphic_call_context): Add
meet_width, meet_speculation_with; constify speculation_consistent_p.
* ipa-cp.c (ipa_context_from_jfunc): Handle speculation; combine with incomming
context.
(propagate_context_accross_jump_function): Likewise; be more cureful.
about set_contains_variable.
(ipa_get_indirect_edge_target_1): Fix handling of dynamic type changes.
(find_more_scalar_values_for_callers_subset): Fix.
(find_more_contexts_for_caller_subset): Perform meet operation.
From-SVN: r217634
Jan Hubicka [Sun, 16 Nov 2014 19:36:37 +0000 (20:36 +0100)]
passes.c (execute_one_pass): Do not apply all transforms prior every simple IPA pass.
* passes.c (execute_one_pass): Do not apply all transforms prior
every simple IPA pass.
* cgraphunit.c: Do not include fibheap.h
(expand_thunk): Use get_untransformed_body.
(cgraph_node::expand): Likewise.
* tree-ssa-structalias.c (ipa_pta_execute): Skip inline clones.
* cgraph.c (release_function_body): Do not push cfun when CFG is not there.
(cgraph_node::get_untransformed_body): Break out from ...
(cgraph_node::get_body): ... here; add code to apply all transforms.
* cgraph.h (cgraph_node): Add get_untransformed_body.
* ipa-icf.c (sem_function::init): Use get_untransformed_body.
* cgraphclones.c (duplicate_thunk_for_node): Likewise.
* tree-inline.c (expand_call_inline): LIkewise.
* i386.c (ix86_reset_to_default_globals): Break out from ...
(ix86_set_current_function): ... here;
(ix86_reset_previous_fndecl): Use it.
(ix86_simd_clone_adjust): Use ix86_reset_previous_fndecl.
From-SVN: r217633
Uros Bizjak [Sun, 16 Nov 2014 19:31:10 +0000 (20:31 +0100)]
* gcc.dg/vect/pr63605.c (dg-final): Cleanup vect tree dump.
From-SVN: r217632
Jan-Benedict Glaw [Sun, 16 Nov 2014 16:12:44 +0000 (16:12 +0000)]
Update move-if-change from gnulib
2014-11-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* move-if-change: Sync from upstream gnulib.
From-SVN: r217631
Eric Botcazou [Sun, 16 Nov 2014 15:49:37 +0000 (15:49 +0000)]
tm.texi.in (TARGET_FLAGS_REGNUM): Move around.
* doc/tm.texi.in (TARGET_FLAGS_REGNUM): Move around.
* doc/tm.texi: Regenerate.
From-SVN: r217628
Jan-Benedict Glaw [Sun, 16 Nov 2014 14:07:13 +0000 (14:07 +0000)]
Update from upstream Automake files.
2014-11-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* compile: Sync with upstream Automake.
* depcomp: Ditto.
* install-sh: Ditto.
* missing: Ditto.
* mkinstalldirs: Ditto.
* ylwrap: Ditto.
From-SVN: r217627
Uros Bizjak [Sun, 16 Nov 2014 11:50:29 +0000 (12:50 +0100)]
sh.c: Do not include algorithm.
* config/sh/sh.c: Do not include algorithm.
(sh_emit_scc_to_t): Replace open-coded swap with std::swap
to swap values.
(sh_emit_compare_and_branch): Ditto.
(sh_emit_compare_and_set): Ditto.
* config/sh/sh.md (replacement peephole2): Ditto.
(cstore4_media): Ditto.
(*fmasf4): Ditto.
From-SVN: r217626
Andrew Pinski [Sun, 16 Nov 2014 08:01:09 +0000 (08:01 +0000)]
memset-4.c: New test.
2014-11-16 Andrew Pinski <apinski@cavium.com>
* gcc.c-torture/execute/memset-4.c: New test.
* gcc.c-torture/execute/
20110418-1.c: New test.
* gcc.c-torture/execute/
20141022-1.c: New test.
* gcc.c-torture/execute/strcpy-2.c: New test.
* gcc.c-torture/execute/
20140212-2.c: New test.
* gcc.c-torture/compile/
20120913-1.c: New test.
* gcc.c-torture/compile/
20121010-1.c: New test.
* gcc.c-torture/compile/
20120917-1.c: New test.
* gcc.c-torture/compile/
20140110-1.c: New test.
* gcc.c-torture/compile/
20121220-1.c: New test.
* gcc.c-torture/compile/
20120822-1.c: New test.
* gcc.c-torture/compile/
20121027-1.c: New test.
* gcc.c-torture/compile/
20120830-2.c: New test.
From-SVN: r217625
Vladimir Makarov [Sun, 16 Nov 2014 05:00:30 +0000 (05:00 +0000)]
lra-remat.c (cand_transf_func): Process regno for rematerialization too.
2014-11-15 Vladimir Makarov <vmakarov@redhat.com>
* lra-remat.c (cand_transf_func): Process regno for
rematerialization too.
* lra.c (lra): Switch on rematerialization pass.
From-SVN: r217624
Janne Blomqvist [Sun, 16 Nov 2014 01:56:54 +0000 (03:56 +0200)]
PR 60324 VLA related fixes to random number generator.
2014-11-16 Janne Blomqvist <jb@gcc.gnu.org>
PR libfortran/60324
* intrinsics/random.c (kiss_size): Rename to KISS_SIZE, make it a
macro instead of a variable.
(random_seed_i4): Make seed correct size, remove assert, KISS_SIZE
related changes.
(random_seed_i8): KISS_SIZE related changes.
From-SVN: r217623
GCC Administrator [Sun, 16 Nov 2014 00:16:27 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r217622
Jan-Benedict Glaw [Sat, 15 Nov 2014 23:44:29 +0000 (23:44 +0000)]
Update config.{sub,guess} from upstream repo
2014-11-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* config.sub: Update from upstream config repo.
* config.guess: Ditto.
From-SVN: r217619
Jason Merrill [Sat, 15 Nov 2014 23:28:58 +0000 (18:28 -0500)]
parser.c (cp_parser_omp_declare_reduction_exprs): A block is not an expression.
* parser.c (cp_parser_omp_declare_reduction_exprs): A block is not
an expression.
From-SVN: r217618
Jason Merrill [Sat, 15 Nov 2014 23:28:51 +0000 (18:28 -0500)]
constexpr.c (cxx_eval_builtin_function_call): Use fold_builtin_call_array.
* constexpr.c (cxx_eval_builtin_function_call): Use
fold_builtin_call_array.
From-SVN: r217617
Jason Merrill [Sat, 15 Nov 2014 23:28:46 +0000 (18:28 -0500)]
* constexpr.c (cx_check_missing_mem_inits): Clarify error message.
From-SVN: r217616
Maciej W. Rozycki [Sat, 15 Nov 2014 23:20:18 +0000 (23:20 +0000)]
guality.exp (check_guality): Fix `test_counts' restoration.
* g++.dg/guality/guality.exp (check_guality): Fix `test_counts'
restoration.
From-SVN: r217615
Adhemerval Zanella [Sat, 15 Nov 2014 23:17:46 +0000 (23:17 +0000)]
2014-11-15 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
* gcc.dg/atomic/c11-atomic-exec-5.c
(test_main_long_double_add_overflow): Only actually define if
LDBL_MANT_DIG != 106.
(test_main_complex_long_double_add_overflow): Likewise.
(test_main_long_double_sub_overflow): Likewise.
(test_main_complex_long_double_sub_overflow): Likewise.
(NOT_LDBL_EPSILON_2): Likewise.
(NOT_MINUS_LDBL_EPSILON_2): Likewise.
From-SVN: r217614
H.J. Lu [Sat, 15 Nov 2014 23:13:08 +0000 (23:13 +0000)]
Don't run gcc.target/i386/sibcall-1.c on x32 targets
* gcc.target/i386/sibcall-1.c: Don't run on x32 targets,
instead of run on ia32 targets.
From-SVN: r217613
Marek Polacek [Sat, 15 Nov 2014 20:20:05 +0000 (20:20 +0000)]
re PR middle-end/63884 (ICE: SIGSEGV in is_sec_implicit_index_fn with -fcilkplus and __builtin_sadd_overflow())
PR middle-end/63884
c-family/
* array-notation-common.c (is_sec_implicit_index_fn): Return false
for NULL fndecl.
(extract_array_notation_exprs): Return for NULL node.
testsuite/
* c-c++-common/cilk-plus/AN/pr63884.c: New test.
From-SVN: r217612
Francois-Xavier Coudert [Sat, 15 Nov 2014 19:46:14 +0000 (19:46 +0000)]
re PR target/60104 (load not folded into indirect branch on x86-64)
PR target/60104
* gcc.target/i386/sibcall-1.c: Don't run on pic targets.
From-SVN: r217611
Vladimir Makarov [Sat, 15 Nov 2014 16:59:08 +0000 (16:59 +0000)]
lra.c (lra): Switch off rematerialization pass.
2014-11-15 Vladimir Makarov <vmakarov@redhat.com>
* lra.c (lra): Switch off rematerialization pass.
From-SVN: r217609
Marc Glisse [Sat, 15 Nov 2014 16:56:27 +0000 (17:56 +0100)]
xmmintrin.h (_mm_add_ps, [...]): Use vector extensions instead of builtins.
2014-11-15 Marc Glisse <marc.glisse@inria.fr>
gcc/
* config/i386/xmmintrin.h (_mm_add_ps, _mm_sub_ps, _mm_mul_ps,
_mm_div_ps, _mm_store_ss, _mm_cvtss_f32): Use vector extensions
instead of builtins.
* config/i386/emmintrin.h (__v2du, __v4su, __v8hu, __v16qu): New
typedefs.
(_mm_sqrt_sd): Fix comment.
(_mm_add_epi8, _mm_add_epi16, _mm_add_epi32, _mm_add_epi64,
_mm_sub_epi8, _mm_sub_epi16, _mm_sub_epi32, _mm_sub_epi64,
_mm_mullo_epi16, _mm_cmpeq_epi8, _mm_cmpeq_epi16, _mm_cmpeq_epi32,
_mm_cmplt_epi8, _mm_cmplt_epi16, _mm_cmplt_epi32, _mm_cmpgt_epi8,
_mm_cmpgt_epi16, _mm_cmpgt_epi32, _mm_and_si128, _mm_or_si128,
_mm_xor_si128, _mm_store_sd, _mm_cvtsd_f64, _mm_storeh_pd,
_mm_cvtsi128_si64, _mm_cvtsi128_si64x, _mm_add_pd, _mm_sub_pd,
_mm_mul_pd, _mm_div_pd, _mm_storel_epi64, _mm_movepi64_pi64):
Use vector extensions instead of builtins.
* config/i386/smmintrin.h (_mm_cmpeq_epi64, _mm_cmpgt_epi64,
_mm_mullo_epi32): Likewise.
* config/i386/avxintrin.h (__v4du, __v8su, __v16hu, __v32qu):
New typedefs.
(_mm256_add_pd, _mm256_add_ps, _mm256_div_pd, _mm256_div_ps,
_mm256_mul_pd, _mm256_mul_ps, _mm256_sub_pd, _mm256_sub_ps):
Use vector extensions instead of builtins.
* config/i386/avx2intrin.h (_mm256_cmpeq_epi8, _mm256_cmpeq_epi16,
_mm256_cmpeq_epi32, _mm256_cmpeq_epi64, _mm256_cmpgt_epi8,
_mm256_cmpgt_epi16, _mm256_cmpgt_epi32, _mm256_cmpgt_epi64,
_mm256_and_si256, _mm256_or_si256, _mm256_xor_si256, _mm256_add_epi8,
_mm256_add_epi16, _mm256_add_epi32, _mm256_add_epi64,
_mm256_mullo_epi16, _mm256_mullo_epi32, _mm256_sub_epi8,
_mm256_sub_epi16, _mm256_sub_epi32, _mm256_sub_epi64): Likewise.
* config/i386/avx512fintrin.h (__v8du, __v16su, __v32hu, __v64qu):
New typedefs.
(_mm512_or_si512, _mm512_or_epi32, _mm512_or_epi64, _mm512_xor_si512,
_mm512_xor_epi32, _mm512_xor_epi64, _mm512_and_si512,
_mm512_and_epi32, _mm512_and_epi64, _mm512_mullo_epi32,
_mm512_add_epi64, _mm512_sub_epi64, _mm512_add_epi32,
_mm512_sub_epi32, _mm512_add_pd, _mm512_add_ps, _mm512_sub_pd,
_mm512_sub_ps, _mm512_mul_pd, _mm512_mul_ps, _mm512_div_pd,
_mm512_div_ps): Use vector extensions instead of builtins.
* config/i386/avx512bwintrin.h (_mm512_mullo_epi16, _mm512_add_epi8,
_mm512_sub_epi8, _mm512_sub_epi16, _mm512_add_epi16): Likewise.
* config/i386/avx512dqintrin.h (_mm512_mullo_epi64): Likewise.
* config/i386/avx512vldqintrin.h (_mm256_mullo_epi64, _mm_mullo_epi64):
Likewise.
gcc/testsuite/
* gcc.target/i386/intrinsics_opt-1.c: New testcase.
* gcc.target/i386/intrinsics_opt-2.c: Likewise.
* gcc.target/i386/intrinsics_opt-3.c: Likewise.
* gcc.target/i386/intrinsics_opt-4.c: Likewise.
From-SVN: r217608
Jan Hubicka [Sat, 15 Nov 2014 16:53:51 +0000 (17:53 +0100)]
lto-streamer-out.c (hash_tree): Use cl_optimization_hash.
* lto-streamer-out.c (hash_tree): Use cl_optimization_hash.
* lto-streamer.h (cl_optimization_stream_out, cl_optimization_stream_in): Declare.
* optc-save-gen.awk: Generate cl_optimization LTO streaming and hashing routines.
* opth-gen.awk: Add prototype of cl_optimization_hash.
* tree-streamer-in.c (unpack_ts_optimization): Remove.
(streamer_unpack_tree_bitfields): Use cl_optimization_stream_in.
* tree-streamer-out.c (pack_ts_optimization): Remove.
(streamer_pack_tree_bitfields): Use cl_optimization_stream_out.
From-SVN: r217607
Francois-Xavier Coudert [Sat, 15 Nov 2014 16:36:58 +0000 (16:36 +0000)]
* gcc.dg/tree-ssa/pr61144.c: Add dg-require-alias.
From-SVN: r217606
Francois-Xavier Coudert [Sat, 15 Nov 2014 16:06:55 +0000 (16:06 +0000)]
pubtypes-3.c: Include <string.h>.
* gcc.dg/pubtypes-3.c: Include <string.h>.
* gcc.dg/pubtypes-4.c: Likewise.
From-SVN: r217605
Mircea Namolaru [Sat, 15 Nov 2014 15:37:49 +0000 (16:37 +0100)]
New unroll and jam option in Graphite.
From-SVN: r217604
Francois-Xavier Coudert [Sat, 15 Nov 2014 15:27:18 +0000 (15:27 +0000)]
* gcc.dg/darwin-cfstring-format-1.c: Adjust dg-error.
From-SVN: r217603
Eric Botcazou [Sat, 15 Nov 2014 12:34:20 +0000 (12:34 +0000)]
tree-cfg.c (replace_loop_annotate_in_block): New function extracted from...
* tree-cfg.c (replace_loop_annotate_in_block): New function extracted
from...
(replace_loop_annotate): ...here. Call it on the header and on the
latch block, if any. Restore proper behavior of final cleanup.
From-SVN: r217602
Eric Botcazou [Sat, 15 Nov 2014 12:06:23 +0000 (12:06 +0000)]
tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Add log message for max-completely-peeled-insns limit.
* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Add log message
for max-completely-peeled-insns limit.
From-SVN: r217601
Tobias Burnus [Sat, 15 Nov 2014 11:06:07 +0000 (12:06 +0100)]
error.c (gfc_fatal_error_1): Renamed from gfc_fatal_error.
2014-11-15 Tobias Burnus <burnus@net-b.de>
gcc/fortran/
* error.c (gfc_fatal_error_1): Renamed from gfc_fatal_error.
(gfc_fatal_error): Add; uses common diagnostics.
* array.c (gfc_match_array_ref, gfc_match_array_spec): Use
%< %>.
* check.c (check_co_collective, gfc_check_lcobound,
gfc_check_image_index, gfc_check_num_images,
gfc_check_this_image, gfc_check_ucobound): Ditto.
* cpp.c (gfc_cpp_post_options): Ditto.
(gfc_cpp_init_0, gfc_cpp_done): Change %s to %qs.
* gfc-diagnostic.def (DK_FATAL): Capitalize first letter.
* gfortran.h (gfc_fatal_error_1): Add.
* match.c (gfc_match_name, gfc_match_critical,
lock_unlock_statement, sync_statement): Add %< %>.
* module.c (bad_module, gfc_dump_module, gfc_use_module): Change
%s to %qs.
* options.c (gfc_handle_module_path_options,
* gfc_handle_fpe_option,
gfc_handle_coarray_option, gfc_handle_runtime_check_option,
gfc_handle_option): Add %< %>.
* simplify.c (gfc_simplify_num_images): Ditto.
* trans-stmt.c (gfc_trans_sync): Use gfc_fatal_error_1.
* trans-array.c (gfc_conv_array_initializer): Ditto.
* trans-types.c (gfc_init_kinds): Use gfc_fatal_error instead
of fatal_error; add %< %> quotations.
gcc/testsuite/
* gfortran.dg/binding_label_tests_4.f03: Add dg-excess-errors.
* gfortran.dg/coarray_9.f90: Ditto.
* gfortran.dg/empty_label.f: Ditto.
* gfortran.dg/empty_label.f90: Ditto.
From-SVN: r217600
GCC Administrator [Sat, 15 Nov 2014 00:16:30 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r217599
Jan Hubicka [Fri, 14 Nov 2014 23:25:20 +0000 (00:25 +0100)]
ipa-prop.h (ipa_known_type_data): Remove.
* ipa-prop.h (ipa_known_type_data): Remove.
(ipa_binfo_from_known_type_jfunc): Remove.
From-SVN: r217596
Andrew Pinski [Fri, 14 Nov 2014 21:21:25 +0000 (21:21 +0000)]
[AARCH64] Add scheduler for ThunderX
This adds the schedule model for ThunderX. There are a few TODOs in that
not all of the SIMD is model currently. Also the idea of a simple
shift/extend is not modeled and all cases where there is a shift/extend
is considered as non simple and take up two cycles rather than correct
value of one cycle. Also the 32bit divide and the 64bit divide
have different cycle counts but there is no way to model that currently.
Also multiply high takes one cycle more than the normal multiply but
there is no way to model that currently either.
Build and tested for aarch64-elf with no regressions.
ChangeLog:
* config/aarch64/aarch64-cores.def (thunderx): Change the scheduler
over to thunderx.
* config/aarch64/aarch64.md: Include thunderx.md.
(generic_sched): Set to no for thunderx.
* config/aarch64/thunderx.md: New file.
From-SVN: r217593
Michael Meissner [Fri, 14 Nov 2014 20:45:21 +0000 (20:45 +0000)]
predicates.md (easy_fp_constant): Delete redunant tests for 0.0.
[gcc]
2014-11-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/predicates.md (easy_fp_constant): Delete redunant
tests for 0.0.
* config/rs6000/vector.md (VEC_R): Move secondary reload support
insns to rs6000.md from vector.md.
(reload_<VEC_R:mode>_<P:mptrsize>_store): Likewise.
(reload_<VEC_R:mode>_<P:mptrsize>_load): Likewise.
(vec_reload_and_plus_<mptrsize>): Likewise.
* config/rs6000/rs6000.md (Fa): New mode attribute to give
constraint for the Altivec registers for a type.
(RELOAD): New mode iterator for all of the types that have
secondary reload address support to load up a base register.
(extendsfdf2_fpr): Use correct constraint.
(copysign<mode>3_fcpsgn): For SFmode, use correct xscpsgndp
instruction.
(floatsi<mode>2_lfiwax): Add support for -mupper-regs-{sf,df}.
Generate the non-VSX instruction if all registers were FPRs. Do
not use the patterns in vsx.md for scalar operations.
(floatsi<mode>2_lfiwax_mem): Likewise.
(floatunssi<mode>2_lfiwzx): Likewise.
(floatunssi<mode>2_lfiwzx_mem): Likewise.
(fix_trunc<mode>di2_fctidz): Likewise.
(fixuns_trunc<mode>di2_fctiduz): Likewise.
(fctiwz_<mode>): Likewise.
(fctiwuz_<mode>): Likewise.
(friz): Likewise.
(floatdidf2_fpr): Likewise.
(floatdidf2_mem): Likewise.
(floatunsdidf2): Likewise.
(floatunsdidf2_fcfidu): Likewise.
(floatunsdidf2_mem): Likewise.
(floatdisf2_fcfids): Likewise.
(floatdisf2_mem): Likewise.
(floatdisf2_internal1): Add explicit test for not FCFIDS to make
it more obvious that the code is for pre-ISA 2.06 machines.
(floatdisf2_internal2): Likewise.
(floatunsdisf2_fcfidus): Add support for -mupper-regs-{sf,df}.
Generate the non-VSX instruction if all registers were FPRs. Do
not use the patterns in vsx.md for scalar operations.
(floatunsdisf2_mem): Likewise.
(reload_<RELOAD:mode>_<P:mptrsize>_store): Move the reload
handlers here from vector.md, and expand the types we generate
reload handlers for.
(reload_<RELOAD:mode>_<P:mptrsize>_load): Likewise.
(vec_reload_and_plus_<mptrsize>): Likewise.
* config/rs6000/vsx.md (vsx_float<VSi><mode>2): Only provide the
vector forms of the instructions. Move VSX scalar forms to
rs6000.md, and add support for -mupper-regs-sf.
(vsx_floatuns<VSi><mode>2): Likewise.
(vsx_fix_trunc<mode><VSi>2): Likewise.
(vsx_fixuns_trunc<mode><VSi>2): Likewise.
(vsx_float_fix_<mode>2): Delete DF version, rename to
vsx_float_fix_v2df2.
(vsx_float_fix_v2df2): Likewise.
[gcc/testsuite]
2014-11-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/ppc-fpconv-1.c: Adjust for -mupper-regs-df
changes.
* gcc.target/powerpc/ppc-fpconv-2.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-3.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-4.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-5.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-6.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-7.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-8.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-9.c: Likewise.
* gcc.target/powerpc/ppc-fpconv-10.c: Likewise.
* gcc.target/powerpc/ppc-round.c: Likewise.
From-SVN: r217590
Martin Jambor [Fri, 14 Nov 2014 20:07:39 +0000 (21:07 +0100)]
ipa-prop.h (jump_func_type): Removed value IPA_JF_KNOWN_TYPE.
2014-11-14 Martin Jambor <mjambor@suse.cz>
* ipa-prop.h (jump_func_type): Removed value IPA_JF_KNOWN_TYPE.
(ipa_pass_through_data): Removed field type_preserved.
(ipa_ancestor_jf_data): removed fields type and type_preserved.
(ipa_jump_func): Removed field known_type.
(ipa_get_jf_known_type_offset): Removed.
(ipa_get_jf_known_type_base_type): Likewise.
(ipa_get_jf_known_type_component_type): Likewise.
(ipa_get_jf_ancestor_type): Likewise.
* ipa-cp.c (print_ipcp_constant_value): Removed BINFO handling.
(ipa_get_jf_pass_through_result): Likewise.
(ipa_get_jf_ancestor_result): Always build ptr_node_type accesses.
(values_equal_for_ipcp_p): Removed BINFO handling.
(ipa_get_indirect_edge_target_1): Updated comment.
* ipa-prop.c (ipa_print_node_jump_functions_for_edge): Removed handling
of IPA_JF_KNOWN_TYPE jump functions. Do not print removed fields.
(ipa_set_jf_known_type): Removed.
(ipa_set_jf_simple_pass_through): Do not set removed fields. Update
all callers.
(ipa_set_jf_arith_pass_through): Likewise.
(ipa_set_ancestor_jf): Likewise.
(ipa_binfo_from_known_type_jfunc): Removed.
(prop_type_change_info): Removed fields known_current_type and
multiple_types_encountered.
(extr_type_from_vtbl_ptr_store): Removed.
(check_stmt_for_type_change): Do not attempt to identify changed type.
(detect_type_change_from_memory_writes): Do not set the removed fields,
always set jfunc to unknown.
(compute_complex_assign_jump_func): Do not detect dynamic type change.
(compute_complex_ancestor_jump_func): Likewise.
(compute_known_type_jump_func): Removed.
(ipa_compute_jump_functions_for_edge): Do not detect dynamic type
change. Do not comute known type jump functions.
(combine_known_type_and_ancestor_jfs): Removed.
(update_jump_functions_after_inlining): Removed handling of
IPA_JF_KNOWN_TYPE jump functions. Do not set removed fields.
(ipa_write_jump_function): Do not stream removed fields or known type
jump functions.
(ipa_read_jump_function): Likewise.
From-SVN: r217589