git.libre-soc.org Git - mesa.git/blob - src/mesa/drivers/dri/intel/intel

1 /**************************************************************************

2 *

5 *

6 * Permission is hereby granted, free of charge, to any person obtaining a

7 * copy of this software and associated documentation files (the

8 * "Software"), to deal in the Software without restriction, including

9 * without limitation the rights to use, copy, modify, merge, publish,

10 * distribute, sub license, and/or sell copies of the Software, and to

11 * permit persons to whom the Software is furnished to do so, subject to

12 * the following conditions:

13 *

14 * The above copyright notice and this permission notice (including the

15 * next paragraph) shall be included in all copies or substantial portions

16 * of the Software.

17 *

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19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.

21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR

22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,

23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE

24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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26 **************************************************************************/

29 #include "glheader.h"

30 #include "context.h"

31 #include "matrix.h"

32 #include "simple_list.h"

33 #include "extensions.h"

34 #include "framebuffer.h"

35 #include "imports.h"

36 #include "points.h"

38 #include "swrast/swrast.h"

39 #include "swrast_setup/swrast_setup.h"

40 #include "tnl/tnl.h"

42 #include "tnl/t_pipeline.h"

43 #include "tnl/t_vertex.h"

45 #include "drivers/common/driverfuncs.h"

47 #include "intel_screen.h"

49 #include "i830_dri.h"

51 #include "intel_chipset.h"

52 #include "intel_buffers.h"

53 #include "intel_tex.h"

54 #include "intel_ioctl.h"

55 #include "intel_batchbuffer.h"

56 #include "intel_blit.h"

57 #include "intel_pixel.h"

58 #include "intel_regions.h"

59 #include "intel_buffer_objects.h"

60 #include "intel_fbo.h"

61 #include "intel_decode.h"

62 #include "intel_bufmgr_ttm.h"

64 #include "drirenderbuffer.h"

65 #include "vblank.h"

66 #include "utils.h"

 #include "xmlpool.h"            /* for symbolic values of enum-type options */

68 #ifndef INTEL_DEBUG

69 int INTEL_DEBUG = (0);

70 #endif

72 #define need_GL_NV_point_sprite

73 #define need_GL_ARB_multisample

74 #define need_GL_ARB_point_parameters

75 #define need_GL_ARB_texture_compression

76 #define need_GL_ARB_vertex_buffer_object

77 #define need_GL_ARB_vertex_program

78 #define need_GL_ARB_window_pos

79 #define need_GL_ARB_occlusion_query

80 #define need_GL_EXT_blend_color

81 #define need_GL_EXT_blend_equation_separate

82 #define need_GL_EXT_blend_func_separate

83 #define need_GL_EXT_blend_minmax

84 #define need_GL_EXT_cull_vertex

85 #define need_GL_EXT_fog_coord

86 #define need_GL_EXT_framebuffer_object

87 #define need_GL_EXT_multi_draw_arrays

88 #define need_GL_EXT_secondary_color

89 #define need_GL_NV_vertex_program

90 #define need_GL_ATI_separate_stencil

91 #define need_GL_EXT_point_parameters

92 #define need_GL_VERSION_2_0

93 #define need_GL_VERSION_2_1

94 #define need_GL_ARB_shader_objects

95 #define need_GL_ARB_vertex_shader

97 #include "extension_helper.h"

99 #define DRIVER_DATE "20061102"

100

101 static const GLubyte *

 intelGetString(GLcontext * ctx, GLenum name)

103 {

104 const char *chipset;

105 static char buffer[128];

106

107 switch (name) {

108 case GL_VENDOR:

       return (GLubyte *) "Tungsten Graphics, Inc";

110 break;

111

112 case GL_RENDERER:

       switch (intel_context(ctx)->intelScreen->deviceID) {

114 case PCI_CHIP_845_G:

115 chipset = "Intel(R) 845G";

116 break;

117 case PCI_CHIP_I830_M:

118 chipset = "Intel(R) 830M";

119 break;

120 case PCI_CHIP_I855_GM:

121 chipset = "Intel(R) 852GM/855GM";

122 break;

123 case PCI_CHIP_I865_G:

124 chipset = "Intel(R) 865G";

125 break;

126 case PCI_CHIP_I915_G:

127 chipset = "Intel(R) 915G";

128 break;

129 case PCI_CHIP_E7221_G:

130 chipset = "Intel (R) E7221G (i915)";

131 break;

132 case PCI_CHIP_I915_GM:

133 chipset = "Intel(R) 915GM";

134 break;

135 case PCI_CHIP_I945_G:

136 chipset = "Intel(R) 945G";

137 break;

138 case PCI_CHIP_I945_GM:

139 chipset = "Intel(R) 945GM";

140 break;

141 case PCI_CHIP_I945_GME:

142 chipset = "Intel(R) 945GME";

143 break;

144 case PCI_CHIP_G33_G:

145 chipset = "Intel(R) G33";

146 break;

147 case PCI_CHIP_Q35_G:

148 chipset = "Intel(R) Q35";

149 break;

150 case PCI_CHIP_Q33_G:

151 chipset = "Intel(R) Q33";

152 break;

153 case PCI_CHIP_I965_Q:

154 chipset = "Intel(R) 965Q";

155 break;

156 case PCI_CHIP_I965_G:

157 case PCI_CHIP_I965_G_1:

158 chipset = "Intel(R) 965G";

159 break;

160 case PCI_CHIP_I946_GZ:

161 chipset = "Intel(R) 946GZ";

162 break;

163 case PCI_CHIP_I965_GM:

164 chipset = "Intel(R) 965GM";

165 break;

166 case PCI_CHIP_I965_GME:

167 chipset = "Intel(R) 965GME/GLE";

168 break;

169 case PCI_CHIP_IGD_GM:

170 chipset = "Intel(R) Integrated Graphics Device";

171 break;

172 default:

173 chipset = "Unknown Intel Chipset";

174 break;

175 }

176

       (void) driGetRendererString(buffer, chipset, DRIVER_DATE, 0);

178 return (GLubyte *) buffer;

179

180 default:

181 return NULL;

182 }

183 }

184

185 /**

186 * Extension strings exported by the intel driver.

187 *

188 * \note

189 * It appears that ARB_texture_env_crossbar has "disappeared" compared to the

190 * old i830-specific driver.

191 */

192 const struct dri_extension card_extensions[] = {

193 {"GL_ARB_multisample", GL_ARB_multisample_functions},

194 {"GL_ARB_multitexture", NULL},

195 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},

196 {"GL_NV_point_sprite", GL_NV_point_sprite_functions},

197 {"GL_ARB_texture_border_clamp", NULL},

198 {"GL_ARB_texture_compression", GL_ARB_texture_compression_functions},

199 {"GL_ARB_texture_cube_map", NULL},

200 {"GL_ARB_texture_env_add", NULL},

201 {"GL_ARB_texture_env_combine", NULL},

202 {"GL_ARB_texture_env_dot3", NULL},

203 {"GL_ARB_texture_mirrored_repeat", NULL},

204 {"GL_ARB_texture_non_power_of_two", NULL },

205 {"GL_ARB_texture_rectangle", NULL},

206 {"GL_NV_texture_rectangle", NULL},

207 {"GL_EXT_texture_rectangle", NULL},

208 {"GL_ARB_point_sprite", NULL},

209 {"GL_ARB_point_parameters", NULL},

210 {"GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions},

211 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},

212 {"GL_ARB_window_pos", GL_ARB_window_pos_functions},

213 {"GL_EXT_blend_color", GL_EXT_blend_color_functions},

214 {"GL_EXT_blend_equation_separate",

215 GL_EXT_blend_equation_separate_functions},

216 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},

217 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},

218 {"GL_EXT_blend_logic_op", NULL},

219 {"GL_EXT_blend_subtract", NULL},

220 {"GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions},

221 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions},

222 {"GL_EXT_multi_draw_arrays", GL_EXT_multi_draw_arrays_functions},

223 {"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions},

224 #if 1 /* XXX FBO temporary? */

225 {"GL_EXT_packed_depth_stencil", NULL},

226 #endif

227 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},

228 {"GL_EXT_stencil_wrap", NULL},

229 {"GL_EXT_texture_edge_clamp", NULL},

230 {"GL_EXT_texture_env_combine", NULL},

231 {"GL_EXT_texture_env_dot3", NULL},

232 {"GL_EXT_texture_filter_anisotropic", NULL},

233 {"GL_EXT_texture_lod_bias", NULL},

234 {"GL_EXT_texture_sRGB", NULL},

235 {"GL_3DFX_texture_compression_FXT1", NULL},

236 {"GL_APPLE_client_storage", NULL},

237 {"GL_MESA_pack_invert", NULL},

238 {"GL_MESA_ycbcr_texture", NULL},

239 {"GL_NV_blend_square", NULL},

240 {"GL_NV_vertex_program", GL_NV_vertex_program_functions},

241 {"GL_NV_vertex_program1_1", NULL},

242 { "GL_SGIS_generate_mipmap", NULL },

243 {NULL, NULL}

244 };

245

246 const struct dri_extension brw_extensions[] = {

247 { "GL_ARB_shading_language_100", GL_VERSION_2_0_functions},

248 { "GL_ARB_shading_language_120", GL_VERSION_2_1_functions},

249 { "GL_ARB_shader_objects", GL_ARB_shader_objects_functions},

250 { "GL_ARB_vertex_shader", GL_ARB_vertex_shader_functions},

251 { "GL_ARB_fragment_shader", NULL },

252 { "GL_ARB_draw_buffers", NULL },

253 {NULL, NULL}

254 };

255

256 const struct dri_extension arb_oc_extensions[] = {

257 {"GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},

258 {NULL, NULL}

259 };

260

261 const struct dri_extension ttm_extensions[] = {

262 {"GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions},

263 {"GL_ARB_pixel_buffer_object", NULL},

264 {NULL, NULL}

265 };

266

267 /**

268 * Initializes potential list of extensions if ctx == NULL, or actually enables

269 * extensions for a context.

270 */

 static void intelInitExtensions(GLcontext *ctx, GLboolean enable_imaging)

272 {

    struct intel_context *intel = ctx?intel_context(ctx):NULL;

274

275 /* Disable imaging extension until convolution is working in teximage paths.

276 */

277 enable_imaging = GL_FALSE;

278

    driInitExtensions(ctx, card_extensions, enable_imaging);

280

    if (intel == NULL || intel->ttm)

       driInitExtensions(ctx, ttm_extensions, GL_FALSE);

283

284 if (intel == NULL ||

        (IS_965(intel->intelScreen->deviceID) && 

         intel->intelScreen->drmMinor >= 8))

       driInitExtensions(ctx, arb_oc_extensions, GL_FALSE);

288

    if (intel == NULL || IS_965(intel->intelScreen->deviceID))

       driInitExtensions(ctx, brw_extensions, GL_FALSE);

291 }

292

293 static const struct dri_debug_control debug_control[] = {

294 { "tex", DEBUG_TEXTURE},

295 { "state", DEBUG_STATE},

296 { "ioctl", DEBUG_IOCTL},

297 { "blit", DEBUG_BLIT},

298 { "mip", DEBUG_MIPTREE},

299 { "fall", DEBUG_FALLBACKS},

300 { "verb", DEBUG_VERBOSE},

301 { "bat", DEBUG_BATCH},

302 { "pix", DEBUG_PIXEL},

303 { "buf", DEBUG_BUFMGR},

304 { "reg", DEBUG_REGION},

305 { "fbo", DEBUG_FBO},

306 { "lock", DEBUG_LOCK},

307 { "sync", DEBUG_SYNC},

308 { "prim", DEBUG_PRIMS },

309 { "vert", DEBUG_VERTS },

310 { "dri", DEBUG_DRI },

311 { "dma", DEBUG_DMA },

312 { "san", DEBUG_SANITY },

313 { "sleep", DEBUG_SLEEP },

314 { "stats", DEBUG_STATS },

315 { "tile", DEBUG_TILE },

316 { "sing", DEBUG_SINGLE_THREAD },

317 { "thre", DEBUG_SINGLE_THREAD },

318 { "wm", DEBUG_WM },

319 { "urb", DEBUG_URB },

320 { "vs", DEBUG_VS },

321 { NULL, 0 }

322 };

323

324

325 static void

 intelInvalidateState(GLcontext * ctx, GLuint new_state)

327 {

     struct intel_context *intel = intel_context(ctx);

329

330 _swrast_InvalidateState(ctx, new_state);

331 _swsetup_InvalidateState(ctx, new_state);

332 _vbo_InvalidateState(ctx, new_state);

333 _tnl_InvalidateState(ctx, new_state);

334 _tnl_invalidate_vertex_state(ctx, new_state);

335

336 intel->NewGLState |= new_state;

337

    if (intel->vtbl.invalidate_state)

       intel->vtbl.invalidate_state( intel, new_state );

340 }

341

342

343 void

344 intelFlush(GLcontext * ctx)

345 {

    struct intel_context *intel = intel_context(ctx);

347

348 if (intel->Fallback)

349 _swrast_flush(ctx);

350

    if (!IS_965(intel->intelScreen->deviceID))

352 INTEL_FIREVERTICES(intel);

353

    if (intel->batch->map != intel->batch->ptr)

355 intel_batchbuffer_flush(intel->batch);

356

357 /* XXX: Need to do an MI_FLUSH here.

358 */

359 }

360

361 void

362 intelFinish(GLcontext * ctx)

363 {

    struct intel_context *intel = intel_context(ctx);

365 intelFlush(ctx);

    if (intel->batch->last_fence) {

       dri_fence_wait(intel->batch->last_fence);

       dri_fence_unreference(intel->batch->last_fence);

369 intel->batch->last_fence = NULL;

370 }

371 }

372

373 static void

 intelBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)

375 {

         struct intel_context *intel = intel_context( ctx );

377 struct drm_i915_mmio io = {

378 .read_write = I915_MMIO_READ,

379 .reg = MMIO_REGS_PS_DEPTH_COUNT,

380 .data = &q->Result

381 };

382 intel->stats_wm++;

383 intelFinish(&intel->ctx);

         drmCommandWrite(intel->driFd, DRM_I915_MMIO, &io, sizeof(io));

385 }

386

387 static void

 intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)

389 {

         struct intel_context *intel = intel_context( ctx );

391 GLuint64EXT tmp;

392 struct drm_i915_mmio io = {

393 .read_write = I915_MMIO_READ,

394 .reg = MMIO_REGS_PS_DEPTH_COUNT,

395 .data = &tmp

396 };

397 intelFinish(&intel->ctx);

         drmCommandWrite(intel->driFd, DRM_I915_MMIO, &io, sizeof(io));

         q->Result = tmp - q->Result;

400 q->Ready = GL_TRUE;

401 intel->stats_wm--;

402 }

403

404 /** Driver-specific fence emit implementation for the fake memory manager. */

405 static unsigned int

 intel_fence_emit(void *private)

407 {

    struct intel_context *intel = (struct intel_context *)private;

409 unsigned int fence;

410

411 /* XXX: Need to emit a flush, if we haven't already (at least with the

412 * current batchbuffer implementation, we have).

413 */

414

415 fence = intelEmitIrqLocked(intel);

416

417 return fence;

418 }

419

420 /** Driver-specific fence wait implementation for the fake memory manager. */

421 static int

 intel_fence_wait(void *private, unsigned int cookie)

423 {

    struct intel_context *intel = (struct intel_context *)private;

425

426 intelWaitIrq(intel, cookie);

427

428 return 0;

429 }

430

431 static GLboolean

 intel_init_bufmgr(struct intel_context *intel)

433 {

434 intelScreenPrivate *intelScreen = intel->intelScreen;

    GLboolean ttm_disable = getenv("INTEL_NO_TTM") != NULL;

436

437 /* If we've got a new enough DDX that's initializing TTM and giving us

438 * object handles for the shared buffers, use that.

439 */

440 intel->ttm = GL_FALSE;

441 if (!ttm_disable &&

        intel->intelScreen->driScrnPriv->ddx_version.minor >= 9 &&

        intel->intelScreen->drmMinor >= 11 &&

        intel->intelScreen->front.bo_handle != -1)

445 {

       intel->bufmgr = intel_bufmgr_ttm_init(intel->driFd,

447 DRM_FENCE_TYPE_EXE,

448 DRM_FENCE_TYPE_EXE |

449 DRM_I915_FENCE_TYPE_RW,

450 BATCH_SZ);

       if (intel->bufmgr != NULL)

452 intel->ttm = GL_TRUE;

453 }

454 /* Otherwise, use the classic buffer manager. */

    if (intel->bufmgr == NULL) {

456 if (ttm_disable) {

          fprintf(stderr, "TTM buffer manager disabled.  Using classic.\n");

458 } else {

459 fprintf(stderr, "Failed to initialize TTM buffer manager. "

460 "Falling back to classic.\n");

461 }

462

       if (intelScreen->tex.size == 0) {

          fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",

465 __func__, __LINE__);

466 return GL_FALSE;

467 }

468

       intel->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,

470 intelScreen->tex.map,

471 intelScreen->tex.size,

472 intel_fence_emit,

473 intel_fence_wait,

474 intel);

475 }

476

477 return GL_TRUE;

478 }

479

480 void

 intelInitDriverFunctions(struct dd_function_table *functions)

482 {

483 _mesa_init_driver_functions(functions);

484

485 functions->Flush = intelFlush;

486 functions->Finish = intelFinish;

487 functions->GetString = intelGetString;

488 functions->UpdateState = intelInvalidateState;

489

490 functions->CopyColorTable = _swrast_CopyColorTable;

491 functions->CopyColorSubTable = _swrast_CopyColorSubTable;

492 functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;

493 functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;

494

495 functions->BeginQuery = intelBeginQuery;

496 functions->EndQuery = intelEndQuery;

497

498 intelInitTextureFuncs(functions);

499 intelInitStateFuncs(functions);

500 intelInitBufferFuncs(functions);

501 }

502

503

504 GLboolean

 intelInitContext(struct intel_context *intel,

506 const __GLcontextModes * mesaVis,

507 __DRIcontextPrivate * driContextPriv,

508 void *sharedContextPrivate,

509 struct dd_function_table *functions)

510 {

511 GLcontext *ctx = &intel->ctx;

512 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;

513 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;

    intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;

    volatile struct drm_i915_sarea *saPriv = (struct drm_i915_sarea *)

       (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);

517 int fthrottle_mode;

518

    if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,

520 functions, (void *) intel)) {

       _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);

522 return GL_FALSE;

523 }

524

525 driContextPriv->driverPrivate = intel;

526 intel->intelScreen = intelScreen;

527 intel->driScreen = sPriv;

528 intel->sarea = saPriv;

529

530 /* Dri stuff */

531 intel->hHWContext = driContextPriv->hHWContext;

532 intel->driFd = sPriv->fd;

533 intel->driHwLock = sPriv->lock;

534

535 intel->width = intelScreen->width;

536 intel->height = intelScreen->height;

537

    if (intelScreen->deviceID == PCI_CHIP_I865_G)

539 intel->maxBatchSize = 4096;

540 else

541 intel->maxBatchSize = BATCH_SZ;

542

    if (!intel_init_bufmgr(intel))

544 return GL_FALSE;

545

    driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,

547 intel->driScreen->myNum,

                        IS_965(intelScreen->deviceID) ? "i965" : "i915");

549

    ctx->Const.MaxTextureMaxAnisotropy = 2.0;

551

552 /* This doesn't yet catch all non-conformant rendering, but it's a

553 * start.

554 */

    if (getenv("INTEL_STRICT_CONFORMANCE")) {

556 intel->strict_conformance = 1;

557 }

558

559 if (intel->strict_conformance) {

       ctx->Const.MinLineWidth = 1.0;

       ctx->Const.MinLineWidthAA = 1.0;

       ctx->Const.MaxLineWidth = 1.0;

       ctx->Const.MaxLineWidthAA = 1.0;

       ctx->Const.LineWidthGranularity = 1.0;

565 }

566 else {

       ctx->Const.MinLineWidth = 1.0;

       ctx->Const.MinLineWidthAA = 1.0;

       ctx->Const.MaxLineWidth = 5.0;

       ctx->Const.MaxLineWidthAA = 5.0;

       ctx->Const.LineWidthGranularity = 0.5;

572 }

573

    ctx->Const.MinPointSize = 1.0;

    ctx->Const.MinPointSizeAA = 1.0;

    ctx->Const.MaxPointSize = 255.0;

    ctx->Const.MaxPointSizeAA = 3.0;

    ctx->Const.PointSizeGranularity = 1.0;

579

580 /* reinitialize the context point state.

581 * It depend on constants in __GLcontextRec::Const

582 */

583 _mesa_init_point(ctx);

584

    ctx->Const.MaxColorAttachments = 4;  /* XXX FBO: review this */

586

587 /* Initialize the software rasterizer and helper modules. */

588 _swrast_CreateContext(ctx);

589 _vbo_CreateContext(ctx);

590 _tnl_CreateContext(ctx);

591 _swsetup_CreateContext(ctx);

592

593 /* Configure swrast to match hardware characteristics: */

594 _swrast_allow_pixel_fog(ctx, GL_FALSE);

595 _swrast_allow_vertex_fog(ctx, GL_TRUE);

596

    intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;

598 intel->hw_stipple = 1;

599

600 /* XXX FBO: this doesn't seem to be used anywhere */

601 switch (mesaVis->depthBits) {

602 case 0: /* what to do in this case? */

603 case 16:

604 intel->polygon_offset_scale = 1.0;

605 break;

606 case 24:

       intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */

608 break;

609 default:

610 assert(0);

611 break;

612 }

613

    if (IS_965(intelScreen->deviceID))

615 intel->polygon_offset_scale /= 0xffff;

616

617 intel->RenderIndex = ~0;

618

    fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");

620 intel->irqsEmitted = 0;

621

    intel->do_irqs = (intel->intelScreen->irq_active &&

623 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);

624

625 intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);

626

627 _math_matrix_ctr(&intel->ViewportMatrix);

628

    if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {

       _mesa_printf("IRQs not active.  Exiting\n");

631 exit(1);

632 }

633

634 intelInitExtensions(ctx, GL_FALSE);

635

    INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);

637 if (INTEL_DEBUG & DEBUG_BUFMGR)

       dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);

639

    if (!sPriv->dri2.enabled)

641 intel_recreate_static_regions(intel);

642

    intel->batch = intel_batchbuffer_alloc(intel);

644 intel->last_swap_fence = NULL;

645 intel->first_swap_fence = NULL;

646

647 intel_bufferobj_init(intel);

648 intel_fbo_init(intel);

649

    if (intel->ctx.Mesa_DXTn) {

       _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");

       _mesa_enable_extension(ctx, "GL_S3_s3tc");

653 }

    else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {

       _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");

656 }

657

    intel->prim.primitive = ~0;

659

660 /* Force all software fallbacks */

    if (driQueryOptionb(&intel->optionCache, "no_rast")) {

       fprintf(stderr, "disabling 3D rasterization\n");

       FALLBACK(intel, INTEL_FALLBACK_USER, 1);

664 intel->no_rast = 1;

665 }

666

667 /* Disable all hardware rendering (skip emitting batches and fences/waits

668 * to the kernel)

669 */

    intel->no_hw = getenv("INTEL_NO_HW") != NULL;

671

672 return GL_TRUE;

673 }

674

675 void

676 intelDestroyContext(__DRIcontextPrivate * driContextPriv)

677 {

678 struct intel_context *intel =

       (struct intel_context *) driContextPriv->driverPrivate;

680

681 assert(intel); /* should never be null */

682 if (intel) {

683 GLboolean release_texture_heaps;

684

685 INTEL_FIREVERTICES(intel);

686

       intel->vtbl.destroy(intel);

688

       release_texture_heaps = (intel->ctx.Shared->RefCount == 1);

690 _swsetup_DestroyContext(&intel->ctx);

691 _tnl_DestroyContext(&intel->ctx);

692 _vbo_DestroyContext(&intel->ctx);

693

694 _swrast_DestroyContext(&intel->ctx);

       intel->Fallback = 0;      /* don't call _swrast_Flush later */

696

697 intel_batchbuffer_free(intel->batch);

698

699 if (intel->last_swap_fence) {

700 dri_fence_wait(intel->last_swap_fence);

701 dri_fence_unreference(intel->last_swap_fence);

702 intel->last_swap_fence = NULL;

703 }

704 if (intel->first_swap_fence) {

705 dri_fence_wait(intel->first_swap_fence);

706 dri_fence_unreference(intel->first_swap_fence);

707 intel->first_swap_fence = NULL;

708 }

709

710 if (release_texture_heaps) {

711 /* This share group is about to go away, free our private

712 * texture object data.

713 */

714 if (INTEL_DEBUG & DEBUG_TEXTURE)

             fprintf(stderr, "do something to free texture heaps\n");

716 }

717

718 /* free the Mesa context */

719 _mesa_free_context_data(&intel->ctx);

720

721 dri_bufmgr_destroy(intel->bufmgr);

722 }

723 }

724

725 GLboolean

726 intelUnbindContext(__DRIcontextPrivate * driContextPriv)

727 {

728 return GL_TRUE;

729 }

730

731 GLboolean

732 intelMakeCurrent(__DRIcontextPrivate * driContextPriv,

733 __DRIdrawablePrivate * driDrawPriv,

734 __DRIdrawablePrivate * driReadPriv)

735 {

736

737 if (driContextPriv) {

738 struct intel_context *intel =

          (struct intel_context *) driContextPriv->driverPrivate;

740 struct intel_framebuffer *intel_fb =

          (struct intel_framebuffer *) driDrawPriv->driverPrivate;

       GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;

743

744

745 /* XXX FBO temporary fix-ups! */

746 /* if the renderbuffers don't have regions, init them from the context */

       if (!driContextPriv->driScreenPriv->dri2.enabled) {

748 struct intel_renderbuffer *irbDepth

             = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);

750 struct intel_renderbuffer *irbStencil

             = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);

752

          if (intel_fb->color_rb[0]) {

             intel_renderbuffer_set_region(intel_fb->color_rb[0],

755 intel->front_region);

756 }

          if (intel_fb->color_rb[1]) {

             intel_renderbuffer_set_region(intel_fb->color_rb[1],

759 intel->back_region);

760 }

761 #if 0

          if (intel_fb->color_rb[2]) {

             intel_renderbuffer_set_region(intel_fb->color_rb[2],

764 intel->third_region);

765 }

766 #endif

767 if (irbDepth) {

             intel_renderbuffer_set_region(irbDepth, intel->depth_region);

769 }

770 if (irbStencil) {

             intel_renderbuffer_set_region(irbStencil, intel->depth_region);

772 }

773 }

774

775 /* set GLframebuffer size to match window, if needed */

       driUpdateFramebufferSize(&intel->ctx, driDrawPriv);

777

778 if (driReadPriv != driDrawPriv) {

          driUpdateFramebufferSize(&intel->ctx, driReadPriv);

780 }

781

       _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);

783

784 /* The drawbuffer won't always be updated by _mesa_make_current:

785 */

       if (intel->ctx.DrawBuffer == &intel_fb->Base) {

787

          if (intel->driReadDrawable != driReadPriv)

789 intel->driReadDrawable = driReadPriv;

790

          if (intel->driDrawable != driDrawPriv) {

             if (driDrawPriv->swap_interval == (unsigned)-1) {

793 int i;

794

                driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)

                   ? driGetDefaultVBlankFlags(&intel->optionCache)

797 : VBLANK_FLAG_NO_IRQ;

798

                (*dri_interface->getUST) (&intel_fb->swap_ust);

800 driDrawableInitVBlank(driDrawPriv);

801 intel_fb->vbl_waited = driDrawPriv->vblSeq;

802

                for (i = 0; i < (intel->intelScreen->third.handle ? 3 : 2); i++) {

                   if (intel_fb->color_rb[i])

                      intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;

806 }

807 }

808 intel->driDrawable = driDrawPriv;

809 intelWindowMoved(intel);

810 }

811

          intel_draw_buffer(&intel->ctx, &intel_fb->Base);

813 }

814 }

815 else {

       _mesa_make_current(NULL, NULL, NULL);

817 }

818

819 return GL_TRUE;

820 }

821

822 static void

 intelContendedLock(struct intel_context *intel, GLuint flags)

824 {

825 __DRIdrawablePrivate *dPriv = intel->driDrawable;

826 __DRIscreenPrivate *sPriv = intel->driScreen;

    volatile struct drm_i915_sarea *sarea = intel->sarea;

828 int drawable_changed = 0;

829 int me = intel->hHWContext;

830

    drmGetLock(intel->driFd, intel->hHWContext, flags);

832

833 if (INTEL_DEBUG & DEBUG_LOCK)

       _mesa_printf("%s - got contended lock\n", __progname);

835

836 /* If the window moved, may need to set a new cliprect now.

837 *

838 * NOTE: This releases and regains the hw lock, so all state

839 * checking must be done *after* this call:

840 */

841 if (dPriv) {

       if (sPriv->dri2.enabled)

          drawable_changed = __driParseEvents(sPriv, dPriv);

844 else

845 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);

846 }

847

    if (sarea && sarea->ctxOwner != me) {

849 if (INTEL_DEBUG & DEBUG_BUFMGR) {

          fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n",

851 sarea->ctxOwner, me);

852 }

853 sarea->ctxOwner = me;

854 }

855

856 /* If the last consumer of the texture memory wasn't us, notify the fake

857 * bufmgr and record the new owner. We should have the memory shared

858 * between contexts of a single fake bufmgr, but this will at least make

859 * things correct for now.

860 */

    if (!intel->ttm && sarea->texAge != intel->hHWContext) {

862 sarea->texAge = intel->hHWContext;

863 dri_bufmgr_fake_contended_lock_take(intel->bufmgr);

864 if (INTEL_DEBUG & DEBUG_BATCH)

865 intel_decode_context_reset();

866 if (INTEL_DEBUG & DEBUG_BUFMGR)

          fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",

868 sarea->ctxOwner, intel->hHWContext);

869 }

870

    if (!sPriv->dri2.enabled) {

       if (sarea->width != intel->width || sarea->height != intel->height) {

873 int numClipRects = intel->numClipRects;

874

875 /*

876 * FIXME: Really only need to do this when drawing to a

877 * common back- or front buffer.

878 */

879

880 /*

881 * This will essentially drop the outstanding batchbuffer on

882 * the floor.

883 */

884 intel->numClipRects = 0;

885

886 if (intel->Fallback)

887 _swrast_flush(&intel->ctx);

888

          if (!IS_965(intel->intelScreen->deviceID))

890 INTEL_FIREVERTICES(intel);

891

          if (intel->batch->map != intel->batch->ptr)

893 intel_batchbuffer_flush(intel->batch);

894

895 intel->numClipRects = numClipRects;

896

897 /* force window update */

898 intel->lastStamp = 0;

899

900 intel->width = sarea->width;

901 intel->height = sarea->height;

902 }

903

904 /* Drawable changed?

905 */

       if (dPriv && intel->lastStamp != dPriv->lastStamp) {

907 intelWindowMoved(intel);

908 intel->lastStamp = dPriv->lastStamp;

909 }

910 } else if (drawable_changed) {

911 intelWindowMoved(intel);

      intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);

913 }

914 }

915

916

917 _glthread_DECLARE_STATIC_MUTEX(lockMutex);

918

919 /* Lock the hardware and validate our state.

920 */

 void LOCK_HARDWARE( struct intel_context *intel )

922 {

923 __DRIdrawablePrivate *dPriv = intel->driDrawable;

924 char __ret = 0;

925 struct intel_framebuffer *intel_fb = NULL;

926 struct intel_renderbuffer *intel_rb = NULL;

927

928 _glthread_LOCK_MUTEX(lockMutex);

929 assert(!intel->locked);

930

931 if (intel->driDrawable) {

932 intel_fb = intel->driDrawable->driverPrivate;

933

934 if (intel_fb)

935 intel_rb =

936 intel_get_renderbuffer(&intel_fb->Base,

                                     intel_fb->Base._ColorDrawBufferIndexes[0]);

938 }

939

     if (intel_rb && dPriv->vblFlags &&

941 !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&

         (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {

943 drmVBlank vbl;

944

945 vbl.request.type = DRM_VBLANK_ABSOLUTE;

946

         if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {

948 vbl.request.type |= DRM_VBLANK_SECONDARY;

949 }

950

         vbl.request.sequence = intel_rb->vbl_pending;

         drmWaitVBlank(intel->driFd, &vbl);

         intel_fb->vbl_waited = vbl.reply.sequence;

954 }

955

     DRM_CAS(intel->driHwLock, intel->hHWContext,

         (DRM_LOCK_HELD|intel->hHWContext), __ret);

958

959 if (__ret)

         intelContendedLock( intel, 0 );

961

962 intel->locked = 1;

963 if (INTEL_DEBUG & DEBUG_LOCK)

       _mesa_printf("%s - locked\n", __progname);

965 }

966

967

968 /* Unlock the hardware using the global current context

969 */

 void UNLOCK_HARDWARE( struct intel_context *intel )

971 {

972 intel->locked = 0;

973

    DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);

975

976 _glthread_UNLOCK_MUTEX(lockMutex);

977

978 if (INTEL_DEBUG & DEBUG_LOCK)

       _mesa_printf("%s - unlocked\n", __progname);

980

981 /**

982 * Nothing should be left in batch outside of LOCK/UNLOCK which references

983 * cliprects.

984 */

    assert(intel->batch->cliprect_mode != REFERENCES_CLIPRECTS);

986 }

987