i965: Add HiZ operation state to brw_context
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/fbobject.h"
33 #include "main/framebuffer.h"
34 #include "main/imports.h"
35 #include "main/points.h"
36 #include "main/renderbuffer.h"
37
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "tnl/tnl.h"
41 #include "drivers/common/driverfuncs.h"
42 #include "drivers/common/meta.h"
43
44 #include "intel_chipset.h"
45 #include "intel_buffers.h"
46 #include "intel_tex.h"
47 #include "intel_batchbuffer.h"
48 #include "intel_clear.h"
49 #include "intel_extensions.h"
50 #include "intel_pixel.h"
51 #include "intel_regions.h"
52 #include "intel_buffer_objects.h"
53 #include "intel_fbo.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56 #include "intel_mipmap_tree.h"
57
58 #include "utils.h"
59 #include "../glsl/ralloc.h"
60
61 #ifndef INTEL_DEBUG
62 int INTEL_DEBUG = (0);
63 #endif
64
65
66 static const GLubyte *
67 intelGetString(struct gl_context * ctx, GLenum name)
68 {
69 const struct intel_context *const intel = intel_context(ctx);
70 const char *chipset;
71 static char buffer[128];
72
73 switch (name) {
74 case GL_VENDOR:
75 return (GLubyte *) "Tungsten Graphics, Inc";
76 break;
77
78 case GL_RENDERER:
79 switch (intel->intelScreen->deviceID) {
80 case PCI_CHIP_845_G:
81 chipset = "Intel(R) 845G";
82 break;
83 case PCI_CHIP_I830_M:
84 chipset = "Intel(R) 830M";
85 break;
86 case PCI_CHIP_I855_GM:
87 chipset = "Intel(R) 852GM/855GM";
88 break;
89 case PCI_CHIP_I865_G:
90 chipset = "Intel(R) 865G";
91 break;
92 case PCI_CHIP_I915_G:
93 chipset = "Intel(R) 915G";
94 break;
95 case PCI_CHIP_E7221_G:
96 chipset = "Intel (R) E7221G (i915)";
97 break;
98 case PCI_CHIP_I915_GM:
99 chipset = "Intel(R) 915GM";
100 break;
101 case PCI_CHIP_I945_G:
102 chipset = "Intel(R) 945G";
103 break;
104 case PCI_CHIP_I945_GM:
105 chipset = "Intel(R) 945GM";
106 break;
107 case PCI_CHIP_I945_GME:
108 chipset = "Intel(R) 945GME";
109 break;
110 case PCI_CHIP_G33_G:
111 chipset = "Intel(R) G33";
112 break;
113 case PCI_CHIP_Q35_G:
114 chipset = "Intel(R) Q35";
115 break;
116 case PCI_CHIP_Q33_G:
117 chipset = "Intel(R) Q33";
118 break;
119 case PCI_CHIP_IGD_GM:
120 case PCI_CHIP_IGD_G:
121 chipset = "Intel(R) IGD";
122 break;
123 case PCI_CHIP_I965_Q:
124 chipset = "Intel(R) 965Q";
125 break;
126 case PCI_CHIP_I965_G:
127 case PCI_CHIP_I965_G_1:
128 chipset = "Intel(R) 965G";
129 break;
130 case PCI_CHIP_I946_GZ:
131 chipset = "Intel(R) 946GZ";
132 break;
133 case PCI_CHIP_I965_GM:
134 chipset = "Intel(R) 965GM";
135 break;
136 case PCI_CHIP_I965_GME:
137 chipset = "Intel(R) 965GME/GLE";
138 break;
139 case PCI_CHIP_GM45_GM:
140 chipset = "Mobile IntelĀ® GM45 Express Chipset";
141 break;
142 case PCI_CHIP_IGD_E_G:
143 chipset = "Intel(R) Integrated Graphics Device";
144 break;
145 case PCI_CHIP_G45_G:
146 chipset = "Intel(R) G45/G43";
147 break;
148 case PCI_CHIP_Q45_G:
149 chipset = "Intel(R) Q45/Q43";
150 break;
151 case PCI_CHIP_G41_G:
152 chipset = "Intel(R) G41";
153 break;
154 case PCI_CHIP_B43_G:
155 case PCI_CHIP_B43_G1:
156 chipset = "Intel(R) B43";
157 break;
158 case PCI_CHIP_ILD_G:
159 chipset = "Intel(R) Ironlake Desktop";
160 break;
161 case PCI_CHIP_ILM_G:
162 chipset = "Intel(R) Ironlake Mobile";
163 break;
164 case PCI_CHIP_SANDYBRIDGE_GT1:
165 case PCI_CHIP_SANDYBRIDGE_GT2:
166 case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167 chipset = "Intel(R) Sandybridge Desktop";
168 break;
169 case PCI_CHIP_SANDYBRIDGE_M_GT1:
170 case PCI_CHIP_SANDYBRIDGE_M_GT2:
171 case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172 chipset = "Intel(R) Sandybridge Mobile";
173 break;
174 case PCI_CHIP_SANDYBRIDGE_S:
175 chipset = "Intel(R) Sandybridge Server";
176 break;
177 case PCI_CHIP_IVYBRIDGE_GT1:
178 case PCI_CHIP_IVYBRIDGE_GT2:
179 chipset = "Intel(R) Ivybridge Desktop";
180 break;
181 case PCI_CHIP_IVYBRIDGE_M_GT1:
182 case PCI_CHIP_IVYBRIDGE_M_GT2:
183 chipset = "Intel(R) Ivybridge Mobile";
184 break;
185 case PCI_CHIP_IVYBRIDGE_S_GT1:
186 chipset = "Intel(R) Ivybridge Server";
187 break;
188 default:
189 chipset = "Unknown Intel Chipset";
190 break;
191 }
192
193 (void) driGetRendererString(buffer, chipset, 0);
194 return (GLubyte *) buffer;
195
196 default:
197 return NULL;
198 }
199 }
200
201 static void
202 intel_flush_front(struct gl_context *ctx)
203 {
204 struct intel_context *intel = intel_context(ctx);
205 __DRIcontext *driContext = intel->driContext;
206 __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
207
208 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
209 if (screen->dri2.loader &&
210 (screen->dri2.loader->base.version >= 2)
211 && (screen->dri2.loader->flushFrontBuffer != NULL) &&
212 driContext->driDrawablePriv &&
213 driContext->driDrawablePriv->loaderPrivate) {
214 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
215 driContext->driDrawablePriv->loaderPrivate);
216
217 /* We set the dirty bit in intel_prepare_render() if we're
218 * front buffer rendering once we get there.
219 */
220 intel->front_buffer_dirty = false;
221 }
222 }
223 }
224
225 static unsigned
226 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
227 {
228 return _mesa_get_format_bytes(rb->Base.Format) * 8;
229 }
230
231 static void
232 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
233 __DRIdrawable *drawable,
234 __DRIbuffer **buffers,
235 int *count);
236
237 static void
238 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
239 __DRIdrawable *drawable,
240 __DRIbuffer *buffer,
241 struct intel_renderbuffer *rb,
242 const char *buffer_name);
243
244 static void
245 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
246 __DRIdrawable *drawable,
247 __DRIbuffer **buffers,
248 unsigned **attachments,
249 int *count);
250
251 static void
252 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
253 __DRIdrawable *drawable,
254 __DRIbuffer *buffer,
255 struct intel_renderbuffer *rb,
256 const char *buffer_name);
257 static void
258 intel_verify_dri2_has_hiz(struct intel_context *intel,
259 __DRIdrawable *drawable,
260 __DRIbuffer **buffers,
261 unsigned **attachments,
262 int *count);
263
264 void
265 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
266 {
267 struct gl_framebuffer *fb = drawable->driverPrivate;
268 struct intel_renderbuffer *rb;
269 struct intel_context *intel = context->driverPrivate;
270 __DRIbuffer *buffers = NULL;
271 unsigned *attachments = NULL;
272 int i, count;
273 const char *region_name;
274
275 bool try_separate_stencil =
276 intel->has_separate_stencil &&
277 intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE &&
278 intel->intelScreen->driScrnPriv->dri2.loader != NULL &&
279 intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 &&
280 intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL;
281
282 assert(!intel->must_use_separate_stencil || try_separate_stencil);
283
284 /* If we're rendering to the fake front buffer, make sure all the
285 * pending drawing has landed on the real front buffer. Otherwise
286 * when we eventually get to DRI2GetBuffersWithFormat the stale
287 * real front buffer contents will get copied to the new fake front
288 * buffer.
289 */
290 if (intel->is_front_buffer_rendering) {
291 intel_flush(&intel->ctx);
292 intel_flush_front(&intel->ctx);
293 }
294
295 /* Set this up front, so that in case our buffers get invalidated
296 * while we're getting new buffers, we don't clobber the stamp and
297 * thus ignore the invalidate. */
298 drawable->lastStamp = drawable->dri2.stamp;
299
300 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
301 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
302
303 if (try_separate_stencil) {
304 intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers,
305 &attachments, &count);
306 } else {
307 intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers,
308 &count);
309 }
310
311 if (buffers == NULL)
312 return;
313
314 for (i = 0; i < count; i++) {
315 switch (buffers[i].attachment) {
316 case __DRI_BUFFER_FRONT_LEFT:
317 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
318 region_name = "dri2 front buffer";
319 break;
320
321 case __DRI_BUFFER_FAKE_FRONT_LEFT:
322 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
323 region_name = "dri2 fake front buffer";
324 break;
325
326 case __DRI_BUFFER_BACK_LEFT:
327 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
328 region_name = "dri2 back buffer";
329 break;
330
331 case __DRI_BUFFER_DEPTH:
332 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
333 region_name = "dri2 depth buffer";
334 break;
335
336 case __DRI_BUFFER_HIZ:
337 /* The hiz region resides in the depth renderbuffer. */
338 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
339 region_name = "dri2 hiz buffer";
340 break;
341
342 case __DRI_BUFFER_DEPTH_STENCIL:
343 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
344 region_name = "dri2 depth / stencil buffer";
345 break;
346
347 case __DRI_BUFFER_STENCIL:
348 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
349 region_name = "dri2 stencil buffer";
350 break;
351
352 case __DRI_BUFFER_ACCUM:
353 default:
354 fprintf(stderr,
355 "unhandled buffer attach event, attachment type %d\n",
356 buffers[i].attachment);
357 return;
358 }
359
360 if (try_separate_stencil) {
361 intel_process_dri2_buffer_with_separate_stencil(intel, drawable,
362 &buffers[i], rb,
363 region_name);
364 } else {
365 intel_process_dri2_buffer_no_separate_stencil(intel, drawable,
366 &buffers[i], rb,
367 region_name);
368 }
369 }
370
371 if (try_separate_stencil
372 && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) {
373 intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments,
374 &count);
375 }
376
377 if (attachments)
378 free(attachments);
379
380 driUpdateFramebufferSize(&intel->ctx, drawable);
381 }
382
383 /**
384 * intel_prepare_render should be called anywhere that curent read/drawbuffer
385 * state is required.
386 */
387 void
388 intel_prepare_render(struct intel_context *intel)
389 {
390 __DRIcontext *driContext = intel->driContext;
391 __DRIdrawable *drawable;
392
393 drawable = driContext->driDrawablePriv;
394 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
395 if (drawable->lastStamp != drawable->dri2.stamp)
396 intel_update_renderbuffers(driContext, drawable);
397 intel_draw_buffer(&intel->ctx);
398 driContext->dri2.draw_stamp = drawable->dri2.stamp;
399 }
400
401 drawable = driContext->driReadablePriv;
402 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
403 if (drawable->lastStamp != drawable->dri2.stamp)
404 intel_update_renderbuffers(driContext, drawable);
405 driContext->dri2.read_stamp = drawable->dri2.stamp;
406 }
407
408 /* If we're currently rendering to the front buffer, the rendering
409 * that will happen next will probably dirty the front buffer. So
410 * mark it as dirty here.
411 */
412 if (intel->is_front_buffer_rendering)
413 intel->front_buffer_dirty = true;
414
415 /* Wait for the swapbuffers before the one we just emitted, so we
416 * don't get too many swaps outstanding for apps that are GPU-heavy
417 * but not CPU-heavy.
418 *
419 * We're using intelDRI2Flush (called from the loader before
420 * swapbuffer) and glFlush (for front buffer rendering) as the
421 * indicator that a frame is done and then throttle when we get
422 * here as we prepare to render the next frame. At this point for
423 * round trips for swap/copy and getting new buffers are done and
424 * we'll spend less time waiting on the GPU.
425 *
426 * Unfortunately, we don't have a handle to the batch containing
427 * the swap, and getting our hands on that doesn't seem worth it,
428 * so we just us the first batch we emitted after the last swap.
429 */
430 if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
431 drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
432 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
433 intel->first_post_swapbuffers_batch = NULL;
434 intel->need_throttle = false;
435 }
436 }
437
438 static void
439 intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
440 {
441 struct intel_context *intel = intel_context(ctx);
442 __DRIcontext *driContext = intel->driContext;
443
444 if (intel->saved_viewport)
445 intel->saved_viewport(ctx, x, y, w, h);
446
447 if (ctx->DrawBuffer->Name == 0) {
448 dri2InvalidateDrawable(driContext->driDrawablePriv);
449 dri2InvalidateDrawable(driContext->driReadablePriv);
450 }
451 }
452
453 static const struct dri_debug_control debug_control[] = {
454 { "tex", DEBUG_TEXTURE},
455 { "state", DEBUG_STATE},
456 { "ioctl", DEBUG_IOCTL},
457 { "blit", DEBUG_BLIT},
458 { "mip", DEBUG_MIPTREE},
459 { "fall", DEBUG_FALLBACKS},
460 { "verb", DEBUG_VERBOSE},
461 { "bat", DEBUG_BATCH},
462 { "pix", DEBUG_PIXEL},
463 { "buf", DEBUG_BUFMGR},
464 { "reg", DEBUG_REGION},
465 { "fbo", DEBUG_FBO},
466 { "gs", DEBUG_GS},
467 { "sync", DEBUG_SYNC},
468 { "prim", DEBUG_PRIMS },
469 { "vert", DEBUG_VERTS },
470 { "dri", DEBUG_DRI },
471 { "sf", DEBUG_SF },
472 { "san", DEBUG_SANITY },
473 { "sleep", DEBUG_SLEEP },
474 { "stats", DEBUG_STATS },
475 { "tile", DEBUG_TILE },
476 { "wm", DEBUG_WM },
477 { "urb", DEBUG_URB },
478 { "vs", DEBUG_VS },
479 { "clip", DEBUG_CLIP },
480 { NULL, 0 }
481 };
482
483
484 static void
485 intelInvalidateState(struct gl_context * ctx, GLuint new_state)
486 {
487 struct intel_context *intel = intel_context(ctx);
488
489 _swrast_InvalidateState(ctx, new_state);
490 _vbo_InvalidateState(ctx, new_state);
491
492 intel->NewGLState |= new_state;
493
494 if (intel->vtbl.invalidate_state)
495 intel->vtbl.invalidate_state( intel, new_state );
496 }
497
498 void
499 intel_flush_rendering_to_batch(struct gl_context *ctx)
500 {
501 struct intel_context *intel = intel_context(ctx);
502
503 if (intel->Fallback)
504 _swrast_flush(ctx);
505
506 if (intel->gen < 4)
507 INTEL_FIREVERTICES(intel);
508 }
509
510 void
511 intel_flush(struct gl_context *ctx)
512 {
513 struct intel_context *intel = intel_context(ctx);
514
515 intel_flush_rendering_to_batch(ctx);
516
517 if (intel->batch.used)
518 intel_batchbuffer_flush(intel);
519 }
520
521 static void
522 intel_glFlush(struct gl_context *ctx)
523 {
524 struct intel_context *intel = intel_context(ctx);
525
526 intel_flush(ctx);
527 intel_flush_front(ctx);
528 if (intel->is_front_buffer_rendering)
529 intel->need_throttle = true;
530 }
531
532 void
533 intelFinish(struct gl_context * ctx)
534 {
535 struct intel_context *intel = intel_context(ctx);
536
537 intel_flush(ctx);
538 intel_flush_front(ctx);
539
540 if (intel->batch.last_bo)
541 drm_intel_bo_wait_rendering(intel->batch.last_bo);
542 }
543
544 void
545 intelInitDriverFunctions(struct dd_function_table *functions)
546 {
547 _mesa_init_driver_functions(functions);
548
549 functions->Flush = intel_glFlush;
550 functions->Finish = intelFinish;
551 functions->GetString = intelGetString;
552 functions->UpdateState = intelInvalidateState;
553
554 intelInitTextureFuncs(functions);
555 intelInitTextureImageFuncs(functions);
556 intelInitTextureSubImageFuncs(functions);
557 intelInitTextureCopyImageFuncs(functions);
558 intelInitStateFuncs(functions);
559 intelInitClearFuncs(functions);
560 intelInitBufferFuncs(functions);
561 intelInitPixelFuncs(functions);
562 intelInitBufferObjectFuncs(functions);
563 intel_init_syncobj_functions(functions);
564 }
565
566 bool
567 intelInitContext(struct intel_context *intel,
568 int api,
569 const struct gl_config * mesaVis,
570 __DRIcontext * driContextPriv,
571 void *sharedContextPrivate,
572 struct dd_function_table *functions)
573 {
574 struct gl_context *ctx = &intel->ctx;
575 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
576 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
577 struct intel_screen *intelScreen = sPriv->driverPrivate;
578 int bo_reuse_mode;
579 struct gl_config visual;
580
581 /* we can't do anything without a connection to the device */
582 if (intelScreen->bufmgr == NULL)
583 return false;
584
585 /* Can't rely on invalidate events, fall back to glViewport hack */
586 if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
587 intel->saved_viewport = functions->Viewport;
588 functions->Viewport = intel_viewport;
589 }
590
591 if (mesaVis == NULL) {
592 memset(&visual, 0, sizeof visual);
593 mesaVis = &visual;
594 }
595
596 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
597 functions, (void *) intel)) {
598 printf("%s: failed to init mesa context\n", __FUNCTION__);
599 return false;
600 }
601
602 driContextPriv->driverPrivate = intel;
603 intel->intelScreen = intelScreen;
604 intel->driContext = driContextPriv;
605 intel->driFd = sPriv->fd;
606
607 intel->gen = intelScreen->gen;
608
609 const int devID = intelScreen->deviceID;
610
611 if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID))
612 intel->gt = 1;
613 else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID))
614 intel->gt = 2;
615 else
616 intel->gt = 0;
617
618 if (IS_G4X(devID)) {
619 intel->is_g4x = true;
620 } else if (IS_945(devID)) {
621 intel->is_945 = true;
622 }
623
624 if (intel->gen >= 5) {
625 intel->needs_ff_sync = true;
626 }
627
628 intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
629 intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
630 intel->has_hiz = intel->intelScreen->hw_has_hiz;
631
632 memset(&ctx->TextureFormatSupported, 0,
633 sizeof(ctx->TextureFormatSupported));
634 ctx->TextureFormatSupported[MESA_FORMAT_ARGB8888] = true;
635 if (devID != PCI_CHIP_I830_M && devID != PCI_CHIP_845_G)
636 ctx->TextureFormatSupported[MESA_FORMAT_XRGB8888] = true;
637 ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = true;
638 ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = true;
639 ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = true;
640 ctx->TextureFormatSupported[MESA_FORMAT_L8] = true;
641 ctx->TextureFormatSupported[MESA_FORMAT_A8] = true;
642 ctx->TextureFormatSupported[MESA_FORMAT_I8] = true;
643 ctx->TextureFormatSupported[MESA_FORMAT_AL88] = true;
644 if (intel->gen >= 4) {
645 ctx->TextureFormatSupported[MESA_FORMAT_L16] = true;
646 ctx->TextureFormatSupported[MESA_FORMAT_A16] = true;
647 ctx->TextureFormatSupported[MESA_FORMAT_I16] = true;
648 ctx->TextureFormatSupported[MESA_FORMAT_AL1616] = true;
649 }
650
651 /* Depth and stencil */
652 ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true;
653 ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true;
654 ctx->TextureFormatSupported[MESA_FORMAT_S8] = intel->has_separate_stencil;
655
656 /*
657 * This was disabled in initial FBO enabling to avoid combinations
658 * of depth+stencil that wouldn't work together. We since decided
659 * that it was OK, since it's up to the app to come up with the
660 * combo that actually works, so this can probably be re-enabled.
661 */
662 /*
663 ctx->TextureFormatSupported[MESA_FORMAT_Z16] = true;
664 ctx->TextureFormatSupported[MESA_FORMAT_Z24] = true;
665 */
666
667 /* ctx->Extensions.MESA_ycbcr_texture */
668 ctx->TextureFormatSupported[MESA_FORMAT_YCBCR] = true;
669 ctx->TextureFormatSupported[MESA_FORMAT_YCBCR_REV] = true;
670
671 /* GL_3DFX_texture_compression_FXT1 */
672 ctx->TextureFormatSupported[MESA_FORMAT_RGB_FXT1] = true;
673 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FXT1] = true;
674
675 /* GL_EXT_texture_compression_s3tc */
676 ctx->TextureFormatSupported[MESA_FORMAT_RGB_DXT1] = true;
677 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT1] = true;
678 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT3] = true;
679 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT5] = true;
680
681 #ifndef I915
682 /* GL_ARB_texture_compression_rgtc */
683 ctx->TextureFormatSupported[MESA_FORMAT_RED_RGTC1] = true;
684 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RED_RGTC1] = true;
685 ctx->TextureFormatSupported[MESA_FORMAT_RG_RGTC2] = true;
686 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG_RGTC2] = true;
687
688 /* GL_ARB_texture_rg */
689 ctx->TextureFormatSupported[MESA_FORMAT_R8] = true;
690 ctx->TextureFormatSupported[MESA_FORMAT_R16] = true;
691 ctx->TextureFormatSupported[MESA_FORMAT_RG88] = true;
692 ctx->TextureFormatSupported[MESA_FORMAT_RG1616] = true;
693
694 /* GL_MESA_texture_signed_rgba / GL_EXT_texture_snorm */
695 ctx->TextureFormatSupported[MESA_FORMAT_DUDV8] = true;
696 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RGBA8888_REV] = true;
697 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R8] = true;
698 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG88_REV] = true;
699 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R16] = true;
700 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_GR1616] = true;
701
702 /* GL_EXT_texture_sRGB */
703 ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = true;
704 if (intel->gen >= 5 || intel->is_g4x)
705 ctx->TextureFormatSupported[MESA_FORMAT_SRGB_DXT1] = true;
706 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT1] = true;
707 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT3] = true;
708 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT5] = true;
709 if (intel->gen >= 5 || intel->is_g4x) {
710 ctx->TextureFormatSupported[MESA_FORMAT_SL8] = true;
711 ctx->TextureFormatSupported[MESA_FORMAT_SLA8] = true;
712 }
713
714 if (intel->gen >= 4) {
715 /* Each combination of 32-bit ints are supported, but the RGB 32-bit ints
716 * don't support use as a render target (GPU hangs).
717 */
718 ctx->TextureFormatSupported[MESA_FORMAT_R_INT32] = true;
719 ctx->TextureFormatSupported[MESA_FORMAT_RG_INT32] = true;
720 ctx->TextureFormatSupported[MESA_FORMAT_RGB_INT32] = true;
721 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_INT32] = true;
722
723 ctx->TextureFormatSupported[MESA_FORMAT_R_UINT32] = true;
724 ctx->TextureFormatSupported[MESA_FORMAT_RG_UINT32] = true;
725 ctx->TextureFormatSupported[MESA_FORMAT_RGB_UINT32] = true;
726 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_UINT32] = true;
727
728 /* For 16 and 8 bits, RGB is unsupported entirely. */
729 ctx->TextureFormatSupported[MESA_FORMAT_R_UINT16] = true;
730 ctx->TextureFormatSupported[MESA_FORMAT_RG_UINT16] = true;
731 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_UINT16] = true;
732 ctx->TextureFormatSupported[MESA_FORMAT_R_INT16] = true;
733 ctx->TextureFormatSupported[MESA_FORMAT_RG_INT16] = true;
734 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_INT16] = true;
735
736 ctx->TextureFormatSupported[MESA_FORMAT_R_UINT8] = true;
737 ctx->TextureFormatSupported[MESA_FORMAT_RG_UINT8] = true;
738 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_UINT8] = true;
739 ctx->TextureFormatSupported[MESA_FORMAT_R_INT8] = true;
740 ctx->TextureFormatSupported[MESA_FORMAT_RG_INT8] = true;
741 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_INT8] = true;
742 }
743
744 #ifdef TEXTURE_FLOAT_ENABLED
745 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FLOAT32] = true;
746 ctx->TextureFormatSupported[MESA_FORMAT_RG_FLOAT32] = true;
747 ctx->TextureFormatSupported[MESA_FORMAT_R_FLOAT32] = true;
748 ctx->TextureFormatSupported[MESA_FORMAT_INTENSITY_FLOAT32] = true;
749 ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_FLOAT32] = true;
750 ctx->TextureFormatSupported[MESA_FORMAT_ALPHA_FLOAT32] = true;
751 ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32] = true;
752
753 /* GL_EXT_texture_shared_exponent */
754 ctx->TextureFormatSupported[MESA_FORMAT_RGB9_E5_FLOAT] = true;
755
756 /* GL_EXT_packed_float */
757 ctx->TextureFormatSupported[MESA_FORMAT_R11_G11_B10_FLOAT] = true;
758 #endif
759
760 #endif /* !I915 */
761
762 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
763 sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
764 if (intel->gen < 4)
765 intel->maxBatchSize = 4096;
766 else
767 intel->maxBatchSize = sizeof(intel->batch.map);
768
769 intel->bufmgr = intelScreen->bufmgr;
770
771 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
772 switch (bo_reuse_mode) {
773 case DRI_CONF_BO_REUSE_DISABLED:
774 break;
775 case DRI_CONF_BO_REUSE_ALL:
776 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
777 break;
778 }
779
780 /* This doesn't yet catch all non-conformant rendering, but it's a
781 * start.
782 */
783 if (getenv("INTEL_STRICT_CONFORMANCE")) {
784 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
785 if (value > 0) {
786 intel->conformance_mode = value;
787 }
788 else {
789 intel->conformance_mode = 1;
790 }
791 }
792
793 if (intel->conformance_mode > 0) {
794 ctx->Const.MinLineWidth = 1.0;
795 ctx->Const.MinLineWidthAA = 1.0;
796 ctx->Const.MaxLineWidth = 1.0;
797 ctx->Const.MaxLineWidthAA = 1.0;
798 ctx->Const.LineWidthGranularity = 1.0;
799 }
800 else {
801 ctx->Const.MinLineWidth = 1.0;
802 ctx->Const.MinLineWidthAA = 1.0;
803 ctx->Const.MaxLineWidth = 5.0;
804 ctx->Const.MaxLineWidthAA = 5.0;
805 ctx->Const.LineWidthGranularity = 0.5;
806 }
807
808 ctx->Const.MinPointSize = 1.0;
809 ctx->Const.MinPointSizeAA = 1.0;
810 ctx->Const.MaxPointSize = 255.0;
811 ctx->Const.MaxPointSizeAA = 3.0;
812 ctx->Const.PointSizeGranularity = 1.0;
813
814 ctx->Const.MaxSamples = 1.0;
815
816 if (intel->gen >= 6)
817 ctx->Const.MaxClipPlanes = 8;
818
819 ctx->Const.StripTextureBorder = GL_TRUE;
820
821 /* reinitialize the context point state.
822 * It depend on constants in __struct gl_contextRec::Const
823 */
824 _mesa_init_point(ctx);
825
826 if (intel->gen >= 4) {
827 ctx->Const.sRGBCapable = true;
828 if (MAX_WIDTH > 8192)
829 ctx->Const.MaxRenderbufferSize = 8192;
830 } else {
831 if (MAX_WIDTH > 2048)
832 ctx->Const.MaxRenderbufferSize = 2048;
833 }
834
835 /* Initialize the software rasterizer and helper modules. */
836 _swrast_CreateContext(ctx);
837 _vbo_CreateContext(ctx);
838 _tnl_CreateContext(ctx);
839 _swsetup_CreateContext(ctx);
840
841 /* Configure swrast to match hardware characteristics: */
842 _swrast_allow_pixel_fog(ctx, false);
843 _swrast_allow_vertex_fog(ctx, true);
844
845 _mesa_meta_init(ctx);
846
847 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
848 intel->hw_stipple = 1;
849
850 /* XXX FBO: this doesn't seem to be used anywhere */
851 switch (mesaVis->depthBits) {
852 case 0: /* what to do in this case? */
853 case 16:
854 intel->polygon_offset_scale = 1.0;
855 break;
856 case 24:
857 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */
858 break;
859 default:
860 assert(0);
861 break;
862 }
863
864 if (intel->gen >= 4)
865 intel->polygon_offset_scale /= 0xffff;
866
867 intel->RenderIndex = ~0;
868
869 switch (ctx->API) {
870 case API_OPENGL:
871 intelInitExtensions(ctx);
872 break;
873 case API_OPENGLES:
874 intelInitExtensionsES1(ctx);
875 break;
876 case API_OPENGLES2:
877 intelInitExtensionsES2(ctx);
878 break;
879 }
880
881 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
882 if (INTEL_DEBUG & DEBUG_BUFMGR)
883 dri_bufmgr_set_debug(intel->bufmgr, true);
884
885 intel_batchbuffer_init(intel);
886
887 intel_fbo_init(intel);
888
889 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
890 "texture_tiling");
891 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
892
893 intel->prim.primitive = ~0;
894
895 /* Force all software fallbacks */
896 if (driQueryOptionb(&intel->optionCache, "no_rast")) {
897 fprintf(stderr, "disabling 3D rasterization\n");
898 intel->no_rast = 1;
899 }
900
901 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
902 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
903 intel->always_flush_batch = 1;
904 }
905
906 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
907 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
908 intel->always_flush_cache = 1;
909 }
910
911 return true;
912 }
913
914 void
915 intelDestroyContext(__DRIcontext * driContextPriv)
916 {
917 struct intel_context *intel =
918 (struct intel_context *) driContextPriv->driverPrivate;
919
920 assert(intel); /* should never be null */
921 if (intel) {
922 INTEL_FIREVERTICES(intel);
923
924 _mesa_meta_free(&intel->ctx);
925
926 intel->vtbl.destroy(intel);
927
928 _swsetup_DestroyContext(&intel->ctx);
929 _tnl_DestroyContext(&intel->ctx);
930 _vbo_DestroyContext(&intel->ctx);
931
932 _swrast_DestroyContext(&intel->ctx);
933 intel->Fallback = 0x0; /* don't call _swrast_Flush later */
934
935 intel_batchbuffer_free(intel);
936
937 free(intel->prim.vb);
938 intel->prim.vb = NULL;
939 drm_intel_bo_unreference(intel->prim.vb_bo);
940 intel->prim.vb_bo = NULL;
941 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
942 intel->first_post_swapbuffers_batch = NULL;
943
944 driDestroyOptionCache(&intel->optionCache);
945
946 /* free the Mesa context */
947 _mesa_free_context_data(&intel->ctx);
948
949 _math_matrix_dtr(&intel->ViewportMatrix);
950
951 ralloc_free(intel);
952 driContextPriv->driverPrivate = NULL;
953 }
954 }
955
956 GLboolean
957 intelUnbindContext(__DRIcontext * driContextPriv)
958 {
959 /* Unset current context and dispath table */
960 _mesa_make_current(NULL, NULL, NULL);
961
962 return true;
963 }
964
965 GLboolean
966 intelMakeCurrent(__DRIcontext * driContextPriv,
967 __DRIdrawable * driDrawPriv,
968 __DRIdrawable * driReadPriv)
969 {
970 struct intel_context *intel;
971 GET_CURRENT_CONTEXT(curCtx);
972
973 if (driContextPriv)
974 intel = (struct intel_context *) driContextPriv->driverPrivate;
975 else
976 intel = NULL;
977
978 /* According to the glXMakeCurrent() man page: "Pending commands to
979 * the previous context, if any, are flushed before it is released."
980 * But only flush if we're actually changing contexts.
981 */
982 if (intel_context(curCtx) && intel_context(curCtx) != intel) {
983 _mesa_flush(curCtx);
984 }
985
986 if (driContextPriv) {
987 struct gl_framebuffer *fb, *readFb;
988
989 if (driDrawPriv == NULL && driReadPriv == NULL) {
990 fb = _mesa_get_incomplete_framebuffer();
991 readFb = _mesa_get_incomplete_framebuffer();
992 } else {
993 fb = driDrawPriv->driverPrivate;
994 readFb = driReadPriv->driverPrivate;
995 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
996 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
997 }
998
999 intel_prepare_render(intel);
1000 _mesa_make_current(&intel->ctx, fb, readFb);
1001
1002 /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
1003 * is NULL at that point. We can't call _mesa_makecurrent()
1004 * first, since we need the buffer size for the initial
1005 * viewport. So just call intel_draw_buffer() again here. */
1006 intel_draw_buffer(&intel->ctx);
1007 }
1008 else {
1009 _mesa_make_current(NULL, NULL, NULL);
1010 }
1011
1012 return true;
1013 }
1014
1015 /**
1016 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1017 *
1018 * To determine which DRI buffers to request, examine the renderbuffers
1019 * attached to the drawable's framebuffer. Then request the buffers with
1020 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1021 *
1022 * This is called from intel_update_renderbuffers(). It is used only if either
1023 * the hardware or the X driver lacks separate stencil support.
1024 *
1025 * \param drawable Drawable whose buffers are queried.
1026 * \param buffers [out] List of buffers returned by DRI2 query.
1027 * \param buffer_count [out] Number of buffers returned.
1028 *
1029 * \see intel_update_renderbuffers()
1030 * \see DRI2GetBuffers()
1031 * \see DRI2GetBuffersWithFormat()
1032 */
1033 static void
1034 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
1035 __DRIdrawable *drawable,
1036 __DRIbuffer **buffers,
1037 int *buffer_count)
1038 {
1039 assert(!intel->must_use_separate_stencil);
1040
1041 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1042 struct gl_framebuffer *fb = drawable->driverPrivate;
1043
1044 if (screen->dri2.loader
1045 && screen->dri2.loader->base.version > 2
1046 && screen->dri2.loader->getBuffersWithFormat != NULL) {
1047
1048 int i = 0;
1049 const int max_attachments = 4;
1050 unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1051
1052 struct intel_renderbuffer *front_rb;
1053 struct intel_renderbuffer *back_rb;
1054 struct intel_renderbuffer *depth_rb;
1055 struct intel_renderbuffer *stencil_rb;
1056
1057 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1058 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1059 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1060 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1061
1062 if ((intel->is_front_buffer_rendering ||
1063 intel->is_front_buffer_reading ||
1064 !back_rb) && front_rb) {
1065 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1066 attachments[i++] = intel_bits_per_pixel(front_rb);
1067 }
1068
1069 if (back_rb) {
1070 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1071 attachments[i++] = intel_bits_per_pixel(back_rb);
1072 }
1073
1074 if (depth_rb && stencil_rb) {
1075 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
1076 attachments[i++] = intel_bits_per_pixel(depth_rb);
1077 } else if (depth_rb) {
1078 attachments[i++] = __DRI_BUFFER_DEPTH;
1079 attachments[i++] = intel_bits_per_pixel(depth_rb);
1080 } else if (stencil_rb) {
1081 attachments[i++] = __DRI_BUFFER_STENCIL;
1082 attachments[i++] = intel_bits_per_pixel(stencil_rb);
1083 }
1084
1085 assert(i <= 2 * max_attachments);
1086
1087 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1088 &drawable->w,
1089 &drawable->h,
1090 attachments, i / 2,
1091 buffer_count,
1092 drawable->loaderPrivate);
1093 free(attachments);
1094
1095 } else if (screen->dri2.loader) {
1096
1097 int i = 0;
1098 const int max_attachments = 4;
1099 unsigned *attachments = calloc(max_attachments, sizeof(unsigned));
1100
1101 if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
1102 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1103 if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
1104 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1105 if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
1106 attachments[i++] = __DRI_BUFFER_DEPTH;
1107 if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
1108 attachments[i++] = __DRI_BUFFER_STENCIL;
1109
1110 assert(i <= max_attachments);
1111
1112 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1113 &drawable->w,
1114 &drawable->h,
1115 attachments, i,
1116 buffer_count,
1117 drawable->loaderPrivate);
1118 free(attachments);
1119
1120 } else {
1121 *buffers = NULL;
1122 *buffer_count = 0;
1123 }
1124 }
1125
1126 /**
1127 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1128 *
1129 * This is called from intel_update_renderbuffers(). It is used only if
1130 * either the hardware or the X driver lacks separate stencil support.
1131 *
1132 * \par Note:
1133 * DRI buffers whose attachment point is DRI2BufferStencil or
1134 * DRI2BufferDepthStencil are handled as special cases.
1135 *
1136 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1137 * that is passed to intel_region_alloc_for_handle().
1138 *
1139 * \see intel_update_renderbuffers()
1140 * \see intel_region_alloc_for_handle()
1141 */
1142 static void
1143 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
1144 __DRIdrawable *drawable,
1145 __DRIbuffer *buffer,
1146 struct intel_renderbuffer *rb,
1147 const char *buffer_name)
1148 {
1149 assert(!intel->must_use_separate_stencil);
1150
1151 struct gl_framebuffer *fb = drawable->driverPrivate;
1152 struct intel_renderbuffer *depth_rb = NULL;
1153
1154 if (!rb)
1155 return;
1156
1157 if (rb->mt &&
1158 rb->mt->region &&
1159 rb->mt->region->name == buffer->name)
1160 return;
1161
1162 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1163 fprintf(stderr,
1164 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1165 buffer->name, buffer->attachment,
1166 buffer->cpp, buffer->pitch);
1167 }
1168
1169 bool identify_depth_and_stencil = false;
1170 if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1171 struct intel_renderbuffer *depth_rb =
1172 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1173 identify_depth_and_stencil = depth_rb && depth_rb->mt;
1174 }
1175
1176 if (identify_depth_and_stencil) {
1177 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1178 fprintf(stderr, "(reusing depth buffer as stencil)\n");
1179 }
1180 intel_miptree_reference(&rb->mt, depth_rb->mt);
1181 } else {
1182 intel_miptree_release(&rb->mt);
1183 struct intel_region *region =
1184 intel_region_alloc_for_handle(intel->intelScreen,
1185 buffer->cpp,
1186 drawable->w,
1187 drawable->h,
1188 buffer->pitch / buffer->cpp,
1189 buffer->name,
1190 buffer_name);
1191 if (!region)
1192 return;
1193
1194 rb->mt = intel_miptree_create_for_region(intel,
1195 GL_TEXTURE_2D,
1196 rb->Base.Format,
1197 region);
1198 intel_region_release(&region);
1199 if (!rb->mt)
1200 return;
1201 }
1202
1203 if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1204 struct intel_renderbuffer *stencil_rb =
1205 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1206
1207 if (!stencil_rb)
1208 return;
1209
1210 /* The rb passed in is the BUFFER_DEPTH attachment, and we need
1211 * to associate this region to BUFFER_STENCIL as well.
1212 */
1213 intel_miptree_reference(&stencil_rb->mt, rb->mt);
1214 }
1215 }
1216
1217 /**
1218 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1219 *
1220 * To determine which DRI buffers to request, examine the renderbuffers
1221 * attached to the drawable's framebuffer. Then request the buffers with
1222 * DRI2GetBuffersWithFormat().
1223 *
1224 * This is called from intel_update_renderbuffers(). It is used when 1) the
1225 * hardware supports separate stencil and 2) the X driver's separate stencil
1226 * support has been verified to work or is still unknown.
1227 *
1228 * \param drawable Drawable whose buffers are queried.
1229 * \param buffers [out] List of buffers returned by DRI2 query.
1230 * \param buffer_count [out] Number of buffers returned.
1231 * \param attachments [out] List of pairs (attachment_point, bits_per_pixel)
1232 * that were submitted in the DRI2 query. Number of pairs
1233 * is same as buffer_count.
1234 *
1235 * \see intel_update_renderbuffers()
1236 * \see DRI2GetBuffersWithFormat()
1237 * \see enum intel_dri2_has_hiz
1238 */
1239 static void
1240 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
1241 __DRIdrawable *drawable,
1242 __DRIbuffer **buffers,
1243 unsigned **attachments,
1244 int *count)
1245 {
1246 assert(intel->has_separate_stencil);
1247
1248 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1249 struct gl_framebuffer *fb = drawable->driverPrivate;
1250
1251 const int max_attachments = 5;
1252 int i = 0;
1253
1254 *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1255 if (!*attachments) {
1256 *buffers = NULL;
1257 *count = 0;
1258 return;
1259 }
1260
1261 struct intel_renderbuffer *front_rb;
1262 struct intel_renderbuffer *back_rb;
1263 struct intel_renderbuffer *depth_rb;
1264 struct intel_renderbuffer *stencil_rb;
1265
1266 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1267 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1268 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1269 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1270
1271 if ((intel->is_front_buffer_rendering ||
1272 intel->is_front_buffer_reading ||
1273 !back_rb) && front_rb) {
1274 (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT;
1275 (*attachments)[i++] = intel_bits_per_pixel(front_rb);
1276 }
1277
1278 if (back_rb) {
1279 (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT;
1280 (*attachments)[i++] = intel_bits_per_pixel(back_rb);
1281 }
1282
1283 /*
1284 * We request a separate stencil buffer, and perhaps a hiz buffer too, even
1285 * if we do not yet know if the X driver supports it. See the comments for
1286 * 'enum intel_dri2_has_hiz'.
1287 */
1288
1289 if (depth_rb) {
1290 (*attachments)[i++] = __DRI_BUFFER_DEPTH;
1291 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1292
1293 if (intel->vtbl.is_hiz_depth_format(intel, depth_rb->Base.Format)) {
1294 /* Depth and hiz buffer have same bpp. */
1295 (*attachments)[i++] = __DRI_BUFFER_HIZ;
1296 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1297 }
1298 }
1299
1300 if (stencil_rb) {
1301 assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1302 (*attachments)[i++] = __DRI_BUFFER_STENCIL;
1303 (*attachments)[i++] = intel_bits_per_pixel(stencil_rb);
1304 }
1305
1306 assert(i <= 2 * max_attachments);
1307
1308 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1309 &drawable->w,
1310 &drawable->h,
1311 *attachments, i / 2,
1312 count,
1313 drawable->loaderPrivate);
1314
1315 if (!*buffers) {
1316 free(*attachments);
1317 *attachments = NULL;
1318 *count = 0;
1319 }
1320 }
1321
1322 /**
1323 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1324 *
1325 * This is called from intel_update_renderbuffers(). It is used when 1) the
1326 * hardware supports separate stencil and 2) the X driver's separate stencil
1327 * support has been verified to work or is still unknown.
1328 *
1329 * \par Note:
1330 * DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz
1331 * are handled as special cases.
1332 *
1333 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1334 * that is passed to intel_region_alloc_for_handle().
1335 *
1336 * \see intel_update_renderbuffers()
1337 * \see intel_region_alloc_for_handle()
1338 * \see enum intel_dri2_has_hiz
1339 */
1340 static void
1341 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
1342 __DRIdrawable *drawable,
1343 __DRIbuffer *buffer,
1344 struct intel_renderbuffer *rb,
1345 const char *buffer_name)
1346 {
1347 assert(intel->has_separate_stencil);
1348 assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL);
1349
1350 if (!rb)
1351 return;
1352
1353 /* If the renderbuffer's and DRIbuffer's regions match, then continue. */
1354 if ((buffer->attachment != __DRI_BUFFER_HIZ &&
1355 rb->mt &&
1356 rb->mt->region &&
1357 rb->mt->region->name == buffer->name) ||
1358 (buffer->attachment == __DRI_BUFFER_HIZ &&
1359 rb->mt &&
1360 rb->mt->hiz_mt &&
1361 rb->mt->hiz_mt->region->name == buffer->name)) {
1362 return;
1363 }
1364
1365 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1366 fprintf(stderr,
1367 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1368 buffer->name, buffer->attachment,
1369 buffer->cpp, buffer->pitch);
1370 }
1371
1372 int buffer_width;
1373 int buffer_height;
1374 if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1375 /* The stencil buffer has quirky pitch requirements. From Section
1376 * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
1377 * The pitch must be set to 2x the value computed based on width, as
1378 * the stencil buffer is stored with two rows interleaved.
1379 *
1380 * To satisfy the pitch requirement, the X driver allocated the region
1381 * with the following dimensions.
1382 */
1383 buffer_width = ALIGN(drawable->w, 64);
1384 buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64);
1385 } else {
1386 buffer_width = drawable->w;
1387 buffer_height = drawable->h;
1388 }
1389
1390 /* Release the buffer storage now in case we have to return early
1391 * due to failure to allocate new storage.
1392 */
1393 if (buffer->attachment == __DRI_BUFFER_HIZ) {
1394 intel_miptree_release(&rb->mt->hiz_mt);
1395 } else {
1396 intel_miptree_release(&rb->mt);
1397 }
1398
1399 struct intel_region *region =
1400 intel_region_alloc_for_handle(intel->intelScreen,
1401 buffer->cpp,
1402 buffer_width,
1403 buffer_height,
1404 buffer->pitch / buffer->cpp,
1405 buffer->name,
1406 buffer_name);
1407 if (!region)
1408 return;
1409
1410 struct intel_mipmap_tree *mt =
1411 intel_miptree_create_for_region(intel,
1412 GL_TEXTURE_2D,
1413 rb->Base.Format,
1414 region);
1415 intel_region_release(&region);
1416
1417 /* Associate buffer with new storage. */
1418 if (buffer->attachment == __DRI_BUFFER_HIZ) {
1419 rb->mt->hiz_mt = mt;
1420 } else {
1421 rb->mt = mt;
1422 }
1423 }
1424
1425 /**
1426 * \brief Verify that the X driver supports hiz and separate stencil.
1427 *
1428 * This implements the cleanup stage of the handshake described in the
1429 * comments for 'enum intel_dri2_has_hiz'.
1430 *
1431 * This should be called from intel_update_renderbuffers() after 1) the
1432 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat()
1433 * and 2) the DRM region of each returned DRIbuffer has been assigned to the
1434 * appropriate intel_renderbuffer. Furthermore, this should be called *only*
1435 * when 1) intel_update_renderbuffers() tried to used the X driver's separate
1436 * stencil functionality and 2) it has not yet been determined if the X driver
1437 * supports separate stencil.
1438 *
1439 * If we determine that the X driver does have support, then we set
1440 * intel_screen.dri2_has_hiz to true and return.
1441 *
1442 * If we determine that the X driver lacks support, and we requested
1443 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by
1444 * taking the following actions:
1445 * 1. Discard the framebuffer's stencil and depth renderbuffers.
1446 * 2. Create a combined depth/stencil renderbuffer and attach
1447 * it to the framebuffer's depth and stencil attachment points.
1448 * 3. Query the drawable for a new set of buffers, which consists of the
1449 * originally requested set plus DRI2BufferDepthStencil.
1450 * 4. Assign the DRI2BufferDepthStencil's DRM region to the new
1451 * depth/stencil renderbuffer.
1452 *
1453 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN
1454 *
1455 * \param drawable Drawable whose buffers were queried.
1456 *
1457 * \param buffers [in/out] As input, the buffer list returned by the
1458 * original DRI2 query. As output, the current buffer
1459 * list, which may have been altered by a new DRI2 query.
1460 *
1461 * \param attachments [in/out] As input, the attachment list submitted
1462 * in the original DRI2 query. As output, the attachment
1463 * list that was submitted in the DRI2 query that
1464 * obtained the current buffer list, as returned in the
1465 * output parameter \c buffers. (Note: If no new query
1466 * was made, then the list remains unaltered).
1467 *
1468 * \param count [out] Number of buffers in the current buffer list, as
1469 * returned in the output parameter \c buffers.
1470 *
1471 * \see enum intel_dri2_has_hiz
1472 * \see struct intel_screen::dri2_has_hiz
1473 * \see intel_update_renderbuffers
1474 */
1475 static void
1476 intel_verify_dri2_has_hiz(struct intel_context *intel,
1477 __DRIdrawable *drawable,
1478 __DRIbuffer **buffers,
1479 unsigned **attachments,
1480 int *count)
1481 {
1482 assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN);
1483
1484 struct gl_framebuffer *fb = drawable->driverPrivate;
1485 struct intel_renderbuffer *stencil_rb =
1486 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1487
1488 if (stencil_rb) {
1489 /*
1490 * We requested a DRI2BufferStencil without knowing if the X driver
1491 * supports it. Now, check if X handled the request correctly and clean
1492 * up if it did not. (See comments for 'enum intel_dri2_has_hiz').
1493 */
1494 struct intel_renderbuffer *depth_rb =
1495 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1496 assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1497 assert(depth_rb && depth_rb->Base.Format == MESA_FORMAT_X8_Z24);
1498
1499 if (stencil_rb->mt->region->tiling == I915_TILING_NONE) {
1500 /*
1501 * The stencil buffer is actually W tiled. The region's tiling is
1502 * I915_TILING_NONE, however, because the GTT is incapable of W
1503 * fencing.
1504 */
1505 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE;
1506 return;
1507 } else {
1508 /*
1509 * Oops... the screen doesn't support separate stencil. Discard the
1510 * separate depth and stencil buffers and replace them with
1511 * a combined depth/stencil buffer. Discard the hiz buffer too.
1512 */
1513 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE;
1514 if (intel->must_use_separate_stencil) {
1515 _mesa_problem(&intel->ctx,
1516 "intel_context requires separate stencil, but the "
1517 "DRIscreen does not support it. You may need to "
1518 "upgrade the Intel X driver to 2.16.0");
1519 abort();
1520 }
1521
1522 /* 1. Discard depth and stencil renderbuffers. */
1523 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH);
1524 depth_rb = NULL;
1525 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL);
1526 stencil_rb = NULL;
1527
1528 /* 2. Create new depth/stencil renderbuffer. */
1529 struct intel_renderbuffer *depth_stencil_rb =
1530 intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
1531 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base);
1532 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base);
1533
1534 /* 3. Append DRI2BufferDepthStencil to attachment list. */
1535 int old_count = *count;
1536 unsigned int *old_attachments = *attachments;
1537 *count = old_count + 1;
1538 *attachments = malloc(2 * (*count) * sizeof(unsigned));
1539 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned));
1540 free(old_attachments);
1541 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL;
1542 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb);
1543
1544 /* 4. Request new set of DRI2 attachments. */
1545 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1546 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1547 &drawable->w,
1548 &drawable->h,
1549 *attachments,
1550 *count,
1551 count,
1552 drawable->loaderPrivate);
1553 if (!*buffers)
1554 return;
1555
1556 /*
1557 * I don't know how to recover from the failure assertion below.
1558 * Rather than fail gradually and unexpectedly, we should just die
1559 * now.
1560 */
1561 assert(*count == old_count + 1);
1562
1563 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */
1564 __DRIbuffer *depth_stencil_buffer = NULL;
1565 for (int i = 0; i < *count; ++i) {
1566 if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1567 depth_stencil_buffer = &(*buffers)[i];
1568 break;
1569 }
1570 }
1571 struct intel_region *region =
1572 intel_region_alloc_for_handle(intel->intelScreen,
1573 depth_stencil_buffer->cpp,
1574 drawable->w,
1575 drawable->h,
1576 depth_stencil_buffer->pitch
1577 / depth_stencil_buffer->cpp,
1578 depth_stencil_buffer->name,
1579 "dri2 depth / stencil buffer");
1580 if (!region)
1581 return;
1582
1583 struct intel_mipmap_tree *mt =
1584 intel_miptree_create_for_region(intel,
1585 GL_TEXTURE_2D,
1586 depth_stencil_rb->Base.Format,
1587 region);
1588 intel_region_release(&region);
1589 if (!mt)
1590 return;
1591
1592 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->mt, mt);
1593 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->mt, mt);
1594 intel_miptree_release(&mt);
1595 }
1596 }
1597
1598 if (intel_framebuffer_has_hiz(fb)) {
1599 /*
1600 * In the future, the driver may advertise a GL config with hiz
1601 * compatible depth bits and 0 stencil bits (for example, when the
1602 * driver gains support for float32 depth buffers). When that day comes,
1603 * here we need to verify that the X driver does in fact support hiz and
1604 * clean up if it doesn't.
1605 *
1606 * Presently, however, no verification or clean up is necessary, and
1607 * execution should not reach here. If the framebuffer still has a hiz
1608 * region, then we have already set dri2_has_hiz to true after
1609 * confirming above that the stencil buffer is W tiled.
1610 */
1611 assert(0);
1612 }
1613 }