1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/hash.h"
35 #include "main/fbobject.h"
36 #include "main/mfeatures.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
43 PUBLIC
const char __driConfigOptions
[] =
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC
)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
50 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
57 DRI_CONF_OPT_BEGIN(texture_tiling
, bool, true)
58 DRI_CONF_DESC(en
, "Enable texture tiling")
61 DRI_CONF_OPT_BEGIN(hiz
, bool, true)
62 DRI_CONF_DESC(en
, "Enable Hierarchical Z on gen6+")
65 DRI_CONF_OPT_BEGIN(early_z
, bool, false)
66 DRI_CONF_DESC(en
, "Enable early Z in classic mode (unstable, 945-only).")
69 DRI_CONF_OPT_BEGIN(fragment_shader
, bool, true)
70 DRI_CONF_DESC(en
, "Enable limited ARB_fragment_shader support on 915/945.")
74 DRI_CONF_SECTION_QUALITY
75 DRI_CONF_FORCE_S3TC_ENABLE(false)
76 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
78 DRI_CONF_SECTION_DEBUG
79 DRI_CONF_NO_RAST(false)
80 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
81 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
82 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
83 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
85 DRI_CONF_OPT_BEGIN(stub_occlusion_query
, bool, false)
86 DRI_CONF_DESC(en
, "Enable stub ARB_occlusion_query support on 915/945.")
89 DRI_CONF_OPT_BEGIN(shader_precompile
, bool, true)
90 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
95 const GLuint __driNConfigOptions
= 15;
97 #include "intel_batchbuffer.h"
98 #include "intel_buffers.h"
99 #include "intel_bufmgr.h"
100 #include "intel_chipset.h"
101 #include "intel_fbo.h"
102 #include "intel_mipmap_tree.h"
103 #include "intel_screen.h"
104 #include "intel_tex.h"
105 #include "intel_regions.h"
107 #include "i915_drm.h"
109 #ifdef USE_NEW_INTERFACE
110 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
111 #endif /*USE_NEW_INTERFACE */
114 * For debugging purposes, this returns a time in seconds.
121 clock_gettime(CLOCK_MONOTONIC
, &tp
);
123 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
127 aub_dump_bmp(struct gl_context
*ctx
)
129 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
131 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
132 struct intel_renderbuffer
*irb
=
133 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
135 if (irb
&& irb
->mt
) {
136 enum aub_dump_bmp_format format
;
138 switch (irb
->Base
.Base
.Format
) {
139 case MESA_FORMAT_ARGB8888
:
140 case MESA_FORMAT_XRGB8888
:
141 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
147 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
150 irb
->Base
.Base
.Width
,
151 irb
->Base
.Base
.Height
,
153 irb
->mt
->region
->pitch
*
154 irb
->mt
->region
->cpp
,
160 static const __DRItexBufferExtension intelTexBufferExtension
= {
161 .base
= { __DRI_TEX_BUFFER
, __DRI_TEX_BUFFER_VERSION
},
163 .setTexBuffer
= intelSetTexBuffer
,
164 .setTexBuffer2
= intelSetTexBuffer2
,
165 .releaseTexBuffer
= NULL
,
169 intelDRI2Flush(__DRIdrawable
*drawable
)
171 GET_CURRENT_CONTEXT(ctx
);
172 struct intel_context
*intel
= intel_context(ctx
);
177 INTEL_FIREVERTICES(intel
);
179 intel_downsample_for_dri2_flush(intel
, drawable
);
180 intel
->need_throttle
= true;
182 if (intel
->batch
.used
)
183 intel_batchbuffer_flush(intel
);
185 if (INTEL_DEBUG
& DEBUG_AUB
) {
190 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
191 .base
= { __DRI2_FLUSH
, __DRI2_FLUSH_VERSION
},
193 .flush
= intelDRI2Flush
,
194 .invalidate
= dri2InvalidateDrawable
,
197 static struct intel_image_format intel_image_formats
[] = {
198 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
199 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
201 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
202 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
204 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
205 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
206 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
207 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
209 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
210 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
211 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
212 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
214 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
215 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
216 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
217 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
219 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
220 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
221 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
222 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
224 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
225 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
226 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
227 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
229 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
230 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
231 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
233 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
234 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
235 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
237 /* For YUYV buffers, we set up two overlapping DRI images and treat
238 * them as planar buffers in the compositors. Plane 0 is GR88 and
239 * samples YU or YV pairs and places Y into the R component, while
240 * plane 1 is ARGB and samples YUYV clusters and places pairs and
241 * places U into the G component and V into A. This lets the
242 * texture sampler interpolate the Y components correctly when
243 * sampling from plane 0, and interpolate U and V correctly when
244 * sampling from plane 1. */
245 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
246 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
247 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } }
251 intel_allocate_image(int dri_format
, void *loaderPrivate
)
255 image
= calloc(1, sizeof *image
);
259 image
->dri_format
= dri_format
;
262 switch (dri_format
) {
263 case __DRI_IMAGE_FORMAT_RGB565
:
264 image
->format
= MESA_FORMAT_RGB565
;
266 case __DRI_IMAGE_FORMAT_XRGB8888
:
267 image
->format
= MESA_FORMAT_XRGB8888
;
269 case __DRI_IMAGE_FORMAT_ARGB8888
:
270 image
->format
= MESA_FORMAT_ARGB8888
;
272 case __DRI_IMAGE_FORMAT_ABGR8888
:
273 image
->format
= MESA_FORMAT_RGBA8888_REV
;
275 case __DRI_IMAGE_FORMAT_XBGR8888
:
276 image
->format
= MESA_FORMAT_RGBX8888_REV
;
278 case __DRI_IMAGE_FORMAT_R8
:
279 image
->format
= MESA_FORMAT_R8
;
281 case __DRI_IMAGE_FORMAT_GR88
:
282 image
->format
= MESA_FORMAT_GR88
;
284 case __DRI_IMAGE_FORMAT_NONE
:
285 image
->format
= MESA_FORMAT_NONE
;
292 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
293 image
->data
= loaderPrivate
;
299 intel_create_image_from_name(__DRIscreen
*screen
,
300 int width
, int height
, int format
,
301 int name
, int pitch
, void *loaderPrivate
)
303 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
307 image
= intel_allocate_image(format
, loaderPrivate
);
308 if (image
->format
== MESA_FORMAT_NONE
)
311 cpp
= _mesa_get_format_bytes(image
->format
);
312 image
->region
= intel_region_alloc_for_handle(intelScreen
,
314 pitch
, name
, "image");
315 if (image
->region
== NULL
) {
324 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
325 int renderbuffer
, void *loaderPrivate
)
328 struct intel_context
*intel
= context
->driverPrivate
;
329 struct gl_renderbuffer
*rb
;
330 struct intel_renderbuffer
*irb
;
332 rb
= _mesa_lookup_renderbuffer(&intel
->ctx
, renderbuffer
);
334 _mesa_error(&intel
->ctx
,
335 GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
339 irb
= intel_renderbuffer(rb
);
340 image
= calloc(1, sizeof *image
);
344 image
->internal_format
= rb
->InternalFormat
;
345 image
->format
= rb
->Format
;
347 image
->data
= loaderPrivate
;
348 intel_region_reference(&image
->region
, irb
->mt
->region
);
350 switch (image
->format
) {
351 case MESA_FORMAT_RGB565
:
352 image
->dri_format
= __DRI_IMAGE_FORMAT_RGB565
;
354 case MESA_FORMAT_XRGB8888
:
355 image
->dri_format
= __DRI_IMAGE_FORMAT_XRGB8888
;
357 case MESA_FORMAT_ARGB8888
:
358 image
->dri_format
= __DRI_IMAGE_FORMAT_ARGB8888
;
360 case MESA_FORMAT_RGBA8888_REV
:
361 image
->dri_format
= __DRI_IMAGE_FORMAT_ABGR8888
;
364 image
->dri_format
= __DRI_IMAGE_FORMAT_R8
;
366 case MESA_FORMAT_RG88
:
367 image
->dri_format
= __DRI_IMAGE_FORMAT_GR88
;
375 intel_destroy_image(__DRIimage
*image
)
377 intel_region_release(&image
->region
);
382 intel_create_image(__DRIscreen
*screen
,
383 int width
, int height
, int format
,
388 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
392 tiling
= I915_TILING_X
;
393 if (use
& __DRI_IMAGE_USE_CURSOR
) {
394 if (width
!= 64 || height
!= 64)
396 tiling
= I915_TILING_NONE
;
399 image
= intel_allocate_image(format
, loaderPrivate
);
400 cpp
= _mesa_get_format_bytes(image
->format
);
402 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
403 if (image
->region
== NULL
) {
412 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
415 case __DRI_IMAGE_ATTRIB_STRIDE
:
416 *value
= image
->region
->pitch
* image
->region
->cpp
;
418 case __DRI_IMAGE_ATTRIB_HANDLE
:
419 *value
= image
->region
->bo
->handle
;
421 case __DRI_IMAGE_ATTRIB_NAME
:
422 return intel_region_flink(image
->region
, (uint32_t *) value
);
423 case __DRI_IMAGE_ATTRIB_FORMAT
:
424 *value
= image
->dri_format
;
426 case __DRI_IMAGE_ATTRIB_WIDTH
:
427 *value
= image
->region
->width
;
429 case __DRI_IMAGE_ATTRIB_HEIGHT
:
430 *value
= image
->region
->height
;
432 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
433 if (image
->planar_format
== NULL
)
435 *value
= image
->planar_format
->components
;
443 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
447 image
= calloc(1, sizeof *image
);
451 intel_region_reference(&image
->region
, orig_image
->region
);
452 if (image
->region
== NULL
) {
457 image
->internal_format
= orig_image
->internal_format
;
458 image
->planar_format
= orig_image
->planar_format
;
459 image
->dri_format
= orig_image
->dri_format
;
460 image
->format
= orig_image
->format
;
461 image
->offset
= orig_image
->offset
;
462 image
->data
= loaderPrivate
;
464 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
465 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
471 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
473 if (use
& __DRI_IMAGE_USE_CURSOR
) {
474 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
482 intel_create_image_from_names(__DRIscreen
*screen
,
483 int width
, int height
, int fourcc
,
484 int *names
, int num_names
,
485 int *strides
, int *offsets
,
488 struct intel_image_format
*f
= NULL
;
492 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
495 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
496 if (intel_image_formats
[i
].fourcc
== fourcc
) {
497 f
= &intel_image_formats
[i
];
504 image
= intel_create_image_from_name(screen
, width
, height
,
505 __DRI_IMAGE_FORMAT_NONE
,
506 names
[0], strides
[0],
512 image
->planar_format
= f
;
513 for (i
= 0; i
< f
->nplanes
; i
++) {
514 index
= f
->planes
[i
].buffer_index
;
515 image
->offsets
[index
] = offsets
[index
];
516 image
->strides
[index
] = strides
[index
];
523 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
525 int width
, height
, offset
, stride
, dri_format
, cpp
, index
, pitch
;
526 struct intel_image_format
*f
;
527 uint32_t mask_x
, mask_y
;
530 if (parent
== NULL
|| parent
->planar_format
== NULL
)
533 f
= parent
->planar_format
;
535 if (plane
>= f
->nplanes
)
538 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
539 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
540 dri_format
= f
->planes
[plane
].dri_format
;
541 index
= f
->planes
[plane
].buffer_index
;
542 offset
= parent
->offsets
[index
];
543 stride
= parent
->strides
[index
];
545 image
= intel_allocate_image(dri_format
, loaderPrivate
);
546 cpp
= _mesa_get_format_bytes(image
->format
); /* safe since no none format */
547 pitch
= stride
/ cpp
;
548 if (offset
+ height
* cpp
* pitch
> parent
->region
->bo
->size
) {
549 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
554 image
->region
= calloc(sizeof(*image
->region
), 1);
555 if (image
->region
== NULL
) {
560 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
561 image
->region
->width
= width
;
562 image
->region
->height
= height
;
563 image
->region
->pitch
= pitch
;
564 image
->region
->refcount
= 1;
565 image
->region
->bo
= parent
->region
->bo
;
566 drm_intel_bo_reference(image
->region
->bo
);
567 image
->region
->tiling
= parent
->region
->tiling
;
568 image
->region
->screen
= parent
->region
->screen
;
569 image
->offset
= offset
;
571 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
, false);
574 "intel_create_sub_image: offset not on tile boundary");
579 static struct __DRIimageExtensionRec intelImageExtension
= {
580 .base
= { __DRI_IMAGE
, 5 },
582 .createImageFromName
= intel_create_image_from_name
,
583 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
584 .destroyImage
= intel_destroy_image
,
585 .createImage
= intel_create_image
,
586 .queryImage
= intel_query_image
,
587 .dupImage
= intel_dup_image
,
588 .validateUsage
= intel_validate_usage
,
589 .createImageFromNames
= intel_create_image_from_names
,
590 .fromPlanar
= intel_from_planar
593 static const __DRIextension
*intelScreenExtensions
[] = {
594 &intelTexBufferExtension
.base
,
595 &intelFlushExtension
.base
,
596 &intelImageExtension
.base
,
597 &dri2ConfigQueryExtension
.base
,
602 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
605 struct drm_i915_getparam gp
;
607 memset(&gp
, 0, sizeof(gp
));
611 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
614 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
622 intel_get_boolean(__DRIscreen
*psp
, int param
)
625 return intel_get_param(psp
, param
, &value
) && value
;
629 nop_callback(GLuint key
, void *data
, void *userData
)
634 intelDestroyScreen(__DRIscreen
* sPriv
)
636 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
638 dri_bufmgr_destroy(intelScreen
->bufmgr
);
639 driDestroyOptionInfo(&intelScreen
->optionCache
);
641 /* Some regions may still have references to them at this point, so
642 * flush the hash table to prevent _mesa_DeleteHashTable() from
643 * complaining about the hash not being empty; */
644 _mesa_HashDeleteAll(intelScreen
->named_regions
, nop_callback
, NULL
);
645 _mesa_DeleteHashTable(intelScreen
->named_regions
);
648 sPriv
->driverPrivate
= NULL
;
653 * This is called when we need to set up GL rendering to a new X window.
656 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
657 __DRIdrawable
* driDrawPriv
,
658 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
660 struct intel_renderbuffer
*rb
;
661 struct intel_screen
*screen
= (struct intel_screen
*) driScrnPriv
->driverPrivate
;
663 unsigned num_samples
= intel_quantize_num_samples(screen
, mesaVis
->samples
);
664 struct gl_framebuffer
*fb
;
669 fb
= CALLOC_STRUCT(gl_framebuffer
);
673 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
675 if (mesaVis
->redBits
== 5)
676 rgbFormat
= MESA_FORMAT_RGB565
;
677 else if (mesaVis
->sRGBCapable
)
678 rgbFormat
= MESA_FORMAT_SARGB8
;
679 else if (mesaVis
->alphaBits
== 0)
680 rgbFormat
= MESA_FORMAT_XRGB8888
;
682 rgbFormat
= MESA_FORMAT_ARGB8888
;
684 /* setup the hardware-based renderbuffers */
685 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
686 _mesa_add_renderbuffer(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
688 if (mesaVis
->doubleBufferMode
) {
689 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
690 _mesa_add_renderbuffer(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
694 * Assert here that the gl_config has an expected depth/stencil bit
695 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
696 * which constructs the advertised configs.)
698 if (mesaVis
->depthBits
== 24) {
699 assert(mesaVis
->stencilBits
== 8);
701 if (screen
->hw_has_separate_stencil
) {
702 rb
= intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24
,
704 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
705 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8
,
707 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
710 * Use combined depth/stencil. Note that the renderbuffer is
711 * attached to two attachment points.
713 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24
,
715 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
716 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
719 else if (mesaVis
->depthBits
== 16) {
720 assert(mesaVis
->stencilBits
== 0);
721 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z16
,
723 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
726 assert(mesaVis
->depthBits
== 0);
727 assert(mesaVis
->stencilBits
== 0);
730 /* now add any/all software-based renderbuffers we may need */
731 _swrast_add_soft_renderbuffers(fb
,
732 false, /* never sw color */
733 false, /* never sw depth */
734 false, /* never sw stencil */
735 mesaVis
->accumRedBits
> 0,
736 false, /* never sw alpha */
737 false /* never sw aux */ );
738 driDrawPriv
->driverPrivate
= fb
;
744 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
746 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
748 _mesa_reference_framebuffer(&fb
, NULL
);
751 /* There are probably better ways to do this, such as an
752 * init-designated function to register chipids and createcontext
756 i830CreateContext(const struct gl_config
*mesaVis
,
757 __DRIcontext
*driContextPriv
,
758 void *sharedContextPrivate
);
761 i915CreateContext(int api
,
762 const struct gl_config
*mesaVis
,
763 __DRIcontext
*driContextPriv
,
764 unsigned major_version
,
765 unsigned minor_version
,
767 void *sharedContextPrivate
);
769 brwCreateContext(int api
,
770 const struct gl_config
*mesaVis
,
771 __DRIcontext
*driContextPriv
,
772 unsigned major_version
,
773 unsigned minor_version
,
776 void *sharedContextPrivate
);
779 intelCreateContext(gl_api api
,
780 const struct gl_config
* mesaVis
,
781 __DRIcontext
* driContextPriv
,
782 unsigned major_version
,
783 unsigned minor_version
,
786 void *sharedContextPrivate
)
788 bool success
= false;
791 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
792 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
794 if (IS_9XX(intelScreen
->deviceID
)) {
795 success
= i915CreateContext(api
, mesaVis
, driContextPriv
,
796 major_version
, minor_version
, error
,
797 sharedContextPrivate
);
801 if (major_version
> 1 || minor_version
> 3) {
802 *error
= __DRI_CTX_ERROR_BAD_VERSION
;
809 *error
= __DRI_CTX_ERROR_BAD_API
;
814 intelScreen
->no_vbo
= true;
815 success
= i830CreateContext(mesaVis
, driContextPriv
,
816 sharedContextPrivate
);
818 *error
= __DRI_CTX_ERROR_NO_MEMORY
;
822 success
= brwCreateContext(api
, mesaVis
,
824 major_version
, minor_version
, flags
,
825 error
, sharedContextPrivate
);
831 if (driContextPriv
->driverPrivate
!= NULL
)
832 intelDestroyContext(driContextPriv
);
838 intel_init_bufmgr(struct intel_screen
*intelScreen
)
840 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
843 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
845 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
846 if (intelScreen
->bufmgr
== NULL
) {
847 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
852 if (!intel_get_param(spriv
, I915_PARAM_NUM_FENCES_AVAIL
, &num_fences
) ||
854 fprintf(stderr
, "[%s: %u] Kernel 2.6.29 required.\n", __func__
, __LINE__
);
858 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
860 intelScreen
->named_regions
= _mesa_NewHashTable();
862 intelScreen
->relaxed_relocations
= 0;
863 intelScreen
->relaxed_relocations
|=
864 intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
) << 0;
870 * Override intel_screen.hw_has_separate_stencil with environment variable
871 * INTEL_SEPARATE_STENCIL.
873 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
874 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
878 intel_override_separate_stencil(struct intel_screen
*screen
)
880 const char *s
= getenv("INTEL_SEPARATE_STENCIL");
883 } else if (!strncmp("0", s
, 2)) {
884 screen
->hw_has_separate_stencil
= false;
885 } else if (!strncmp("1", s
, 2)) {
886 screen
->hw_has_separate_stencil
= true;
889 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
890 "invalid value and is ignored", s
);
895 intel_detect_swizzling(struct intel_screen
*screen
)
897 drm_intel_bo
*buffer
;
898 unsigned long flags
= 0;
899 unsigned long aligned_pitch
;
900 uint32_t tiling
= I915_TILING_X
;
901 uint32_t swizzle_mode
= 0;
903 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
905 &tiling
, &aligned_pitch
, flags
);
909 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
910 drm_intel_bo_unreference(buffer
);
912 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
919 intel_screen_make_configs(__DRIscreen
*dri_screen
)
921 static const gl_format formats
[3] = {
923 MESA_FORMAT_XRGB8888
,
927 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
928 static const GLenum back_buffer_modes
[] = {
929 GLX_SWAP_UNDEFINED_OML
, GLX_NONE
,
932 static const uint8_t singlesample_samples
[1] = {0};
933 static const uint8_t multisample_samples
[2] = {4, 8};
935 struct intel_screen
*screen
= dri_screen
->driverPrivate
;
936 uint8_t depth_bits
[4], stencil_bits
[4];
937 __DRIconfig
**configs
= NULL
;
939 /* Generate singlesample configs without accumulation buffer. */
940 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
941 __DRIconfig
**new_configs
;
942 int num_depth_stencil_bits
= 2;
944 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
945 * buffer that has a different number of bits per pixel than the color
946 * buffer, gen >= 6 supports this.
951 if (formats
[i
] == MESA_FORMAT_RGB565
) {
954 if (screen
->gen
>= 6) {
957 num_depth_stencil_bits
= 3;
964 new_configs
= driCreateConfigs(formats
[i
],
967 num_depth_stencil_bits
,
968 back_buffer_modes
, 2,
969 singlesample_samples
, 1,
971 configs
= driConcatConfigs(configs
, new_configs
);
974 /* Generate the minimum possible set of configs that include an
975 * accumulation buffer.
977 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
978 __DRIconfig
**new_configs
;
980 if (formats
[i
] == MESA_FORMAT_RGB565
) {
988 new_configs
= driCreateConfigs(formats
[i
],
989 depth_bits
, stencil_bits
, 1,
990 back_buffer_modes
, 1,
991 singlesample_samples
, 1,
993 configs
= driConcatConfigs(configs
, new_configs
);
996 /* Generate multisample configs.
998 * This loop breaks early, and hence is a no-op, on gen < 6.
1000 * Multisample configs must follow the singlesample configs in order to
1001 * work around an X server bug present in 1.12. The X server chooses to
1002 * associate the first listed RGBA888-Z24S8 config, regardless of its
1003 * sample count, with the 32-bit depth visual used for compositing.
1005 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1006 * supported. Singlebuffer configs are not supported because no one wants
1009 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1010 if (screen
->gen
< 6)
1013 __DRIconfig
**new_configs
;
1014 const int num_depth_stencil_bits
= 2;
1015 int num_msaa_modes
= 0;
1018 stencil_bits
[0] = 0;
1020 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1022 stencil_bits
[1] = 0;
1025 stencil_bits
[1] = 8;
1028 if (screen
->gen
>= 7)
1030 else if (screen
->gen
== 6)
1033 new_configs
= driCreateConfigs(formats
[i
],
1036 num_depth_stencil_bits
,
1037 back_buffer_modes
, 1,
1038 multisample_samples
,
1041 configs
= driConcatConfigs(configs
, new_configs
);
1044 if (configs
== NULL
) {
1045 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1054 * This is the driver specific part of the createNewScreen entry point.
1055 * Called when using DRI2.
1057 * \return the struct gl_config supported by this driver
1060 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1062 struct intel_screen
*intelScreen
;
1063 unsigned int api_mask
;
1065 if (psp
->dri2
.loader
->base
.version
<= 2 ||
1066 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1068 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1069 "support required\n");
1073 /* Allocate the private area */
1074 intelScreen
= calloc(1, sizeof *intelScreen
);
1076 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1079 /* parse information in __driConfigOptions */
1080 driParseOptionInfo(&intelScreen
->optionCache
,
1081 __driConfigOptions
, __driNConfigOptions
);
1083 intelScreen
->driScrnPriv
= psp
;
1084 psp
->driverPrivate
= (void *) intelScreen
;
1086 if (!intel_init_bufmgr(intelScreen
))
1089 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1091 intelScreen
->kernel_has_gen7_sol_reset
=
1092 intel_get_boolean(intelScreen
->driScrnPriv
,
1093 I915_PARAM_HAS_GEN7_SOL_RESET
);
1095 if (IS_GEN7(intelScreen
->deviceID
)) {
1096 intelScreen
->gen
= 7;
1097 } else if (IS_GEN6(intelScreen
->deviceID
)) {
1098 intelScreen
->gen
= 6;
1099 } else if (IS_GEN5(intelScreen
->deviceID
)) {
1100 intelScreen
->gen
= 5;
1101 } else if (IS_965(intelScreen
->deviceID
)) {
1102 intelScreen
->gen
= 4;
1103 } else if (IS_9XX(intelScreen
->deviceID
)) {
1104 intelScreen
->gen
= 3;
1106 intelScreen
->gen
= 2;
1109 intelScreen
->hw_has_separate_stencil
= intelScreen
->gen
>= 6;
1110 intelScreen
->hw_must_use_separate_stencil
= intelScreen
->gen
>= 7;
1113 bool success
= intel_get_param(intelScreen
->driScrnPriv
, I915_PARAM_HAS_LLC
,
1115 if (success
&& has_llc
)
1116 intelScreen
->hw_has_llc
= true;
1117 else if (!success
&& intelScreen
->gen
>= 6)
1118 intelScreen
->hw_has_llc
= true;
1120 intel_override_separate_stencil(intelScreen
);
1122 api_mask
= (1 << __DRI_API_OPENGL
);
1124 api_mask
|= (1 << __DRI_API_GLES
);
1127 api_mask
|= (1 << __DRI_API_GLES2
);
1130 if (IS_9XX(intelScreen
->deviceID
) || IS_965(intelScreen
->deviceID
))
1131 psp
->api_mask
= api_mask
;
1133 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
1135 psp
->extensions
= intelScreenExtensions
;
1137 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1140 struct intel_buffer
{
1142 struct intel_region
*region
;
1145 static __DRIbuffer
*
1146 intelAllocateBuffer(__DRIscreen
*screen
,
1147 unsigned attachment
, unsigned format
,
1148 int width
, int height
)
1150 struct intel_buffer
*intelBuffer
;
1151 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1153 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1154 attachment
== __DRI_BUFFER_BACK_LEFT
);
1156 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1157 if (intelBuffer
== NULL
)
1160 /* The front and back buffers are color buffers, which are X tiled. */
1161 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1168 if (intelBuffer
->region
== NULL
) {
1173 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1175 intelBuffer
->base
.attachment
= attachment
;
1176 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1177 intelBuffer
->base
.pitch
=
1178 intelBuffer
->region
->pitch
* intelBuffer
->region
->cpp
;
1180 return &intelBuffer
->base
;
1184 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1186 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1188 intel_region_release(&intelBuffer
->region
);
1193 const struct __DriverAPIRec driDriverAPI
= {
1194 .InitScreen
= intelInitScreen2
,
1195 .DestroyScreen
= intelDestroyScreen
,
1196 .CreateContext
= intelCreateContext
,
1197 .DestroyContext
= intelDestroyContext
,
1198 .CreateBuffer
= intelCreateBuffer
,
1199 .DestroyBuffer
= intelDestroyBuffer
,
1200 .MakeCurrent
= intelMakeCurrent
,
1201 .UnbindContext
= intelUnbindContext
,
1202 .AllocateBuffer
= intelAllocateBuffer
,
1203 .ReleaseBuffer
= intelReleaseBuffer
1206 /* This is the table of extensions that the loader will dlsym() for. */
1207 PUBLIC
const __DRIextension
*__driDriverExtensions
[] = {
1208 &driCoreExtension
.base
,
1209 &driDRI2Extension
.base
,