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Merge branch 'gallium-polygon-stipple'
[mesa.git] / src / mesa / drivers / dri / intel / intel_tex_layout.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 * Michel Dänzer <michel@tungstengraphics.com>
31 */
32
33 #include "intel_mipmap_tree.h"
34 #include "intel_tex_layout.h"
35 #include "intel_context.h"
36 #include "main/macros.h"
37
38 void
39 intel_get_texture_alignment_unit(gl_format format,
40 unsigned int *w, unsigned int *h)
41 {
42 if (_mesa_is_format_compressed(format)) {
43 /* The hardware alignment requirements for compressed textures
44 * happen to match the block boundaries.
45 */
46 _mesa_get_format_block_size(format, w, h);
47 } else {
48 *w = 4;
49 *h = 2;
50 }
51 }
52
53 void i945_miptree_layout_2d(struct intel_context *intel,
54 struct intel_mipmap_tree *mt,
55 uint32_t tiling, int nr_images)
56 {
57 GLuint align_h, align_w;
58 GLuint level;
59 GLuint x = 0;
60 GLuint y = 0;
61 GLuint width = mt->width0;
62 GLuint height = mt->height0;
63
64 mt->total_width = mt->width0;
65 intel_get_texture_alignment_unit(mt->format, &align_w, &align_h);
66
67 if (mt->compressed) {
68 mt->total_width = ALIGN(mt->width0, align_w);
69 }
70
71 /* May need to adjust width to accomodate the placement of
72 * the 2nd mipmap. This occurs when the alignment
73 * constraints of mipmap placement push the right edge of the
74 * 2nd mipmap out past the width of its parent.
75 */
76 if (mt->first_level != mt->last_level) {
77 GLuint mip1_width;
78
79 if (mt->compressed) {
80 mip1_width = ALIGN(minify(mt->width0), align_w)
81 + ALIGN(minify(minify(mt->width0)), align_w);
82 } else {
83 mip1_width = ALIGN(minify(mt->width0), align_w)
84 + minify(minify(mt->width0));
85 }
86
87 if (mip1_width > mt->total_width) {
88 mt->total_width = mip1_width;
89 }
90 }
91
92 mt->total_height = 0;
93
94 for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
95 GLuint img_height;
96
97 intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
98 height, 1);
99
100 img_height = ALIGN(height, align_h);
101 if (mt->compressed)
102 img_height /= align_h;
103
104 /* Because the images are packed better, the final offset
105 * might not be the maximal one:
106 */
107 mt->total_height = MAX2(mt->total_height, y + img_height);
108
109 /* Layout_below: step right after second mipmap.
110 */
111 if (level == mt->first_level + 1) {
112 x += ALIGN(width, align_w);
113 }
114 else {
115 y += img_height;
116 }
117
118 width = minify(width);
119 height = minify(height);
120 }
121 }