1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
33 **************************************************************************/
35 #include "radeon_common.h"
36 #include "xmlpool.h" /* for symbolic values of enum-type options */
39 #include "drirenderbuffer.h"
40 #include "drivers/common/meta.h"
41 #include "main/context.h"
42 #include "main/framebuffer.h"
43 #include "main/renderbuffer.h"
44 #include "main/state.h"
45 #include "main/simple_list.h"
46 #include "swrast/swrast.h"
47 #include "swrast_setup/swrast_setup.h"
50 #if defined(RADEON_R600)
51 #include "r600_context.h"
54 #define DRIVER_DATE "20090101"
57 int RADEON_DEBUG
= (0);
61 static const char* get_chip_family_name(int chip_family
)
64 case CHIP_FAMILY_R100
: return "R100";
65 case CHIP_FAMILY_RV100
: return "RV100";
66 case CHIP_FAMILY_RS100
: return "RS100";
67 case CHIP_FAMILY_RV200
: return "RV200";
68 case CHIP_FAMILY_RS200
: return "RS200";
69 case CHIP_FAMILY_R200
: return "R200";
70 case CHIP_FAMILY_RV250
: return "RV250";
71 case CHIP_FAMILY_RS300
: return "RS300";
72 case CHIP_FAMILY_RV280
: return "RV280";
73 case CHIP_FAMILY_R300
: return "R300";
74 case CHIP_FAMILY_R350
: return "R350";
75 case CHIP_FAMILY_RV350
: return "RV350";
76 case CHIP_FAMILY_RV380
: return "RV380";
77 case CHIP_FAMILY_R420
: return "R420";
78 case CHIP_FAMILY_RV410
: return "RV410";
79 case CHIP_FAMILY_RS400
: return "RS400";
80 case CHIP_FAMILY_RS600
: return "RS600";
81 case CHIP_FAMILY_RS690
: return "RS690";
82 case CHIP_FAMILY_RS740
: return "RS740";
83 case CHIP_FAMILY_RV515
: return "RV515";
84 case CHIP_FAMILY_R520
: return "R520";
85 case CHIP_FAMILY_RV530
: return "RV530";
86 case CHIP_FAMILY_R580
: return "R580";
87 case CHIP_FAMILY_RV560
: return "RV560";
88 case CHIP_FAMILY_RV570
: return "RV570";
89 case CHIP_FAMILY_R600
: return "R600";
90 case CHIP_FAMILY_RV610
: return "RV610";
91 case CHIP_FAMILY_RV630
: return "RV630";
92 case CHIP_FAMILY_RV670
: return "RV670";
93 case CHIP_FAMILY_RV620
: return "RV620";
94 case CHIP_FAMILY_RV635
: return "RV635";
95 case CHIP_FAMILY_RS780
: return "RS780";
96 case CHIP_FAMILY_RS880
: return "RS880";
97 case CHIP_FAMILY_RV770
: return "RV770";
98 case CHIP_FAMILY_RV730
: return "RV730";
99 case CHIP_FAMILY_RV710
: return "RV710";
100 case CHIP_FAMILY_RV740
: return "RV740";
101 default: return "unknown";
106 /* Return various strings for glGetString().
108 static const GLubyte
*radeonGetString(GLcontext
* ctx
, GLenum name
)
110 radeonContextPtr radeon
= RADEON_CONTEXT(ctx
);
111 static char buffer
[128];
115 if (IS_R600_CLASS(radeon
->radeonScreen
))
116 return (GLubyte
*) "Advanced Micro Devices, Inc.";
117 else if (IS_R300_CLASS(radeon
->radeonScreen
))
118 return (GLubyte
*) "DRI R300 Project";
120 return (GLubyte
*) "Tungsten Graphics, Inc.";
125 GLuint agp_mode
= (radeon
->radeonScreen
->card_type
==RADEON_CARD_PCI
) ? 0 :
126 radeon
->radeonScreen
->AGPMode
;
127 const char* chipclass
;
128 char hardwarename
[32];
130 if (IS_R600_CLASS(radeon
->radeonScreen
))
132 else if (IS_R300_CLASS(radeon
->radeonScreen
))
134 else if (IS_R200_CLASS(radeon
->radeonScreen
))
139 sprintf(hardwarename
, "%s (%s %04X)",
141 get_chip_family_name(radeon
->radeonScreen
->chip_family
),
142 radeon
->radeonScreen
->device_id
);
144 offset
= driGetRendererString(buffer
, hardwarename
, DRIVER_DATE
,
147 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
148 sprintf(&buffer
[offset
], " TCL");
149 } else if (IS_R300_CLASS(radeon
->radeonScreen
)) {
150 sprintf(&buffer
[offset
], " %sTCL",
151 (radeon
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
)
154 sprintf(&buffer
[offset
], " %sTCL",
155 !(radeon
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
159 if (radeon
->radeonScreen
->driScreen
->dri2
.enabled
)
160 strcat(buffer
, " DRI2");
162 return (GLubyte
*) buffer
;
170 /* Initialize the driver's misc functions.
172 static void radeonInitDriverFuncs(struct dd_function_table
*functions
)
174 functions
->GetString
= radeonGetString
;
178 * Create and initialize all common fields of the context,
179 * including the Mesa context itself.
181 GLboolean
radeonInitContext(radeonContextPtr radeon
,
182 struct dd_function_table
* functions
,
183 const __GLcontextModes
* glVisual
,
184 __DRIcontextPrivate
* driContextPriv
,
185 void *sharedContextPrivate
)
187 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
188 radeonScreenPtr screen
= (radeonScreenPtr
) (sPriv
->private);
193 /* Fill in additional standard functions. */
194 radeonInitDriverFuncs(functions
);
196 radeon
->radeonScreen
= screen
;
197 /* Allocate and initialize the Mesa context */
198 if (sharedContextPrivate
)
199 shareCtx
= ((radeonContextPtr
)sharedContextPrivate
)->glCtx
;
202 radeon
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
203 functions
, (void *)radeon
);
208 driContextPriv
->driverPrivate
= radeon
;
210 meta_init_metaops(ctx
, &radeon
->meta
);
212 _mesa_meta_init(ctx
);
215 radeon
->dri
.context
= driContextPriv
;
216 radeon
->dri
.screen
= sPriv
;
217 radeon
->dri
.hwContext
= driContextPriv
->hHWContext
;
218 radeon
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
219 radeon
->dri
.hwLockCount
= 0;
220 radeon
->dri
.fd
= sPriv
->fd
;
221 radeon
->dri
.drmMinor
= sPriv
->drm_version
.minor
;
223 radeon
->sarea
= (drm_radeon_sarea_t
*) ((GLubyte
*) sPriv
->pSAREA
+
224 screen
->sarea_priv_offset
);
227 fthrottle_mode
= driQueryOptioni(&radeon
->optionCache
, "fthrottle_mode");
228 radeon
->iw
.irq_seq
= -1;
229 radeon
->irqsEmitted
= 0;
230 radeon
->do_irqs
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
&&
231 radeon
->radeonScreen
->irq
);
233 radeon
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
235 if (!radeon
->do_irqs
)
237 "IRQ's not enabled, falling back to %s: %d %d\n",
238 radeon
->do_usleeps
? "usleeps" : "busy waits",
239 fthrottle_mode
, radeon
->radeonScreen
->irq
);
241 radeon
->texture_depth
= driQueryOptioni (&radeon
->optionCache
,
243 if (radeon
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
244 radeon
->texture_depth
= ( glVisual
->rgbBits
> 16 ) ?
245 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
247 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
248 radeon
->texture_row_align
= 256;
249 radeon
->texture_rect_row_align
= 256;
250 radeon
->texture_compressed_row_align
= 256;
251 } else if (IS_R200_CLASS(radeon
->radeonScreen
) ||
252 IS_R100_CLASS(radeon
->radeonScreen
)) {
253 radeon
->texture_row_align
= 32;
254 radeon
->texture_rect_row_align
= 64;
255 radeon
->texture_compressed_row_align
= 32;
256 } else { /* R300 - not sure this is all correct */
257 int chip_family
= radeon
->radeonScreen
->chip_family
;
258 if (chip_family
== CHIP_FAMILY_RS600
||
259 chip_family
== CHIP_FAMILY_RS690
||
260 chip_family
== CHIP_FAMILY_RS740
)
261 radeon
->texture_row_align
= 64;
263 radeon
->texture_row_align
= 32;
264 radeon
->texture_rect_row_align
= 64;
265 radeon
->texture_compressed_row_align
= 64;
268 make_empty_list(&radeon
->query
.not_flushed_head
);
269 radeon_init_dma(radeon
);
277 * Destroy the command buffer and state atoms.
279 static void radeon_destroy_atom_list(radeonContextPtr radeon
)
281 struct radeon_state_atom
*atom
;
283 foreach(atom
, &radeon
->hw
.atomlist
) {
292 * Cleanup common context fields.
293 * Called by r200DestroyContext/r300DestroyContext
295 void radeonDestroyContext(__DRIcontextPrivate
*driContextPriv
)
297 #ifdef RADEON_BO_TRACK
300 GET_CURRENT_CONTEXT(ctx
);
301 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
302 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
306 _mesa_meta_free(radeon
->glCtx
);
308 if (radeon
== current
) {
309 radeon_firevertices(radeon
);
310 _mesa_make_current(NULL
, NULL
, NULL
);
313 if (!is_empty_list(&radeon
->dma
.reserved
)) {
314 rcommonFlushCmdBuf( radeon
, __FUNCTION__
);
317 radeonFreeDmaRegions(radeon
);
318 radeonReleaseArrays(radeon
->glCtx
, ~0);
319 meta_destroy_metaops(&radeon
->meta
);
320 if (radeon
->vtbl
.free_context
)
321 radeon
->vtbl
.free_context(radeon
->glCtx
);
322 _swsetup_DestroyContext( radeon
->glCtx
);
323 _tnl_DestroyContext( radeon
->glCtx
);
324 _vbo_DestroyContext( radeon
->glCtx
);
325 _swrast_DestroyContext( radeon
->glCtx
);
328 /* free the Mesa context */
329 _mesa_destroy_context(radeon
->glCtx
);
331 /* _mesa_destroy_context() might result in calls to functions that
332 * depend on the DriverCtx, so don't set it to NULL before.
334 * radeon->glCtx->DriverCtx = NULL;
336 /* free the option cache */
337 driDestroyOptionCache(&radeon
->optionCache
);
339 rcommonDestroyCmdBuf(radeon
);
341 radeon_destroy_atom_list(radeon
);
343 if (radeon
->state
.scissor
.pClipRects
) {
344 FREE(radeon
->state
.scissor
.pClipRects
);
345 radeon
->state
.scissor
.pClipRects
= 0;
347 #ifdef RADEON_BO_TRACK
348 track
= fopen("/tmp/tracklog", "w");
350 radeon_tracker_print(&radeon
->radeonScreen
->bom
->tracker
, track
);
357 /* Force the context `c' to be unbound from its buffer.
359 GLboolean
radeonUnbindContext(__DRIcontextPrivate
* driContextPriv
)
361 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
363 if (RADEON_DEBUG
& RADEON_DRI
)
364 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
,
372 radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon
,
373 struct radeon_framebuffer
*draw
)
375 /* if radeon->fake */
376 struct radeon_renderbuffer
*rb
;
378 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
380 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
381 radeon
->radeonScreen
->frontOffset
,
384 RADEON_GEM_DOMAIN_VRAM
,
387 rb
->cpp
= radeon
->radeonScreen
->cpp
;
388 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
390 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
392 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
393 radeon
->radeonScreen
->backOffset
,
396 RADEON_GEM_DOMAIN_VRAM
,
399 rb
->cpp
= radeon
->radeonScreen
->cpp
;
400 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
402 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
404 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
405 radeon
->radeonScreen
->depthOffset
,
408 RADEON_GEM_DOMAIN_VRAM
,
411 rb
->cpp
= radeon
->radeonScreen
->cpp
;
412 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
414 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
416 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
417 radeon
->radeonScreen
->depthOffset
,
420 RADEON_GEM_DOMAIN_VRAM
,
423 rb
->cpp
= radeon
->radeonScreen
->cpp
;
424 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
429 radeon_make_renderbuffer_current(radeonContextPtr radeon
,
430 struct radeon_framebuffer
*draw
)
432 int size
= 4096*4096*4;
433 /* if radeon->fake */
434 struct radeon_renderbuffer
*rb
;
436 if (radeon
->radeonScreen
->kernel_mm
) {
437 radeon_make_kernel_renderbuffer_current(radeon
, draw
);
442 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
444 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
445 radeon
->radeonScreen
->frontOffset
+
446 radeon
->radeonScreen
->fbLocation
,
449 RADEON_GEM_DOMAIN_VRAM
,
452 rb
->cpp
= radeon
->radeonScreen
->cpp
;
453 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
455 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
457 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
458 radeon
->radeonScreen
->backOffset
+
459 radeon
->radeonScreen
->fbLocation
,
462 RADEON_GEM_DOMAIN_VRAM
,
465 rb
->cpp
= radeon
->radeonScreen
->cpp
;
466 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
468 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
470 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
471 radeon
->radeonScreen
->depthOffset
+
472 radeon
->radeonScreen
->fbLocation
,
475 RADEON_GEM_DOMAIN_VRAM
,
478 rb
->cpp
= radeon
->radeonScreen
->cpp
;
479 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
481 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
483 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
484 radeon
->radeonScreen
->depthOffset
+
485 radeon
->radeonScreen
->fbLocation
,
488 RADEON_GEM_DOMAIN_VRAM
,
491 rb
->cpp
= radeon
->radeonScreen
->cpp
;
492 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
497 radeon_bits_per_pixel(const struct radeon_renderbuffer
*rb
)
499 switch (rb
->base
._ActualFormat
) {
501 case GL_DEPTH_COMPONENT16
:
505 case GL_DEPTH_COMPONENT24
:
506 case GL_DEPTH24_STENCIL8_EXT
:
507 case GL_STENCIL_INDEX8_EXT
:
515 radeon_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
517 unsigned int attachments
[10];
518 __DRIbuffer
*buffers
= NULL
;
520 struct radeon_renderbuffer
*rb
;
522 struct radeon_framebuffer
*draw
;
523 radeonContextPtr radeon
;
525 struct radeon_bo
*depth_bo
= NULL
, *bo
;
527 if (RADEON_DEBUG
& RADEON_DRI
)
528 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
530 draw
= drawable
->driverPrivate
;
531 screen
= context
->driScreenPriv
;
532 radeon
= (radeonContextPtr
) context
->driverPrivate
;
534 if (screen
->dri2
.loader
535 && (screen
->dri2
.loader
->base
.version
> 2)
536 && (screen
->dri2
.loader
->getBuffersWithFormat
!= NULL
)) {
537 struct radeon_renderbuffer
*depth_rb
;
538 struct radeon_renderbuffer
*stencil_rb
;
541 if ((radeon
->is_front_buffer_rendering
||
542 radeon
->is_front_buffer_reading
||
544 && draw
->color_rb
[0]) {
545 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
546 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[0]);
549 if (draw
->color_rb
[1]) {
550 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
551 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[1]);
554 depth_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
555 stencil_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
557 if ((depth_rb
!= NULL
) && (stencil_rb
!= NULL
)) {
558 attachments
[i
++] = __DRI_BUFFER_DEPTH_STENCIL
;
559 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
560 } else if (depth_rb
!= NULL
) {
561 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
562 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
563 } else if (stencil_rb
!= NULL
) {
564 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
565 attachments
[i
++] = radeon_bits_per_pixel(stencil_rb
);
568 buffers
= (*screen
->dri2
.loader
->getBuffersWithFormat
)(drawable
,
573 drawable
->loaderPrivate
);
574 } else if (screen
->dri2
.loader
) {
576 if (draw
->color_rb
[0])
577 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
578 if (draw
->color_rb
[1])
579 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
580 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
))
581 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
582 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
))
583 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
585 buffers
= (*screen
->dri2
.loader
->getBuffers
)(drawable
,
590 drawable
->loaderPrivate
);
596 /* set one cliprect to cover the whole drawable */
601 drawable
->numClipRects
= 1;
602 drawable
->pClipRects
[0].x1
= 0;
603 drawable
->pClipRects
[0].y1
= 0;
604 drawable
->pClipRects
[0].x2
= drawable
->w
;
605 drawable
->pClipRects
[0].y2
= drawable
->h
;
606 drawable
->numBackClipRects
= 1;
607 drawable
->pBackClipRects
[0].x1
= 0;
608 drawable
->pBackClipRects
[0].y1
= 0;
609 drawable
->pBackClipRects
[0].x2
= drawable
->w
;
610 drawable
->pBackClipRects
[0].y2
= drawable
->h
;
611 for (i
= 0; i
< count
; i
++) {
612 switch (buffers
[i
].attachment
) {
613 case __DRI_BUFFER_FRONT_LEFT
:
614 rb
= draw
->color_rb
[0];
615 regname
= "dri2 front buffer";
617 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
618 rb
= draw
->color_rb
[0];
619 regname
= "dri2 fake front buffer";
621 case __DRI_BUFFER_BACK_LEFT
:
622 rb
= draw
->color_rb
[1];
623 regname
= "dri2 back buffer";
625 case __DRI_BUFFER_DEPTH
:
626 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
627 regname
= "dri2 depth buffer";
629 case __DRI_BUFFER_DEPTH_STENCIL
:
630 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
631 regname
= "dri2 depth / stencil buffer";
633 case __DRI_BUFFER_STENCIL
:
634 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
635 regname
= "dri2 stencil buffer";
637 case __DRI_BUFFER_ACCUM
:
640 "unhandled buffer attach event, attacment type %d\n",
641 buffers
[i
].attachment
);
649 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
650 if (name
== buffers
[i
].name
)
654 if (RADEON_DEBUG
& RADEON_DRI
)
656 "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
657 regname
, buffers
[i
].name
, buffers
[i
].attachment
,
658 buffers
[i
].cpp
, buffers
[i
].pitch
);
660 rb
->cpp
= buffers
[i
].cpp
;
661 rb
->pitch
= buffers
[i
].pitch
;
662 rb
->base
.Width
= drawable
->w
;
663 rb
->base
.Height
= drawable
->h
;
666 if (buffers
[i
].attachment
== __DRI_BUFFER_STENCIL
&& depth_bo
) {
667 if (RADEON_DEBUG
& RADEON_DRI
)
668 fprintf(stderr
, "(reusing depth buffer as stencil)\n");
672 uint32_t tiling_flags
= 0, pitch
= 0;
675 bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
679 RADEON_GEM_DOMAIN_VRAM
,
684 fprintf(stderr
, "failed to attach %s %d\n",
685 regname
, buffers
[i
].name
);
689 ret
= radeon_bo_get_tiling(bo
, &tiling_flags
, &pitch
);
690 if (tiling_flags
& RADEON_TILING_MACRO
)
691 bo
->flags
|= RADEON_BO_FLAGS_MACRO_TILE
;
692 if (tiling_flags
& RADEON_TILING_MICRO
)
693 bo
->flags
|= RADEON_BO_FLAGS_MICRO_TILE
;
697 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH
) {
698 if (draw
->base
.Visual
.depthBits
== 16)
703 radeon_renderbuffer_set_bo(rb
, bo
);
706 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH_STENCIL
) {
707 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
709 struct radeon_bo
*stencil_bo
= NULL
;
712 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
713 if (name
== buffers
[i
].name
)
718 radeon_bo_ref(stencil_bo
);
719 radeon_renderbuffer_set_bo(rb
, stencil_bo
);
720 radeon_bo_unref(stencil_bo
);
725 driUpdateFramebufferSize(radeon
->glCtx
, drawable
);
728 /* Force the context `c' to be the current context and associate with it
731 GLboolean
radeonMakeCurrent(__DRIcontextPrivate
* driContextPriv
,
732 __DRIdrawablePrivate
* driDrawPriv
,
733 __DRIdrawablePrivate
* driReadPriv
)
735 radeonContextPtr radeon
;
736 struct radeon_framebuffer
*drfb
;
737 struct gl_framebuffer
*readfb
;
739 if (!driContextPriv
) {
740 if (RADEON_DEBUG
& RADEON_DRI
)
741 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
742 _mesa_make_current(NULL
, NULL
, NULL
);
746 radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
747 drfb
= driDrawPriv
->driverPrivate
;
748 readfb
= driReadPriv
->driverPrivate
;
750 if (driContextPriv
->driScreenPriv
->dri2
.enabled
) {
751 radeon_update_renderbuffers(driContextPriv
, driDrawPriv
);
752 if (driDrawPriv
!= driReadPriv
)
753 radeon_update_renderbuffers(driContextPriv
, driReadPriv
);
754 _mesa_reference_renderbuffer(&radeon
->state
.color
.rb
,
755 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_BACK_LEFT
)->base
));
756 _mesa_reference_renderbuffer(&radeon
->state
.depth
.rb
,
757 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_DEPTH
)->base
));
759 radeon_make_renderbuffer_current(radeon
, drfb
);
762 if (RADEON_DEBUG
& RADEON_DRI
)
763 fprintf(stderr
, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__
, radeon
->glCtx
, drfb
, readfb
);
765 driUpdateFramebufferSize(radeon
->glCtx
, driDrawPriv
);
766 if (driReadPriv
!= driDrawPriv
)
767 driUpdateFramebufferSize(radeon
->glCtx
, driReadPriv
);
769 _mesa_make_current(radeon
->glCtx
, &drfb
->base
, readfb
);
771 _mesa_update_state(radeon
->glCtx
);
773 if (radeon
->glCtx
->DrawBuffer
== &drfb
->base
) {
774 if (driDrawPriv
->swap_interval
== (unsigned)-1) {
776 driDrawPriv
->vblFlags
=
777 (radeon
->radeonScreen
->irq
!= 0)
778 ? driGetDefaultVBlankFlags(&radeon
->
780 : VBLANK_FLAG_NO_IRQ
;
782 driDrawableInitVBlank(driDrawPriv
);
783 drfb
->vbl_waited
= driDrawPriv
->vblSeq
;
785 for (i
= 0; i
< 2; i
++) {
786 if (drfb
->color_rb
[i
])
787 drfb
->color_rb
[i
]->vbl_pending
= driDrawPriv
->vblSeq
;
792 radeon_window_moved(radeon
);
793 radeon_draw_buffer(radeon
->glCtx
, &drfb
->base
);
797 if (RADEON_DEBUG
& RADEON_DRI
)
798 fprintf(stderr
, "End %s\n", __FUNCTION__
);