intel/ppgtt: memory address alignment
authorSergii Romantsov <sergii.romantsov@gmail.com>
Wed, 15 Aug 2018 11:23:42 +0000 (14:23 +0300)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Wed, 15 Aug 2018 22:23:16 +0000 (23:23 +0100)
commit24839663a40257e0468406d72c48d431b5ae2bd4
treef8bfb7a2f4725024d3eea2f9237a2a11dfff4b4c
parentf0a8accb0d471fdb657313df9861d9903ccd8026
intel/ppgtt: memory address alignment

Kernel (for ppgtt) requires memory address to be
aligned to page size (4096).

-v2: added marking that also fixes initial commit 01058a552294.
-v3: numbers replaced by PAGE_SIZE; buffer-object size is aligned
instead of alignment of offsets (Chris Wilson).
-v4: changes related to PAGE_SIZE moved to separate commit
-v5: restored alignment to page-size for 0-size.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106997
Fixes: a363bb2cd0e2 (i965: Allocate VMA in userspace for full-PPGTT systems.)
Fixes: 01058a552294 (i965: Add virtual memory allocator infrastructure to brw_bufmgr.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
src/mesa/drivers/dri/i965/brw_bufmgr.c